USB: garmin_gps support for new generation of gps receivers
[deliverable/linux.git] / drivers / usb / host / ohci-omap.c
CommitLineData
1da177e4
LT
1/*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2005 David Brownell
6 * (C) Copyright 2002 Hewlett-Packard Company
7 *
8 * OMAP Bus Glue
9 *
10 * Modified for OMAP by Tony Lindgren <tony@atomide.com>
11 * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
12 * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
13 *
14 * This file is licenced under the GPL.
15 */
16
d54b5caa 17#include <linux/signal.h> /* IRQF_DISABLED */
4e57b681 18#include <linux/jiffies.h>
d052d1be 19#include <linux/platform_device.h>
f8ce2547 20#include <linux/clk.h>
4e57b681 21
1da177e4
LT
22#include <asm/hardware.h>
23#include <asm/io.h>
24#include <asm/mach-types.h>
25
1da177e4
LT
26#include <asm/arch/mux.h>
27#include <asm/arch/irqs.h>
28#include <asm/arch/gpio.h>
29#include <asm/arch/fpga.h>
30#include <asm/arch/usb.h>
1da177e4
LT
31
32
33/* OMAP-1510 OHCI has its own MMU for DMA */
34#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
35#define OMAP1510_LB_CLOCK_DIV 0xfffec10c
36#define OMAP1510_LB_MMU_CTL 0xfffec208
37#define OMAP1510_LB_MMU_LCK 0xfffec224
38#define OMAP1510_LB_MMU_LD_TLB 0xfffec228
39#define OMAP1510_LB_MMU_CAM_H 0xfffec22c
40#define OMAP1510_LB_MMU_CAM_L 0xfffec230
41#define OMAP1510_LB_MMU_RAM_H 0xfffec234
42#define OMAP1510_LB_MMU_RAM_L 0xfffec238
43
44
45#ifndef CONFIG_ARCH_OMAP
46#error "This file is OMAP bus glue. CONFIG_OMAP must be defined."
47#endif
48
49#ifdef CONFIG_TPS65010
50#include <asm/arch/tps65010.h>
51#else
52
53#define LOW 0
54#define HIGH 1
55
56#define GPIO1 1
57
58static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
59{
60 return 0;
61}
62
63#endif
64
65extern int usb_disabled(void);
66extern int ocpi_enable(void);
67
68static struct clk *usb_host_ck;
69
70static void omap_ohci_clock_power(int on)
71{
72 if (on) {
73 clk_enable(usb_host_ck);
74 /* guesstimate for T5 == 1x 32K clock + APLL lock time */
75 udelay(100);
76 } else {
77 clk_disable(usb_host_ck);
78 }
79}
80
81/*
82 * Board specific gang-switched transceiver power on/off.
83 * NOTE: OSK supplies power from DC, not battery.
84 */
85static int omap_ohci_transceiver_power(int on)
86{
87 if (on) {
88 if (machine_is_omap_innovator() && cpu_is_omap1510())
89 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
90 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
91 INNOVATOR_FPGA_CAM_USB_CONTROL);
92 else if (machine_is_omap_osk())
93 tps65010_set_gpio_out_value(GPIO1, LOW);
94 } else {
95 if (machine_is_omap_innovator() && cpu_is_omap1510())
96 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
97 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
98 INNOVATOR_FPGA_CAM_USB_CONTROL);
99 else if (machine_is_omap_osk())
100 tps65010_set_gpio_out_value(GPIO1, HIGH);
101 }
102
103 return 0;
104}
105
106/*
107 * OMAP-1510 specific Local Bus clock on/off
108 */
109static int omap_1510_local_bus_power(int on)
110{
111 if (on) {
112 omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
113 udelay(200);
114 } else {
115 omap_writel(0, OMAP1510_LB_MMU_CTL);
116 }
117
118 return 0;
119}
120
121/*
122 * OMAP-1510 specific Local Bus initialization
123 * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
124 * See also arch/mach-omap/memory.h for __virt_to_dma() and
125 * __dma_to_virt() which need to match with the physical
126 * Local Bus address below.
127 */
128static int omap_1510_local_bus_init(void)
129{
130 unsigned int tlb;
131 unsigned long lbaddr, physaddr;
132
133 omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
134 OMAP1510_LB_CLOCK_DIV);
135
136 /* Configure the Local Bus MMU table */
137 for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
138 lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
139 physaddr = tlb * 0x00100000 + PHYS_OFFSET;
140 omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
141 omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
142 OMAP1510_LB_MMU_CAM_L);
143 omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
144 omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
145 omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
146 omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
147 }
148
149 /* Enable the walking table */
150 omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
151 udelay(200);
152
153 return 0;
154}
155
156#ifdef CONFIG_USB_OTG
157
158static void start_hnp(struct ohci_hcd *ohci)
159{
160 const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1;
161 unsigned long flags;
162
163 otg_start_hnp(ohci->transceiver);
164
165 local_irq_save(flags);
166 ohci->transceiver->state = OTG_STATE_A_SUSPEND;
167 writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
168 OTG_CTRL_REG &= ~OTG_A_BUSREQ;
169 local_irq_restore(flags);
170}
171
172#endif
173
174/*-------------------------------------------------------------------------*/
175
176static int omap_start_hc(struct ohci_hcd *ohci, struct platform_device *pdev)
177{
178 struct omap_usb_config *config = pdev->dev.platform_data;
179 int need_transceiver = (config->otg != 0);
180 int ret;
181
182 dev_dbg(&pdev->dev, "starting USB Controller\n");
183
184 if (config->otg) {
185 ohci_to_hcd(ohci)->self.otg_port = config->otg;
186 /* default/minimum OTG power budget: 8 mA */
bc96c0ad 187 ohci_to_hcd(ohci)->power_budget = 8;
1da177e4
LT
188 }
189
190 /* boards can use OTG transceivers in non-OTG modes */
191 need_transceiver = need_transceiver
192 || machine_is_omap_h2() || machine_is_omap_h3();
193
194 if (cpu_is_omap16xx())
195 ocpi_enable();
196
197#ifdef CONFIG_ARCH_OMAP_OTG
198 if (need_transceiver) {
199 ohci->transceiver = otg_get_transceiver();
200 if (ohci->transceiver) {
201 int status = otg_set_host(ohci->transceiver,
202 &ohci_to_hcd(ohci)->self);
203 dev_dbg(&pdev->dev, "init %s transceiver, status %d\n",
204 ohci->transceiver->label, status);
205 if (status) {
206 if (ohci->transceiver)
207 put_device(ohci->transceiver->dev);
208 return status;
209 }
210 } else {
211 dev_err(&pdev->dev, "can't find transceiver\n");
212 return -ENODEV;
213 }
214 }
215#endif
216
217 omap_ohci_clock_power(1);
218
219 if (cpu_is_omap1510()) {
220 omap_1510_local_bus_power(1);
221 omap_1510_local_bus_init();
222 }
223
224 if ((ret = ohci_init(ohci)) < 0)
225 return ret;
226
227 /* board-specific power switching and overcurrent support */
228 if (machine_is_omap_osk() || machine_is_omap_innovator()) {
229 u32 rh = roothub_a (ohci);
230
231 /* power switching (ganged by default) */
232 rh &= ~RH_A_NPS;
233
234 /* TPS2045 switch for internal transceiver (port 1) */
235 if (machine_is_omap_osk()) {
bc96c0ad 236 ohci_to_hcd(ohci)->power_budget = 250;
1da177e4
LT
237
238 rh &= ~RH_A_NOCP;
239
240 /* gpio9 for overcurrent detction */
241 omap_cfg_reg(W8_1610_GPIO9);
242 omap_request_gpio(9);
243 omap_set_gpio_direction(9, 1 /* IN */);
244
245 /* for paranoia's sake: disable USB.PUEN */
246 omap_cfg_reg(W4_USB_HIGHZ);
247 }
248 ohci_writel(ohci, rh, &ohci->regs->roothub.a);
249 distrust_firmware = 0;
250 }
251
252 /* FIXME khubd hub requests should manage power switching */
253 omap_ohci_transceiver_power(1);
254
255 /* board init will have already handled HMC and mux setup.
256 * any external transceiver should already be initialized
257 * too, so all configured ports use the right signaling now.
258 */
259
260 return 0;
261}
262
263static void omap_stop_hc(struct platform_device *pdev)
264{
265 dev_dbg(&pdev->dev, "stopping USB Controller\n");
266 omap_ohci_clock_power(0);
267}
268
269
270/*-------------------------------------------------------------------------*/
271
272void usb_hcd_omap_remove (struct usb_hcd *, struct platform_device *);
273
274/* configure so an HC device and id are always provided */
275/* always called with process context; sleeping is OK */
276
277
278/**
279 * usb_hcd_omap_probe - initialize OMAP-based HCDs
280 * Context: !in_interrupt()
281 *
282 * Allocates basic resources for this USB host controller, and
283 * then invokes the start() method for the HCD associated with it
284 * through the hotplug entry's driver_data.
285 */
286int usb_hcd_omap_probe (const struct hc_driver *driver,
287 struct platform_device *pdev)
288{
48944738 289 int retval, irq;
1da177e4
LT
290 struct usb_hcd *hcd = 0;
291 struct ohci_hcd *ohci;
292
293 if (pdev->num_resources != 2) {
294 printk(KERN_ERR "hcd probe: invalid num_resources: %i\n",
295 pdev->num_resources);
296 return -ENODEV;
297 }
298
299 if (pdev->resource[0].flags != IORESOURCE_MEM
300 || pdev->resource[1].flags != IORESOURCE_IRQ) {
301 printk(KERN_ERR "hcd probe: invalid resource type\n");
302 return -ENODEV;
303 }
304
305 usb_host_ck = clk_get(0, "usb_hhc_ck");
306 if (IS_ERR(usb_host_ck))
307 return PTR_ERR(usb_host_ck);
308
309 hcd = usb_create_hcd (driver, &pdev->dev, pdev->dev.bus_id);
310 if (!hcd) {
311 retval = -ENOMEM;
312 goto err0;
313 }
314 hcd->rsrc_start = pdev->resource[0].start;
315 hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
316
317 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
318 dev_dbg(&pdev->dev, "request_mem_region failed\n");
319 retval = -EBUSY;
320 goto err1;
321 }
322
323 hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start);
324
325 ohci = hcd_to_ohci(hcd);
326 ohci_hcd_init(ohci);
327
328 retval = omap_start_hc(ohci, pdev);
329 if (retval < 0)
330 goto err2;
331
48944738
DV
332 irq = platform_get_irq(pdev, 0);
333 if (irq < 0) {
334 retval = -ENXIO;
335 goto err2;
336 }
d54b5caa 337 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED);
1da177e4
LT
338 if (retval == 0)
339 return retval;
340
341 omap_stop_hc(pdev);
342err2:
343 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
344err1:
345 usb_put_hcd(hcd);
346err0:
347 clk_put(usb_host_ck);
348 return retval;
349}
350
351
352/* may be called with controller, bus, and devices active */
353
354/**
355 * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
356 * @dev: USB Host Controller being removed
357 * Context: !in_interrupt()
358 *
359 * Reverses the effect of usb_hcd_omap_probe(), first invoking
360 * the HCD's stop() method. It is always called from a thread
361 * context, normally "rmmod", "apmd", or something similar.
362 *
363 */
364void usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
365{
366 usb_remove_hcd(hcd);
367 if (machine_is_omap_osk())
368 omap_free_gpio(9);
369 omap_stop_hc(pdev);
370 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
371 usb_put_hcd(hcd);
372 clk_put(usb_host_ck);
373}
374
375/*-------------------------------------------------------------------------*/
376
377static int __devinit
378ohci_omap_start (struct usb_hcd *hcd)
379{
380 struct omap_usb_config *config;
381 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
382 int ret;
383
384 config = hcd->self.controller->platform_data;
d413984a
DB
385 if (config->otg || config->rwc) {
386 ohci->hc_control = OHCI_CTRL_RWC;
1da177e4 387 writel(OHCI_CTRL_RWC, &ohci->regs->control);
d413984a 388 }
1da177e4
LT
389
390 if ((ret = ohci_run (ohci)) < 0) {
391 dev_err(hcd->self.controller, "can't start\n");
392 ohci_stop (hcd);
393 return ret;
394 }
395 return 0;
396}
397
398/*-------------------------------------------------------------------------*/
399
400static const struct hc_driver ohci_omap_hc_driver = {
401 .description = hcd_name,
402 .product_desc = "OMAP OHCI",
403 .hcd_priv_size = sizeof(struct ohci_hcd),
404
405 /*
406 * generic hardware linkage
407 */
408 .irq = ohci_irq,
409 .flags = HCD_USB11 | HCD_MEMORY,
410
411 /*
412 * basic lifecycle operations
413 */
414 .start = ohci_omap_start,
415 .stop = ohci_stop,
416
417 /*
418 * managing i/o requests and associated device resources
419 */
420 .urb_enqueue = ohci_urb_enqueue,
421 .urb_dequeue = ohci_urb_dequeue,
422 .endpoint_disable = ohci_endpoint_disable,
423
424 /*
425 * scheduling support
426 */
427 .get_frame_number = ohci_get_frame,
428
429 /*
430 * root hub support
431 */
432 .hub_status_data = ohci_hub_status_data,
433 .hub_control = ohci_hub_control,
d413984a 434 .hub_irq_enable = ohci_rhsc_enable,
8ad7fe16 435#ifdef CONFIG_PM
0c0382e3
AS
436 .bus_suspend = ohci_bus_suspend,
437 .bus_resume = ohci_bus_resume,
1da177e4
LT
438#endif
439 .start_port_reset = ohci_start_port_reset,
440};
441
442/*-------------------------------------------------------------------------*/
443
3ae5eaec 444static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
1da177e4 445{
3ae5eaec 446 return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
1da177e4
LT
447}
448
3ae5eaec 449static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
1da177e4 450{
3ae5eaec 451 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT
452 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
453
3ae5eaec 454 usb_hcd_omap_remove(hcd, dev);
1da177e4
LT
455 if (ohci->transceiver) {
456 (void) otg_set_host(ohci->transceiver, 0);
457 put_device(ohci->transceiver->dev);
458 }
3ae5eaec 459 platform_set_drvdata(dev, NULL);
1da177e4
LT
460
461 return 0;
462}
463
464/*-------------------------------------------------------------------------*/
465
466#ifdef CONFIG_PM
467
3ae5eaec 468static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message)
1da177e4 469{
3ae5eaec 470 struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
f197b2c5
DB
471
472 if (time_before(jiffies, ohci->next_statechange))
473 msleep(5);
474 ohci->next_statechange = jiffies;
475
476 omap_ohci_clock_power(0);
477 ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
478 dev->power.power_state = PMSG_SUSPEND;
479 return 0;
1da177e4
LT
480}
481
3ae5eaec 482static int ohci_omap_resume(struct platform_device *dev)
1da177e4 483{
3ae5eaec 484 struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
1da177e4 485
b404a5b0 486 if (time_before(jiffies, ohci->next_statechange))
487 msleep(5);
488 ohci->next_statechange = jiffies;
f197b2c5 489
b404a5b0 490 omap_ohci_clock_power(1);
f197b2c5
DB
491 dev->power.power_state = PMSG_ON;
492 usb_hcd_resume_root_hub(dev_get_drvdata(dev));
493 return 0;
1da177e4
LT
494}
495
496#endif
497
498/*-------------------------------------------------------------------------*/
499
500/*
501 * Driver definition to register with the OMAP bus
502 */
3ae5eaec 503static struct platform_driver ohci_hcd_omap_driver = {
1da177e4
LT
504 .probe = ohci_hcd_omap_drv_probe,
505 .remove = ohci_hcd_omap_drv_remove,
506#ifdef CONFIG_PM
507 .suspend = ohci_omap_suspend,
508 .resume = ohci_omap_resume,
509#endif
3ae5eaec
RK
510 .driver = {
511 .owner = THIS_MODULE,
512 .name = "ohci",
513 },
1da177e4
LT
514};
515
516static int __init ohci_hcd_omap_init (void)
517{
518 printk (KERN_DEBUG "%s: " DRIVER_INFO " (OMAP)\n", hcd_name);
519 if (usb_disabled())
520 return -ENODEV;
521
522 pr_debug("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
523 sizeof (struct ed), sizeof (struct td));
524
3ae5eaec 525 return platform_driver_register(&ohci_hcd_omap_driver);
1da177e4
LT
526}
527
528static void __exit ohci_hcd_omap_cleanup (void)
529{
3ae5eaec 530 platform_driver_unregister(&ohci_hcd_omap_driver);
1da177e4
LT
531}
532
533module_init (ohci_hcd_omap_init);
534module_exit (ohci_hcd_omap_cleanup);
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