USB: convert usb class devices to real devices
[deliverable/linux.git] / drivers / usb / host / ohci-pci.c
CommitLineData
1da177e4
LT
1/*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
dd9048af 6 *
1da177e4
LT
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
dd9048af 11 *
1da177e4
LT
12 * PCI Bus Glue
13 *
14 * This file is licenced under the GPL.
15 */
dd9048af 16
1da177e4
LT
17#ifndef CONFIG_PCI
18#error "This file is PCI bus glue. CONFIG_PCI must be defined."
19#endif
20
21/*-------------------------------------------------------------------------*/
22
23static int
24ohci_pci_reset (struct usb_hcd *hcd)
25{
26 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
27
28 ohci_hcd_init (ohci);
29 return ohci_init (ohci);
30}
31
32static int __devinit
33ohci_pci_start (struct usb_hcd *hcd)
34{
35 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
36 int ret;
37
6a9062f3
DB
38 /* REVISIT this whole block should move to reset(), which handles
39 * all the other one-time init.
40 */
41 if (hcd->self.controller) {
1da177e4
LT
42 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
43
44 /* AMD 756, for most chips (early revs), corrupts register
45 * values on read ... so enable the vendor workaround.
46 */
47 if (pdev->vendor == PCI_VENDOR_ID_AMD
48 && pdev->device == 0x740c) {
49 ohci->flags = OHCI_QUIRK_AMD756;
0e498763 50 ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
6a9062f3
DB
51 /* also erratum 10 (suspend/resume issues) */
52 device_init_wakeup(&hcd->self.root_hub->dev, 0);
1da177e4
LT
53 }
54
55 /* FIXME for some of the early AMD 760 southbridges, OHCI
56 * won't work at all. blacklist them.
57 */
58
59 /* Apple's OHCI driver has a lot of bizarre workarounds
60 * for this chip. Evidently control and bulk lists
61 * can get confused. (B&W G3 models, and ...)
62 */
63 else if (pdev->vendor == PCI_VENDOR_ID_OPTI
64 && pdev->device == 0xc861) {
0e498763 65 ohci_dbg (ohci,
1da177e4
LT
66 "WARNING: OPTi workarounds unavailable\n");
67 }
68
69 /* Check for NSC87560. We have to look at the bridge (fn1) to
70 * identify the USB (fn2). This quirk might apply to more or
71 * even all NSC stuff.
72 */
73 else if (pdev->vendor == PCI_VENDOR_ID_NS) {
74 struct pci_dev *b;
75
2e3a43f0 76 b = pci_get_slot (pdev->bus,
1da177e4
LT
77 PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
78 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
79 && b->vendor == PCI_VENDOR_ID_NS) {
80 ohci->flags |= OHCI_QUIRK_SUPERIO;
0e498763 81 ohci_dbg (ohci, "Using NSC SuperIO setup\n");
1da177e4 82 }
2e3a43f0 83 pci_dev_put(b);
1da177e4 84 }
0e498763 85
dd9048af 86 /* Check for Compaq's ZFMicro chipset, which needs short
0e498763
DB
87 * delays before control or bulk queues get re-activated
88 * in finish_unlinks()
89 */
90 else if (pdev->vendor == PCI_VENDOR_ID_COMPAQ
91 && pdev->device == 0xa0f8) {
92 ohci->flags |= OHCI_QUIRK_ZFMICRO;
93 ohci_dbg (ohci,
94 "enabled Compaq ZFMicro chipset quirk\n");
95 }
6a9062f3
DB
96
97 /* RWC may not be set for add-in PCI cards, since boot
98 * firmware probably ignored them. This transfers PCI
99 * PM wakeup capabilities (once the PCI layer is fixed).
100 */
101 if (device_may_wakeup(&pdev->dev))
102 ohci->hc_control |= OHCI_CTRL_RWC;
1da177e4
LT
103 }
104
105 /* NOTE: there may have already been a first reset, to
106 * keep bios/smm irqs from making trouble
107 */
108 if ((ret = ohci_run (ohci)) < 0) {
109 ohci_err (ohci, "can't start\n");
110 ohci_stop (hcd);
111 return ret;
112 }
113 return 0;
114}
115
116#ifdef CONFIG_PM
117
9a5d3e98 118static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
1da177e4 119{
8de98402
BH
120 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
121 unsigned long flags;
122 int rc = 0;
123
124 /* Root hub was already suspended. Disable irq emission and
125 * mark HW unaccessible, bail out if RH has been resumed. Use
126 * the spinlock to properly synchronize with possible pending
127 * RH suspend or resume activity.
128 *
129 * This is still racy as hcd->state is manipulated outside of
130 * any locks =P But that will be a different fix.
131 */
132 spin_lock_irqsave (&ohci->lock, flags);
133 if (hcd->state != HC_STATE_SUSPENDED) {
134 rc = -EINVAL;
135 goto bail;
136 }
137 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
138 (void)ohci_readl(ohci, &ohci->regs->intrdisable);
18584999
DB
139
140 /* make sure snapshot being resumed re-enumerates everything */
141 if (message.event == PM_EVENT_PRETHAW)
142 ohci_usb_reset(ohci);
143
8de98402
BH
144 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
145 bail:
146 spin_unlock_irqrestore (&ohci->lock, flags);
147
148 return rc;
1da177e4
LT
149}
150
151
152static int ohci_pci_resume (struct usb_hcd *hcd)
153{
8de98402 154 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
f197b2c5
DB
155 usb_hcd_resume_root_hub(hcd);
156 return 0;
1da177e4
LT
157}
158
159#endif /* CONFIG_PM */
160
161
162/*-------------------------------------------------------------------------*/
163
164static const struct hc_driver ohci_pci_hc_driver = {
165 .description = hcd_name,
166 .product_desc = "OHCI Host Controller",
167 .hcd_priv_size = sizeof(struct ohci_hcd),
168
169 /*
170 * generic hardware linkage
171 */
172 .irq = ohci_irq,
173 .flags = HCD_MEMORY | HCD_USB11,
174
175 /*
176 * basic lifecycle operations
177 */
178 .reset = ohci_pci_reset,
179 .start = ohci_pci_start,
d413984a 180 .stop = ohci_stop,
64a21d02 181 .shutdown = ohci_shutdown,
d413984a 182
1da177e4 183#ifdef CONFIG_PM
d413984a 184 /* these suspend/resume entries are for upstream PCI glue ONLY */
1da177e4
LT
185 .suspend = ohci_pci_suspend,
186 .resume = ohci_pci_resume,
187#endif
1da177e4
LT
188
189 /*
190 * managing i/o requests and associated device resources
191 */
192 .urb_enqueue = ohci_urb_enqueue,
193 .urb_dequeue = ohci_urb_dequeue,
194 .endpoint_disable = ohci_endpoint_disable,
195
196 /*
197 * scheduling support
198 */
199 .get_frame_number = ohci_get_frame,
200
201 /*
202 * root hub support
203 */
204 .hub_status_data = ohci_hub_status_data,
205 .hub_control = ohci_hub_control,
d413984a 206 .hub_irq_enable = ohci_rhsc_enable,
8ad7fe16 207#ifdef CONFIG_PM
0c0382e3
AS
208 .bus_suspend = ohci_bus_suspend,
209 .bus_resume = ohci_bus_resume,
1da177e4
LT
210#endif
211 .start_port_reset = ohci_start_port_reset,
212};
213
214/*-------------------------------------------------------------------------*/
215
216
217static const struct pci_device_id pci_ids [] = { {
218 /* handle any USB OHCI controller */
c67808ee 219 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
1da177e4
LT
220 .driver_data = (unsigned long) &ohci_pci_hc_driver,
221 }, { /* end: all zeroes */ }
222};
223MODULE_DEVICE_TABLE (pci, pci_ids);
224
225/* pci driver glue; this is a "new style" PCI driver module */
226static struct pci_driver ohci_pci_driver = {
227 .name = (char *) hcd_name,
228 .id_table = pci_ids,
229
230 .probe = usb_hcd_pci_probe,
231 .remove = usb_hcd_pci_remove,
232
233#ifdef CONFIG_PM
234 .suspend = usb_hcd_pci_suspend,
235 .resume = usb_hcd_pci_resume,
236#endif
64a21d02
AG
237
238 .shutdown = usb_hcd_pci_shutdown,
1da177e4
LT
239};
240
dd9048af
DB
241
242static int __init ohci_hcd_pci_init (void)
1da177e4
LT
243{
244 printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name);
245 if (usb_disabled())
246 return -ENODEV;
247
248 pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
249 sizeof (struct ed), sizeof (struct td));
250 return pci_register_driver (&ohci_pci_driver);
251}
252module_init (ohci_hcd_pci_init);
253
254/*-------------------------------------------------------------------------*/
255
dd9048af
DB
256static void __exit ohci_hcd_pci_cleanup (void)
257{
1da177e4
LT
258 pci_unregister_driver (&ohci_pci_driver);
259}
260module_exit (ohci_hcd_pci_cleanup);
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