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Merge 2.6.38-rc5 into staging-next
[deliverable/linux.git] / drivers / usb / host / sl811-hcd.c
CommitLineData
1da177e4
LT		 1/*
2 * SL811HS HCD (Host Controller Driver) for USB.
3 *
4 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
1e9a47b6
DB		 5 * Copyright (C) 2004-2005 David Brownell
6 *
1da177e4
LT		 7 * Periodic scheduling is based on Roman's OHCI code
8 * Copyright (C) 1999 Roman Weissgaerber
9 *
10 * The SL811HS controller handles host side USB (like the SL11H, but with
11 * another register set and SOF generation) as well as peripheral side USB
12 * (like the SL811S). This driver version doesn't implement the Gadget API
13 * for the peripheral role; or OTG (that'd need much external circuitry).
14 *
15 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
16 * document (providing significant pieces missing from that spec); plus
17 * the SL811S spec if you want peripheral side info.
1e9a47b6 18 */
1da177e4
LT		 19
20/*
21 * Status: Passed basic stress testing, works with hubs, mice, keyboards,
22 * and usb-storage.
23 *
24 * TODO:
25 * - usb suspend/resume triggered by sl811 (with USB_SUSPEND)
26 * - various issues noted in the code
27 * - performance work; use both register banks; ...
28 * - use urb->iso_frame_desc[] with ISO transfers
29 */
30
31#undef VERBOSE
32#undef PACKET_TRACE
33
1da177e4
LT		 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/kernel.h>
37#include <linux/delay.h>
38#include <linux/ioport.h>
39#include <linux/sched.h>
40#include <linux/slab.h>
1da177e4
LT		 41#include <linux/errno.h>
42#include <linux/init.h>
43#include <linux/timer.h>
44#include <linux/list.h>
45#include <linux/interrupt.h>
46#include <linux/usb.h>
325a4af6 47#include <linux/usb/sl811.h>
27729aad 48#include <linux/usb/hcd.h>
d052d1be 49#include <linux/platform_device.h>
1da177e4
LT		 50
51#include <asm/io.h>
52#include <asm/irq.h>
53#include <asm/system.h>
54#include <asm/byteorder.h>
8ca5bfab 55#include <asm/unaligned.h>
1da177e4 56
1da177e4
LT		 57#include "sl811.h"
58
59
60MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
61MODULE_LICENSE("GPL");
f4fce61d 62MODULE_ALIAS("platform:sl811-hcd");
1da177e4 63
1e9a47b6 64#define DRIVER_VERSION "19 May 2005"
1da177e4
LT		 65
66
67#ifndef DEBUG
68# define STUB_DEBUG_FILE
69#endif
70
71/* for now, use only one transfer register bank */
72#undef USE_B
73
74/* this doesn't understand urb->iso_frame_desc[], but if you had a driver
75 * that just queued one ISO frame per URB then iso transfers "should" work
76 * using the normal urb status fields.
77 */
78#define DISABLE_ISO
79
80// #define QUIRK2
81#define QUIRK3
82
83static const char hcd_name[] = "sl811-hcd";
84
85/*-------------------------------------------------------------------------*/
86
87static void port_power(struct sl811 *sl811, int is_on)
88{
89 struct usb_hcd *hcd = sl811_to_hcd(sl811);
90
91 /* hub is inactive unless the port is powered */
92 if (is_on) {
749da5f8 93 if (sl811->port1 & USB_PORT_STAT_POWER)
1da177e4
LT		 94 return;
95
749da5f8 96 sl811->port1 = USB_PORT_STAT_POWER;
1da177e4 97 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1da177e4
LT		 98 } else {
99 sl811->port1 = 0;
100 sl811->irq_enable = 0;
101 hcd->state = HC_STATE_HALT;
1da177e4
LT		 102 }
103 sl811->ctrl1 = 0;
104 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
105 sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
106
107 if (sl811->board && sl811->board->port_power) {
108 /* switch VBUS, at 500mA unless hub power budget gets set */
109 DBG("power %s\n", is_on ? "on" : "off");
110 sl811->board->port_power(hcd->self.controller, is_on);
111 }
112
113 /* reset as thoroughly as we can */
114 if (sl811->board && sl811->board->reset)
115 sl811->board->reset(hcd->self.controller);
1e9a47b6
DB		 116 else {
117 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
118 mdelay(20);
119 }
1da177e4
LT		 120
121 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
122 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
123 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
124 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
125
126 // if !is_on, put into lowpower mode now
127}
128
129/*-------------------------------------------------------------------------*/
130
131/* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue,
132 * and may start I/O. Endpoint queues are scanned during completion irq
093cf723 133 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
1da177e4
LT		 134 *
135 * Using an external DMA engine to copy a packet at a time could work,
136 * though setup/teardown costs may be too big to make it worthwhile.
137 */
138
139/* SETUP starts a new control request. Devices are not allowed to
140 * STALL or NAK these; they must cancel any pending control requests.
141 */
142static void setup_packet(
143 struct sl811 *sl811,
144 struct sl811h_ep *ep,
145 struct urb *urb,
146 u8 bank,
147 u8 control
148)
149{
150 u8 addr;
151 u8 len;
152 void __iomem *data_reg;
153
154 addr = SL811HS_PACKET_BUF(bank == 0);
155 len = sizeof(struct usb_ctrlrequest);
156 data_reg = sl811->data_reg;
157 sl811_write_buf(sl811, addr, urb->setup_packet, len);
158
159 /* autoincrementing */
160 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
161 writeb(len, data_reg);
162 writeb(SL_SETUP /* | ep->epnum */, data_reg);
163 writeb(usb_pipedevice(urb->pipe), data_reg);
164
165 /* always OUT/data0 */ ;
166 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
167 control | SL11H_HCTLMASK_OUT);
168 ep->length = 0;
169 PACKET("SETUP qh%p\n", ep);
170}
171
172/* STATUS finishes control requests, often after IN or OUT data packets */
173static void status_packet(
174 struct sl811 *sl811,
175 struct sl811h_ep *ep,
176 struct urb *urb,
177 u8 bank,
178 u8 control
179)
180{
181 int do_out;
182 void __iomem *data_reg;
183
184 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
185 data_reg = sl811->data_reg;
186
187 /* autoincrementing */
188 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
189 writeb(0, data_reg);
190 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
191 writeb(usb_pipedevice(urb->pipe), data_reg);
192
193 /* always data1; sometimes IN */
194 control |= SL11H_HCTLMASK_TOGGLE;
195 if (do_out)
196 control |= SL11H_HCTLMASK_OUT;
197 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
198 ep->length = 0;
199 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
200 do_out ? "out" : "in", ep);
201}
202
203/* IN packets can be used with any type of endpoint. here we just
204 * start the transfer, data from the peripheral may arrive later.
205 * urb->iso_frame_desc is currently ignored here...
206 */
207static void in_packet(
208 struct sl811 *sl811,
209 struct sl811h_ep *ep,
210 struct urb *urb,
211 u8 bank,
212 u8 control
213)
214{
215 u8 addr;
216 u8 len;
217 void __iomem *data_reg;
218
219 /* avoid losing data on overflow */
220 len = ep->maxpacket;
221 addr = SL811HS_PACKET_BUF(bank == 0);
222 if (!(control & SL11H_HCTLMASK_ISOCH)
223 && usb_gettoggle(urb->dev, ep->epnum, 0))
224 control |= SL11H_HCTLMASK_TOGGLE;
225 data_reg = sl811->data_reg;
226
227 /* autoincrementing */
228 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
229 writeb(len, data_reg);
230 writeb(SL_IN | ep->epnum, data_reg);
231 writeb(usb_pipedevice(urb->pipe), data_reg);
232
233 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
16e2e5f6 234 ep->length = min_t(u32, len,
1da177e4
LT		 235 urb->transfer_buffer_length - urb->actual_length);
236 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
237 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
238}
239
240/* OUT packets can be used with any type of endpoint.
241 * urb->iso_frame_desc is currently ignored here...
242 */
243static void out_packet(
244 struct sl811 *sl811,
245 struct sl811h_ep *ep,
246 struct urb *urb,
247 u8 bank,
248 u8 control
249)
250{
251 void *buf;
252 u8 addr;
253 u8 len;
254 void __iomem *data_reg;
255
256 buf = urb->transfer_buffer + urb->actual_length;
257 prefetch(buf);
258
16e2e5f6 259 len = min_t(u32, ep->maxpacket,
1da177e4
LT		 260 urb->transfer_buffer_length - urb->actual_length);
261
262 if (!(control & SL11H_HCTLMASK_ISOCH)
263 && usb_gettoggle(urb->dev, ep->epnum, 1))
264 control |= SL11H_HCTLMASK_TOGGLE;
265 addr = SL811HS_PACKET_BUF(bank == 0);
266 data_reg = sl811->data_reg;
267
268 sl811_write_buf(sl811, addr, buf, len);
269
270 /* autoincrementing */
271 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
272 writeb(len, data_reg);
273 writeb(SL_OUT | ep->epnum, data_reg);
274 writeb(usb_pipedevice(urb->pipe), data_reg);
275
276 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
277 control | SL11H_HCTLMASK_OUT);
278 ep->length = len;
279 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
280 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
281}
282
283/*-------------------------------------------------------------------------*/
284
285/* caller updates on-chip enables later */
286
287static inline void sofirq_on(struct sl811 *sl811)
288{
289 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
290 return;
291 VDBG("sof irq on\n");
292 sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
293}
294
295static inline void sofirq_off(struct sl811 *sl811)
296{
297 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
298 return;
299 VDBG("sof irq off\n");
300 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
301}
302
303/*-------------------------------------------------------------------------*/
304
305/* pick the next endpoint for a transaction, and issue it.
306 * frames start with periodic transfers (after whatever is pending
307 * from the previous frame), and the rest of the time is async
308 * transfers, scheduled round-robin.
309 */
310static struct sl811h_ep *start(struct sl811 *sl811, u8 bank)
311{
312 struct sl811h_ep *ep;
313 struct urb *urb;
314 int fclock;
315 u8 control;
316
317 /* use endpoint at schedule head */
318 if (sl811->next_periodic) {
319 ep = sl811->next_periodic;
320 sl811->next_periodic = ep->next;
321 } else {
322 if (sl811->next_async)
323 ep = sl811->next_async;
324 else if (!list_empty(&sl811->async))
325 ep = container_of(sl811->async.next,
326 struct sl811h_ep, schedule);
327 else {
328 /* could set up the first fullspeed periodic
329 * transfer for the next frame ...
330 */
331 return NULL;
332 }
333
334#ifdef USE_B
335 if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
336 return NULL;
337#endif
338
339 if (ep->schedule.next == &sl811->async)
340 sl811->next_async = NULL;
341 else
342 sl811->next_async = container_of(ep->schedule.next,
343 struct sl811h_ep, schedule);
344 }
345
346 if (unlikely(list_empty(&ep->hep->urb_list))) {
347 DBG("empty %p queue?\n", ep);
348 return NULL;
349 }
350
351 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
352 control = ep->defctrl;
353
354 /* if this frame doesn't have enough time left to transfer this
355 * packet, wait till the next frame. too-simple algorithm...
356 */
357 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
358 fclock -= 100; /* setup takes not much time */
359 if (urb->dev->speed == USB_SPEED_LOW) {
360 if (control & SL11H_HCTLMASK_PREAMBLE) {
361 /* also note erratum 1: some hubs won't work */
362 fclock -= 800;
363 }
364 fclock -= ep->maxpacket << 8;
365
366 /* erratum 2: AFTERSOF only works for fullspeed */
367 if (fclock < 0) {
368 if (ep->period)
369 sl811->stat_overrun++;
370 sofirq_on(sl811);
371 return NULL;
372 }
373 } else {
374 fclock -= 12000 / 19; /* 19 64byte packets/msec */
375 if (fclock < 0) {
376 if (ep->period)
377 sl811->stat_overrun++;
378 control |= SL11H_HCTLMASK_AFTERSOF;
379
380 /* throttle bulk/control irq noise */
381 } else if (ep->nak_count)
382 control |= SL11H_HCTLMASK_AFTERSOF;
383 }
384
385
386 switch (ep->nextpid) {
387 case USB_PID_IN:
388 in_packet(sl811, ep, urb, bank, control);
389 break;
390 case USB_PID_OUT:
391 out_packet(sl811, ep, urb, bank, control);
392 break;
393 case USB_PID_SETUP:
394 setup_packet(sl811, ep, urb, bank, control);
395 break;
396 case USB_PID_ACK: /* for control status */
397 status_packet(sl811, ep, urb, bank, control);
398 break;
399 default:
400 DBG("bad ep%p pid %02x\n", ep, ep->nextpid);
401 ep = NULL;
402 }
403 return ep;
404}
405
406#define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
407
408static inline void start_transfer(struct sl811 *sl811)
409{
749da5f8 410 if (sl811->port1 & USB_PORT_STAT_SUSPEND)
1da177e4
LT		 411 return;
412 if (sl811->active_a == NULL) {
413 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
414 if (sl811->active_a != NULL)
415 sl811->jiffies_a = jiffies + MIN_JIFFIES;
416 }
417#ifdef USE_B
418 if (sl811->active_b == NULL) {
419 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
420 if (sl811->active_b != NULL)
421 sl811->jiffies_b = jiffies + MIN_JIFFIES;
422 }
423#endif
424}
425
426static void finish_request(
427 struct sl811 *sl811,
428 struct sl811h_ep *ep,
429 struct urb *urb,
1da177e4
LT		 430 int status
431) __releases(sl811->lock) __acquires(sl811->lock)
432{
433 unsigned i;
434
435 if (usb_pipecontrol(urb->pipe))
436 ep->nextpid = USB_PID_SETUP;
437
e9df41c5 438 usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb);
1da177e4 439 spin_unlock(&sl811->lock);
4a00027d 440 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status);
1da177e4
LT		 441 spin_lock(&sl811->lock);
442
443 /* leave active endpoints in the schedule */
444 if (!list_empty(&ep->hep->urb_list))
445 return;
446
447 /* async deschedule? */
448 if (!list_empty(&ep->schedule)) {
449 list_del_init(&ep->schedule);
450 if (ep == sl811->next_async)
451 sl811->next_async = NULL;
452 return;
453 }
454
455 /* periodic deschedule */
456 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
457 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
458 struct sl811h_ep *temp;
459 struct sl811h_ep **prev = &sl811->periodic[i];
460
461 while (*prev && ((temp = *prev) != ep))
462 prev = &temp->next;
463 if (*prev)
464 *prev = ep->next;
465 sl811->load[i] -= ep->load;
1e9a47b6 466 }
1da177e4
LT		 467 ep->branch = PERIODIC_SIZE;
468 sl811->periodic_count--;
469 sl811_to_hcd(sl811)->self.bandwidth_allocated
470 -= ep->load / ep->period;
471 if (ep == sl811->next_periodic)
472 sl811->next_periodic = ep->next;
473
474 /* we might turn SOFs back on again for the async schedule */
475 if (sl811->periodic_count == 0)
476 sofirq_off(sl811);
477}
478
479static void
7d12e780 480done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
1da177e4
LT		 481{
482 u8 status;
483 struct urb *urb;
484 int urbstat = -EINPROGRESS;
485
486 if (unlikely(!ep))
487 return;
488
489 status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
490
491 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
492
493 /* we can safely ignore NAKs */
494 if (status & SL11H_STATMASK_NAK) {
495 // PACKET("...NAK_%02x qh%p\n", bank, ep);
496 if (!ep->period)
497 ep->nak_count++;
498 ep->error_count = 0;
499
500 /* ACK advances transfer, toggle, and maybe queue */
501 } else if (status & SL11H_STATMASK_ACK) {
502 struct usb_device *udev = urb->dev;
503 int len;
504 unsigned char *buf;
505
506 /* urb->iso_frame_desc is currently ignored here... */
507
508 ep->nak_count = ep->error_count = 0;
509 switch (ep->nextpid) {
510 case USB_PID_OUT:
511 // PACKET("...ACK/out_%02x qh%p\n", bank, ep);
512 urb->actual_length += ep->length;
513 usb_dotoggle(udev, ep->epnum, 1);
514 if (urb->actual_length
515 == urb->transfer_buffer_length) {
516 if (usb_pipecontrol(urb->pipe))
517 ep->nextpid = USB_PID_ACK;
518
519 /* some bulk protocols terminate OUT transfers
520 * by a short packet, using ZLPs not padding.
521 */
522 else if (ep->length < ep->maxpacket
523 || !(urb->transfer_flags
524 & URB_ZERO_PACKET))
525 urbstat = 0;
526 }
527 break;
528 case USB_PID_IN:
529 // PACKET("...ACK/in_%02x qh%p\n", bank, ep);
530 buf = urb->transfer_buffer + urb->actual_length;
531 prefetchw(buf);
532 len = ep->maxpacket - sl811_read(sl811,
533 bank + SL11H_XFERCNTREG);
534 if (len > ep->length) {
535 len = ep->length;
65e51098 536 urbstat = -EOVERFLOW;
1da177e4
LT		 537 }
538 urb->actual_length += len;
539 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
540 buf, len);
541 usb_dotoggle(udev, ep->epnum, 0);
65e51098
AS		 542 if (urbstat == -EINPROGRESS &&
543 (len < ep->maxpacket ||
544 urb->actual_length ==
545 urb->transfer_buffer_length)) {
546 if (usb_pipecontrol(urb->pipe))
547 ep->nextpid = USB_PID_ACK;
548 else
549 urbstat = 0;
1da177e4
LT		 550 }
551 break;
552 case USB_PID_SETUP:
553 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
554 if (urb->transfer_buffer_length == urb->actual_length)
555 ep->nextpid = USB_PID_ACK;
556 else if (usb_pipeout(urb->pipe)) {
557 usb_settoggle(udev, 0, 1, 1);
558 ep->nextpid = USB_PID_OUT;
559 } else {
560 usb_settoggle(udev, 0, 0, 1);
561 ep->nextpid = USB_PID_IN;
562 }
563 break;
564 case USB_PID_ACK:
565 // PACKET("...ACK/status_%02x qh%p\n", bank, ep);
566 urbstat = 0;
567 break;
568 }
569
570 /* STALL stops all transfers */
571 } else if (status & SL11H_STATMASK_STALL) {
572 PACKET("...STALL_%02x qh%p\n", bank, ep);
573 ep->nak_count = ep->error_count = 0;
574 urbstat = -EPIPE;
575
576 /* error? retry, until "3 strikes" */
577 } else if (++ep->error_count >= 3) {
578 if (status & SL11H_STATMASK_TMOUT)
38e2bfc9 579 urbstat = -ETIME;
1da177e4
LT		 580 else if (status & SL11H_STATMASK_OVF)
581 urbstat = -EOVERFLOW;
582 else
583 urbstat = -EPROTO;
584 ep->error_count = 0;
585 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
586 bank, status, ep, urbstat);
587 }
588
65e51098 589 if (urbstat != -EINPROGRESS || urb->unlinked)
7d12e780 590 finish_request(sl811, ep, urb, urbstat);
1da177e4
LT		 591}
592
593static inline u8 checkdone(struct sl811 *sl811)
594{
595 u8 ctl;
596 u8 irqstat = 0;
597
598 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
599 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
600 if (ctl & SL11H_HCTLMASK_ARM)
601 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
602 DBG("%s DONE_A: ctrl %02x sts %02x\n",
603 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
604 ctl,
605 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
606 irqstat |= SL11H_INTMASK_DONE_A;
607 }
608#ifdef USE_B
609 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
610 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
611 if (ctl & SL11H_HCTLMASK_ARM)
612 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
613 DBG("%s DONE_B: ctrl %02x sts %02x\n",
614 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
615 ctl,
616 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
617 irqstat |= SL11H_INTMASK_DONE_A;
618 }
619#endif
620 return irqstat;
621}
622
7d12e780 623static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
1da177e4
LT		 624{
625 struct sl811 *sl811 = hcd_to_sl811(hcd);
626 u8 irqstat;
627 irqreturn_t ret = IRQ_NONE;
628 unsigned retries = 5;
629
630 spin_lock(&sl811->lock);
631
632retry:
633 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
634 if (irqstat) {
635 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
636 irqstat &= sl811->irq_enable;
637 }
638
639#ifdef QUIRK2
640 /* this may no longer be necessary ... */
1e9a47b6 641 if (irqstat == 0) {
1da177e4 642 irqstat = checkdone(sl811);
1e9a47b6 643 if (irqstat)
1da177e4
LT		 644 sl811->stat_lost++;
645 }
646#endif
647
648 /* USB packets, not necessarily handled in the order they're
649 * issued ... that's fine if they're different endpoints.
650 */
651 if (irqstat & SL11H_INTMASK_DONE_A) {
7d12e780 652 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
1da177e4
LT		 653 sl811->active_a = NULL;
654 sl811->stat_a++;
655 }
656#ifdef USE_B
657 if (irqstat & SL11H_INTMASK_DONE_B) {
7d12e780 658 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
1da177e4
LT		 659 sl811->active_b = NULL;
660 sl811->stat_b++;
661 }
662#endif
663 if (irqstat & SL11H_INTMASK_SOFINTR) {
664 unsigned index;
665
666 index = sl811->frame++ % (PERIODIC_SIZE - 1);
667 sl811->stat_sof++;
668
669 /* be graceful about almost-inevitable periodic schedule
670 * overruns: continue the previous frame's transfers iff
671 * this one has nothing scheduled.
672 */
673 if (sl811->next_periodic) {
674 // ERR("overrun to slot %d\n", index);
675 sl811->stat_overrun++;
676 }
677 if (sl811->periodic[index])
678 sl811->next_periodic = sl811->periodic[index];
679 }
680
681 /* khubd manages debouncing and wakeup */
682 if (irqstat & SL11H_INTMASK_INSRMV) {
683 sl811->stat_insrmv++;
684
685 /* most stats are reset for each VBUS session */
686 sl811->stat_wake = 0;
687 sl811->stat_sof = 0;
688 sl811->stat_a = 0;
689 sl811->stat_b = 0;
690 sl811->stat_lost = 0;
691
692 sl811->ctrl1 = 0;
693 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
694
695 sl811->irq_enable = SL11H_INTMASK_INSRMV;
696 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
697
698 /* usbcore nukes other pending transactions on disconnect */
699 if (sl811->active_a) {
700 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
701 finish_request(sl811, sl811->active_a,
1e9a47b6
DB		 702 container_of(sl811->active_a
703 ->hep->urb_list.next,
1da177e4 704 struct urb, urb_list),
7d12e780 705 -ESHUTDOWN);
1da177e4
LT		 706 sl811->active_a = NULL;
707 }
708#ifdef USE_B
709 if (sl811->active_b) {
710 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
711 finish_request(sl811, sl811->active_b,
1e9a47b6
DB		 712 container_of(sl811->active_b
713 ->hep->urb_list.next,
1da177e4
LT		 714 struct urb, urb_list),
715 NULL, -ESHUTDOWN);
716 sl811->active_b = NULL;
717 }
718#endif
719
093cf723 720 /* port status seems weird until after reset, so
1da177e4
LT		 721 * force the reset and make khubd clean up later.
722 */
8a3461e2 723 if (irqstat & SL11H_INTMASK_RD)
749da5f8 724 sl811->port1 &= ~USB_PORT_STAT_CONNECTION;
8a3461e2 725 else
749da5f8 726 sl811->port1 |= USB_PORT_STAT_CONNECTION;
eb661bc8 727
749da5f8 728 sl811->port1 |= USB_PORT_STAT_C_CONNECTION << 16;
1da177e4
LT		 729
730 } else if (irqstat & SL11H_INTMASK_RD) {
749da5f8 731 if (sl811->port1 & USB_PORT_STAT_SUSPEND) {
1da177e4 732 DBG("wakeup\n");
749da5f8 733 sl811->port1 |= USB_PORT_STAT_C_SUSPEND << 16;
1da177e4
LT		 734 sl811->stat_wake++;
735 } else
736 irqstat &= ~SL11H_INTMASK_RD;
737 }
738
739 if (irqstat) {
749da5f8 740 if (sl811->port1 & USB_PORT_STAT_ENABLE)
1da177e4
LT		 741 start_transfer(sl811);
742 ret = IRQ_HANDLED;
743 if (retries--)
744 goto retry;
745 }
746
1e9a47b6 747 if (sl811->periodic_count == 0 && list_empty(&sl811->async))
1da177e4
LT		 748 sofirq_off(sl811);
749 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
750
751 spin_unlock(&sl811->lock);
752
753 return ret;
754}
755
756/*-------------------------------------------------------------------------*/
757
758/* usb 1.1 says max 90% of a frame is available for periodic transfers.
759 * this driver doesn't promise that much since it's got to handle an
760 * IRQ per packet; irq handling latencies also use up that time.
4b2e790a
DB		 761 *
762 * NOTE: the periodic schedule is a sparse tree, with the load for
763 * each branch minimized. see fig 3.5 in the OHCI spec for example.
1da177e4
LT		 764 */
765#define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */
766
767static int balance(struct sl811 *sl811, u16 period, u16 load)
768{
769 int i, branch = -ENOSPC;
770
771 /* search for the least loaded schedule branch of that period
772 * which has enough bandwidth left unreserved.
773 */
774 for (i = 0; i < period ; i++) {
775 if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
776 int j;
777
778 for (j = i; j < PERIODIC_SIZE; j += period) {
779 if ((sl811->load[j] + load)
780 > MAX_PERIODIC_LOAD)
781 break;
782 }
783 if (j < PERIODIC_SIZE)
784 continue;
1e9a47b6 785 branch = i;
1da177e4
LT		 786 }
787 }
788 return branch;
789}
790
791/*-------------------------------------------------------------------------*/
792
793static int sl811h_urb_enqueue(
794 struct usb_hcd *hcd,
1da177e4 795 struct urb *urb,
55016f10 796 gfp_t mem_flags
1da177e4
LT		 797) {
798 struct sl811 *sl811 = hcd_to_sl811(hcd);
799 struct usb_device *udev = urb->dev;
800 unsigned int pipe = urb->pipe;
801 int is_out = !usb_pipein(pipe);
802 int type = usb_pipetype(pipe);
803 int epnum = usb_pipeendpoint(pipe);
804 struct sl811h_ep *ep = NULL;
805 unsigned long flags;
806 int i;
e9df41c5
AS		 807 int retval;
808 struct usb_host_endpoint *hep = urb->ep;
1da177e4
LT		 809
810#ifdef DISABLE_ISO
811 if (type == PIPE_ISOCHRONOUS)
812 return -ENOSPC;
813#endif
814
815 /* avoid all allocations within spinlocks */
76be932a 816 if (!hep->hcpriv) {
7b842b6e 817 ep = kzalloc(sizeof *ep, mem_flags);
76be932a
KV		 818 if (ep == NULL)
819 return -ENOMEM;
820 }
1da177e4
LT		 821
822 spin_lock_irqsave(&sl811->lock, flags);
823
824 /* don't submit to a dead or disabled port */
749da5f8 825 if (!(sl811->port1 & USB_PORT_STAT_ENABLE)
1da177e4
LT		 826 || !HC_IS_RUNNING(hcd->state)) {
827 retval = -ENODEV;
4b2e790a 828 kfree(ep);
e9df41c5
AS		 829 goto fail_not_linked;
830 }
831 retval = usb_hcd_link_urb_to_ep(hcd, urb);
832 if (retval) {
833 kfree(ep);
834 goto fail_not_linked;
1da177e4
LT		 835 }
836
837 if (hep->hcpriv) {
838 kfree(ep);
839 ep = hep->hcpriv;
840 } else if (!ep) {
841 retval = -ENOMEM;
842 goto fail;
843
844 } else {
845 INIT_LIST_HEAD(&ep->schedule);
6a8e87b2 846 ep->udev = udev;
1da177e4
LT		 847 ep->epnum = epnum;
848 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
849 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
850 usb_settoggle(udev, epnum, is_out, 0);
851
852 if (type == PIPE_CONTROL)
853 ep->nextpid = USB_PID_SETUP;
854 else if (is_out)
855 ep->nextpid = USB_PID_OUT;
856 else
857 ep->nextpid = USB_PID_IN;
858
859 if (ep->maxpacket > H_MAXPACKET) {
860 /* iso packets up to 240 bytes could work... */
861 DBG("dev %d ep%d maxpacket %d\n",
862 udev->devnum, epnum, ep->maxpacket);
863 retval = -EINVAL;
2bd15f1f 864 kfree(ep);
1da177e4
LT		 865 goto fail;
866 }
867
868 if (udev->speed == USB_SPEED_LOW) {
869 /* send preamble for external hub? */
870 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
871 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
872 }
873 switch (type) {
874 case PIPE_ISOCHRONOUS:
875 case PIPE_INTERRUPT:
876 if (urb->interval > PERIODIC_SIZE)
877 urb->interval = PERIODIC_SIZE;
878 ep->period = urb->interval;
879 ep->branch = PERIODIC_SIZE;
880 if (type == PIPE_ISOCHRONOUS)
881 ep->defctrl |= SL11H_HCTLMASK_ISOCH;
882 ep->load = usb_calc_bus_time(udev->speed, !is_out,
883 (type == PIPE_ISOCHRONOUS),
884 usb_maxpacket(udev, pipe, is_out))
885 / 1000;
886 break;
887 }
888
1e9a47b6 889 ep->hep = hep;
1da177e4
LT		 890 hep->hcpriv = ep;
891 }
892
893 /* maybe put endpoint into schedule */
894 switch (type) {
895 case PIPE_CONTROL:
896 case PIPE_BULK:
897 if (list_empty(&ep->schedule))
898 list_add_tail(&ep->schedule, &sl811->async);
899 break;
900 case PIPE_ISOCHRONOUS:
901 case PIPE_INTERRUPT:
902 urb->interval = ep->period;
4b2e790a
DB		 903 if (ep->branch < PERIODIC_SIZE) {
904 /* NOTE: the phase is correct here, but the value
905 * needs offsetting by the transfer queue depth.
906 * All current drivers ignore start_frame, so this
907 * is unlikely to ever matter...
908 */
909 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
910 + ep->branch;
1da177e4 911 break;
4b2e790a 912 }
1da177e4
LT		 913
914 retval = balance(sl811, ep->period, ep->load);
915 if (retval < 0)
916 goto fail;
917 ep->branch = retval;
918 retval = 0;
919 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
920 + ep->branch;
921
922 /* sort each schedule branch by period (slow before fast)
923 * to share the faster parts of the tree without needing
924 * dummy/placeholder nodes
925 */
926 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
927 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
928 struct sl811h_ep **prev = &sl811->periodic[i];
929 struct sl811h_ep *here = *prev;
930
931 while (here && ep != here) {
932 if (ep->period > here->period)
933 break;
934 prev = &here->next;
935 here = *prev;
936 }
937 if (ep != here) {
938 ep->next = here;
939 *prev = ep;
940 }
941 sl811->load[i] += ep->load;
942 }
943 sl811->periodic_count++;
944 hcd->self.bandwidth_allocated += ep->load / ep->period;
945 sofirq_on(sl811);
946 }
947
1da177e4 948 urb->hcpriv = hep;
1da177e4
LT		 949 start_transfer(sl811);
950 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
951fail:
e9df41c5
AS		 952 if (retval)
953 usb_hcd_unlink_urb_from_ep(hcd, urb);
954fail_not_linked:
1da177e4
LT		 955 spin_unlock_irqrestore(&sl811->lock, flags);
956 return retval;
957}
958
e9df41c5 959static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1da177e4
LT		 960{
961 struct sl811 *sl811 = hcd_to_sl811(hcd);
1e9a47b6 962 struct usb_host_endpoint *hep;
1da177e4
LT		 963 unsigned long flags;
964 struct sl811h_ep *ep;
e9df41c5 965 int retval;
1da177e4 966
1e9a47b6 967 spin_lock_irqsave(&sl811->lock, flags);
e9df41c5
AS		 968 retval = usb_hcd_check_unlink_urb(hcd, urb, status);
969 if (retval)
1e9a47b6 970 goto fail;
1da177e4 971
e9df41c5 972 hep = urb->hcpriv;
1da177e4
LT		 973 ep = hep->hcpriv;
974 if (ep) {
975 /* finish right away if this urb can't be active ...
976 * note that some drivers wrongly expect delays
977 */
978 if (ep->hep->urb_list.next != &urb->urb_list) {
979 /* not front of queue? never active */
980
981 /* for active transfers, we expect an IRQ */
982 } else if (sl811->active_a == ep) {
983 if (time_before_eq(sl811->jiffies_a, jiffies)) {
984 /* happens a lot with lowspeed?? */
985 DBG("giveup on DONE_A: ctrl %02x sts %02x\n",
986 sl811_read(sl811,
987 SL811_EP_A(SL11H_HOSTCTLREG)),
988 sl811_read(sl811,
989 SL811_EP_A(SL11H_PKTSTATREG)));
990 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
991 0);
992 sl811->active_a = NULL;
993 } else
994 urb = NULL;
995#ifdef USE_B
996 } else if (sl811->active_b == ep) {
997 if (time_before_eq(sl811->jiffies_a, jiffies)) {
998 /* happens a lot with lowspeed?? */
999 DBG("giveup on DONE_B: ctrl %02x sts %02x\n",
1000 sl811_read(sl811,
1001 SL811_EP_B(SL11H_HOSTCTLREG)),
1002 sl811_read(sl811,
1003 SL811_EP_B(SL11H_PKTSTATREG)));
1004 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
1005 0);
1006 sl811->active_b = NULL;
1007 } else
1008 urb = NULL;
1009#endif
1010 } else {
1011 /* front of queue for inactive endpoint */
1012 }
1013
1014 if (urb)
7d12e780 1015 finish_request(sl811, ep, urb, 0);
1da177e4
LT		 1016 else
1017 VDBG("dequeue, urb %p active %s; wait4irq\n", urb,
1018 (sl811->active_a == ep) ? "A" : "B");
1019 } else
1020 retval = -EINVAL;
e9df41c5 1021 fail:
1da177e4
LT		 1022 spin_unlock_irqrestore(&sl811->lock, flags);
1023 return retval;
1024}
1025
1026static void
1027sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1028{
1029 struct sl811h_ep *ep = hep->hcpriv;
1030
1031 if (!ep)
1032 return;
1033
1034 /* assume we'd just wait for the irq */
1035 if (!list_empty(&hep->urb_list))
1036 msleep(3);
1037 if (!list_empty(&hep->urb_list))
b6c63937 1038 WARNING("ep %p not empty?\n", ep);
1da177e4 1039
1da177e4
LT		 1040 kfree(ep);
1041 hep->hcpriv = NULL;
1042}
1043
1044static int
1045sl811h_get_frame(struct usb_hcd *hcd)
1046{
1047 struct sl811 *sl811 = hcd_to_sl811(hcd);
1048
1049 /* wrong except while periodic transfers are scheduled;
1050 * never matches the on-the-wire frame;
1051 * subject to overruns.
1052 */
1053 return sl811->frame;
1054}
1055
1056
1057/*-------------------------------------------------------------------------*/
1058
1059/* the virtual root hub timer IRQ checks for hub status */
1060static int
1061sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1062{
1063 struct sl811 *sl811 = hcd_to_sl811(hcd);
1064#ifdef QUIRK3
1065 unsigned long flags;
1066
1067 /* non-SMP HACK: use root hub timer as i/o watchdog
1068 * this seems essential when SOF IRQs aren't in use...
1069 */
1070 local_irq_save(flags);
1071 if (!timer_pending(&sl811->timer)) {
7d12e780 1072 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1da177e4
LT		 1073 sl811->stat_lost++;
1074 }
1075 local_irq_restore(flags);
1076#endif
1077
1078 if (!(sl811->port1 & (0xffff << 16)))
1079 return 0;
1080
1081 /* tell khubd port 1 changed */
1082 *buf = (1 << 1);
1083 return 1;
1084}
1085
1086static void
1087sl811h_hub_descriptor (
1088 struct sl811 *sl811,
1089 struct usb_hub_descriptor *desc
1090) {
1091 u16 temp = 0;
1092
1093 desc->bDescriptorType = 0x29;
1094 desc->bHubContrCurrent = 0;
1095
1096 desc->bNbrPorts = 1;
1097 desc->bDescLength = 9;
1098
1099 /* per-port power switching (gang of one!), or none */
1100 desc->bPwrOn2PwrGood = 0;
1101 if (sl811->board && sl811->board->port_power) {
1102 desc->bPwrOn2PwrGood = sl811->board->potpg;
1103 if (!desc->bPwrOn2PwrGood)
1104 desc->bPwrOn2PwrGood = 10;
1105 temp = 0x0001;
1106 } else
1107 temp = 0x0002;
1108
1109 /* no overcurrent errors detection/handling */
1110 temp |= 0x0010;
1111
fd05e720 1112 desc->wHubCharacteristics = cpu_to_le16(temp);
1da177e4
LT		 1113
1114 /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */
4b2e790a 1115 desc->bitmap[0] = 0 << 1;
1da177e4
LT		 1116 desc->bitmap[1] = ~0;
1117}
1118
1119static void
1120sl811h_timer(unsigned long _sl811)
1121{
1122 struct sl811 *sl811 = (void *) _sl811;
1123 unsigned long flags;
1124 u8 irqstat;
1125 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
749da5f8
AS		 1126 const u32 mask = USB_PORT_STAT_CONNECTION
1127 | USB_PORT_STAT_ENABLE
288ead45 1128 | USB_PORT_STAT_LOW_SPEED;
1da177e4
LT		 1129
1130 spin_lock_irqsave(&sl811->lock, flags);
1131
1132 /* stop special signaling */
1133 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1134 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1135 udelay(3);
1136
1137 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1138
1139 switch (signaling) {
1140 case SL11H_CTL1MASK_SE0:
1141 DBG("end reset\n");
749da5f8
AS		 1142 sl811->port1 = (USB_PORT_STAT_C_RESET << 16)
1143 | USB_PORT_STAT_POWER;
1da177e4
LT		 1144 sl811->ctrl1 = 0;
1145 /* don't wrongly ack RD */
1146 if (irqstat & SL11H_INTMASK_INSRMV)
1147 irqstat &= ~SL11H_INTMASK_RD;
1148 break;
1149 case SL11H_CTL1MASK_K:
1150 DBG("end resume\n");
749da5f8 1151 sl811->port1 &= ~USB_PORT_STAT_SUSPEND;
1da177e4
LT		 1152 break;
1153 default:
1154 DBG("odd timer signaling: %02x\n", signaling);
1155 break;
1156 }
1157 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1158
1159 if (irqstat & SL11H_INTMASK_RD) {
1160 /* usbcore nukes all pending transactions on disconnect */
749da5f8
AS		 1161 if (sl811->port1 & USB_PORT_STAT_CONNECTION)
1162 sl811->port1 |= (USB_PORT_STAT_C_CONNECTION << 16)
1163 | (USB_PORT_STAT_C_ENABLE << 16);
1da177e4
LT		 1164 sl811->port1 &= ~mask;
1165 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1166 } else {
1167 sl811->port1 |= mask;
1168 if (irqstat & SL11H_INTMASK_DP)
288ead45 1169 sl811->port1 &= ~USB_PORT_STAT_LOW_SPEED;
1da177e4
LT		 1170 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1171 }
1172
749da5f8 1173 if (sl811->port1 & USB_PORT_STAT_CONNECTION) {
1da177e4
LT		 1174 u8 ctrl2 = SL811HS_CTL2_INIT;
1175
1176 sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1177#ifdef USE_B
1178 sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1179#endif
288ead45 1180 if (sl811->port1 & USB_PORT_STAT_LOW_SPEED) {
1da177e4
LT		 1181 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1182 ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1183 }
1184
1185 /* start SOFs flowing, kickstarting with A registers */
1186 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1187 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1188 sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1189
1190 /* autoincrementing */
1191 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1192 writeb(SL_SOF, sl811->data_reg);
1193 writeb(0, sl811->data_reg);
1194 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1195 SL11H_HCTLMASK_ARM);
1196
1197 /* khubd provides debounce delay */
1198 } else {
1199 sl811->ctrl1 = 0;
1200 }
1201 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1202
1203 /* reenable irqs */
1204 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1205 spin_unlock_irqrestore(&sl811->lock, flags);
1206}
1207
1208static int
1209sl811h_hub_control(
1210 struct usb_hcd *hcd,
1211 u16 typeReq,
1212 u16 wValue,
1213 u16 wIndex,
1214 char *buf,
1215 u16 wLength
1216) {
1217 struct sl811 *sl811 = hcd_to_sl811(hcd);
1218 int retval = 0;
1219 unsigned long flags;
1220
1221 spin_lock_irqsave(&sl811->lock, flags);
1222
1223 switch (typeReq) {
1224 case ClearHubFeature:
1225 case SetHubFeature:
1226 switch (wValue) {
1227 case C_HUB_OVER_CURRENT:
1228 case C_HUB_LOCAL_POWER:
1229 break;
1230 default:
1231 goto error;
1232 }
1233 break;
1234 case ClearPortFeature:
1235 if (wIndex != 1 || wLength != 0)
1236 goto error;
1237
1238 switch (wValue) {
1239 case USB_PORT_FEAT_ENABLE:
749da5f8 1240 sl811->port1 &= USB_PORT_STAT_POWER;
1da177e4
LT		 1241 sl811->ctrl1 = 0;
1242 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1243 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1244 sl811_write(sl811, SL11H_IRQ_ENABLE,
1245 sl811->irq_enable);
1246 break;
1247 case USB_PORT_FEAT_SUSPEND:
749da5f8 1248 if (!(sl811->port1 & USB_PORT_STAT_SUSPEND))
1da177e4
LT		 1249 break;
1250
1251 /* 20 msec of resume/K signaling, other irqs blocked */
1252 DBG("start resume...\n");
1253 sl811->irq_enable = 0;
1254 sl811_write(sl811, SL11H_IRQ_ENABLE,
1255 sl811->irq_enable);
1256 sl811->ctrl1 |= SL11H_CTL1MASK_K;
1257 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1258
1259 mod_timer(&sl811->timer, jiffies
1260 + msecs_to_jiffies(20));
1261 break;
1262 case USB_PORT_FEAT_POWER:
1263 port_power(sl811, 0);
1264 break;
1265 case USB_PORT_FEAT_C_ENABLE:
1266 case USB_PORT_FEAT_C_SUSPEND:
1267 case USB_PORT_FEAT_C_CONNECTION:
1268 case USB_PORT_FEAT_C_OVER_CURRENT:
1269 case USB_PORT_FEAT_C_RESET:
1270 break;
1271 default:
1272 goto error;
1273 }
1274 sl811->port1 &= ~(1 << wValue);
1275 break;
1276 case GetHubDescriptor:
1277 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1278 break;
1279 case GetHubStatus:
8ca5bfab 1280 put_unaligned_le32(0, buf);
1da177e4
LT		 1281 break;
1282 case GetPortStatus:
1283 if (wIndex != 1)
1284 goto error;
8ca5bfab 1285 put_unaligned_le32(sl811->port1, buf);
1da177e4
LT		 1286
1287#ifndef VERBOSE
1288 if (*(u16*)(buf+2)) /* only if wPortChange is interesting */
1289#endif
1290 DBG("GetPortStatus %08x\n", sl811->port1);
1291 break;
1292 case SetPortFeature:
1293 if (wIndex != 1 || wLength != 0)
1294 goto error;
1295 switch (wValue) {
1296 case USB_PORT_FEAT_SUSPEND:
749da5f8 1297 if (sl811->port1 & USB_PORT_STAT_RESET)
1da177e4 1298 goto error;
749da5f8 1299 if (!(sl811->port1 & USB_PORT_STAT_ENABLE))
1da177e4
LT		 1300 goto error;
1301
1302 DBG("suspend...\n");
1303 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1304 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1305 break;
1306 case USB_PORT_FEAT_POWER:
1307 port_power(sl811, 1);
1308 break;
1309 case USB_PORT_FEAT_RESET:
749da5f8 1310 if (sl811->port1 & USB_PORT_STAT_SUSPEND)
1da177e4 1311 goto error;
749da5f8 1312 if (!(sl811->port1 & USB_PORT_STAT_POWER))
1da177e4
LT		 1313 break;
1314
1315 /* 50 msec of reset/SE0 signaling, irqs blocked */
1316 sl811->irq_enable = 0;
1317 sl811_write(sl811, SL11H_IRQ_ENABLE,
1318 sl811->irq_enable);
1319 sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1320 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
749da5f8 1321 sl811->port1 |= USB_PORT_STAT_RESET;
1da177e4
LT		 1322 mod_timer(&sl811->timer, jiffies
1323 + msecs_to_jiffies(50));
1324 break;
1325 default:
1326 goto error;
1327 }
1328 sl811->port1 |= 1 << wValue;
1329 break;
1330
1331 default:
1332error:
1333 /* "protocol stall" on error */
1334 retval = -EPIPE;
1335 }
1336
1337 spin_unlock_irqrestore(&sl811->lock, flags);
1338 return retval;
1339}
1340
1341#ifdef CONFIG_PM
1342
1343static int
0c0382e3 1344sl811h_bus_suspend(struct usb_hcd *hcd)
1da177e4
LT		 1345{
1346 // SOFs off
441b62c1 1347 DBG("%s\n", __func__);
1da177e4
LT		 1348 return 0;
1349}
1350
1351static int
0c0382e3 1352sl811h_bus_resume(struct usb_hcd *hcd)
1da177e4
LT		 1353{
1354 // SOFs on
441b62c1 1355 DBG("%s\n", __func__);
1da177e4
LT		 1356 return 0;
1357}
1358
1359#else
1360
0c0382e3
AS		 1361#define sl811h_bus_suspend NULL
1362#define sl811h_bus_resume NULL
1da177e4
LT		 1363
1364#endif
1365
1366
1367/*-------------------------------------------------------------------------*/
1368
1369#ifdef STUB_DEBUG_FILE
1370
1371static inline void create_debug_file(struct sl811 *sl811) { }
1372static inline void remove_debug_file(struct sl811 *sl811) { }
1373
1374#else
1375
1376#include <linux/proc_fs.h>
1377#include <linux/seq_file.h>
1378
1379static void dump_irq(struct seq_file *s, char *label, u8 mask)
1380{
1381 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1382 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1383 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1384 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1385 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1386 (mask & SL11H_INTMASK_RD) ? " rd" : "",
1387 (mask & SL11H_INTMASK_DP) ? " dp" : "");
1388}
1389
1390static int proc_sl811h_show(struct seq_file *s, void *unused)
1391{
1392 struct sl811 *sl811 = s->private;
1393 struct sl811h_ep *ep;
1394 unsigned i;
1395
1396 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1397 sl811_to_hcd(sl811)->product_desc,
1398 hcd_name, DRIVER_VERSION,
1399 sl811->port1);
1400
1401 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1402 seq_printf(s, "current session: done_a %ld done_b %ld "
1403 "wake %ld sof %ld overrun %ld lost %ld\n\n",
1404 sl811->stat_a, sl811->stat_b,
1405 sl811->stat_wake, sl811->stat_sof,
1406 sl811->stat_overrun, sl811->stat_lost);
1407
1408 spin_lock_irq(&sl811->lock);
1409
1410 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1411 seq_printf(s, "(suspended)\n\n");
1412 else {
1413 u8 t = sl811_read(sl811, SL11H_CTLREG1);
1414
1415 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1416 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1417 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1418 case SL11H_CTL1MASK_NORMAL: s = ""; break;
1419 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1420 case SL11H_CTL1MASK_K: s = " k/resume"; break;
1421 default: s = "j"; break;
1422 }; s; }),
1423 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1424 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1425
1426 dump_irq(s, "irq_enable",
1427 sl811_read(sl811, SL11H_IRQ_ENABLE));
1428 dump_irq(s, "irq_status",
1429 sl811_read(sl811, SL11H_IRQ_STATUS));
1430 seq_printf(s, "frame clocks remaining: %d\n",
1431 sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1432 }
1433
1434 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1435 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1436 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1437 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1438 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1439 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1440 seq_printf(s, "\n");
1441 list_for_each_entry (ep, &sl811->async, schedule) {
1442 struct urb *urb;
1443
1444 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1445 " nak %d err %d\n",
1446 (ep == sl811->active_a) ? "(A) " : "",
1447 (ep == sl811->active_b) ? "(B) " : "",
1448 ep, ep->epnum,
1449 ({ char *s; switch (ep->nextpid) {
1450 case USB_PID_IN: s = "in"; break;
1451 case USB_PID_OUT: s = "out"; break;
1452 case USB_PID_SETUP: s = "setup"; break;
1453 case USB_PID_ACK: s = "status"; break;
1454 default: s = "?"; break;
1455 }; s;}),
1456 ep->maxpacket,
1457 ep->nak_count, ep->error_count);
1458 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1459 seq_printf(s, " urb%p, %d/%d\n", urb,
1460 urb->actual_length,
1461 urb->transfer_buffer_length);
1462 }
1463 }
1464 if (!list_empty(&sl811->async))
1465 seq_printf(s, "\n");
1466
1467 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1468
1469 for (i = 0; i < PERIODIC_SIZE; i++) {
1470 ep = sl811->periodic[i];
1471 if (!ep)
1472 continue;
1473 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1474
1475 /* DUMB: prints shared entries multiple times */
1476 do {
1477 seq_printf(s,
1478 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1479 "err %d\n",
1480 (ep == sl811->active_a) ? "(A) " : "",
1481 (ep == sl811->active_b) ? "(B) " : "",
1482 ep->period, ep,
1483 (ep->udev->speed == USB_SPEED_FULL)
1484 ? "" : "ls ",
1485 ep->udev->devnum, ep->epnum,
1486 (ep->epnum == 0) ? ""
1487 : ((ep->nextpid == USB_PID_IN)
1488 ? "in"
1489 : "out"),
1490 ep->maxpacket, ep->error_count);
1491 ep = ep->next;
1492 } while (ep);
1493 }
1494
1495 spin_unlock_irq(&sl811->lock);
1496 seq_printf(s, "\n");
1497
1498 return 0;
1499}
1500
1501static int proc_sl811h_open(struct inode *inode, struct file *file)
1502{
1503 return single_open(file, proc_sl811h_show, PDE(inode)->data);
1504}
1505
066202dd 1506static const struct file_operations proc_ops = {
1da177e4
LT		 1507 .open = proc_sl811h_open,
1508 .read = seq_read,
1509 .llseek = seq_lseek,
1510 .release = single_release,
1511};
1512
1513/* expect just one sl811 per system */
1514static const char proc_filename[] = "driver/sl811h";
1515
1516static void create_debug_file(struct sl811 *sl811)
1517{
cdefa185 1518 sl811->pde = proc_create_data(proc_filename, 0, NULL, &proc_ops, sl811);
1da177e4
LT		 1519}
1520
1521static void remove_debug_file(struct sl811 *sl811)
1522{
1523 if (sl811->pde)
1524 remove_proc_entry(proc_filename, NULL);
1525}
1526
1527#endif
1528
1529/*-------------------------------------------------------------------------*/
1530
1531static void
1532sl811h_stop(struct usb_hcd *hcd)
1533{
1534 struct sl811 *sl811 = hcd_to_sl811(hcd);
1535 unsigned long flags;
1536
1537 del_timer_sync(&hcd->rh_timer);
1538
1539 spin_lock_irqsave(&sl811->lock, flags);
1540 port_power(sl811, 0);
1541 spin_unlock_irqrestore(&sl811->lock, flags);
1542}
1543
1544static int
1545sl811h_start(struct usb_hcd *hcd)
1546{
1547 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1548
1549 /* chip has been reset, VBUS power is off */
1da177e4
LT		 1550 hcd->state = HC_STATE_RUNNING;
1551
bc96c0ad 1552 if (sl811->board) {
0c8624f9
DB		 1553 if (!device_can_wakeup(hcd->self.controller))
1554 device_init_wakeup(hcd->self.controller,
1555 sl811->board->can_wakeup);
bc96c0ad
AS		 1556 hcd->power_budget = sl811->board->power * 2;
1557 }
1da177e4 1558
3a4fa0a2 1559 /* enable power and interrupts */
1e9a47b6
DB		 1560 port_power(sl811, 1);
1561
1da177e4
LT		 1562 return 0;
1563}
1564
1565/*-------------------------------------------------------------------------*/
1566
1567static struct hc_driver sl811h_hc_driver = {
1568 .description = hcd_name,
1569 .hcd_priv_size = sizeof(struct sl811),
1570
1571 /*
1572 * generic hardware linkage
1573 */
1574 .irq = sl811h_irq,
1575 .flags = HCD_USB11 | HCD_MEMORY,
1576
1577 /* Basic lifecycle operations */
1578 .start = sl811h_start,
1579 .stop = sl811h_stop,
1580
1581 /*
1582 * managing i/o requests and associated device resources
1583 */
1584 .urb_enqueue = sl811h_urb_enqueue,
1585 .urb_dequeue = sl811h_urb_dequeue,
1586 .endpoint_disable = sl811h_endpoint_disable,
1587
1588 /*
1589 * periodic schedule support
1590 */
1591 .get_frame_number = sl811h_get_frame,
1592
1593 /*
1594 * root hub support
1595 */
1596 .hub_status_data = sl811h_hub_status_data,
1597 .hub_control = sl811h_hub_control,
0c0382e3
AS		 1598 .bus_suspend = sl811h_bus_suspend,
1599 .bus_resume = sl811h_bus_resume,
1da177e4
LT		 1600};
1601
1602/*-------------------------------------------------------------------------*/
1603
1e9a47b6 1604static int __devexit
3ae5eaec 1605sl811h_remove(struct platform_device *dev)
1da177e4 1606{
3ae5eaec 1607 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4 1608 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1609 struct resource *res;
1610
1da177e4
LT		 1611 remove_debug_file(sl811);
1612 usb_remove_hcd(hcd);
1613
1e9a47b6 1614 /* some platforms may use IORESOURCE_IO */
3ae5eaec 1615 res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1616 if (res)
1617 iounmap(sl811->data_reg);
1da177e4 1618
3ae5eaec 1619 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1e9a47b6
DB		 1620 if (res)
1621 iounmap(sl811->addr_reg);
1da177e4
LT		 1622
1623 usb_put_hcd(hcd);
1624 return 0;
1625}
1626
1e9a47b6 1627static int __devinit
3ae5eaec 1628sl811h_probe(struct platform_device *dev)
1da177e4
LT		 1629{
1630 struct usb_hcd *hcd;
1631 struct sl811 *sl811;
27140219 1632 struct resource *addr, *data, *ires;
1da177e4
LT		 1633 int irq;
1634 void __iomem *addr_reg;
1635 void __iomem *data_reg;
1636 int retval;
1e9a47b6 1637 u8 tmp, ioaddr = 0;
27140219 1638 unsigned long irqflags;
1da177e4
LT		 1639
1640 /* basic sanity checks first. board-specific init logic should
1641 * have initialized these three resources and probably board
1642 * specific platform_data. we don't probe for IRQs, and do only
1643 * minimal sanity checking.
1644 */
27140219
MZ		 1645 ires = platform_get_resource(dev, IORESOURCE_IRQ, 0);
1646 if (dev->num_resources < 3 || !ires)
1da177e4
LT		 1647 return -ENODEV;
1648
27140219
MZ		 1649 irq = ires->start;
1650 irqflags = ires->flags & IRQF_TRIGGER_MASK;
1651
1da177e4 1652 /* refuse to confuse usbcore */
3ae5eaec 1653 if (dev->dev.dma_mask) {
1da177e4
LT		 1654 DBG("no we won't dma\n");
1655 return -EINVAL;
1656 }
1657
1e9a47b6 1658 /* the chip may be wired for either kind of addressing */
3ae5eaec
RK		 1659 addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1660 data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1661 retval = -EBUSY;
1662 if (!addr || !data) {
3ae5eaec
RK		 1663 addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1664 data = platform_get_resource(dev, IORESOURCE_IO, 1);
1e9a47b6
DB		 1665 if (!addr || !data)
1666 return -ENODEV;
1667 ioaddr = 1;
2427ddd8
GKH		 1668 /*
1669 * NOTE: 64-bit resource->start is getting truncated
1670 * to avoid compiler warning, assuming that ->start
1671 * is always 32-bit for this case
1672 */
1673 addr_reg = (void __iomem *) (unsigned long) addr->start;
1674 data_reg = (void __iomem *) (unsigned long) data->start;
1e9a47b6
DB		 1675 } else {
1676 addr_reg = ioremap(addr->start, 1);
1677 if (addr_reg == NULL) {
1678 retval = -ENOMEM;
1679 goto err2;
1680 }
1da177e4 1681
1e9a47b6
DB		 1682 data_reg = ioremap(data->start, 1);
1683 if (data_reg == NULL) {
1684 retval = -ENOMEM;
1685 goto err4;
1686 }
1da177e4
LT		 1687 }
1688
1689 /* allocate and initialize hcd */
7071a3ce 1690 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev_name(&dev->dev));
1da177e4
LT		 1691 if (!hcd) {
1692 retval = -ENOMEM;
1693 goto err5;
1694 }
1695 hcd->rsrc_start = addr->start;
1696 sl811 = hcd_to_sl811(hcd);
1697
1698 spin_lock_init(&sl811->lock);
1699 INIT_LIST_HEAD(&sl811->async);
3ae5eaec 1700 sl811->board = dev->dev.platform_data;
1da177e4
LT		 1701 init_timer(&sl811->timer);
1702 sl811->timer.function = sl811h_timer;
1703 sl811->timer.data = (unsigned long) sl811;
1704 sl811->addr_reg = addr_reg;
1705 sl811->data_reg = data_reg;
1706
1707 spin_lock_irq(&sl811->lock);
1708 port_power(sl811, 0);
1709 spin_unlock_irq(&sl811->lock);
1710 msleep(200);
1711
1712 tmp = sl811_read(sl811, SL11H_HWREVREG);
1713 switch (tmp >> 4) {
1714 case 1:
1715 hcd->product_desc = "SL811HS v1.2";
1716 break;
1717 case 2:
1718 hcd->product_desc = "SL811HS v1.5";
1719 break;
1720 default:
1721 /* reject case 0, SL11S is less functional */
1722 DBG("chiprev %02x\n", tmp);
1723 retval = -ENXIO;
1724 goto err6;
1725 }
1726
1e9a47b6
DB		 1727 /* The chip's IRQ is level triggered, active high. A requirement
1728 * for platform device setup is to cope with things like signal
1729 * inverters (e.g. CF is active low) or working only with edge
1730 * triggers (e.g. most ARM CPUs). Initial driver stress testing
1731 * was on a system with single edge triggering, so most sorts of
1732 * triggering arrangement should work.
27140219
MZ		 1733 *
1734 * Use resource IRQ flags if set by platform device setup.
1e9a47b6 1735 */
27140219
MZ		 1736 irqflags |= IRQF_SHARED;
1737 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | irqflags);
1da177e4
LT		 1738 if (retval != 0)
1739 goto err6;
1740
1741 create_debug_file(sl811);
1742 return retval;
1743
1744 err6:
1745 usb_put_hcd(hcd);
1746 err5:
1e9a47b6
DB		 1747 if (!ioaddr)
1748 iounmap(data_reg);
1da177e4 1749 err4:
1e9a47b6
DB		 1750 if (!ioaddr)
1751 iounmap(addr_reg);
1da177e4 1752 err2:
1da177e4
LT		 1753 DBG("init error, %d\n", retval);
1754 return retval;
1755}
1756
1757#ifdef CONFIG_PM
1758
1759/* for this device there's no useful distinction between the controller
1e9a47b6 1760 * and its root hub, except that the root hub only gets direct PM calls
1da177e4
LT		 1761 * when CONFIG_USB_SUSPEND is enabled.
1762 */
1763
1764static int
3ae5eaec 1765sl811h_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1766{
3ae5eaec 1767 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1768 struct sl811 *sl811 = hcd_to_sl811(hcd);
1769 int retval = 0;
1770
18584999
DB		 1771 switch (state.event) {
1772 case PM_EVENT_FREEZE:
0c0382e3 1773 retval = sl811h_bus_suspend(hcd);
18584999
DB		 1774 break;
1775 case PM_EVENT_SUSPEND:
3a2d5b70 1776 case PM_EVENT_HIBERNATE:
18584999 1777 case PM_EVENT_PRETHAW: /* explicitly discard hw state */
1da177e4 1778 port_power(sl811, 0);
18584999
DB		 1779 break;
1780 }
1da177e4
LT		 1781 return retval;
1782}
1783
1784static int
3ae5eaec 1785sl811h_resume(struct platform_device *dev)
1da177e4 1786{
3ae5eaec 1787 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1788 struct sl811 *sl811 = hcd_to_sl811(hcd);
1789
1da177e4
LT		 1790 /* with no "check to see if VBUS is still powered" board hook,
1791 * let's assume it'd only be powered to enable remote wakeup.
1792 */
70a1c9e0 1793 if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1da177e4
LT		 1794 sl811->port1 = 0;
1795 port_power(sl811, 1);
1c50c317 1796 usb_root_hub_lost_power(hcd->self.root_hub);
1da177e4
LT		 1797 return 0;
1798 }
1799
0c0382e3 1800 return sl811h_bus_resume(hcd);
1da177e4
LT		 1801}
1802
1803#else
1804
1805#define sl811h_suspend NULL
1806#define sl811h_resume NULL
1807
1808#endif
1809
1810
1e9a47b6 1811/* this driver is exported so sl811_cs can depend on it */
3ae5eaec 1812struct platform_driver sl811h_driver = {
1da177e4 1813 .probe = sl811h_probe,
1e9a47b6 1814 .remove = __devexit_p(sl811h_remove),
1da177e4
LT		 1815
1816 .suspend = sl811h_suspend,
1817 .resume = sl811h_resume,
3ae5eaec
RK		 1818 .driver = {
1819 .name = (char *) hcd_name,
1820 .owner = THIS_MODULE,
1821 },
1da177e4 1822};
1e9a47b6 1823EXPORT_SYMBOL(sl811h_driver);
1da177e4
LT		 1824
1825/*-------------------------------------------------------------------------*/
1e9a47b6
DB		 1826
1827static int __init sl811h_init(void)
1da177e4
LT		 1828{
1829 if (usb_disabled())
1830 return -ENODEV;
1831
1832 INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
3ae5eaec 1833 return platform_driver_register(&sl811h_driver);
1da177e4
LT		 1834}
1835module_init(sl811h_init);
1836
1e9a47b6
DB		 1837static void __exit sl811h_cleanup(void)
1838{
3ae5eaec 1839 platform_driver_unregister(&sl811h_driver);
1da177e4
LT		 1840}
1841module_exit(sl811h_cleanup);
Linux kernel - Deliverables
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