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USB: ti_usb: fix module removal
[deliverable/linux.git] / drivers / usb / host / sl811-hcd.c
CommitLineData
1da177e4
LT		 1/*
2 * SL811HS HCD (Host Controller Driver) for USB.
3 *
4 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
1e9a47b6
DB		 5 * Copyright (C) 2004-2005 David Brownell
6 *
1da177e4
LT		 7 * Periodic scheduling is based on Roman's OHCI code
8 * Copyright (C) 1999 Roman Weissgaerber
9 *
10 * The SL811HS controller handles host side USB (like the SL11H, but with
11 * another register set and SOF generation) as well as peripheral side USB
12 * (like the SL811S). This driver version doesn't implement the Gadget API
13 * for the peripheral role; or OTG (that'd need much external circuitry).
14 *
15 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
16 * document (providing significant pieces missing from that spec); plus
17 * the SL811S spec if you want peripheral side info.
1e9a47b6 18 */
1da177e4
LT		 19
20/*
21 * Status: Passed basic stress testing, works with hubs, mice, keyboards,
22 * and usb-storage.
23 *
24 * TODO:
25 * - usb suspend/resume triggered by sl811 (with USB_SUSPEND)
26 * - various issues noted in the code
27 * - performance work; use both register banks; ...
28 * - use urb->iso_frame_desc[] with ISO transfers
29 */
30
31#undef VERBOSE
32#undef PACKET_TRACE
33
1da177e4
LT		 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/kernel.h>
37#include <linux/delay.h>
38#include <linux/ioport.h>
39#include <linux/sched.h>
40#include <linux/slab.h>
1da177e4
LT		 41#include <linux/errno.h>
42#include <linux/init.h>
43#include <linux/timer.h>
44#include <linux/list.h>
45#include <linux/interrupt.h>
46#include <linux/usb.h>
325a4af6 47#include <linux/usb/sl811.h>
27729aad 48#include <linux/usb/hcd.h>
d052d1be 49#include <linux/platform_device.h>
1da177e4
LT		 50
51#include <asm/io.h>
52#include <asm/irq.h>
53#include <asm/system.h>
54#include <asm/byteorder.h>
8ca5bfab 55#include <asm/unaligned.h>
1da177e4 56
1da177e4
LT		 57#include "sl811.h"
58
59
60MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
61MODULE_LICENSE("GPL");
f4fce61d 62MODULE_ALIAS("platform:sl811-hcd");
1da177e4 63
1e9a47b6 64#define DRIVER_VERSION "19 May 2005"
1da177e4
LT		 65
66
67#ifndef DEBUG
68# define STUB_DEBUG_FILE
69#endif
70
71/* for now, use only one transfer register bank */
72#undef USE_B
73
74/* this doesn't understand urb->iso_frame_desc[], but if you had a driver
75 * that just queued one ISO frame per URB then iso transfers "should" work
76 * using the normal urb status fields.
77 */
78#define DISABLE_ISO
79
80// #define QUIRK2
81#define QUIRK3
82
83static const char hcd_name[] = "sl811-hcd";
84
85/*-------------------------------------------------------------------------*/
86
87static void port_power(struct sl811 *sl811, int is_on)
88{
89 struct usb_hcd *hcd = sl811_to_hcd(sl811);
90
91 /* hub is inactive unless the port is powered */
92 if (is_on) {
749da5f8 93 if (sl811->port1 & USB_PORT_STAT_POWER)
1da177e4
LT		 94 return;
95
749da5f8 96 sl811->port1 = USB_PORT_STAT_POWER;
1da177e4 97 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1da177e4
LT		 98 } else {
99 sl811->port1 = 0;
100 sl811->irq_enable = 0;
101 hcd->state = HC_STATE_HALT;
1da177e4
LT		 102 }
103 sl811->ctrl1 = 0;
104 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
105 sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
106
107 if (sl811->board && sl811->board->port_power) {
108 /* switch VBUS, at 500mA unless hub power budget gets set */
109 DBG("power %s\n", is_on ? "on" : "off");
110 sl811->board->port_power(hcd->self.controller, is_on);
111 }
112
113 /* reset as thoroughly as we can */
114 if (sl811->board && sl811->board->reset)
115 sl811->board->reset(hcd->self.controller);
1e9a47b6
DB		 116 else {
117 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
118 mdelay(20);
119 }
1da177e4
LT		 120
121 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
122 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
123 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
124 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
125
126 // if !is_on, put into lowpower mode now
127}
128
129/*-------------------------------------------------------------------------*/
130
131/* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue,
132 * and may start I/O. Endpoint queues are scanned during completion irq
093cf723 133 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
1da177e4
LT		 134 *
135 * Using an external DMA engine to copy a packet at a time could work,
136 * though setup/teardown costs may be too big to make it worthwhile.
137 */
138
139/* SETUP starts a new control request. Devices are not allowed to
140 * STALL or NAK these; they must cancel any pending control requests.
141 */
142static void setup_packet(
143 struct sl811 *sl811,
144 struct sl811h_ep *ep,
145 struct urb *urb,
146 u8 bank,
147 u8 control
148)
149{
150 u8 addr;
151 u8 len;
152 void __iomem *data_reg;
153
154 addr = SL811HS_PACKET_BUF(bank == 0);
155 len = sizeof(struct usb_ctrlrequest);
156 data_reg = sl811->data_reg;
157 sl811_write_buf(sl811, addr, urb->setup_packet, len);
158
159 /* autoincrementing */
160 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
161 writeb(len, data_reg);
162 writeb(SL_SETUP /* | ep->epnum */, data_reg);
163 writeb(usb_pipedevice(urb->pipe), data_reg);
164
165 /* always OUT/data0 */ ;
166 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
167 control | SL11H_HCTLMASK_OUT);
168 ep->length = 0;
169 PACKET("SETUP qh%p\n", ep);
170}
171
172/* STATUS finishes control requests, often after IN or OUT data packets */
173static void status_packet(
174 struct sl811 *sl811,
175 struct sl811h_ep *ep,
176 struct urb *urb,
177 u8 bank,
178 u8 control
179)
180{
181 int do_out;
182 void __iomem *data_reg;
183
184 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
185 data_reg = sl811->data_reg;
186
187 /* autoincrementing */
188 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
189 writeb(0, data_reg);
190 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
191 writeb(usb_pipedevice(urb->pipe), data_reg);
192
193 /* always data1; sometimes IN */
194 control |= SL11H_HCTLMASK_TOGGLE;
195 if (do_out)
196 control |= SL11H_HCTLMASK_OUT;
197 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
198 ep->length = 0;
199 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
200 do_out ? "out" : "in", ep);
201}
202
203/* IN packets can be used with any type of endpoint. here we just
204 * start the transfer, data from the peripheral may arrive later.
205 * urb->iso_frame_desc is currently ignored here...
206 */
207static void in_packet(
208 struct sl811 *sl811,
209 struct sl811h_ep *ep,
210 struct urb *urb,
211 u8 bank,
212 u8 control
213)
214{
215 u8 addr;
216 u8 len;
217 void __iomem *data_reg;
218
219 /* avoid losing data on overflow */
220 len = ep->maxpacket;
221 addr = SL811HS_PACKET_BUF(bank == 0);
222 if (!(control & SL11H_HCTLMASK_ISOCH)
223 && usb_gettoggle(urb->dev, ep->epnum, 0))
224 control |= SL11H_HCTLMASK_TOGGLE;
225 data_reg = sl811->data_reg;
226
227 /* autoincrementing */
228 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
229 writeb(len, data_reg);
230 writeb(SL_IN | ep->epnum, data_reg);
231 writeb(usb_pipedevice(urb->pipe), data_reg);
232
233 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
16e2e5f6 234 ep->length = min_t(u32, len,
1da177e4
LT		 235 urb->transfer_buffer_length - urb->actual_length);
236 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
237 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
238}
239
240/* OUT packets can be used with any type of endpoint.
241 * urb->iso_frame_desc is currently ignored here...
242 */
243static void out_packet(
244 struct sl811 *sl811,
245 struct sl811h_ep *ep,
246 struct urb *urb,
247 u8 bank,
248 u8 control
249)
250{
251 void *buf;
252 u8 addr;
253 u8 len;
254 void __iomem *data_reg;
255
256 buf = urb->transfer_buffer + urb->actual_length;
257 prefetch(buf);
258
16e2e5f6 259 len = min_t(u32, ep->maxpacket,
1da177e4
LT		 260 urb->transfer_buffer_length - urb->actual_length);
261
262 if (!(control & SL11H_HCTLMASK_ISOCH)
263 && usb_gettoggle(urb->dev, ep->epnum, 1))
264 control |= SL11H_HCTLMASK_TOGGLE;
265 addr = SL811HS_PACKET_BUF(bank == 0);
266 data_reg = sl811->data_reg;
267
268 sl811_write_buf(sl811, addr, buf, len);
269
270 /* autoincrementing */
271 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
272 writeb(len, data_reg);
273 writeb(SL_OUT | ep->epnum, data_reg);
274 writeb(usb_pipedevice(urb->pipe), data_reg);
275
276 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
277 control | SL11H_HCTLMASK_OUT);
278 ep->length = len;
279 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
280 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
281}
282
283/*-------------------------------------------------------------------------*/
284
285/* caller updates on-chip enables later */
286
287static inline void sofirq_on(struct sl811 *sl811)
288{
289 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
290 return;
291 VDBG("sof irq on\n");
292 sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
293}
294
295static inline void sofirq_off(struct sl811 *sl811)
296{
297 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
298 return;
299 VDBG("sof irq off\n");
300 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
301}
302
303/*-------------------------------------------------------------------------*/
304
305/* pick the next endpoint for a transaction, and issue it.
306 * frames start with periodic transfers (after whatever is pending
307 * from the previous frame), and the rest of the time is async
308 * transfers, scheduled round-robin.
309 */
310static struct sl811h_ep *start(struct sl811 *sl811, u8 bank)
311{
312 struct sl811h_ep *ep;
313 struct urb *urb;
314 int fclock;
315 u8 control;
316
317 /* use endpoint at schedule head */
318 if (sl811->next_periodic) {
319 ep = sl811->next_periodic;
320 sl811->next_periodic = ep->next;
321 } else {
322 if (sl811->next_async)
323 ep = sl811->next_async;
324 else if (!list_empty(&sl811->async))
325 ep = container_of(sl811->async.next,
326 struct sl811h_ep, schedule);
327 else {
328 /* could set up the first fullspeed periodic
329 * transfer for the next frame ...
330 */
331 return NULL;
332 }
333
334#ifdef USE_B
335 if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
336 return NULL;
337#endif
338
339 if (ep->schedule.next == &sl811->async)
340 sl811->next_async = NULL;
341 else
342 sl811->next_async = container_of(ep->schedule.next,
343 struct sl811h_ep, schedule);
344 }
345
346 if (unlikely(list_empty(&ep->hep->urb_list))) {
347 DBG("empty %p queue?\n", ep);
348 return NULL;
349 }
350
351 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
352 control = ep->defctrl;
353
354 /* if this frame doesn't have enough time left to transfer this
355 * packet, wait till the next frame. too-simple algorithm...
356 */
357 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
358 fclock -= 100; /* setup takes not much time */
359 if (urb->dev->speed == USB_SPEED_LOW) {
360 if (control & SL11H_HCTLMASK_PREAMBLE) {
361 /* also note erratum 1: some hubs won't work */
362 fclock -= 800;
363 }
364 fclock -= ep->maxpacket << 8;
365
366 /* erratum 2: AFTERSOF only works for fullspeed */
367 if (fclock < 0) {
368 if (ep->period)
369 sl811->stat_overrun++;
370 sofirq_on(sl811);
371 return NULL;
372 }
373 } else {
374 fclock -= 12000 / 19; /* 19 64byte packets/msec */
375 if (fclock < 0) {
376 if (ep->period)
377 sl811->stat_overrun++;
378 control |= SL11H_HCTLMASK_AFTERSOF;
379
380 /* throttle bulk/control irq noise */
381 } else if (ep->nak_count)
382 control |= SL11H_HCTLMASK_AFTERSOF;
383 }
384
385
386 switch (ep->nextpid) {
387 case USB_PID_IN:
388 in_packet(sl811, ep, urb, bank, control);
389 break;
390 case USB_PID_OUT:
391 out_packet(sl811, ep, urb, bank, control);
392 break;
393 case USB_PID_SETUP:
394 setup_packet(sl811, ep, urb, bank, control);
395 break;
396 case USB_PID_ACK: /* for control status */
397 status_packet(sl811, ep, urb, bank, control);
398 break;
399 default:
400 DBG("bad ep%p pid %02x\n", ep, ep->nextpid);
401 ep = NULL;
402 }
403 return ep;
404}
405
406#define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
407
408static inline void start_transfer(struct sl811 *sl811)
409{
749da5f8 410 if (sl811->port1 & USB_PORT_STAT_SUSPEND)
1da177e4
LT		 411 return;
412 if (sl811->active_a == NULL) {
413 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
414 if (sl811->active_a != NULL)
415 sl811->jiffies_a = jiffies + MIN_JIFFIES;
416 }
417#ifdef USE_B
418 if (sl811->active_b == NULL) {
419 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
420 if (sl811->active_b != NULL)
421 sl811->jiffies_b = jiffies + MIN_JIFFIES;
422 }
423#endif
424}
425
426static void finish_request(
427 struct sl811 *sl811,
428 struct sl811h_ep *ep,
429 struct urb *urb,
1da177e4
LT		 430 int status
431) __releases(sl811->lock) __acquires(sl811->lock)
432{
433 unsigned i;
434
435 if (usb_pipecontrol(urb->pipe))
436 ep->nextpid = USB_PID_SETUP;
437
e9df41c5 438 usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb);
1da177e4 439 spin_unlock(&sl811->lock);
4a00027d 440 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status);
1da177e4
LT		 441 spin_lock(&sl811->lock);
442
443 /* leave active endpoints in the schedule */
444 if (!list_empty(&ep->hep->urb_list))
445 return;
446
447 /* async deschedule? */
448 if (!list_empty(&ep->schedule)) {
449 list_del_init(&ep->schedule);
450 if (ep == sl811->next_async)
451 sl811->next_async = NULL;
452 return;
453 }
454
455 /* periodic deschedule */
456 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
457 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
458 struct sl811h_ep *temp;
459 struct sl811h_ep **prev = &sl811->periodic[i];
460
461 while (*prev && ((temp = *prev) != ep))
462 prev = &temp->next;
463 if (*prev)
464 *prev = ep->next;
465 sl811->load[i] -= ep->load;
1e9a47b6 466 }
1da177e4
LT		 467 ep->branch = PERIODIC_SIZE;
468 sl811->periodic_count--;
469 sl811_to_hcd(sl811)->self.bandwidth_allocated
470 -= ep->load / ep->period;
471 if (ep == sl811->next_periodic)
472 sl811->next_periodic = ep->next;
473
474 /* we might turn SOFs back on again for the async schedule */
475 if (sl811->periodic_count == 0)
476 sofirq_off(sl811);
477}
478
479static void
7d12e780 480done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
1da177e4
LT		 481{
482 u8 status;
483 struct urb *urb;
484 int urbstat = -EINPROGRESS;
485
486 if (unlikely(!ep))
487 return;
488
489 status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
490
491 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
492
493 /* we can safely ignore NAKs */
494 if (status & SL11H_STATMASK_NAK) {
495 // PACKET("...NAK_%02x qh%p\n", bank, ep);
496 if (!ep->period)
497 ep->nak_count++;
498 ep->error_count = 0;
499
500 /* ACK advances transfer, toggle, and maybe queue */
501 } else if (status & SL11H_STATMASK_ACK) {
502 struct usb_device *udev = urb->dev;
503 int len;
504 unsigned char *buf;
505
506 /* urb->iso_frame_desc is currently ignored here... */
507
508 ep->nak_count = ep->error_count = 0;
509 switch (ep->nextpid) {
510 case USB_PID_OUT:
511 // PACKET("...ACK/out_%02x qh%p\n", bank, ep);
512 urb->actual_length += ep->length;
513 usb_dotoggle(udev, ep->epnum, 1);
514 if (urb->actual_length
515 == urb->transfer_buffer_length) {
516 if (usb_pipecontrol(urb->pipe))
517 ep->nextpid = USB_PID_ACK;
518
519 /* some bulk protocols terminate OUT transfers
520 * by a short packet, using ZLPs not padding.
521 */
522 else if (ep->length < ep->maxpacket
523 || !(urb->transfer_flags
524 & URB_ZERO_PACKET))
525 urbstat = 0;
526 }
527 break;
528 case USB_PID_IN:
529 // PACKET("...ACK/in_%02x qh%p\n", bank, ep);
530 buf = urb->transfer_buffer + urb->actual_length;
531 prefetchw(buf);
532 len = ep->maxpacket - sl811_read(sl811,
533 bank + SL11H_XFERCNTREG);
534 if (len > ep->length) {
535 len = ep->length;
65e51098 536 urbstat = -EOVERFLOW;
1da177e4
LT		 537 }
538 urb->actual_length += len;
539 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
540 buf, len);
541 usb_dotoggle(udev, ep->epnum, 0);
65e51098
AS		 542 if (urbstat == -EINPROGRESS &&
543 (len < ep->maxpacket ||
544 urb->actual_length ==
545 urb->transfer_buffer_length)) {
546 if (usb_pipecontrol(urb->pipe))
547 ep->nextpid = USB_PID_ACK;
548 else
549 urbstat = 0;
1da177e4
LT		 550 }
551 break;
552 case USB_PID_SETUP:
553 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
554 if (urb->transfer_buffer_length == urb->actual_length)
555 ep->nextpid = USB_PID_ACK;
556 else if (usb_pipeout(urb->pipe)) {
557 usb_settoggle(udev, 0, 1, 1);
558 ep->nextpid = USB_PID_OUT;
559 } else {
560 usb_settoggle(udev, 0, 0, 1);
561 ep->nextpid = USB_PID_IN;
562 }
563 break;
564 case USB_PID_ACK:
565 // PACKET("...ACK/status_%02x qh%p\n", bank, ep);
566 urbstat = 0;
567 break;
568 }
569
570 /* STALL stops all transfers */
571 } else if (status & SL11H_STATMASK_STALL) {
572 PACKET("...STALL_%02x qh%p\n", bank, ep);
573 ep->nak_count = ep->error_count = 0;
574 urbstat = -EPIPE;
575
576 /* error? retry, until "3 strikes" */
577 } else if (++ep->error_count >= 3) {
578 if (status & SL11H_STATMASK_TMOUT)
38e2bfc9 579 urbstat = -ETIME;
1da177e4
LT		 580 else if (status & SL11H_STATMASK_OVF)
581 urbstat = -EOVERFLOW;
582 else
583 urbstat = -EPROTO;
584 ep->error_count = 0;
585 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
586 bank, status, ep, urbstat);
587 }
588
65e51098 589 if (urbstat != -EINPROGRESS || urb->unlinked)
7d12e780 590 finish_request(sl811, ep, urb, urbstat);
1da177e4
LT		 591}
592
593static inline u8 checkdone(struct sl811 *sl811)
594{
595 u8 ctl;
596 u8 irqstat = 0;
597
598 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
599 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
600 if (ctl & SL11H_HCTLMASK_ARM)
601 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
602 DBG("%s DONE_A: ctrl %02x sts %02x\n",
603 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
604 ctl,
605 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
606 irqstat |= SL11H_INTMASK_DONE_A;
607 }
608#ifdef USE_B
609 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
610 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
611 if (ctl & SL11H_HCTLMASK_ARM)
612 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
613 DBG("%s DONE_B: ctrl %02x sts %02x\n",
614 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
615 ctl,
616 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
617 irqstat |= SL11H_INTMASK_DONE_A;
618 }
619#endif
620 return irqstat;
621}
622
7d12e780 623static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
1da177e4
LT		 624{
625 struct sl811 *sl811 = hcd_to_sl811(hcd);
626 u8 irqstat;
627 irqreturn_t ret = IRQ_NONE;
628 unsigned retries = 5;
629
630 spin_lock(&sl811->lock);
631
632retry:
633 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
634 if (irqstat) {
635 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
636 irqstat &= sl811->irq_enable;
637 }
638
639#ifdef QUIRK2
640 /* this may no longer be necessary ... */
1e9a47b6 641 if (irqstat == 0) {
1da177e4 642 irqstat = checkdone(sl811);
1e9a47b6 643 if (irqstat)
1da177e4
LT		 644 sl811->stat_lost++;
645 }
646#endif
647
648 /* USB packets, not necessarily handled in the order they're
649 * issued ... that's fine if they're different endpoints.
650 */
651 if (irqstat & SL11H_INTMASK_DONE_A) {
7d12e780 652 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
1da177e4
LT		 653 sl811->active_a = NULL;
654 sl811->stat_a++;
655 }
656#ifdef USE_B
657 if (irqstat & SL11H_INTMASK_DONE_B) {
7d12e780 658 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
1da177e4
LT		 659 sl811->active_b = NULL;
660 sl811->stat_b++;
661 }
662#endif
663 if (irqstat & SL11H_INTMASK_SOFINTR) {
664 unsigned index;
665
666 index = sl811->frame++ % (PERIODIC_SIZE - 1);
667 sl811->stat_sof++;
668
669 /* be graceful about almost-inevitable periodic schedule
670 * overruns: continue the previous frame's transfers iff
671 * this one has nothing scheduled.
672 */
673 if (sl811->next_periodic) {
674 // ERR("overrun to slot %d\n", index);
675 sl811->stat_overrun++;
676 }
677 if (sl811->periodic[index])
678 sl811->next_periodic = sl811->periodic[index];
679 }
680
681 /* khubd manages debouncing and wakeup */
682 if (irqstat & SL11H_INTMASK_INSRMV) {
683 sl811->stat_insrmv++;
684
685 /* most stats are reset for each VBUS session */
686 sl811->stat_wake = 0;
687 sl811->stat_sof = 0;
688 sl811->stat_a = 0;
689 sl811->stat_b = 0;
690 sl811->stat_lost = 0;
691
692 sl811->ctrl1 = 0;
693 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
694
695 sl811->irq_enable = SL11H_INTMASK_INSRMV;
696 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
697
698 /* usbcore nukes other pending transactions on disconnect */
699 if (sl811->active_a) {
700 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
701 finish_request(sl811, sl811->active_a,
1e9a47b6
DB		 702 container_of(sl811->active_a
703 ->hep->urb_list.next,
1da177e4 704 struct urb, urb_list),
7d12e780 705 -ESHUTDOWN);
1da177e4
LT		 706 sl811->active_a = NULL;
707 }
708#ifdef USE_B
709 if (sl811->active_b) {
710 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
711 finish_request(sl811, sl811->active_b,
1e9a47b6
DB		 712 container_of(sl811->active_b
713 ->hep->urb_list.next,
1da177e4
LT		 714 struct urb, urb_list),
715 NULL, -ESHUTDOWN);
716 sl811->active_b = NULL;
717 }
718#endif
719
093cf723 720 /* port status seems weird until after reset, so
1da177e4
LT		 721 * force the reset and make khubd clean up later.
722 */
8a3461e2 723 if (irqstat & SL11H_INTMASK_RD)
749da5f8 724 sl811->port1 &= ~USB_PORT_STAT_CONNECTION;
8a3461e2 725 else
749da5f8 726 sl811->port1 |= USB_PORT_STAT_CONNECTION;
eb661bc8 727
749da5f8 728 sl811->port1 |= USB_PORT_STAT_C_CONNECTION << 16;
1da177e4
LT		 729
730 } else if (irqstat & SL11H_INTMASK_RD) {
749da5f8 731 if (sl811->port1 & USB_PORT_STAT_SUSPEND) {
1da177e4 732 DBG("wakeup\n");
749da5f8 733 sl811->port1 |= USB_PORT_STAT_C_SUSPEND << 16;
1da177e4
LT		 734 sl811->stat_wake++;
735 } else
736 irqstat &= ~SL11H_INTMASK_RD;
737 }
738
739 if (irqstat) {
749da5f8 740 if (sl811->port1 & USB_PORT_STAT_ENABLE)
1da177e4
LT		 741 start_transfer(sl811);
742 ret = IRQ_HANDLED;
743 if (retries--)
744 goto retry;
745 }
746
1e9a47b6 747 if (sl811->periodic_count == 0 && list_empty(&sl811->async))
1da177e4
LT		 748 sofirq_off(sl811);
749 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
750
751 spin_unlock(&sl811->lock);
752
753 return ret;
754}
755
756/*-------------------------------------------------------------------------*/
757
758/* usb 1.1 says max 90% of a frame is available for periodic transfers.
759 * this driver doesn't promise that much since it's got to handle an
760 * IRQ per packet; irq handling latencies also use up that time.
4b2e790a
DB		 761 *
762 * NOTE: the periodic schedule is a sparse tree, with the load for
763 * each branch minimized. see fig 3.5 in the OHCI spec for example.
1da177e4
LT		 764 */
765#define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */
766
767static int balance(struct sl811 *sl811, u16 period, u16 load)
768{
769 int i, branch = -ENOSPC;
770
771 /* search for the least loaded schedule branch of that period
772 * which has enough bandwidth left unreserved.
773 */
774 for (i = 0; i < period ; i++) {
775 if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
776 int j;
777
778 for (j = i; j < PERIODIC_SIZE; j += period) {
779 if ((sl811->load[j] + load)
780 > MAX_PERIODIC_LOAD)
781 break;
782 }
783 if (j < PERIODIC_SIZE)
784 continue;
1e9a47b6 785 branch = i;
1da177e4
LT		 786 }
787 }
788 return branch;
789}
790
791/*-------------------------------------------------------------------------*/
792
793static int sl811h_urb_enqueue(
794 struct usb_hcd *hcd,
1da177e4 795 struct urb *urb,
55016f10 796 gfp_t mem_flags
1da177e4
LT		 797) {
798 struct sl811 *sl811 = hcd_to_sl811(hcd);
799 struct usb_device *udev = urb->dev;
800 unsigned int pipe = urb->pipe;
801 int is_out = !usb_pipein(pipe);
802 int type = usb_pipetype(pipe);
803 int epnum = usb_pipeendpoint(pipe);
804 struct sl811h_ep *ep = NULL;
805 unsigned long flags;
806 int i;
e9df41c5
AS		 807 int retval;
808 struct usb_host_endpoint *hep = urb->ep;
1da177e4
LT		 809
810#ifdef DISABLE_ISO
811 if (type == PIPE_ISOCHRONOUS)
812 return -ENOSPC;
813#endif
814
815 /* avoid all allocations within spinlocks */
76be932a 816 if (!hep->hcpriv) {
7b842b6e 817 ep = kzalloc(sizeof *ep, mem_flags);
76be932a
KV		 818 if (ep == NULL)
819 return -ENOMEM;
820 }
1da177e4
LT		 821
822 spin_lock_irqsave(&sl811->lock, flags);
823
824 /* don't submit to a dead or disabled port */
749da5f8 825 if (!(sl811->port1 & USB_PORT_STAT_ENABLE)
1da177e4
LT		 826 || !HC_IS_RUNNING(hcd->state)) {
827 retval = -ENODEV;
4b2e790a 828 kfree(ep);
e9df41c5
AS		 829 goto fail_not_linked;
830 }
831 retval = usb_hcd_link_urb_to_ep(hcd, urb);
832 if (retval) {
833 kfree(ep);
834 goto fail_not_linked;
1da177e4
LT		 835 }
836
837 if (hep->hcpriv) {
838 kfree(ep);
839 ep = hep->hcpriv;
840 } else if (!ep) {
841 retval = -ENOMEM;
842 goto fail;
843
844 } else {
845 INIT_LIST_HEAD(&ep->schedule);
6a8e87b2 846 ep->udev = udev;
1da177e4
LT		 847 ep->epnum = epnum;
848 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
849 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
850 usb_settoggle(udev, epnum, is_out, 0);
851
852 if (type == PIPE_CONTROL)
853 ep->nextpid = USB_PID_SETUP;
854 else if (is_out)
855 ep->nextpid = USB_PID_OUT;
856 else
857 ep->nextpid = USB_PID_IN;
858
859 if (ep->maxpacket > H_MAXPACKET) {
860 /* iso packets up to 240 bytes could work... */
861 DBG("dev %d ep%d maxpacket %d\n",
862 udev->devnum, epnum, ep->maxpacket);
863 retval = -EINVAL;
864 goto fail;
865 }
866
867 if (udev->speed == USB_SPEED_LOW) {
868 /* send preamble for external hub? */
869 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
870 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
871 }
872 switch (type) {
873 case PIPE_ISOCHRONOUS:
874 case PIPE_INTERRUPT:
875 if (urb->interval > PERIODIC_SIZE)
876 urb->interval = PERIODIC_SIZE;
877 ep->period = urb->interval;
878 ep->branch = PERIODIC_SIZE;
879 if (type == PIPE_ISOCHRONOUS)
880 ep->defctrl |= SL11H_HCTLMASK_ISOCH;
881 ep->load = usb_calc_bus_time(udev->speed, !is_out,
882 (type == PIPE_ISOCHRONOUS),
883 usb_maxpacket(udev, pipe, is_out))
884 / 1000;
885 break;
886 }
887
1e9a47b6 888 ep->hep = hep;
1da177e4
LT		 889 hep->hcpriv = ep;
890 }
891
892 /* maybe put endpoint into schedule */
893 switch (type) {
894 case PIPE_CONTROL:
895 case PIPE_BULK:
896 if (list_empty(&ep->schedule))
897 list_add_tail(&ep->schedule, &sl811->async);
898 break;
899 case PIPE_ISOCHRONOUS:
900 case PIPE_INTERRUPT:
901 urb->interval = ep->period;
4b2e790a
DB		 902 if (ep->branch < PERIODIC_SIZE) {
903 /* NOTE: the phase is correct here, but the value
904 * needs offsetting by the transfer queue depth.
905 * All current drivers ignore start_frame, so this
906 * is unlikely to ever matter...
907 */
908 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
909 + ep->branch;
1da177e4 910 break;
4b2e790a 911 }
1da177e4
LT		 912
913 retval = balance(sl811, ep->period, ep->load);
914 if (retval < 0)
915 goto fail;
916 ep->branch = retval;
917 retval = 0;
918 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
919 + ep->branch;
920
921 /* sort each schedule branch by period (slow before fast)
922 * to share the faster parts of the tree without needing
923 * dummy/placeholder nodes
924 */
925 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
926 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
927 struct sl811h_ep **prev = &sl811->periodic[i];
928 struct sl811h_ep *here = *prev;
929
930 while (here && ep != here) {
931 if (ep->period > here->period)
932 break;
933 prev = &here->next;
934 here = *prev;
935 }
936 if (ep != here) {
937 ep->next = here;
938 *prev = ep;
939 }
940 sl811->load[i] += ep->load;
941 }
942 sl811->periodic_count++;
943 hcd->self.bandwidth_allocated += ep->load / ep->period;
944 sofirq_on(sl811);
945 }
946
1da177e4 947 urb->hcpriv = hep;
1da177e4
LT		 948 start_transfer(sl811);
949 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
950fail:
e9df41c5
AS		 951 if (retval)
952 usb_hcd_unlink_urb_from_ep(hcd, urb);
953fail_not_linked:
1da177e4
LT		 954 spin_unlock_irqrestore(&sl811->lock, flags);
955 return retval;
956}
957
e9df41c5 958static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1da177e4
LT		 959{
960 struct sl811 *sl811 = hcd_to_sl811(hcd);
1e9a47b6 961 struct usb_host_endpoint *hep;
1da177e4
LT		 962 unsigned long flags;
963 struct sl811h_ep *ep;
e9df41c5 964 int retval;
1da177e4 965
1e9a47b6 966 spin_lock_irqsave(&sl811->lock, flags);
e9df41c5
AS		 967 retval = usb_hcd_check_unlink_urb(hcd, urb, status);
968 if (retval)
1e9a47b6 969 goto fail;
1da177e4 970
e9df41c5 971 hep = urb->hcpriv;
1da177e4
LT		 972 ep = hep->hcpriv;
973 if (ep) {
974 /* finish right away if this urb can't be active ...
975 * note that some drivers wrongly expect delays
976 */
977 if (ep->hep->urb_list.next != &urb->urb_list) {
978 /* not front of queue? never active */
979
980 /* for active transfers, we expect an IRQ */
981 } else if (sl811->active_a == ep) {
982 if (time_before_eq(sl811->jiffies_a, jiffies)) {
983 /* happens a lot with lowspeed?? */
984 DBG("giveup on DONE_A: ctrl %02x sts %02x\n",
985 sl811_read(sl811,
986 SL811_EP_A(SL11H_HOSTCTLREG)),
987 sl811_read(sl811,
988 SL811_EP_A(SL11H_PKTSTATREG)));
989 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
990 0);
991 sl811->active_a = NULL;
992 } else
993 urb = NULL;
994#ifdef USE_B
995 } else if (sl811->active_b == ep) {
996 if (time_before_eq(sl811->jiffies_a, jiffies)) {
997 /* happens a lot with lowspeed?? */
998 DBG("giveup on DONE_B: ctrl %02x sts %02x\n",
999 sl811_read(sl811,
1000 SL811_EP_B(SL11H_HOSTCTLREG)),
1001 sl811_read(sl811,
1002 SL811_EP_B(SL11H_PKTSTATREG)));
1003 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
1004 0);
1005 sl811->active_b = NULL;
1006 } else
1007 urb = NULL;
1008#endif
1009 } else {
1010 /* front of queue for inactive endpoint */
1011 }
1012
1013 if (urb)
7d12e780 1014 finish_request(sl811, ep, urb, 0);
1da177e4
LT		 1015 else
1016 VDBG("dequeue, urb %p active %s; wait4irq\n", urb,
1017 (sl811->active_a == ep) ? "A" : "B");
1018 } else
1019 retval = -EINVAL;
e9df41c5 1020 fail:
1da177e4
LT		 1021 spin_unlock_irqrestore(&sl811->lock, flags);
1022 return retval;
1023}
1024
1025static void
1026sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1027{
1028 struct sl811h_ep *ep = hep->hcpriv;
1029
1030 if (!ep)
1031 return;
1032
1033 /* assume we'd just wait for the irq */
1034 if (!list_empty(&hep->urb_list))
1035 msleep(3);
1036 if (!list_empty(&hep->urb_list))
b6c63937 1037 WARNING("ep %p not empty?\n", ep);
1da177e4 1038
1da177e4
LT		 1039 kfree(ep);
1040 hep->hcpriv = NULL;
1041}
1042
1043static int
1044sl811h_get_frame(struct usb_hcd *hcd)
1045{
1046 struct sl811 *sl811 = hcd_to_sl811(hcd);
1047
1048 /* wrong except while periodic transfers are scheduled;
1049 * never matches the on-the-wire frame;
1050 * subject to overruns.
1051 */
1052 return sl811->frame;
1053}
1054
1055
1056/*-------------------------------------------------------------------------*/
1057
1058/* the virtual root hub timer IRQ checks for hub status */
1059static int
1060sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1061{
1062 struct sl811 *sl811 = hcd_to_sl811(hcd);
1063#ifdef QUIRK3
1064 unsigned long flags;
1065
1066 /* non-SMP HACK: use root hub timer as i/o watchdog
1067 * this seems essential when SOF IRQs aren't in use...
1068 */
1069 local_irq_save(flags);
1070 if (!timer_pending(&sl811->timer)) {
7d12e780 1071 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1da177e4
LT		 1072 sl811->stat_lost++;
1073 }
1074 local_irq_restore(flags);
1075#endif
1076
1077 if (!(sl811->port1 & (0xffff << 16)))
1078 return 0;
1079
1080 /* tell khubd port 1 changed */
1081 *buf = (1 << 1);
1082 return 1;
1083}
1084
1085static void
1086sl811h_hub_descriptor (
1087 struct sl811 *sl811,
1088 struct usb_hub_descriptor *desc
1089) {
1090 u16 temp = 0;
1091
1092 desc->bDescriptorType = 0x29;
1093 desc->bHubContrCurrent = 0;
1094
1095 desc->bNbrPorts = 1;
1096 desc->bDescLength = 9;
1097
1098 /* per-port power switching (gang of one!), or none */
1099 desc->bPwrOn2PwrGood = 0;
1100 if (sl811->board && sl811->board->port_power) {
1101 desc->bPwrOn2PwrGood = sl811->board->potpg;
1102 if (!desc->bPwrOn2PwrGood)
1103 desc->bPwrOn2PwrGood = 10;
1104 temp = 0x0001;
1105 } else
1106 temp = 0x0002;
1107
1108 /* no overcurrent errors detection/handling */
1109 temp |= 0x0010;
1110
fd05e720 1111 desc->wHubCharacteristics = cpu_to_le16(temp);
1da177e4
LT		 1112
1113 /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */
4b2e790a 1114 desc->bitmap[0] = 0 << 1;
1da177e4
LT		 1115 desc->bitmap[1] = ~0;
1116}
1117
1118static void
1119sl811h_timer(unsigned long _sl811)
1120{
1121 struct sl811 *sl811 = (void *) _sl811;
1122 unsigned long flags;
1123 u8 irqstat;
1124 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
749da5f8
AS		 1125 const u32 mask = USB_PORT_STAT_CONNECTION
1126 | USB_PORT_STAT_ENABLE
288ead45 1127 | USB_PORT_STAT_LOW_SPEED;
1da177e4
LT		 1128
1129 spin_lock_irqsave(&sl811->lock, flags);
1130
1131 /* stop special signaling */
1132 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1133 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1134 udelay(3);
1135
1136 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1137
1138 switch (signaling) {
1139 case SL11H_CTL1MASK_SE0:
1140 DBG("end reset\n");
749da5f8
AS		 1141 sl811->port1 = (USB_PORT_STAT_C_RESET << 16)
1142 | USB_PORT_STAT_POWER;
1da177e4
LT		 1143 sl811->ctrl1 = 0;
1144 /* don't wrongly ack RD */
1145 if (irqstat & SL11H_INTMASK_INSRMV)
1146 irqstat &= ~SL11H_INTMASK_RD;
1147 break;
1148 case SL11H_CTL1MASK_K:
1149 DBG("end resume\n");
749da5f8 1150 sl811->port1 &= ~USB_PORT_STAT_SUSPEND;
1da177e4
LT		 1151 break;
1152 default:
1153 DBG("odd timer signaling: %02x\n", signaling);
1154 break;
1155 }
1156 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1157
1158 if (irqstat & SL11H_INTMASK_RD) {
1159 /* usbcore nukes all pending transactions on disconnect */
749da5f8
AS		 1160 if (sl811->port1 & USB_PORT_STAT_CONNECTION)
1161 sl811->port1 |= (USB_PORT_STAT_C_CONNECTION << 16)
1162 | (USB_PORT_STAT_C_ENABLE << 16);
1da177e4
LT		 1163 sl811->port1 &= ~mask;
1164 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1165 } else {
1166 sl811->port1 |= mask;
1167 if (irqstat & SL11H_INTMASK_DP)
288ead45 1168 sl811->port1 &= ~USB_PORT_STAT_LOW_SPEED;
1da177e4
LT		 1169 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1170 }
1171
749da5f8 1172 if (sl811->port1 & USB_PORT_STAT_CONNECTION) {
1da177e4
LT		 1173 u8 ctrl2 = SL811HS_CTL2_INIT;
1174
1175 sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1176#ifdef USE_B
1177 sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1178#endif
288ead45 1179 if (sl811->port1 & USB_PORT_STAT_LOW_SPEED) {
1da177e4
LT		 1180 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1181 ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1182 }
1183
1184 /* start SOFs flowing, kickstarting with A registers */
1185 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1186 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1187 sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1188
1189 /* autoincrementing */
1190 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1191 writeb(SL_SOF, sl811->data_reg);
1192 writeb(0, sl811->data_reg);
1193 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1194 SL11H_HCTLMASK_ARM);
1195
1196 /* khubd provides debounce delay */
1197 } else {
1198 sl811->ctrl1 = 0;
1199 }
1200 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1201
1202 /* reenable irqs */
1203 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1204 spin_unlock_irqrestore(&sl811->lock, flags);
1205}
1206
1207static int
1208sl811h_hub_control(
1209 struct usb_hcd *hcd,
1210 u16 typeReq,
1211 u16 wValue,
1212 u16 wIndex,
1213 char *buf,
1214 u16 wLength
1215) {
1216 struct sl811 *sl811 = hcd_to_sl811(hcd);
1217 int retval = 0;
1218 unsigned long flags;
1219
1220 spin_lock_irqsave(&sl811->lock, flags);
1221
1222 switch (typeReq) {
1223 case ClearHubFeature:
1224 case SetHubFeature:
1225 switch (wValue) {
1226 case C_HUB_OVER_CURRENT:
1227 case C_HUB_LOCAL_POWER:
1228 break;
1229 default:
1230 goto error;
1231 }
1232 break;
1233 case ClearPortFeature:
1234 if (wIndex != 1 || wLength != 0)
1235 goto error;
1236
1237 switch (wValue) {
1238 case USB_PORT_FEAT_ENABLE:
749da5f8 1239 sl811->port1 &= USB_PORT_STAT_POWER;
1da177e4
LT		 1240 sl811->ctrl1 = 0;
1241 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1242 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1243 sl811_write(sl811, SL11H_IRQ_ENABLE,
1244 sl811->irq_enable);
1245 break;
1246 case USB_PORT_FEAT_SUSPEND:
749da5f8 1247 if (!(sl811->port1 & USB_PORT_STAT_SUSPEND))
1da177e4
LT		 1248 break;
1249
1250 /* 20 msec of resume/K signaling, other irqs blocked */
1251 DBG("start resume...\n");
1252 sl811->irq_enable = 0;
1253 sl811_write(sl811, SL11H_IRQ_ENABLE,
1254 sl811->irq_enable);
1255 sl811->ctrl1 |= SL11H_CTL1MASK_K;
1256 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1257
1258 mod_timer(&sl811->timer, jiffies
1259 + msecs_to_jiffies(20));
1260 break;
1261 case USB_PORT_FEAT_POWER:
1262 port_power(sl811, 0);
1263 break;
1264 case USB_PORT_FEAT_C_ENABLE:
1265 case USB_PORT_FEAT_C_SUSPEND:
1266 case USB_PORT_FEAT_C_CONNECTION:
1267 case USB_PORT_FEAT_C_OVER_CURRENT:
1268 case USB_PORT_FEAT_C_RESET:
1269 break;
1270 default:
1271 goto error;
1272 }
1273 sl811->port1 &= ~(1 << wValue);
1274 break;
1275 case GetHubDescriptor:
1276 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1277 break;
1278 case GetHubStatus:
8ca5bfab 1279 put_unaligned_le32(0, buf);
1da177e4
LT		 1280 break;
1281 case GetPortStatus:
1282 if (wIndex != 1)
1283 goto error;
8ca5bfab 1284 put_unaligned_le32(sl811->port1, buf);
1da177e4
LT		 1285
1286#ifndef VERBOSE
1287 if (*(u16*)(buf+2)) /* only if wPortChange is interesting */
1288#endif
1289 DBG("GetPortStatus %08x\n", sl811->port1);
1290 break;
1291 case SetPortFeature:
1292 if (wIndex != 1 || wLength != 0)
1293 goto error;
1294 switch (wValue) {
1295 case USB_PORT_FEAT_SUSPEND:
749da5f8 1296 if (sl811->port1 & USB_PORT_STAT_RESET)
1da177e4 1297 goto error;
749da5f8 1298 if (!(sl811->port1 & USB_PORT_STAT_ENABLE))
1da177e4
LT		 1299 goto error;
1300
1301 DBG("suspend...\n");
1302 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1303 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1304 break;
1305 case USB_PORT_FEAT_POWER:
1306 port_power(sl811, 1);
1307 break;
1308 case USB_PORT_FEAT_RESET:
749da5f8 1309 if (sl811->port1 & USB_PORT_STAT_SUSPEND)
1da177e4 1310 goto error;
749da5f8 1311 if (!(sl811->port1 & USB_PORT_STAT_POWER))
1da177e4
LT		 1312 break;
1313
1314 /* 50 msec of reset/SE0 signaling, irqs blocked */
1315 sl811->irq_enable = 0;
1316 sl811_write(sl811, SL11H_IRQ_ENABLE,
1317 sl811->irq_enable);
1318 sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1319 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
749da5f8 1320 sl811->port1 |= USB_PORT_STAT_RESET;
1da177e4
LT		 1321 mod_timer(&sl811->timer, jiffies
1322 + msecs_to_jiffies(50));
1323 break;
1324 default:
1325 goto error;
1326 }
1327 sl811->port1 |= 1 << wValue;
1328 break;
1329
1330 default:
1331error:
1332 /* "protocol stall" on error */
1333 retval = -EPIPE;
1334 }
1335
1336 spin_unlock_irqrestore(&sl811->lock, flags);
1337 return retval;
1338}
1339
1340#ifdef CONFIG_PM
1341
1342static int
0c0382e3 1343sl811h_bus_suspend(struct usb_hcd *hcd)
1da177e4
LT		 1344{
1345 // SOFs off
441b62c1 1346 DBG("%s\n", __func__);
1da177e4
LT		 1347 return 0;
1348}
1349
1350static int
0c0382e3 1351sl811h_bus_resume(struct usb_hcd *hcd)
1da177e4
LT		 1352{
1353 // SOFs on
441b62c1 1354 DBG("%s\n", __func__);
1da177e4
LT		 1355 return 0;
1356}
1357
1358#else
1359
0c0382e3
AS		 1360#define sl811h_bus_suspend NULL
1361#define sl811h_bus_resume NULL
1da177e4
LT		 1362
1363#endif
1364
1365
1366/*-------------------------------------------------------------------------*/
1367
1368#ifdef STUB_DEBUG_FILE
1369
1370static inline void create_debug_file(struct sl811 *sl811) { }
1371static inline void remove_debug_file(struct sl811 *sl811) { }
1372
1373#else
1374
1375#include <linux/proc_fs.h>
1376#include <linux/seq_file.h>
1377
1378static void dump_irq(struct seq_file *s, char *label, u8 mask)
1379{
1380 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1381 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1382 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1383 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1384 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1385 (mask & SL11H_INTMASK_RD) ? " rd" : "",
1386 (mask & SL11H_INTMASK_DP) ? " dp" : "");
1387}
1388
1389static int proc_sl811h_show(struct seq_file *s, void *unused)
1390{
1391 struct sl811 *sl811 = s->private;
1392 struct sl811h_ep *ep;
1393 unsigned i;
1394
1395 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1396 sl811_to_hcd(sl811)->product_desc,
1397 hcd_name, DRIVER_VERSION,
1398 sl811->port1);
1399
1400 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1401 seq_printf(s, "current session: done_a %ld done_b %ld "
1402 "wake %ld sof %ld overrun %ld lost %ld\n\n",
1403 sl811->stat_a, sl811->stat_b,
1404 sl811->stat_wake, sl811->stat_sof,
1405 sl811->stat_overrun, sl811->stat_lost);
1406
1407 spin_lock_irq(&sl811->lock);
1408
1409 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1410 seq_printf(s, "(suspended)\n\n");
1411 else {
1412 u8 t = sl811_read(sl811, SL11H_CTLREG1);
1413
1414 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1415 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1416 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1417 case SL11H_CTL1MASK_NORMAL: s = ""; break;
1418 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1419 case SL11H_CTL1MASK_K: s = " k/resume"; break;
1420 default: s = "j"; break;
1421 }; s; }),
1422 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1423 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1424
1425 dump_irq(s, "irq_enable",
1426 sl811_read(sl811, SL11H_IRQ_ENABLE));
1427 dump_irq(s, "irq_status",
1428 sl811_read(sl811, SL11H_IRQ_STATUS));
1429 seq_printf(s, "frame clocks remaining: %d\n",
1430 sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1431 }
1432
1433 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1434 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1435 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1436 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1437 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1438 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1439 seq_printf(s, "\n");
1440 list_for_each_entry (ep, &sl811->async, schedule) {
1441 struct urb *urb;
1442
1443 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1444 " nak %d err %d\n",
1445 (ep == sl811->active_a) ? "(A) " : "",
1446 (ep == sl811->active_b) ? "(B) " : "",
1447 ep, ep->epnum,
1448 ({ char *s; switch (ep->nextpid) {
1449 case USB_PID_IN: s = "in"; break;
1450 case USB_PID_OUT: s = "out"; break;
1451 case USB_PID_SETUP: s = "setup"; break;
1452 case USB_PID_ACK: s = "status"; break;
1453 default: s = "?"; break;
1454 }; s;}),
1455 ep->maxpacket,
1456 ep->nak_count, ep->error_count);
1457 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1458 seq_printf(s, " urb%p, %d/%d\n", urb,
1459 urb->actual_length,
1460 urb->transfer_buffer_length);
1461 }
1462 }
1463 if (!list_empty(&sl811->async))
1464 seq_printf(s, "\n");
1465
1466 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1467
1468 for (i = 0; i < PERIODIC_SIZE; i++) {
1469 ep = sl811->periodic[i];
1470 if (!ep)
1471 continue;
1472 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1473
1474 /* DUMB: prints shared entries multiple times */
1475 do {
1476 seq_printf(s,
1477 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1478 "err %d\n",
1479 (ep == sl811->active_a) ? "(A) " : "",
1480 (ep == sl811->active_b) ? "(B) " : "",
1481 ep->period, ep,
1482 (ep->udev->speed == USB_SPEED_FULL)
1483 ? "" : "ls ",
1484 ep->udev->devnum, ep->epnum,
1485 (ep->epnum == 0) ? ""
1486 : ((ep->nextpid == USB_PID_IN)
1487 ? "in"
1488 : "out"),
1489 ep->maxpacket, ep->error_count);
1490 ep = ep->next;
1491 } while (ep);
1492 }
1493
1494 spin_unlock_irq(&sl811->lock);
1495 seq_printf(s, "\n");
1496
1497 return 0;
1498}
1499
1500static int proc_sl811h_open(struct inode *inode, struct file *file)
1501{
1502 return single_open(file, proc_sl811h_show, PDE(inode)->data);
1503}
1504
066202dd 1505static const struct file_operations proc_ops = {
1da177e4
LT		 1506 .open = proc_sl811h_open,
1507 .read = seq_read,
1508 .llseek = seq_lseek,
1509 .release = single_release,
1510};
1511
1512/* expect just one sl811 per system */
1513static const char proc_filename[] = "driver/sl811h";
1514
1515static void create_debug_file(struct sl811 *sl811)
1516{
cdefa185 1517 sl811->pde = proc_create_data(proc_filename, 0, NULL, &proc_ops, sl811);
1da177e4
LT		 1518}
1519
1520static void remove_debug_file(struct sl811 *sl811)
1521{
1522 if (sl811->pde)
1523 remove_proc_entry(proc_filename, NULL);
1524}
1525
1526#endif
1527
1528/*-------------------------------------------------------------------------*/
1529
1530static void
1531sl811h_stop(struct usb_hcd *hcd)
1532{
1533 struct sl811 *sl811 = hcd_to_sl811(hcd);
1534 unsigned long flags;
1535
1536 del_timer_sync(&hcd->rh_timer);
1537
1538 spin_lock_irqsave(&sl811->lock, flags);
1539 port_power(sl811, 0);
1540 spin_unlock_irqrestore(&sl811->lock, flags);
1541}
1542
1543static int
1544sl811h_start(struct usb_hcd *hcd)
1545{
1546 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1547
1548 /* chip has been reset, VBUS power is off */
1da177e4
LT		 1549 hcd->state = HC_STATE_RUNNING;
1550
bc96c0ad 1551 if (sl811->board) {
0c8624f9
DB		 1552 if (!device_can_wakeup(hcd->self.controller))
1553 device_init_wakeup(hcd->self.controller,
1554 sl811->board->can_wakeup);
bc96c0ad
AS		 1555 hcd->power_budget = sl811->board->power * 2;
1556 }
1da177e4 1557
3a4fa0a2 1558 /* enable power and interrupts */
1e9a47b6
DB		 1559 port_power(sl811, 1);
1560
1da177e4
LT		 1561 return 0;
1562}
1563
1564/*-------------------------------------------------------------------------*/
1565
1566static struct hc_driver sl811h_hc_driver = {
1567 .description = hcd_name,
1568 .hcd_priv_size = sizeof(struct sl811),
1569
1570 /*
1571 * generic hardware linkage
1572 */
1573 .irq = sl811h_irq,
1574 .flags = HCD_USB11 | HCD_MEMORY,
1575
1576 /* Basic lifecycle operations */
1577 .start = sl811h_start,
1578 .stop = sl811h_stop,
1579
1580 /*
1581 * managing i/o requests and associated device resources
1582 */
1583 .urb_enqueue = sl811h_urb_enqueue,
1584 .urb_dequeue = sl811h_urb_dequeue,
1585 .endpoint_disable = sl811h_endpoint_disable,
1586
1587 /*
1588 * periodic schedule support
1589 */
1590 .get_frame_number = sl811h_get_frame,
1591
1592 /*
1593 * root hub support
1594 */
1595 .hub_status_data = sl811h_hub_status_data,
1596 .hub_control = sl811h_hub_control,
0c0382e3
AS		 1597 .bus_suspend = sl811h_bus_suspend,
1598 .bus_resume = sl811h_bus_resume,
1da177e4
LT		 1599};
1600
1601/*-------------------------------------------------------------------------*/
1602
1e9a47b6 1603static int __devexit
3ae5eaec 1604sl811h_remove(struct platform_device *dev)
1da177e4 1605{
3ae5eaec 1606 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4 1607 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1608 struct resource *res;
1609
1da177e4
LT		 1610 remove_debug_file(sl811);
1611 usb_remove_hcd(hcd);
1612
1e9a47b6 1613 /* some platforms may use IORESOURCE_IO */
3ae5eaec 1614 res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1615 if (res)
1616 iounmap(sl811->data_reg);
1da177e4 1617
3ae5eaec 1618 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1e9a47b6
DB		 1619 if (res)
1620 iounmap(sl811->addr_reg);
1da177e4
LT		 1621
1622 usb_put_hcd(hcd);
1623 return 0;
1624}
1625
1e9a47b6 1626static int __devinit
3ae5eaec 1627sl811h_probe(struct platform_device *dev)
1da177e4
LT		 1628{
1629 struct usb_hcd *hcd;
1630 struct sl811 *sl811;
27140219 1631 struct resource *addr, *data, *ires;
1da177e4
LT		 1632 int irq;
1633 void __iomem *addr_reg;
1634 void __iomem *data_reg;
1635 int retval;
1e9a47b6 1636 u8 tmp, ioaddr = 0;
27140219 1637 unsigned long irqflags;
1da177e4
LT		 1638
1639 /* basic sanity checks first. board-specific init logic should
1640 * have initialized these three resources and probably board
1641 * specific platform_data. we don't probe for IRQs, and do only
1642 * minimal sanity checking.
1643 */
27140219
MZ		 1644 ires = platform_get_resource(dev, IORESOURCE_IRQ, 0);
1645 if (dev->num_resources < 3 || !ires)
1da177e4
LT		 1646 return -ENODEV;
1647
27140219
MZ		 1648 irq = ires->start;
1649 irqflags = ires->flags & IRQF_TRIGGER_MASK;
1650
1da177e4 1651 /* refuse to confuse usbcore */
3ae5eaec 1652 if (dev->dev.dma_mask) {
1da177e4
LT		 1653 DBG("no we won't dma\n");
1654 return -EINVAL;
1655 }
1656
1e9a47b6 1657 /* the chip may be wired for either kind of addressing */
3ae5eaec
RK		 1658 addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1659 data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1660 retval = -EBUSY;
1661 if (!addr || !data) {
3ae5eaec
RK		 1662 addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1663 data = platform_get_resource(dev, IORESOURCE_IO, 1);
1e9a47b6
DB		 1664 if (!addr || !data)
1665 return -ENODEV;
1666 ioaddr = 1;
2427ddd8
GKH		 1667 /*
1668 * NOTE: 64-bit resource->start is getting truncated
1669 * to avoid compiler warning, assuming that ->start
1670 * is always 32-bit for this case
1671 */
1672 addr_reg = (void __iomem *) (unsigned long) addr->start;
1673 data_reg = (void __iomem *) (unsigned long) data->start;
1e9a47b6
DB		 1674 } else {
1675 addr_reg = ioremap(addr->start, 1);
1676 if (addr_reg == NULL) {
1677 retval = -ENOMEM;
1678 goto err2;
1679 }
1da177e4 1680
1e9a47b6
DB		 1681 data_reg = ioremap(data->start, 1);
1682 if (data_reg == NULL) {
1683 retval = -ENOMEM;
1684 goto err4;
1685 }
1da177e4
LT		 1686 }
1687
1688 /* allocate and initialize hcd */
7071a3ce 1689 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev_name(&dev->dev));
1da177e4
LT		 1690 if (!hcd) {
1691 retval = -ENOMEM;
1692 goto err5;
1693 }
1694 hcd->rsrc_start = addr->start;
1695 sl811 = hcd_to_sl811(hcd);
1696
1697 spin_lock_init(&sl811->lock);
1698 INIT_LIST_HEAD(&sl811->async);
3ae5eaec 1699 sl811->board = dev->dev.platform_data;
1da177e4
LT		 1700 init_timer(&sl811->timer);
1701 sl811->timer.function = sl811h_timer;
1702 sl811->timer.data = (unsigned long) sl811;
1703 sl811->addr_reg = addr_reg;
1704 sl811->data_reg = data_reg;
1705
1706 spin_lock_irq(&sl811->lock);
1707 port_power(sl811, 0);
1708 spin_unlock_irq(&sl811->lock);
1709 msleep(200);
1710
1711 tmp = sl811_read(sl811, SL11H_HWREVREG);
1712 switch (tmp >> 4) {
1713 case 1:
1714 hcd->product_desc = "SL811HS v1.2";
1715 break;
1716 case 2:
1717 hcd->product_desc = "SL811HS v1.5";
1718 break;
1719 default:
1720 /* reject case 0, SL11S is less functional */
1721 DBG("chiprev %02x\n", tmp);
1722 retval = -ENXIO;
1723 goto err6;
1724 }
1725
1e9a47b6
DB		 1726 /* The chip's IRQ is level triggered, active high. A requirement
1727 * for platform device setup is to cope with things like signal
1728 * inverters (e.g. CF is active low) or working only with edge
1729 * triggers (e.g. most ARM CPUs). Initial driver stress testing
1730 * was on a system with single edge triggering, so most sorts of
1731 * triggering arrangement should work.
27140219
MZ		 1732 *
1733 * Use resource IRQ flags if set by platform device setup.
1e9a47b6 1734 */
27140219
MZ		 1735 irqflags |= IRQF_SHARED;
1736 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | irqflags);
1da177e4
LT		 1737 if (retval != 0)
1738 goto err6;
1739
1740 create_debug_file(sl811);
1741 return retval;
1742
1743 err6:
1744 usb_put_hcd(hcd);
1745 err5:
1e9a47b6
DB		 1746 if (!ioaddr)
1747 iounmap(data_reg);
1da177e4 1748 err4:
1e9a47b6
DB		 1749 if (!ioaddr)
1750 iounmap(addr_reg);
1da177e4 1751 err2:
1da177e4
LT		 1752 DBG("init error, %d\n", retval);
1753 return retval;
1754}
1755
1756#ifdef CONFIG_PM
1757
1758/* for this device there's no useful distinction between the controller
1e9a47b6 1759 * and its root hub, except that the root hub only gets direct PM calls
1da177e4
LT		 1760 * when CONFIG_USB_SUSPEND is enabled.
1761 */
1762
1763static int
3ae5eaec 1764sl811h_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1765{
3ae5eaec 1766 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1767 struct sl811 *sl811 = hcd_to_sl811(hcd);
1768 int retval = 0;
1769
18584999
DB		 1770 switch (state.event) {
1771 case PM_EVENT_FREEZE:
0c0382e3 1772 retval = sl811h_bus_suspend(hcd);
18584999
DB		 1773 break;
1774 case PM_EVENT_SUSPEND:
3a2d5b70 1775 case PM_EVENT_HIBERNATE:
18584999 1776 case PM_EVENT_PRETHAW: /* explicitly discard hw state */
1da177e4 1777 port_power(sl811, 0);
18584999
DB		 1778 break;
1779 }
1da177e4
LT		 1780 return retval;
1781}
1782
1783static int
3ae5eaec 1784sl811h_resume(struct platform_device *dev)
1da177e4 1785{
3ae5eaec 1786 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1787 struct sl811 *sl811 = hcd_to_sl811(hcd);
1788
1da177e4
LT		 1789 /* with no "check to see if VBUS is still powered" board hook,
1790 * let's assume it'd only be powered to enable remote wakeup.
1791 */
70a1c9e0 1792 if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1da177e4
LT		 1793 sl811->port1 = 0;
1794 port_power(sl811, 1);
1c50c317 1795 usb_root_hub_lost_power(hcd->self.root_hub);
1da177e4
LT		 1796 return 0;
1797 }
1798
0c0382e3 1799 return sl811h_bus_resume(hcd);
1da177e4
LT		 1800}
1801
1802#else
1803
1804#define sl811h_suspend NULL
1805#define sl811h_resume NULL
1806
1807#endif
1808
1809
1e9a47b6 1810/* this driver is exported so sl811_cs can depend on it */
3ae5eaec 1811struct platform_driver sl811h_driver = {
1da177e4 1812 .probe = sl811h_probe,
1e9a47b6 1813 .remove = __devexit_p(sl811h_remove),
1da177e4
LT		 1814
1815 .suspend = sl811h_suspend,
1816 .resume = sl811h_resume,
3ae5eaec
RK		 1817 .driver = {
1818 .name = (char *) hcd_name,
1819 .owner = THIS_MODULE,
1820 },
1da177e4 1821};
1e9a47b6 1822EXPORT_SYMBOL(sl811h_driver);
1da177e4
LT		 1823
1824/*-------------------------------------------------------------------------*/
1e9a47b6
DB		 1825
1826static int __init sl811h_init(void)
1da177e4
LT		 1827{
1828 if (usb_disabled())
1829 return -ENODEV;
1830
1831 INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
3ae5eaec 1832 return platform_driver_register(&sl811h_driver);
1da177e4
LT		 1833}
1834module_init(sl811h_init);
1835
1e9a47b6
DB		 1836static void __exit sl811h_cleanup(void)
1837{
3ae5eaec 1838 platform_driver_unregister(&sl811h_driver);
1da177e4
LT		 1839}
1840module_exit(sl811h_cleanup);
Linux kernel - Deliverables
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