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1da177e4 LT |
1 | /* |
2 | * SL811HS HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * Copyright (C) 2004 Psion Teklogix (for NetBook PRO) | |
1e9a47b6 DB |
5 | * Copyright (C) 2004-2005 David Brownell |
6 | * | |
1da177e4 LT |
7 | * Periodic scheduling is based on Roman's OHCI code |
8 | * Copyright (C) 1999 Roman Weissgaerber | |
9 | * | |
10 | * The SL811HS controller handles host side USB (like the SL11H, but with | |
11 | * another register set and SOF generation) as well as peripheral side USB | |
12 | * (like the SL811S). This driver version doesn't implement the Gadget API | |
13 | * for the peripheral role; or OTG (that'd need much external circuitry). | |
14 | * | |
15 | * For documentation, see the SL811HS spec and the "SL811HS Embedded Host" | |
16 | * document (providing significant pieces missing from that spec); plus | |
17 | * the SL811S spec if you want peripheral side info. | |
1e9a47b6 | 18 | */ |
1da177e4 LT |
19 | |
20 | /* | |
21 | * Status: Passed basic stress testing, works with hubs, mice, keyboards, | |
22 | * and usb-storage. | |
23 | * | |
24 | * TODO: | |
25 | * - usb suspend/resume triggered by sl811 (with USB_SUSPEND) | |
26 | * - various issues noted in the code | |
27 | * - performance work; use both register banks; ... | |
28 | * - use urb->iso_frame_desc[] with ISO transfers | |
29 | */ | |
30 | ||
31 | #undef VERBOSE | |
32 | #undef PACKET_TRACE | |
33 | ||
1da177e4 LT |
34 | #include <linux/module.h> |
35 | #include <linux/moduleparam.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/delay.h> | |
38 | #include <linux/ioport.h> | |
39 | #include <linux/sched.h> | |
40 | #include <linux/slab.h> | |
41 | #include <linux/smp_lock.h> | |
42 | #include <linux/errno.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/timer.h> | |
45 | #include <linux/list.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/usb.h> | |
325a4af6 | 48 | #include <linux/usb/sl811.h> |
d052d1be | 49 | #include <linux/platform_device.h> |
1da177e4 LT |
50 | |
51 | #include <asm/io.h> | |
52 | #include <asm/irq.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/byteorder.h> | |
55 | ||
56 | #include "../core/hcd.h" | |
57 | #include "sl811.h" | |
58 | ||
59 | ||
60 | MODULE_DESCRIPTION("SL811HS USB Host Controller Driver"); | |
61 | MODULE_LICENSE("GPL"); | |
62 | ||
1e9a47b6 | 63 | #define DRIVER_VERSION "19 May 2005" |
1da177e4 LT |
64 | |
65 | ||
66 | #ifndef DEBUG | |
67 | # define STUB_DEBUG_FILE | |
68 | #endif | |
69 | ||
70 | /* for now, use only one transfer register bank */ | |
71 | #undef USE_B | |
72 | ||
73 | /* this doesn't understand urb->iso_frame_desc[], but if you had a driver | |
74 | * that just queued one ISO frame per URB then iso transfers "should" work | |
75 | * using the normal urb status fields. | |
76 | */ | |
77 | #define DISABLE_ISO | |
78 | ||
79 | // #define QUIRK2 | |
80 | #define QUIRK3 | |
81 | ||
82 | static const char hcd_name[] = "sl811-hcd"; | |
83 | ||
84 | /*-------------------------------------------------------------------------*/ | |
85 | ||
86 | static void port_power(struct sl811 *sl811, int is_on) | |
87 | { | |
88 | struct usb_hcd *hcd = sl811_to_hcd(sl811); | |
89 | ||
90 | /* hub is inactive unless the port is powered */ | |
91 | if (is_on) { | |
92 | if (sl811->port1 & (1 << USB_PORT_FEAT_POWER)) | |
93 | return; | |
94 | ||
95 | sl811->port1 = (1 << USB_PORT_FEAT_POWER); | |
96 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
97 | hcd->self.controller->power.power_state = PMSG_ON; | |
98 | } else { | |
99 | sl811->port1 = 0; | |
100 | sl811->irq_enable = 0; | |
101 | hcd->state = HC_STATE_HALT; | |
102 | hcd->self.controller->power.power_state = PMSG_SUSPEND; | |
103 | } | |
104 | sl811->ctrl1 = 0; | |
105 | sl811_write(sl811, SL11H_IRQ_ENABLE, 0); | |
106 | sl811_write(sl811, SL11H_IRQ_STATUS, ~0); | |
107 | ||
108 | if (sl811->board && sl811->board->port_power) { | |
109 | /* switch VBUS, at 500mA unless hub power budget gets set */ | |
110 | DBG("power %s\n", is_on ? "on" : "off"); | |
111 | sl811->board->port_power(hcd->self.controller, is_on); | |
112 | } | |
113 | ||
114 | /* reset as thoroughly as we can */ | |
115 | if (sl811->board && sl811->board->reset) | |
116 | sl811->board->reset(hcd->self.controller); | |
1e9a47b6 DB |
117 | else { |
118 | sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0); | |
119 | mdelay(20); | |
120 | } | |
1da177e4 LT |
121 | |
122 | sl811_write(sl811, SL11H_IRQ_ENABLE, 0); | |
123 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
124 | sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT); | |
125 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
126 | ||
127 | // if !is_on, put into lowpower mode now | |
128 | } | |
129 | ||
130 | /*-------------------------------------------------------------------------*/ | |
131 | ||
132 | /* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue, | |
133 | * and may start I/O. Endpoint queues are scanned during completion irq | |
093cf723 | 134 | * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation. |
1da177e4 LT |
135 | * |
136 | * Using an external DMA engine to copy a packet at a time could work, | |
137 | * though setup/teardown costs may be too big to make it worthwhile. | |
138 | */ | |
139 | ||
140 | /* SETUP starts a new control request. Devices are not allowed to | |
141 | * STALL or NAK these; they must cancel any pending control requests. | |
142 | */ | |
143 | static void setup_packet( | |
144 | struct sl811 *sl811, | |
145 | struct sl811h_ep *ep, | |
146 | struct urb *urb, | |
147 | u8 bank, | |
148 | u8 control | |
149 | ) | |
150 | { | |
151 | u8 addr; | |
152 | u8 len; | |
153 | void __iomem *data_reg; | |
154 | ||
155 | addr = SL811HS_PACKET_BUF(bank == 0); | |
156 | len = sizeof(struct usb_ctrlrequest); | |
157 | data_reg = sl811->data_reg; | |
158 | sl811_write_buf(sl811, addr, urb->setup_packet, len); | |
159 | ||
160 | /* autoincrementing */ | |
161 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
162 | writeb(len, data_reg); | |
163 | writeb(SL_SETUP /* | ep->epnum */, data_reg); | |
164 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
165 | ||
166 | /* always OUT/data0 */ ; | |
167 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, | |
168 | control | SL11H_HCTLMASK_OUT); | |
169 | ep->length = 0; | |
170 | PACKET("SETUP qh%p\n", ep); | |
171 | } | |
172 | ||
173 | /* STATUS finishes control requests, often after IN or OUT data packets */ | |
174 | static void status_packet( | |
175 | struct sl811 *sl811, | |
176 | struct sl811h_ep *ep, | |
177 | struct urb *urb, | |
178 | u8 bank, | |
179 | u8 control | |
180 | ) | |
181 | { | |
182 | int do_out; | |
183 | void __iomem *data_reg; | |
184 | ||
185 | do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe); | |
186 | data_reg = sl811->data_reg; | |
187 | ||
188 | /* autoincrementing */ | |
189 | sl811_write(sl811, bank + SL11H_BUFADDRREG, 0); | |
190 | writeb(0, data_reg); | |
191 | writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg); | |
192 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
193 | ||
194 | /* always data1; sometimes IN */ | |
195 | control |= SL11H_HCTLMASK_TOGGLE; | |
196 | if (do_out) | |
197 | control |= SL11H_HCTLMASK_OUT; | |
198 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); | |
199 | ep->length = 0; | |
200 | PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "", | |
201 | do_out ? "out" : "in", ep); | |
202 | } | |
203 | ||
204 | /* IN packets can be used with any type of endpoint. here we just | |
205 | * start the transfer, data from the peripheral may arrive later. | |
206 | * urb->iso_frame_desc is currently ignored here... | |
207 | */ | |
208 | static void in_packet( | |
209 | struct sl811 *sl811, | |
210 | struct sl811h_ep *ep, | |
211 | struct urb *urb, | |
212 | u8 bank, | |
213 | u8 control | |
214 | ) | |
215 | { | |
216 | u8 addr; | |
217 | u8 len; | |
218 | void __iomem *data_reg; | |
219 | ||
220 | /* avoid losing data on overflow */ | |
221 | len = ep->maxpacket; | |
222 | addr = SL811HS_PACKET_BUF(bank == 0); | |
223 | if (!(control & SL11H_HCTLMASK_ISOCH) | |
224 | && usb_gettoggle(urb->dev, ep->epnum, 0)) | |
225 | control |= SL11H_HCTLMASK_TOGGLE; | |
226 | data_reg = sl811->data_reg; | |
227 | ||
228 | /* autoincrementing */ | |
229 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
230 | writeb(len, data_reg); | |
231 | writeb(SL_IN | ep->epnum, data_reg); | |
232 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
233 | ||
234 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); | |
235 | ep->length = min((int)len, | |
236 | urb->transfer_buffer_length - urb->actual_length); | |
237 | PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", | |
238 | !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len); | |
239 | } | |
240 | ||
241 | /* OUT packets can be used with any type of endpoint. | |
242 | * urb->iso_frame_desc is currently ignored here... | |
243 | */ | |
244 | static void out_packet( | |
245 | struct sl811 *sl811, | |
246 | struct sl811h_ep *ep, | |
247 | struct urb *urb, | |
248 | u8 bank, | |
249 | u8 control | |
250 | ) | |
251 | { | |
252 | void *buf; | |
253 | u8 addr; | |
254 | u8 len; | |
255 | void __iomem *data_reg; | |
256 | ||
257 | buf = urb->transfer_buffer + urb->actual_length; | |
258 | prefetch(buf); | |
259 | ||
260 | len = min((int)ep->maxpacket, | |
261 | urb->transfer_buffer_length - urb->actual_length); | |
262 | ||
263 | if (!(control & SL11H_HCTLMASK_ISOCH) | |
264 | && usb_gettoggle(urb->dev, ep->epnum, 1)) | |
265 | control |= SL11H_HCTLMASK_TOGGLE; | |
266 | addr = SL811HS_PACKET_BUF(bank == 0); | |
267 | data_reg = sl811->data_reg; | |
268 | ||
269 | sl811_write_buf(sl811, addr, buf, len); | |
270 | ||
271 | /* autoincrementing */ | |
272 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
273 | writeb(len, data_reg); | |
274 | writeb(SL_OUT | ep->epnum, data_reg); | |
275 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
276 | ||
277 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, | |
278 | control | SL11H_HCTLMASK_OUT); | |
279 | ep->length = len; | |
280 | PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", | |
281 | !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len); | |
282 | } | |
283 | ||
284 | /*-------------------------------------------------------------------------*/ | |
285 | ||
286 | /* caller updates on-chip enables later */ | |
287 | ||
288 | static inline void sofirq_on(struct sl811 *sl811) | |
289 | { | |
290 | if (sl811->irq_enable & SL11H_INTMASK_SOFINTR) | |
291 | return; | |
292 | VDBG("sof irq on\n"); | |
293 | sl811->irq_enable |= SL11H_INTMASK_SOFINTR; | |
294 | } | |
295 | ||
296 | static inline void sofirq_off(struct sl811 *sl811) | |
297 | { | |
298 | if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR)) | |
299 | return; | |
300 | VDBG("sof irq off\n"); | |
301 | sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR; | |
302 | } | |
303 | ||
304 | /*-------------------------------------------------------------------------*/ | |
305 | ||
306 | /* pick the next endpoint for a transaction, and issue it. | |
307 | * frames start with periodic transfers (after whatever is pending | |
308 | * from the previous frame), and the rest of the time is async | |
309 | * transfers, scheduled round-robin. | |
310 | */ | |
311 | static struct sl811h_ep *start(struct sl811 *sl811, u8 bank) | |
312 | { | |
313 | struct sl811h_ep *ep; | |
314 | struct urb *urb; | |
315 | int fclock; | |
316 | u8 control; | |
317 | ||
318 | /* use endpoint at schedule head */ | |
319 | if (sl811->next_periodic) { | |
320 | ep = sl811->next_periodic; | |
321 | sl811->next_periodic = ep->next; | |
322 | } else { | |
323 | if (sl811->next_async) | |
324 | ep = sl811->next_async; | |
325 | else if (!list_empty(&sl811->async)) | |
326 | ep = container_of(sl811->async.next, | |
327 | struct sl811h_ep, schedule); | |
328 | else { | |
329 | /* could set up the first fullspeed periodic | |
330 | * transfer for the next frame ... | |
331 | */ | |
332 | return NULL; | |
333 | } | |
334 | ||
335 | #ifdef USE_B | |
336 | if ((bank && sl811->active_b == ep) || sl811->active_a == ep) | |
337 | return NULL; | |
338 | #endif | |
339 | ||
340 | if (ep->schedule.next == &sl811->async) | |
341 | sl811->next_async = NULL; | |
342 | else | |
343 | sl811->next_async = container_of(ep->schedule.next, | |
344 | struct sl811h_ep, schedule); | |
345 | } | |
346 | ||
347 | if (unlikely(list_empty(&ep->hep->urb_list))) { | |
348 | DBG("empty %p queue?\n", ep); | |
349 | return NULL; | |
350 | } | |
351 | ||
352 | urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); | |
353 | control = ep->defctrl; | |
354 | ||
355 | /* if this frame doesn't have enough time left to transfer this | |
356 | * packet, wait till the next frame. too-simple algorithm... | |
357 | */ | |
358 | fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6; | |
359 | fclock -= 100; /* setup takes not much time */ | |
360 | if (urb->dev->speed == USB_SPEED_LOW) { | |
361 | if (control & SL11H_HCTLMASK_PREAMBLE) { | |
362 | /* also note erratum 1: some hubs won't work */ | |
363 | fclock -= 800; | |
364 | } | |
365 | fclock -= ep->maxpacket << 8; | |
366 | ||
367 | /* erratum 2: AFTERSOF only works for fullspeed */ | |
368 | if (fclock < 0) { | |
369 | if (ep->period) | |
370 | sl811->stat_overrun++; | |
371 | sofirq_on(sl811); | |
372 | return NULL; | |
373 | } | |
374 | } else { | |
375 | fclock -= 12000 / 19; /* 19 64byte packets/msec */ | |
376 | if (fclock < 0) { | |
377 | if (ep->period) | |
378 | sl811->stat_overrun++; | |
379 | control |= SL11H_HCTLMASK_AFTERSOF; | |
380 | ||
381 | /* throttle bulk/control irq noise */ | |
382 | } else if (ep->nak_count) | |
383 | control |= SL11H_HCTLMASK_AFTERSOF; | |
384 | } | |
385 | ||
386 | ||
387 | switch (ep->nextpid) { | |
388 | case USB_PID_IN: | |
389 | in_packet(sl811, ep, urb, bank, control); | |
390 | break; | |
391 | case USB_PID_OUT: | |
392 | out_packet(sl811, ep, urb, bank, control); | |
393 | break; | |
394 | case USB_PID_SETUP: | |
395 | setup_packet(sl811, ep, urb, bank, control); | |
396 | break; | |
397 | case USB_PID_ACK: /* for control status */ | |
398 | status_packet(sl811, ep, urb, bank, control); | |
399 | break; | |
400 | default: | |
401 | DBG("bad ep%p pid %02x\n", ep, ep->nextpid); | |
402 | ep = NULL; | |
403 | } | |
404 | return ep; | |
405 | } | |
406 | ||
407 | #define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2) | |
408 | ||
409 | static inline void start_transfer(struct sl811 *sl811) | |
410 | { | |
411 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) | |
412 | return; | |
413 | if (sl811->active_a == NULL) { | |
414 | sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF)); | |
415 | if (sl811->active_a != NULL) | |
416 | sl811->jiffies_a = jiffies + MIN_JIFFIES; | |
417 | } | |
418 | #ifdef USE_B | |
419 | if (sl811->active_b == NULL) { | |
420 | sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF)); | |
421 | if (sl811->active_b != NULL) | |
422 | sl811->jiffies_b = jiffies + MIN_JIFFIES; | |
423 | } | |
424 | #endif | |
425 | } | |
426 | ||
427 | static void finish_request( | |
428 | struct sl811 *sl811, | |
429 | struct sl811h_ep *ep, | |
430 | struct urb *urb, | |
431 | struct pt_regs *regs, | |
432 | int status | |
433 | ) __releases(sl811->lock) __acquires(sl811->lock) | |
434 | { | |
435 | unsigned i; | |
436 | ||
437 | if (usb_pipecontrol(urb->pipe)) | |
438 | ep->nextpid = USB_PID_SETUP; | |
439 | ||
440 | spin_lock(&urb->lock); | |
441 | if (urb->status == -EINPROGRESS) | |
442 | urb->status = status; | |
1e9a47b6 | 443 | urb->hcpriv = NULL; |
1da177e4 LT |
444 | spin_unlock(&urb->lock); |
445 | ||
446 | spin_unlock(&sl811->lock); | |
447 | usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, regs); | |
448 | spin_lock(&sl811->lock); | |
449 | ||
450 | /* leave active endpoints in the schedule */ | |
451 | if (!list_empty(&ep->hep->urb_list)) | |
452 | return; | |
453 | ||
454 | /* async deschedule? */ | |
455 | if (!list_empty(&ep->schedule)) { | |
456 | list_del_init(&ep->schedule); | |
457 | if (ep == sl811->next_async) | |
458 | sl811->next_async = NULL; | |
459 | return; | |
460 | } | |
461 | ||
462 | /* periodic deschedule */ | |
463 | DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); | |
464 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { | |
465 | struct sl811h_ep *temp; | |
466 | struct sl811h_ep **prev = &sl811->periodic[i]; | |
467 | ||
468 | while (*prev && ((temp = *prev) != ep)) | |
469 | prev = &temp->next; | |
470 | if (*prev) | |
471 | *prev = ep->next; | |
472 | sl811->load[i] -= ep->load; | |
1e9a47b6 | 473 | } |
1da177e4 LT |
474 | ep->branch = PERIODIC_SIZE; |
475 | sl811->periodic_count--; | |
476 | sl811_to_hcd(sl811)->self.bandwidth_allocated | |
477 | -= ep->load / ep->period; | |
478 | if (ep == sl811->next_periodic) | |
479 | sl811->next_periodic = ep->next; | |
480 | ||
481 | /* we might turn SOFs back on again for the async schedule */ | |
482 | if (sl811->periodic_count == 0) | |
483 | sofirq_off(sl811); | |
484 | } | |
485 | ||
486 | static void | |
487 | done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank, struct pt_regs *regs) | |
488 | { | |
489 | u8 status; | |
490 | struct urb *urb; | |
491 | int urbstat = -EINPROGRESS; | |
492 | ||
493 | if (unlikely(!ep)) | |
494 | return; | |
495 | ||
496 | status = sl811_read(sl811, bank + SL11H_PKTSTATREG); | |
497 | ||
498 | urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); | |
499 | ||
500 | /* we can safely ignore NAKs */ | |
501 | if (status & SL11H_STATMASK_NAK) { | |
502 | // PACKET("...NAK_%02x qh%p\n", bank, ep); | |
503 | if (!ep->period) | |
504 | ep->nak_count++; | |
505 | ep->error_count = 0; | |
506 | ||
507 | /* ACK advances transfer, toggle, and maybe queue */ | |
508 | } else if (status & SL11H_STATMASK_ACK) { | |
509 | struct usb_device *udev = urb->dev; | |
510 | int len; | |
511 | unsigned char *buf; | |
512 | ||
513 | /* urb->iso_frame_desc is currently ignored here... */ | |
514 | ||
515 | ep->nak_count = ep->error_count = 0; | |
516 | switch (ep->nextpid) { | |
517 | case USB_PID_OUT: | |
518 | // PACKET("...ACK/out_%02x qh%p\n", bank, ep); | |
519 | urb->actual_length += ep->length; | |
520 | usb_dotoggle(udev, ep->epnum, 1); | |
521 | if (urb->actual_length | |
522 | == urb->transfer_buffer_length) { | |
523 | if (usb_pipecontrol(urb->pipe)) | |
524 | ep->nextpid = USB_PID_ACK; | |
525 | ||
526 | /* some bulk protocols terminate OUT transfers | |
527 | * by a short packet, using ZLPs not padding. | |
528 | */ | |
529 | else if (ep->length < ep->maxpacket | |
530 | || !(urb->transfer_flags | |
531 | & URB_ZERO_PACKET)) | |
532 | urbstat = 0; | |
533 | } | |
534 | break; | |
535 | case USB_PID_IN: | |
536 | // PACKET("...ACK/in_%02x qh%p\n", bank, ep); | |
537 | buf = urb->transfer_buffer + urb->actual_length; | |
538 | prefetchw(buf); | |
539 | len = ep->maxpacket - sl811_read(sl811, | |
540 | bank + SL11H_XFERCNTREG); | |
541 | if (len > ep->length) { | |
542 | len = ep->length; | |
543 | urb->status = -EOVERFLOW; | |
544 | } | |
545 | urb->actual_length += len; | |
546 | sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0), | |
547 | buf, len); | |
548 | usb_dotoggle(udev, ep->epnum, 0); | |
549 | if (urb->actual_length == urb->transfer_buffer_length) | |
550 | urbstat = 0; | |
551 | else if (len < ep->maxpacket) { | |
552 | if (urb->transfer_flags & URB_SHORT_NOT_OK) | |
553 | urbstat = -EREMOTEIO; | |
554 | else | |
555 | urbstat = 0; | |
556 | } | |
557 | if (usb_pipecontrol(urb->pipe) | |
558 | && (urbstat == -EREMOTEIO | |
559 | || urbstat == 0)) { | |
560 | ||
561 | /* NOTE if the status stage STALLs (why?), | |
562 | * this reports the wrong urb status. | |
563 | */ | |
564 | spin_lock(&urb->lock); | |
565 | if (urb->status == -EINPROGRESS) | |
566 | urb->status = urbstat; | |
567 | spin_unlock(&urb->lock); | |
568 | ||
569 | urb = NULL; | |
570 | ep->nextpid = USB_PID_ACK; | |
571 | } | |
572 | break; | |
573 | case USB_PID_SETUP: | |
574 | // PACKET("...ACK/setup_%02x qh%p\n", bank, ep); | |
575 | if (urb->transfer_buffer_length == urb->actual_length) | |
576 | ep->nextpid = USB_PID_ACK; | |
577 | else if (usb_pipeout(urb->pipe)) { | |
578 | usb_settoggle(udev, 0, 1, 1); | |
579 | ep->nextpid = USB_PID_OUT; | |
580 | } else { | |
581 | usb_settoggle(udev, 0, 0, 1); | |
582 | ep->nextpid = USB_PID_IN; | |
583 | } | |
584 | break; | |
585 | case USB_PID_ACK: | |
586 | // PACKET("...ACK/status_%02x qh%p\n", bank, ep); | |
587 | urbstat = 0; | |
588 | break; | |
589 | } | |
590 | ||
591 | /* STALL stops all transfers */ | |
592 | } else if (status & SL11H_STATMASK_STALL) { | |
593 | PACKET("...STALL_%02x qh%p\n", bank, ep); | |
594 | ep->nak_count = ep->error_count = 0; | |
595 | urbstat = -EPIPE; | |
596 | ||
597 | /* error? retry, until "3 strikes" */ | |
598 | } else if (++ep->error_count >= 3) { | |
599 | if (status & SL11H_STATMASK_TMOUT) | |
38e2bfc9 | 600 | urbstat = -ETIME; |
1da177e4 LT |
601 | else if (status & SL11H_STATMASK_OVF) |
602 | urbstat = -EOVERFLOW; | |
603 | else | |
604 | urbstat = -EPROTO; | |
605 | ep->error_count = 0; | |
606 | PACKET("...3STRIKES_%02x %02x qh%p stat %d\n", | |
607 | bank, status, ep, urbstat); | |
608 | } | |
609 | ||
610 | if (urb && (urbstat != -EINPROGRESS || urb->status != -EINPROGRESS)) | |
611 | finish_request(sl811, ep, urb, regs, urbstat); | |
612 | } | |
613 | ||
614 | static inline u8 checkdone(struct sl811 *sl811) | |
615 | { | |
616 | u8 ctl; | |
617 | u8 irqstat = 0; | |
618 | ||
619 | if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) { | |
620 | ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)); | |
621 | if (ctl & SL11H_HCTLMASK_ARM) | |
622 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); | |
623 | DBG("%s DONE_A: ctrl %02x sts %02x\n", | |
624 | (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", | |
625 | ctl, | |
626 | sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); | |
627 | irqstat |= SL11H_INTMASK_DONE_A; | |
628 | } | |
629 | #ifdef USE_B | |
630 | if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) { | |
631 | ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)); | |
632 | if (ctl & SL11H_HCTLMASK_ARM) | |
633 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); | |
634 | DBG("%s DONE_B: ctrl %02x sts %02x\n", | |
635 | (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", | |
636 | ctl, | |
637 | sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); | |
638 | irqstat |= SL11H_INTMASK_DONE_A; | |
639 | } | |
640 | #endif | |
641 | return irqstat; | |
642 | } | |
643 | ||
644 | static irqreturn_t sl811h_irq(struct usb_hcd *hcd, struct pt_regs *regs) | |
645 | { | |
646 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
647 | u8 irqstat; | |
648 | irqreturn_t ret = IRQ_NONE; | |
649 | unsigned retries = 5; | |
650 | ||
651 | spin_lock(&sl811->lock); | |
652 | ||
653 | retry: | |
654 | irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP; | |
655 | if (irqstat) { | |
656 | sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); | |
657 | irqstat &= sl811->irq_enable; | |
658 | } | |
659 | ||
660 | #ifdef QUIRK2 | |
661 | /* this may no longer be necessary ... */ | |
1e9a47b6 | 662 | if (irqstat == 0) { |
1da177e4 | 663 | irqstat = checkdone(sl811); |
1e9a47b6 | 664 | if (irqstat) |
1da177e4 LT |
665 | sl811->stat_lost++; |
666 | } | |
667 | #endif | |
668 | ||
669 | /* USB packets, not necessarily handled in the order they're | |
670 | * issued ... that's fine if they're different endpoints. | |
671 | */ | |
672 | if (irqstat & SL11H_INTMASK_DONE_A) { | |
673 | done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF), regs); | |
674 | sl811->active_a = NULL; | |
675 | sl811->stat_a++; | |
676 | } | |
677 | #ifdef USE_B | |
678 | if (irqstat & SL11H_INTMASK_DONE_B) { | |
679 | done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF), regs); | |
680 | sl811->active_b = NULL; | |
681 | sl811->stat_b++; | |
682 | } | |
683 | #endif | |
684 | if (irqstat & SL11H_INTMASK_SOFINTR) { | |
685 | unsigned index; | |
686 | ||
687 | index = sl811->frame++ % (PERIODIC_SIZE - 1); | |
688 | sl811->stat_sof++; | |
689 | ||
690 | /* be graceful about almost-inevitable periodic schedule | |
691 | * overruns: continue the previous frame's transfers iff | |
692 | * this one has nothing scheduled. | |
693 | */ | |
694 | if (sl811->next_periodic) { | |
695 | // ERR("overrun to slot %d\n", index); | |
696 | sl811->stat_overrun++; | |
697 | } | |
698 | if (sl811->periodic[index]) | |
699 | sl811->next_periodic = sl811->periodic[index]; | |
700 | } | |
701 | ||
702 | /* khubd manages debouncing and wakeup */ | |
703 | if (irqstat & SL11H_INTMASK_INSRMV) { | |
704 | sl811->stat_insrmv++; | |
705 | ||
706 | /* most stats are reset for each VBUS session */ | |
707 | sl811->stat_wake = 0; | |
708 | sl811->stat_sof = 0; | |
709 | sl811->stat_a = 0; | |
710 | sl811->stat_b = 0; | |
711 | sl811->stat_lost = 0; | |
712 | ||
713 | sl811->ctrl1 = 0; | |
714 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
715 | ||
716 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
717 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
718 | ||
719 | /* usbcore nukes other pending transactions on disconnect */ | |
720 | if (sl811->active_a) { | |
721 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); | |
722 | finish_request(sl811, sl811->active_a, | |
1e9a47b6 DB |
723 | container_of(sl811->active_a |
724 | ->hep->urb_list.next, | |
1da177e4 LT |
725 | struct urb, urb_list), |
726 | NULL, -ESHUTDOWN); | |
727 | sl811->active_a = NULL; | |
728 | } | |
729 | #ifdef USE_B | |
730 | if (sl811->active_b) { | |
731 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); | |
732 | finish_request(sl811, sl811->active_b, | |
1e9a47b6 DB |
733 | container_of(sl811->active_b |
734 | ->hep->urb_list.next, | |
1da177e4 LT |
735 | struct urb, urb_list), |
736 | NULL, -ESHUTDOWN); | |
737 | sl811->active_b = NULL; | |
738 | } | |
739 | #endif | |
740 | ||
093cf723 | 741 | /* port status seems weird until after reset, so |
1da177e4 LT |
742 | * force the reset and make khubd clean up later. |
743 | */ | |
744 | sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION) | |
745 | | (1 << USB_PORT_FEAT_CONNECTION); | |
746 | ||
747 | } else if (irqstat & SL11H_INTMASK_RD) { | |
748 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) { | |
749 | DBG("wakeup\n"); | |
750 | sl811->port1 |= 1 << USB_PORT_FEAT_C_SUSPEND; | |
751 | sl811->stat_wake++; | |
752 | } else | |
753 | irqstat &= ~SL11H_INTMASK_RD; | |
754 | } | |
755 | ||
756 | if (irqstat) { | |
757 | if (sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)) | |
758 | start_transfer(sl811); | |
759 | ret = IRQ_HANDLED; | |
760 | if (retries--) | |
761 | goto retry; | |
762 | } | |
763 | ||
1e9a47b6 | 764 | if (sl811->periodic_count == 0 && list_empty(&sl811->async)) |
1da177e4 LT |
765 | sofirq_off(sl811); |
766 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
767 | ||
768 | spin_unlock(&sl811->lock); | |
769 | ||
770 | return ret; | |
771 | } | |
772 | ||
773 | /*-------------------------------------------------------------------------*/ | |
774 | ||
775 | /* usb 1.1 says max 90% of a frame is available for periodic transfers. | |
776 | * this driver doesn't promise that much since it's got to handle an | |
777 | * IRQ per packet; irq handling latencies also use up that time. | |
4b2e790a DB |
778 | * |
779 | * NOTE: the periodic schedule is a sparse tree, with the load for | |
780 | * each branch minimized. see fig 3.5 in the OHCI spec for example. | |
1da177e4 LT |
781 | */ |
782 | #define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */ | |
783 | ||
784 | static int balance(struct sl811 *sl811, u16 period, u16 load) | |
785 | { | |
786 | int i, branch = -ENOSPC; | |
787 | ||
788 | /* search for the least loaded schedule branch of that period | |
789 | * which has enough bandwidth left unreserved. | |
790 | */ | |
791 | for (i = 0; i < period ; i++) { | |
792 | if (branch < 0 || sl811->load[branch] > sl811->load[i]) { | |
793 | int j; | |
794 | ||
795 | for (j = i; j < PERIODIC_SIZE; j += period) { | |
796 | if ((sl811->load[j] + load) | |
797 | > MAX_PERIODIC_LOAD) | |
798 | break; | |
799 | } | |
800 | if (j < PERIODIC_SIZE) | |
801 | continue; | |
1e9a47b6 | 802 | branch = i; |
1da177e4 LT |
803 | } |
804 | } | |
805 | return branch; | |
806 | } | |
807 | ||
808 | /*-------------------------------------------------------------------------*/ | |
809 | ||
810 | static int sl811h_urb_enqueue( | |
811 | struct usb_hcd *hcd, | |
812 | struct usb_host_endpoint *hep, | |
813 | struct urb *urb, | |
55016f10 | 814 | gfp_t mem_flags |
1da177e4 LT |
815 | ) { |
816 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
817 | struct usb_device *udev = urb->dev; | |
818 | unsigned int pipe = urb->pipe; | |
819 | int is_out = !usb_pipein(pipe); | |
820 | int type = usb_pipetype(pipe); | |
821 | int epnum = usb_pipeendpoint(pipe); | |
822 | struct sl811h_ep *ep = NULL; | |
823 | unsigned long flags; | |
824 | int i; | |
825 | int retval = 0; | |
826 | ||
827 | #ifdef DISABLE_ISO | |
828 | if (type == PIPE_ISOCHRONOUS) | |
829 | return -ENOSPC; | |
830 | #endif | |
831 | ||
832 | /* avoid all allocations within spinlocks */ | |
833 | if (!hep->hcpriv) | |
7b842b6e | 834 | ep = kzalloc(sizeof *ep, mem_flags); |
1da177e4 LT |
835 | |
836 | spin_lock_irqsave(&sl811->lock, flags); | |
837 | ||
838 | /* don't submit to a dead or disabled port */ | |
839 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)) | |
840 | || !HC_IS_RUNNING(hcd->state)) { | |
841 | retval = -ENODEV; | |
4b2e790a | 842 | kfree(ep); |
1da177e4 LT |
843 | goto fail; |
844 | } | |
845 | ||
846 | if (hep->hcpriv) { | |
847 | kfree(ep); | |
848 | ep = hep->hcpriv; | |
849 | } else if (!ep) { | |
850 | retval = -ENOMEM; | |
851 | goto fail; | |
852 | ||
853 | } else { | |
854 | INIT_LIST_HEAD(&ep->schedule); | |
6a8e87b2 | 855 | ep->udev = udev; |
1da177e4 LT |
856 | ep->epnum = epnum; |
857 | ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); | |
858 | ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE; | |
859 | usb_settoggle(udev, epnum, is_out, 0); | |
860 | ||
861 | if (type == PIPE_CONTROL) | |
862 | ep->nextpid = USB_PID_SETUP; | |
863 | else if (is_out) | |
864 | ep->nextpid = USB_PID_OUT; | |
865 | else | |
866 | ep->nextpid = USB_PID_IN; | |
867 | ||
868 | if (ep->maxpacket > H_MAXPACKET) { | |
869 | /* iso packets up to 240 bytes could work... */ | |
870 | DBG("dev %d ep%d maxpacket %d\n", | |
871 | udev->devnum, epnum, ep->maxpacket); | |
872 | retval = -EINVAL; | |
873 | goto fail; | |
874 | } | |
875 | ||
876 | if (udev->speed == USB_SPEED_LOW) { | |
877 | /* send preamble for external hub? */ | |
878 | if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD)) | |
879 | ep->defctrl |= SL11H_HCTLMASK_PREAMBLE; | |
880 | } | |
881 | switch (type) { | |
882 | case PIPE_ISOCHRONOUS: | |
883 | case PIPE_INTERRUPT: | |
884 | if (urb->interval > PERIODIC_SIZE) | |
885 | urb->interval = PERIODIC_SIZE; | |
886 | ep->period = urb->interval; | |
887 | ep->branch = PERIODIC_SIZE; | |
888 | if (type == PIPE_ISOCHRONOUS) | |
889 | ep->defctrl |= SL11H_HCTLMASK_ISOCH; | |
890 | ep->load = usb_calc_bus_time(udev->speed, !is_out, | |
891 | (type == PIPE_ISOCHRONOUS), | |
892 | usb_maxpacket(udev, pipe, is_out)) | |
893 | / 1000; | |
894 | break; | |
895 | } | |
896 | ||
1e9a47b6 | 897 | ep->hep = hep; |
1da177e4 LT |
898 | hep->hcpriv = ep; |
899 | } | |
900 | ||
901 | /* maybe put endpoint into schedule */ | |
902 | switch (type) { | |
903 | case PIPE_CONTROL: | |
904 | case PIPE_BULK: | |
905 | if (list_empty(&ep->schedule)) | |
906 | list_add_tail(&ep->schedule, &sl811->async); | |
907 | break; | |
908 | case PIPE_ISOCHRONOUS: | |
909 | case PIPE_INTERRUPT: | |
910 | urb->interval = ep->period; | |
4b2e790a DB |
911 | if (ep->branch < PERIODIC_SIZE) { |
912 | /* NOTE: the phase is correct here, but the value | |
913 | * needs offsetting by the transfer queue depth. | |
914 | * All current drivers ignore start_frame, so this | |
915 | * is unlikely to ever matter... | |
916 | */ | |
917 | urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) | |
918 | + ep->branch; | |
1da177e4 | 919 | break; |
4b2e790a | 920 | } |
1da177e4 LT |
921 | |
922 | retval = balance(sl811, ep->period, ep->load); | |
923 | if (retval < 0) | |
924 | goto fail; | |
925 | ep->branch = retval; | |
926 | retval = 0; | |
927 | urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) | |
928 | + ep->branch; | |
929 | ||
930 | /* sort each schedule branch by period (slow before fast) | |
931 | * to share the faster parts of the tree without needing | |
932 | * dummy/placeholder nodes | |
933 | */ | |
934 | DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); | |
935 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { | |
936 | struct sl811h_ep **prev = &sl811->periodic[i]; | |
937 | struct sl811h_ep *here = *prev; | |
938 | ||
939 | while (here && ep != here) { | |
940 | if (ep->period > here->period) | |
941 | break; | |
942 | prev = &here->next; | |
943 | here = *prev; | |
944 | } | |
945 | if (ep != here) { | |
946 | ep->next = here; | |
947 | *prev = ep; | |
948 | } | |
949 | sl811->load[i] += ep->load; | |
950 | } | |
951 | sl811->periodic_count++; | |
952 | hcd->self.bandwidth_allocated += ep->load / ep->period; | |
953 | sofirq_on(sl811); | |
954 | } | |
955 | ||
956 | /* in case of unlink-during-submit */ | |
957 | spin_lock(&urb->lock); | |
958 | if (urb->status != -EINPROGRESS) { | |
959 | spin_unlock(&urb->lock); | |
960 | finish_request(sl811, ep, urb, NULL, 0); | |
961 | retval = 0; | |
962 | goto fail; | |
963 | } | |
964 | urb->hcpriv = hep; | |
965 | spin_unlock(&urb->lock); | |
966 | ||
967 | start_transfer(sl811); | |
968 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
969 | fail: | |
970 | spin_unlock_irqrestore(&sl811->lock, flags); | |
971 | return retval; | |
972 | } | |
973 | ||
974 | static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) | |
975 | { | |
976 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1e9a47b6 | 977 | struct usb_host_endpoint *hep; |
1da177e4 LT |
978 | unsigned long flags; |
979 | struct sl811h_ep *ep; | |
980 | int retval = 0; | |
981 | ||
1e9a47b6 DB |
982 | spin_lock_irqsave(&sl811->lock, flags); |
983 | hep = urb->hcpriv; | |
1da177e4 | 984 | if (!hep) |
1e9a47b6 | 985 | goto fail; |
1da177e4 | 986 | |
1da177e4 LT |
987 | ep = hep->hcpriv; |
988 | if (ep) { | |
989 | /* finish right away if this urb can't be active ... | |
990 | * note that some drivers wrongly expect delays | |
991 | */ | |
992 | if (ep->hep->urb_list.next != &urb->urb_list) { | |
993 | /* not front of queue? never active */ | |
994 | ||
995 | /* for active transfers, we expect an IRQ */ | |
996 | } else if (sl811->active_a == ep) { | |
997 | if (time_before_eq(sl811->jiffies_a, jiffies)) { | |
998 | /* happens a lot with lowspeed?? */ | |
999 | DBG("giveup on DONE_A: ctrl %02x sts %02x\n", | |
1000 | sl811_read(sl811, | |
1001 | SL811_EP_A(SL11H_HOSTCTLREG)), | |
1002 | sl811_read(sl811, | |
1003 | SL811_EP_A(SL11H_PKTSTATREG))); | |
1004 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), | |
1005 | 0); | |
1006 | sl811->active_a = NULL; | |
1007 | } else | |
1008 | urb = NULL; | |
1009 | #ifdef USE_B | |
1010 | } else if (sl811->active_b == ep) { | |
1011 | if (time_before_eq(sl811->jiffies_a, jiffies)) { | |
1012 | /* happens a lot with lowspeed?? */ | |
1013 | DBG("giveup on DONE_B: ctrl %02x sts %02x\n", | |
1014 | sl811_read(sl811, | |
1015 | SL811_EP_B(SL11H_HOSTCTLREG)), | |
1016 | sl811_read(sl811, | |
1017 | SL811_EP_B(SL11H_PKTSTATREG))); | |
1018 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), | |
1019 | 0); | |
1020 | sl811->active_b = NULL; | |
1021 | } else | |
1022 | urb = NULL; | |
1023 | #endif | |
1024 | } else { | |
1025 | /* front of queue for inactive endpoint */ | |
1026 | } | |
1027 | ||
1028 | if (urb) | |
1029 | finish_request(sl811, ep, urb, NULL, 0); | |
1030 | else | |
1031 | VDBG("dequeue, urb %p active %s; wait4irq\n", urb, | |
1032 | (sl811->active_a == ep) ? "A" : "B"); | |
1033 | } else | |
1e9a47b6 | 1034 | fail: |
1da177e4 LT |
1035 | retval = -EINVAL; |
1036 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1037 | return retval; | |
1038 | } | |
1039 | ||
1040 | static void | |
1041 | sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep) | |
1042 | { | |
1043 | struct sl811h_ep *ep = hep->hcpriv; | |
1044 | ||
1045 | if (!ep) | |
1046 | return; | |
1047 | ||
1048 | /* assume we'd just wait for the irq */ | |
1049 | if (!list_empty(&hep->urb_list)) | |
1050 | msleep(3); | |
1051 | if (!list_empty(&hep->urb_list)) | |
1052 | WARN("ep %p not empty?\n", ep); | |
1053 | ||
1da177e4 LT |
1054 | kfree(ep); |
1055 | hep->hcpriv = NULL; | |
1056 | } | |
1057 | ||
1058 | static int | |
1059 | sl811h_get_frame(struct usb_hcd *hcd) | |
1060 | { | |
1061 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1062 | ||
1063 | /* wrong except while periodic transfers are scheduled; | |
1064 | * never matches the on-the-wire frame; | |
1065 | * subject to overruns. | |
1066 | */ | |
1067 | return sl811->frame; | |
1068 | } | |
1069 | ||
1070 | ||
1071 | /*-------------------------------------------------------------------------*/ | |
1072 | ||
1073 | /* the virtual root hub timer IRQ checks for hub status */ | |
1074 | static int | |
1075 | sl811h_hub_status_data(struct usb_hcd *hcd, char *buf) | |
1076 | { | |
1077 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1078 | #ifdef QUIRK3 | |
1079 | unsigned long flags; | |
1080 | ||
1081 | /* non-SMP HACK: use root hub timer as i/o watchdog | |
1082 | * this seems essential when SOF IRQs aren't in use... | |
1083 | */ | |
1084 | local_irq_save(flags); | |
1085 | if (!timer_pending(&sl811->timer)) { | |
1086 | if (sl811h_irq( /* ~0, */ hcd, NULL) != IRQ_NONE) | |
1087 | sl811->stat_lost++; | |
1088 | } | |
1089 | local_irq_restore(flags); | |
1090 | #endif | |
1091 | ||
1092 | if (!(sl811->port1 & (0xffff << 16))) | |
1093 | return 0; | |
1094 | ||
1095 | /* tell khubd port 1 changed */ | |
1096 | *buf = (1 << 1); | |
1097 | return 1; | |
1098 | } | |
1099 | ||
1100 | static void | |
1101 | sl811h_hub_descriptor ( | |
1102 | struct sl811 *sl811, | |
1103 | struct usb_hub_descriptor *desc | |
1104 | ) { | |
1105 | u16 temp = 0; | |
1106 | ||
1107 | desc->bDescriptorType = 0x29; | |
1108 | desc->bHubContrCurrent = 0; | |
1109 | ||
1110 | desc->bNbrPorts = 1; | |
1111 | desc->bDescLength = 9; | |
1112 | ||
1113 | /* per-port power switching (gang of one!), or none */ | |
1114 | desc->bPwrOn2PwrGood = 0; | |
1115 | if (sl811->board && sl811->board->port_power) { | |
1116 | desc->bPwrOn2PwrGood = sl811->board->potpg; | |
1117 | if (!desc->bPwrOn2PwrGood) | |
1118 | desc->bPwrOn2PwrGood = 10; | |
1119 | temp = 0x0001; | |
1120 | } else | |
1121 | temp = 0x0002; | |
1122 | ||
1123 | /* no overcurrent errors detection/handling */ | |
1124 | temp |= 0x0010; | |
1125 | ||
1126 | desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp); | |
1127 | ||
1128 | /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */ | |
4b2e790a | 1129 | desc->bitmap[0] = 0 << 1; |
1da177e4 LT |
1130 | desc->bitmap[1] = ~0; |
1131 | } | |
1132 | ||
1133 | static void | |
1134 | sl811h_timer(unsigned long _sl811) | |
1135 | { | |
1136 | struct sl811 *sl811 = (void *) _sl811; | |
1137 | unsigned long flags; | |
1138 | u8 irqstat; | |
1139 | u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE; | |
1140 | const u32 mask = (1 << USB_PORT_FEAT_CONNECTION) | |
1141 | | (1 << USB_PORT_FEAT_ENABLE) | |
1142 | | (1 << USB_PORT_FEAT_LOWSPEED); | |
1143 | ||
1144 | spin_lock_irqsave(&sl811->lock, flags); | |
1145 | ||
1146 | /* stop special signaling */ | |
1147 | sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE; | |
1148 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1149 | udelay(3); | |
1150 | ||
1151 | irqstat = sl811_read(sl811, SL11H_IRQ_STATUS); | |
1152 | ||
1153 | switch (signaling) { | |
1154 | case SL11H_CTL1MASK_SE0: | |
1155 | DBG("end reset\n"); | |
1156 | sl811->port1 = (1 << USB_PORT_FEAT_C_RESET) | |
1157 | | (1 << USB_PORT_FEAT_POWER); | |
1158 | sl811->ctrl1 = 0; | |
1159 | /* don't wrongly ack RD */ | |
1160 | if (irqstat & SL11H_INTMASK_INSRMV) | |
1161 | irqstat &= ~SL11H_INTMASK_RD; | |
1162 | break; | |
1163 | case SL11H_CTL1MASK_K: | |
1164 | DBG("end resume\n"); | |
1165 | sl811->port1 &= ~(1 << USB_PORT_FEAT_SUSPEND); | |
1166 | break; | |
1167 | default: | |
1168 | DBG("odd timer signaling: %02x\n", signaling); | |
1169 | break; | |
1170 | } | |
1171 | sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); | |
1172 | ||
1173 | if (irqstat & SL11H_INTMASK_RD) { | |
1174 | /* usbcore nukes all pending transactions on disconnect */ | |
1175 | if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) | |
1176 | sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION) | |
1177 | | (1 << USB_PORT_FEAT_C_ENABLE); | |
1178 | sl811->port1 &= ~mask; | |
1179 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
1180 | } else { | |
1181 | sl811->port1 |= mask; | |
1182 | if (irqstat & SL11H_INTMASK_DP) | |
1183 | sl811->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED); | |
1184 | sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD; | |
1185 | } | |
1186 | ||
1187 | if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) { | |
1188 | u8 ctrl2 = SL811HS_CTL2_INIT; | |
1189 | ||
1190 | sl811->irq_enable |= SL11H_INTMASK_DONE_A; | |
1191 | #ifdef USE_B | |
1192 | sl811->irq_enable |= SL11H_INTMASK_DONE_B; | |
1193 | #endif | |
1194 | if (sl811->port1 & (1 << USB_PORT_FEAT_LOWSPEED)) { | |
1195 | sl811->ctrl1 |= SL11H_CTL1MASK_LSPD; | |
1196 | ctrl2 |= SL811HS_CTL2MASK_DSWAP; | |
1197 | } | |
1198 | ||
1199 | /* start SOFs flowing, kickstarting with A registers */ | |
1200 | sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA; | |
1201 | sl811_write(sl811, SL11H_SOFLOWREG, 0xe0); | |
1202 | sl811_write(sl811, SL811HS_CTLREG2, ctrl2); | |
1203 | ||
1204 | /* autoincrementing */ | |
1205 | sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0); | |
1206 | writeb(SL_SOF, sl811->data_reg); | |
1207 | writeb(0, sl811->data_reg); | |
1208 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), | |
1209 | SL11H_HCTLMASK_ARM); | |
1210 | ||
1211 | /* khubd provides debounce delay */ | |
1212 | } else { | |
1213 | sl811->ctrl1 = 0; | |
1214 | } | |
1215 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1216 | ||
1217 | /* reenable irqs */ | |
1218 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
1219 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1220 | } | |
1221 | ||
1222 | static int | |
1223 | sl811h_hub_control( | |
1224 | struct usb_hcd *hcd, | |
1225 | u16 typeReq, | |
1226 | u16 wValue, | |
1227 | u16 wIndex, | |
1228 | char *buf, | |
1229 | u16 wLength | |
1230 | ) { | |
1231 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1232 | int retval = 0; | |
1233 | unsigned long flags; | |
1234 | ||
1235 | spin_lock_irqsave(&sl811->lock, flags); | |
1236 | ||
1237 | switch (typeReq) { | |
1238 | case ClearHubFeature: | |
1239 | case SetHubFeature: | |
1240 | switch (wValue) { | |
1241 | case C_HUB_OVER_CURRENT: | |
1242 | case C_HUB_LOCAL_POWER: | |
1243 | break; | |
1244 | default: | |
1245 | goto error; | |
1246 | } | |
1247 | break; | |
1248 | case ClearPortFeature: | |
1249 | if (wIndex != 1 || wLength != 0) | |
1250 | goto error; | |
1251 | ||
1252 | switch (wValue) { | |
1253 | case USB_PORT_FEAT_ENABLE: | |
1254 | sl811->port1 &= (1 << USB_PORT_FEAT_POWER); | |
1255 | sl811->ctrl1 = 0; | |
1256 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1257 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
1258 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1259 | sl811->irq_enable); | |
1260 | break; | |
1261 | case USB_PORT_FEAT_SUSPEND: | |
1262 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))) | |
1263 | break; | |
1264 | ||
1265 | /* 20 msec of resume/K signaling, other irqs blocked */ | |
1266 | DBG("start resume...\n"); | |
1267 | sl811->irq_enable = 0; | |
1268 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1269 | sl811->irq_enable); | |
1270 | sl811->ctrl1 |= SL11H_CTL1MASK_K; | |
1271 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1272 | ||
1273 | mod_timer(&sl811->timer, jiffies | |
1274 | + msecs_to_jiffies(20)); | |
1275 | break; | |
1276 | case USB_PORT_FEAT_POWER: | |
1277 | port_power(sl811, 0); | |
1278 | break; | |
1279 | case USB_PORT_FEAT_C_ENABLE: | |
1280 | case USB_PORT_FEAT_C_SUSPEND: | |
1281 | case USB_PORT_FEAT_C_CONNECTION: | |
1282 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
1283 | case USB_PORT_FEAT_C_RESET: | |
1284 | break; | |
1285 | default: | |
1286 | goto error; | |
1287 | } | |
1288 | sl811->port1 &= ~(1 << wValue); | |
1289 | break; | |
1290 | case GetHubDescriptor: | |
1291 | sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf); | |
1292 | break; | |
1293 | case GetHubStatus: | |
1294 | *(__le32 *) buf = cpu_to_le32(0); | |
1295 | break; | |
1296 | case GetPortStatus: | |
1297 | if (wIndex != 1) | |
1298 | goto error; | |
1299 | *(__le32 *) buf = cpu_to_le32(sl811->port1); | |
1300 | ||
1301 | #ifndef VERBOSE | |
1302 | if (*(u16*)(buf+2)) /* only if wPortChange is interesting */ | |
1303 | #endif | |
1304 | DBG("GetPortStatus %08x\n", sl811->port1); | |
1305 | break; | |
1306 | case SetPortFeature: | |
1307 | if (wIndex != 1 || wLength != 0) | |
1308 | goto error; | |
1309 | switch (wValue) { | |
1310 | case USB_PORT_FEAT_SUSPEND: | |
1311 | if (sl811->port1 & (1 << USB_PORT_FEAT_RESET)) | |
1312 | goto error; | |
1313 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))) | |
1314 | goto error; | |
1315 | ||
1316 | DBG("suspend...\n"); | |
1317 | sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA; | |
1318 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1319 | break; | |
1320 | case USB_PORT_FEAT_POWER: | |
1321 | port_power(sl811, 1); | |
1322 | break; | |
1323 | case USB_PORT_FEAT_RESET: | |
1324 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) | |
1325 | goto error; | |
1326 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_POWER))) | |
1327 | break; | |
1328 | ||
1329 | /* 50 msec of reset/SE0 signaling, irqs blocked */ | |
1330 | sl811->irq_enable = 0; | |
1331 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1332 | sl811->irq_enable); | |
1333 | sl811->ctrl1 = SL11H_CTL1MASK_SE0; | |
1334 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1335 | sl811->port1 |= (1 << USB_PORT_FEAT_RESET); | |
1336 | mod_timer(&sl811->timer, jiffies | |
1337 | + msecs_to_jiffies(50)); | |
1338 | break; | |
1339 | default: | |
1340 | goto error; | |
1341 | } | |
1342 | sl811->port1 |= 1 << wValue; | |
1343 | break; | |
1344 | ||
1345 | default: | |
1346 | error: | |
1347 | /* "protocol stall" on error */ | |
1348 | retval = -EPIPE; | |
1349 | } | |
1350 | ||
1351 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1352 | return retval; | |
1353 | } | |
1354 | ||
1355 | #ifdef CONFIG_PM | |
1356 | ||
1357 | static int | |
0c0382e3 | 1358 | sl811h_bus_suspend(struct usb_hcd *hcd) |
1da177e4 LT |
1359 | { |
1360 | // SOFs off | |
1361 | DBG("%s\n", __FUNCTION__); | |
1362 | return 0; | |
1363 | } | |
1364 | ||
1365 | static int | |
0c0382e3 | 1366 | sl811h_bus_resume(struct usb_hcd *hcd) |
1da177e4 LT |
1367 | { |
1368 | // SOFs on | |
1369 | DBG("%s\n", __FUNCTION__); | |
1370 | return 0; | |
1371 | } | |
1372 | ||
1373 | #else | |
1374 | ||
0c0382e3 AS |
1375 | #define sl811h_bus_suspend NULL |
1376 | #define sl811h_bus_resume NULL | |
1da177e4 LT |
1377 | |
1378 | #endif | |
1379 | ||
1380 | ||
1381 | /*-------------------------------------------------------------------------*/ | |
1382 | ||
1383 | #ifdef STUB_DEBUG_FILE | |
1384 | ||
1385 | static inline void create_debug_file(struct sl811 *sl811) { } | |
1386 | static inline void remove_debug_file(struct sl811 *sl811) { } | |
1387 | ||
1388 | #else | |
1389 | ||
1390 | #include <linux/proc_fs.h> | |
1391 | #include <linux/seq_file.h> | |
1392 | ||
1393 | static void dump_irq(struct seq_file *s, char *label, u8 mask) | |
1394 | { | |
1395 | seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask, | |
1396 | (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "", | |
1397 | (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "", | |
1398 | (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "", | |
1399 | (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "", | |
1400 | (mask & SL11H_INTMASK_RD) ? " rd" : "", | |
1401 | (mask & SL11H_INTMASK_DP) ? " dp" : ""); | |
1402 | } | |
1403 | ||
1404 | static int proc_sl811h_show(struct seq_file *s, void *unused) | |
1405 | { | |
1406 | struct sl811 *sl811 = s->private; | |
1407 | struct sl811h_ep *ep; | |
1408 | unsigned i; | |
1409 | ||
1410 | seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n", | |
1411 | sl811_to_hcd(sl811)->product_desc, | |
1412 | hcd_name, DRIVER_VERSION, | |
1413 | sl811->port1); | |
1414 | ||
1415 | seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv); | |
1416 | seq_printf(s, "current session: done_a %ld done_b %ld " | |
1417 | "wake %ld sof %ld overrun %ld lost %ld\n\n", | |
1418 | sl811->stat_a, sl811->stat_b, | |
1419 | sl811->stat_wake, sl811->stat_sof, | |
1420 | sl811->stat_overrun, sl811->stat_lost); | |
1421 | ||
1422 | spin_lock_irq(&sl811->lock); | |
1423 | ||
1424 | if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND) | |
1425 | seq_printf(s, "(suspended)\n\n"); | |
1426 | else { | |
1427 | u8 t = sl811_read(sl811, SL11H_CTLREG1); | |
1428 | ||
1429 | seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t, | |
1430 | (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "", | |
1431 | ({char *s; switch (t & SL11H_CTL1MASK_FORCE) { | |
1432 | case SL11H_CTL1MASK_NORMAL: s = ""; break; | |
1433 | case SL11H_CTL1MASK_SE0: s = " se0/reset"; break; | |
1434 | case SL11H_CTL1MASK_K: s = " k/resume"; break; | |
1435 | default: s = "j"; break; | |
1436 | }; s; }), | |
1437 | (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "", | |
1438 | (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : ""); | |
1439 | ||
1440 | dump_irq(s, "irq_enable", | |
1441 | sl811_read(sl811, SL11H_IRQ_ENABLE)); | |
1442 | dump_irq(s, "irq_status", | |
1443 | sl811_read(sl811, SL11H_IRQ_STATUS)); | |
1444 | seq_printf(s, "frame clocks remaining: %d\n", | |
1445 | sl811_read(sl811, SL11H_SOFTMRREG) << 6); | |
1446 | } | |
1447 | ||
1448 | seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a, | |
1449 | sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)), | |
1450 | sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); | |
1451 | seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b, | |
1452 | sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)), | |
1453 | sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); | |
1454 | seq_printf(s, "\n"); | |
1455 | list_for_each_entry (ep, &sl811->async, schedule) { | |
1456 | struct urb *urb; | |
1457 | ||
1458 | seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d" | |
1459 | " nak %d err %d\n", | |
1460 | (ep == sl811->active_a) ? "(A) " : "", | |
1461 | (ep == sl811->active_b) ? "(B) " : "", | |
1462 | ep, ep->epnum, | |
1463 | ({ char *s; switch (ep->nextpid) { | |
1464 | case USB_PID_IN: s = "in"; break; | |
1465 | case USB_PID_OUT: s = "out"; break; | |
1466 | case USB_PID_SETUP: s = "setup"; break; | |
1467 | case USB_PID_ACK: s = "status"; break; | |
1468 | default: s = "?"; break; | |
1469 | }; s;}), | |
1470 | ep->maxpacket, | |
1471 | ep->nak_count, ep->error_count); | |
1472 | list_for_each_entry (urb, &ep->hep->urb_list, urb_list) { | |
1473 | seq_printf(s, " urb%p, %d/%d\n", urb, | |
1474 | urb->actual_length, | |
1475 | urb->transfer_buffer_length); | |
1476 | } | |
1477 | } | |
1478 | if (!list_empty(&sl811->async)) | |
1479 | seq_printf(s, "\n"); | |
1480 | ||
1481 | seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE); | |
1482 | ||
1483 | for (i = 0; i < PERIODIC_SIZE; i++) { | |
1484 | ep = sl811->periodic[i]; | |
1485 | if (!ep) | |
1486 | continue; | |
1487 | seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]); | |
1488 | ||
1489 | /* DUMB: prints shared entries multiple times */ | |
1490 | do { | |
1491 | seq_printf(s, | |
1492 | " %s%sqh%d/%p (%sdev%d ep%d%s max %d) " | |
1493 | "err %d\n", | |
1494 | (ep == sl811->active_a) ? "(A) " : "", | |
1495 | (ep == sl811->active_b) ? "(B) " : "", | |
1496 | ep->period, ep, | |
1497 | (ep->udev->speed == USB_SPEED_FULL) | |
1498 | ? "" : "ls ", | |
1499 | ep->udev->devnum, ep->epnum, | |
1500 | (ep->epnum == 0) ? "" | |
1501 | : ((ep->nextpid == USB_PID_IN) | |
1502 | ? "in" | |
1503 | : "out"), | |
1504 | ep->maxpacket, ep->error_count); | |
1505 | ep = ep->next; | |
1506 | } while (ep); | |
1507 | } | |
1508 | ||
1509 | spin_unlock_irq(&sl811->lock); | |
1510 | seq_printf(s, "\n"); | |
1511 | ||
1512 | return 0; | |
1513 | } | |
1514 | ||
1515 | static int proc_sl811h_open(struct inode *inode, struct file *file) | |
1516 | { | |
1517 | return single_open(file, proc_sl811h_show, PDE(inode)->data); | |
1518 | } | |
1519 | ||
066202dd | 1520 | static const struct file_operations proc_ops = { |
1da177e4 LT |
1521 | .open = proc_sl811h_open, |
1522 | .read = seq_read, | |
1523 | .llseek = seq_lseek, | |
1524 | .release = single_release, | |
1525 | }; | |
1526 | ||
1527 | /* expect just one sl811 per system */ | |
1528 | static const char proc_filename[] = "driver/sl811h"; | |
1529 | ||
1530 | static void create_debug_file(struct sl811 *sl811) | |
1531 | { | |
1532 | struct proc_dir_entry *pde; | |
1533 | ||
1534 | pde = create_proc_entry(proc_filename, 0, NULL); | |
1535 | if (pde == NULL) | |
1536 | return; | |
1537 | ||
1538 | pde->proc_fops = &proc_ops; | |
1539 | pde->data = sl811; | |
1540 | sl811->pde = pde; | |
1541 | } | |
1542 | ||
1543 | static void remove_debug_file(struct sl811 *sl811) | |
1544 | { | |
1545 | if (sl811->pde) | |
1546 | remove_proc_entry(proc_filename, NULL); | |
1547 | } | |
1548 | ||
1549 | #endif | |
1550 | ||
1551 | /*-------------------------------------------------------------------------*/ | |
1552 | ||
1553 | static void | |
1554 | sl811h_stop(struct usb_hcd *hcd) | |
1555 | { | |
1556 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1557 | unsigned long flags; | |
1558 | ||
1559 | del_timer_sync(&hcd->rh_timer); | |
1560 | ||
1561 | spin_lock_irqsave(&sl811->lock, flags); | |
1562 | port_power(sl811, 0); | |
1563 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1564 | } | |
1565 | ||
1566 | static int | |
1567 | sl811h_start(struct usb_hcd *hcd) | |
1568 | { | |
1569 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1da177e4 LT |
1570 | |
1571 | /* chip has been reset, VBUS power is off */ | |
1da177e4 LT |
1572 | hcd->state = HC_STATE_RUNNING; |
1573 | ||
bc96c0ad | 1574 | if (sl811->board) { |
0c8624f9 DB |
1575 | if (!device_can_wakeup(hcd->self.controller)) |
1576 | device_init_wakeup(hcd->self.controller, | |
1577 | sl811->board->can_wakeup); | |
bc96c0ad AS |
1578 | hcd->power_budget = sl811->board->power * 2; |
1579 | } | |
1da177e4 | 1580 | |
1e9a47b6 DB |
1581 | /* enable power and interupts */ |
1582 | port_power(sl811, 1); | |
1583 | ||
1da177e4 LT |
1584 | return 0; |
1585 | } | |
1586 | ||
1587 | /*-------------------------------------------------------------------------*/ | |
1588 | ||
1589 | static struct hc_driver sl811h_hc_driver = { | |
1590 | .description = hcd_name, | |
1591 | .hcd_priv_size = sizeof(struct sl811), | |
1592 | ||
1593 | /* | |
1594 | * generic hardware linkage | |
1595 | */ | |
1596 | .irq = sl811h_irq, | |
1597 | .flags = HCD_USB11 | HCD_MEMORY, | |
1598 | ||
1599 | /* Basic lifecycle operations */ | |
1600 | .start = sl811h_start, | |
1601 | .stop = sl811h_stop, | |
1602 | ||
1603 | /* | |
1604 | * managing i/o requests and associated device resources | |
1605 | */ | |
1606 | .urb_enqueue = sl811h_urb_enqueue, | |
1607 | .urb_dequeue = sl811h_urb_dequeue, | |
1608 | .endpoint_disable = sl811h_endpoint_disable, | |
1609 | ||
1610 | /* | |
1611 | * periodic schedule support | |
1612 | */ | |
1613 | .get_frame_number = sl811h_get_frame, | |
1614 | ||
1615 | /* | |
1616 | * root hub support | |
1617 | */ | |
1618 | .hub_status_data = sl811h_hub_status_data, | |
1619 | .hub_control = sl811h_hub_control, | |
0c0382e3 AS |
1620 | .bus_suspend = sl811h_bus_suspend, |
1621 | .bus_resume = sl811h_bus_resume, | |
1da177e4 LT |
1622 | }; |
1623 | ||
1624 | /*-------------------------------------------------------------------------*/ | |
1625 | ||
1e9a47b6 | 1626 | static int __devexit |
3ae5eaec | 1627 | sl811h_remove(struct platform_device *dev) |
1da177e4 | 1628 | { |
3ae5eaec | 1629 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 1630 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1da177e4 LT |
1631 | struct resource *res; |
1632 | ||
1da177e4 LT |
1633 | remove_debug_file(sl811); |
1634 | usb_remove_hcd(hcd); | |
1635 | ||
1e9a47b6 | 1636 | /* some platforms may use IORESOURCE_IO */ |
3ae5eaec | 1637 | res = platform_get_resource(dev, IORESOURCE_MEM, 1); |
1e9a47b6 DB |
1638 | if (res) |
1639 | iounmap(sl811->data_reg); | |
1da177e4 | 1640 | |
3ae5eaec | 1641 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
1e9a47b6 DB |
1642 | if (res) |
1643 | iounmap(sl811->addr_reg); | |
1da177e4 LT |
1644 | |
1645 | usb_put_hcd(hcd); | |
1646 | return 0; | |
1647 | } | |
1648 | ||
1e9a47b6 | 1649 | static int __devinit |
3ae5eaec | 1650 | sl811h_probe(struct platform_device *dev) |
1da177e4 LT |
1651 | { |
1652 | struct usb_hcd *hcd; | |
1653 | struct sl811 *sl811; | |
1da177e4 LT |
1654 | struct resource *addr, *data; |
1655 | int irq; | |
1656 | void __iomem *addr_reg; | |
1657 | void __iomem *data_reg; | |
1658 | int retval; | |
1e9a47b6 | 1659 | u8 tmp, ioaddr = 0; |
1da177e4 LT |
1660 | |
1661 | /* basic sanity checks first. board-specific init logic should | |
1662 | * have initialized these three resources and probably board | |
1663 | * specific platform_data. we don't probe for IRQs, and do only | |
1664 | * minimal sanity checking. | |
1665 | */ | |
3ae5eaec RK |
1666 | irq = platform_get_irq(dev, 0); |
1667 | if (dev->num_resources < 3 || irq < 0) | |
1da177e4 LT |
1668 | return -ENODEV; |
1669 | ||
1670 | /* refuse to confuse usbcore */ | |
3ae5eaec | 1671 | if (dev->dev.dma_mask) { |
1da177e4 LT |
1672 | DBG("no we won't dma\n"); |
1673 | return -EINVAL; | |
1674 | } | |
1675 | ||
1e9a47b6 | 1676 | /* the chip may be wired for either kind of addressing */ |
3ae5eaec RK |
1677 | addr = platform_get_resource(dev, IORESOURCE_MEM, 0); |
1678 | data = platform_get_resource(dev, IORESOURCE_MEM, 1); | |
1e9a47b6 DB |
1679 | retval = -EBUSY; |
1680 | if (!addr || !data) { | |
3ae5eaec RK |
1681 | addr = platform_get_resource(dev, IORESOURCE_IO, 0); |
1682 | data = platform_get_resource(dev, IORESOURCE_IO, 1); | |
1e9a47b6 DB |
1683 | if (!addr || !data) |
1684 | return -ENODEV; | |
1685 | ioaddr = 1; | |
2427ddd8 GKH |
1686 | /* |
1687 | * NOTE: 64-bit resource->start is getting truncated | |
1688 | * to avoid compiler warning, assuming that ->start | |
1689 | * is always 32-bit for this case | |
1690 | */ | |
1691 | addr_reg = (void __iomem *) (unsigned long) addr->start; | |
1692 | data_reg = (void __iomem *) (unsigned long) data->start; | |
1e9a47b6 DB |
1693 | } else { |
1694 | addr_reg = ioremap(addr->start, 1); | |
1695 | if (addr_reg == NULL) { | |
1696 | retval = -ENOMEM; | |
1697 | goto err2; | |
1698 | } | |
1da177e4 | 1699 | |
1e9a47b6 DB |
1700 | data_reg = ioremap(data->start, 1); |
1701 | if (data_reg == NULL) { | |
1702 | retval = -ENOMEM; | |
1703 | goto err4; | |
1704 | } | |
1da177e4 LT |
1705 | } |
1706 | ||
1707 | /* allocate and initialize hcd */ | |
3ae5eaec | 1708 | hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev->dev.bus_id); |
1da177e4 LT |
1709 | if (!hcd) { |
1710 | retval = -ENOMEM; | |
1711 | goto err5; | |
1712 | } | |
1713 | hcd->rsrc_start = addr->start; | |
1714 | sl811 = hcd_to_sl811(hcd); | |
1715 | ||
1716 | spin_lock_init(&sl811->lock); | |
1717 | INIT_LIST_HEAD(&sl811->async); | |
3ae5eaec | 1718 | sl811->board = dev->dev.platform_data; |
1da177e4 LT |
1719 | init_timer(&sl811->timer); |
1720 | sl811->timer.function = sl811h_timer; | |
1721 | sl811->timer.data = (unsigned long) sl811; | |
1722 | sl811->addr_reg = addr_reg; | |
1723 | sl811->data_reg = data_reg; | |
1724 | ||
1725 | spin_lock_irq(&sl811->lock); | |
1726 | port_power(sl811, 0); | |
1727 | spin_unlock_irq(&sl811->lock); | |
1728 | msleep(200); | |
1729 | ||
1730 | tmp = sl811_read(sl811, SL11H_HWREVREG); | |
1731 | switch (tmp >> 4) { | |
1732 | case 1: | |
1733 | hcd->product_desc = "SL811HS v1.2"; | |
1734 | break; | |
1735 | case 2: | |
1736 | hcd->product_desc = "SL811HS v1.5"; | |
1737 | break; | |
1738 | default: | |
1739 | /* reject case 0, SL11S is less functional */ | |
1740 | DBG("chiprev %02x\n", tmp); | |
1741 | retval = -ENXIO; | |
1742 | goto err6; | |
1743 | } | |
1744 | ||
1e9a47b6 DB |
1745 | /* The chip's IRQ is level triggered, active high. A requirement |
1746 | * for platform device setup is to cope with things like signal | |
1747 | * inverters (e.g. CF is active low) or working only with edge | |
1748 | * triggers (e.g. most ARM CPUs). Initial driver stress testing | |
1749 | * was on a system with single edge triggering, so most sorts of | |
1750 | * triggering arrangement should work. | |
1751 | */ | |
d54b5caa | 1752 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
1da177e4 LT |
1753 | if (retval != 0) |
1754 | goto err6; | |
1755 | ||
1756 | create_debug_file(sl811); | |
1757 | return retval; | |
1758 | ||
1759 | err6: | |
1760 | usb_put_hcd(hcd); | |
1761 | err5: | |
1e9a47b6 DB |
1762 | if (!ioaddr) |
1763 | iounmap(data_reg); | |
1da177e4 | 1764 | err4: |
1e9a47b6 DB |
1765 | if (!ioaddr) |
1766 | iounmap(addr_reg); | |
1da177e4 | 1767 | err2: |
1da177e4 LT |
1768 | DBG("init error, %d\n", retval); |
1769 | return retval; | |
1770 | } | |
1771 | ||
1772 | #ifdef CONFIG_PM | |
1773 | ||
1774 | /* for this device there's no useful distinction between the controller | |
1e9a47b6 | 1775 | * and its root hub, except that the root hub only gets direct PM calls |
1da177e4 LT |
1776 | * when CONFIG_USB_SUSPEND is enabled. |
1777 | */ | |
1778 | ||
1779 | static int | |
3ae5eaec | 1780 | sl811h_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 1781 | { |
3ae5eaec | 1782 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 LT |
1783 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1784 | int retval = 0; | |
1785 | ||
18584999 DB |
1786 | switch (state.event) { |
1787 | case PM_EVENT_FREEZE: | |
0c0382e3 | 1788 | retval = sl811h_bus_suspend(hcd); |
18584999 DB |
1789 | break; |
1790 | case PM_EVENT_SUSPEND: | |
1791 | case PM_EVENT_PRETHAW: /* explicitly discard hw state */ | |
1da177e4 | 1792 | port_power(sl811, 0); |
18584999 DB |
1793 | break; |
1794 | } | |
1da177e4 | 1795 | if (retval == 0) |
3ae5eaec | 1796 | dev->dev.power.power_state = state; |
1da177e4 LT |
1797 | return retval; |
1798 | } | |
1799 | ||
1800 | static int | |
3ae5eaec | 1801 | sl811h_resume(struct platform_device *dev) |
1da177e4 | 1802 | { |
3ae5eaec | 1803 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 LT |
1804 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1805 | ||
1da177e4 LT |
1806 | /* with no "check to see if VBUS is still powered" board hook, |
1807 | * let's assume it'd only be powered to enable remote wakeup. | |
1808 | */ | |
3ae5eaec | 1809 | if (dev->dev.power.power_state.event == PM_EVENT_SUSPEND |
0c8624f9 | 1810 | || !device_can_wakeup(&hcd->self.root_hub->dev)) { |
1da177e4 LT |
1811 | sl811->port1 = 0; |
1812 | port_power(sl811, 1); | |
1c50c317 | 1813 | usb_root_hub_lost_power(hcd->self.root_hub); |
1da177e4 LT |
1814 | return 0; |
1815 | } | |
1816 | ||
3ae5eaec | 1817 | dev->dev.power.power_state = PMSG_ON; |
0c0382e3 | 1818 | return sl811h_bus_resume(hcd); |
1da177e4 LT |
1819 | } |
1820 | ||
1821 | #else | |
1822 | ||
1823 | #define sl811h_suspend NULL | |
1824 | #define sl811h_resume NULL | |
1825 | ||
1826 | #endif | |
1827 | ||
1828 | ||
1e9a47b6 | 1829 | /* this driver is exported so sl811_cs can depend on it */ |
3ae5eaec | 1830 | struct platform_driver sl811h_driver = { |
1da177e4 | 1831 | .probe = sl811h_probe, |
1e9a47b6 | 1832 | .remove = __devexit_p(sl811h_remove), |
1da177e4 LT |
1833 | |
1834 | .suspend = sl811h_suspend, | |
1835 | .resume = sl811h_resume, | |
3ae5eaec RK |
1836 | .driver = { |
1837 | .name = (char *) hcd_name, | |
1838 | .owner = THIS_MODULE, | |
1839 | }, | |
1da177e4 | 1840 | }; |
1e9a47b6 | 1841 | EXPORT_SYMBOL(sl811h_driver); |
1da177e4 LT |
1842 | |
1843 | /*-------------------------------------------------------------------------*/ | |
1e9a47b6 DB |
1844 | |
1845 | static int __init sl811h_init(void) | |
1da177e4 LT |
1846 | { |
1847 | if (usb_disabled()) | |
1848 | return -ENODEV; | |
1849 | ||
1850 | INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION); | |
3ae5eaec | 1851 | return platform_driver_register(&sl811h_driver); |
1da177e4 LT |
1852 | } |
1853 | module_init(sl811h_init); | |
1854 | ||
1e9a47b6 DB |
1855 | static void __exit sl811h_cleanup(void) |
1856 | { | |
3ae5eaec | 1857 | platform_driver_unregister(&sl811h_driver); |
1da177e4 LT |
1858 | } |
1859 | module_exit(sl811h_cleanup); |