Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Universal Host Controller Interface driver for USB. | |
3 | * | |
4 | * Maintainer: Alan Stern <stern@rowland.harvard.edu> | |
5 | * | |
6 | * (C) Copyright 1999 Linus Torvalds | |
7 | * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com | |
8 | * (C) Copyright 1999 Randy Dunlap | |
9 | * (C) Copyright 1999 Georg Acher, acher@in.tum.de | |
10 | * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de | |
11 | * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch | |
12 | * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at | |
13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface | |
14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). | |
15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) | |
17230acd | 16 | * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu |
1da177e4 LT |
17 | * |
18 | * Intel documents this fairly well, and as far as I know there | |
19 | * are no royalties or anything like that, but even so there are | |
20 | * people who decided that they want to do the same thing in a | |
21 | * completely different way. | |
22 | * | |
1da177e4 LT |
23 | */ |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/pci.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/ioport.h> | |
1da177e4 | 31 | #include <linux/slab.h> |
1da177e4 LT |
32 | #include <linux/errno.h> |
33 | #include <linux/unistd.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/spinlock.h> | |
36 | #include <linux/debugfs.h> | |
37 | #include <linux/pm.h> | |
38 | #include <linux/dmapool.h> | |
39 | #include <linux/dma-mapping.h> | |
40 | #include <linux/usb.h> | |
41 | #include <linux/bitops.h> | |
b62df451 | 42 | #include <linux/dmi.h> |
1da177e4 LT |
43 | |
44 | #include <asm/uaccess.h> | |
45 | #include <asm/io.h> | |
46 | #include <asm/irq.h> | |
47 | #include <asm/system.h> | |
48 | ||
49 | #include "../core/hcd.h" | |
50 | #include "uhci-hcd.h" | |
75e2df60 | 51 | #include "pci-quirks.h" |
1da177e4 LT |
52 | |
53 | /* | |
54 | * Version Information | |
55 | */ | |
dccf4a48 | 56 | #define DRIVER_VERSION "v3.0" |
1da177e4 LT |
57 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ |
58 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ | |
59 | Alan Stern" | |
60 | #define DRIVER_DESC "USB Universal Host Controller Interface driver" | |
61 | ||
5f8364b7 AS |
62 | /* for flakey hardware, ignore overcurrent indicators */ |
63 | static int ignore_oc; | |
64 | module_param(ignore_oc, bool, S_IRUGO); | |
65 | MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications"); | |
66 | ||
1da177e4 LT |
67 | /* |
68 | * debug = 0, no debugging messages | |
687f5f34 AS |
69 | * debug = 1, dump failed URBs except for stalls |
70 | * debug = 2, dump all failed URBs (including stalls) | |
1da177e4 | 71 | * show all queues in /debug/uhci/[pci_addr] |
687f5f34 | 72 | * debug = 3, show all TDs in URBs when dumping |
1da177e4 LT |
73 | */ |
74 | #ifdef DEBUG | |
8d402e1a | 75 | #define DEBUG_CONFIGURED 1 |
1da177e4 | 76 | static int debug = 1; |
1da177e4 LT |
77 | module_param(debug, int, S_IRUGO | S_IWUSR); |
78 | MODULE_PARM_DESC(debug, "Debug level"); | |
8d402e1a AS |
79 | |
80 | #else | |
81 | #define DEBUG_CONFIGURED 0 | |
82 | #define debug 0 | |
83 | #endif | |
84 | ||
1da177e4 LT |
85 | static char *errbuf; |
86 | #define ERRBUF_LEN (32 * 1024) | |
87 | ||
e18b890b | 88 | static struct kmem_cache *uhci_up_cachep; /* urb_priv */ |
1da177e4 | 89 | |
6c1b445c AS |
90 | static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); |
91 | static void wakeup_rh(struct uhci_hcd *uhci); | |
1da177e4 | 92 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci); |
1da177e4 | 93 | |
f3fe239b AS |
94 | /* |
95 | * Calculate the link pointer DMA value for the first Skeleton QH in a frame. | |
96 | */ | |
97 | static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) | |
98 | { | |
99 | int skelnum; | |
100 | ||
101 | /* | |
102 | * The interrupt queues will be interleaved as evenly as possible. | |
103 | * There's not much to be done about period-1 interrupts; they have | |
104 | * to occur in every frame. But we can schedule period-2 interrupts | |
105 | * in odd-numbered frames, period-4 interrupts in frames congruent | |
106 | * to 2 (mod 4), and so on. This way each frame only has two | |
107 | * interrupt QHs, which will help spread out bandwidth utilization. | |
108 | * | |
109 | * ffs (Find First bit Set) does exactly what we need: | |
17230acd AS |
110 | * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8], |
111 | * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc. | |
f3fe239b | 112 | * ffs >= 7 => not on any high-period queue, so use |
17230acd | 113 | * period-1 QH = skelqh[9]. |
f3fe239b AS |
114 | * Add in UHCI_NUMFRAMES to insure at least one bit is set. |
115 | */ | |
116 | skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES); | |
117 | if (skelnum <= 1) | |
118 | skelnum = 9; | |
28b9325e | 119 | return LINK_TO_QH(uhci->skelqh[skelnum]); |
f3fe239b AS |
120 | } |
121 | ||
1da177e4 LT |
122 | #include "uhci-debug.c" |
123 | #include "uhci-q.c" | |
1f09df8b | 124 | #include "uhci-hub.c" |
1da177e4 | 125 | |
a8bed8b6 | 126 | /* |
bb200f6e | 127 | * Finish up a host controller reset and update the recorded state. |
a8bed8b6 | 128 | */ |
bb200f6e | 129 | static void finish_reset(struct uhci_hcd *uhci) |
1da177e4 | 130 | { |
c074b416 AS |
131 | int port; |
132 | ||
c074b416 AS |
133 | /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect |
134 | * bits in the port status and control registers. | |
135 | * We have to clear them by hand. | |
136 | */ | |
137 | for (port = 0; port < uhci->rh_numports; ++port) | |
138 | outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); | |
139 | ||
8e326406 | 140 | uhci->port_c_suspend = uhci->resuming_ports = 0; |
c8f4fe43 | 141 | uhci->rh_state = UHCI_RH_RESET; |
a8bed8b6 AS |
142 | uhci->is_stopped = UHCI_IS_STOPPED; |
143 | uhci_to_hcd(uhci)->state = HC_STATE_HALT; | |
6c1b445c | 144 | uhci_to_hcd(uhci)->poll_rh = 0; |
e323de46 AS |
145 | |
146 | uhci->dead = 0; /* Full reset resurrects the controller */ | |
1da177e4 LT |
147 | } |
148 | ||
4daaa87c AS |
149 | /* |
150 | * Last rites for a defunct/nonfunctional controller | |
02597d2d | 151 | * or one we don't want to use any more. |
4daaa87c | 152 | */ |
e323de46 | 153 | static void uhci_hc_died(struct uhci_hcd *uhci) |
4daaa87c | 154 | { |
e323de46 | 155 | uhci_get_current_frame_number(uhci); |
bb200f6e AS |
156 | uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); |
157 | finish_reset(uhci); | |
e323de46 AS |
158 | uhci->dead = 1; |
159 | ||
160 | /* The current frame may already be partway finished */ | |
161 | ++uhci->frame_number; | |
4daaa87c AS |
162 | } |
163 | ||
a8bed8b6 | 164 | /* |
be3cbc5f DB |
165 | * Initialize a controller that was newly discovered or has lost power |
166 | * or otherwise been reset while it was suspended. In none of these cases | |
167 | * can we be sure of its previous state. | |
a8bed8b6 AS |
168 | */ |
169 | static void check_and_reset_hc(struct uhci_hcd *uhci) | |
170 | { | |
bb200f6e AS |
171 | if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr)) |
172 | finish_reset(uhci); | |
a8bed8b6 AS |
173 | } |
174 | ||
175 | /* | |
176 | * Store the basic register settings needed by the controller. | |
177 | */ | |
178 | static void configure_hc(struct uhci_hcd *uhci) | |
179 | { | |
180 | /* Set the frame length to the default: 1 ms exactly */ | |
181 | outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); | |
182 | ||
183 | /* Store the frame list base address */ | |
a1d59ce8 | 184 | outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); |
a8bed8b6 AS |
185 | |
186 | /* Set the current frame number */ | |
c4334726 AS |
187 | outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, |
188 | uhci->io_addr + USBFRNUM); | |
a8bed8b6 | 189 | |
f37be9b9 AS |
190 | /* Mark controller as not halted before we enable interrupts */ |
191 | uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED; | |
a8bed8b6 AS |
192 | mb(); |
193 | ||
194 | /* Enable PIRQ */ | |
195 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, | |
196 | USBLEGSUP_DEFAULT); | |
197 | } | |
198 | ||
199 | ||
c8f4fe43 | 200 | static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) |
1da177e4 | 201 | { |
c8f4fe43 | 202 | int port; |
1da177e4 | 203 | |
5f8364b7 AS |
204 | /* If we have to ignore overcurrent events then almost by definition |
205 | * we can't depend on resume-detect interrupts. */ | |
206 | if (ignore_oc) | |
207 | return 1; | |
208 | ||
c8f4fe43 AS |
209 | switch (to_pci_dev(uhci_dev(uhci))->vendor) { |
210 | default: | |
211 | break; | |
212 | ||
213 | case PCI_VENDOR_ID_GENESYS: | |
214 | /* Genesys Logic's GL880S controllers don't generate | |
215 | * resume-detect interrupts. | |
216 | */ | |
217 | return 1; | |
218 | ||
219 | case PCI_VENDOR_ID_INTEL: | |
220 | /* Some of Intel's USB controllers have a bug that causes | |
221 | * resume-detect interrupts if any port has an over-current | |
222 | * condition. To make matters worse, some motherboards | |
223 | * hardwire unused USB ports' over-current inputs active! | |
224 | * To prevent problems, we will not enable resume-detect | |
225 | * interrupts if any ports are OC. | |
226 | */ | |
227 | for (port = 0; port < uhci->rh_numports; ++port) { | |
228 | if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & | |
229 | USBPORTSC_OC) | |
230 | return 1; | |
231 | } | |
232 | break; | |
233 | } | |
234 | return 0; | |
235 | } | |
236 | ||
b62df451 AS |
237 | static int remote_wakeup_is_broken(struct uhci_hcd *uhci) |
238 | { | |
b62df451 | 239 | int port; |
1855256c | 240 | const char *sys_info; |
c80a70d5 | 241 | static char bad_Asus_board[] = "A7V8X"; |
b62df451 AS |
242 | |
243 | /* One of Asus's motherboards has a bug which causes it to | |
244 | * wake up immediately from suspend-to-RAM if any of the ports | |
245 | * are connected. In such cases we will not set EGSM. | |
246 | */ | |
c80a70d5 AS |
247 | sys_info = dmi_get_system_info(DMI_BOARD_NAME); |
248 | if (sys_info && !strcmp(sys_info, bad_Asus_board)) { | |
b62df451 AS |
249 | for (port = 0; port < uhci->rh_numports; ++port) { |
250 | if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & | |
251 | USBPORTSC_CCS) | |
252 | return 1; | |
253 | } | |
254 | } | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
a8bed8b6 | 259 | static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) |
c8f4fe43 AS |
260 | __releases(uhci->lock) |
261 | __acquires(uhci->lock) | |
262 | { | |
263 | int auto_stop; | |
b62df451 | 264 | int int_enable, egsm_enable; |
c8f4fe43 AS |
265 | |
266 | auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); | |
be3cbc5f DB |
267 | dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, |
268 | "%s%s\n", __FUNCTION__, | |
c8f4fe43 AS |
269 | (auto_stop ? " (auto-stop)" : "")); |
270 | ||
271 | /* If we get a suspend request when we're already auto-stopped | |
272 | * then there's nothing to do. | |
273 | */ | |
274 | if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) { | |
275 | uhci->rh_state = new_state; | |
276 | return; | |
277 | } | |
278 | ||
279 | /* Enable resume-detect interrupts if they work. | |
b62df451 | 280 | * Then enter Global Suspend mode if _it_ works, still configured. |
c8f4fe43 | 281 | */ |
b62df451 | 282 | egsm_enable = USBCMD_EGSM; |
1f09df8b AS |
283 | uhci->working_RD = 1; |
284 | int_enable = USBINTR_RESUME; | |
b62df451 AS |
285 | if (remote_wakeup_is_broken(uhci)) |
286 | egsm_enable = 0; | |
25c77b32 AS |
287 | if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable || |
288 | !device_may_wakeup( | |
289 | &uhci_to_hcd(uhci)->self.root_hub->dev)) | |
1f09df8b | 290 | uhci->working_RD = int_enable = 0; |
b62df451 | 291 | |
c8f4fe43 | 292 | outw(int_enable, uhci->io_addr + USBINTR); |
b62df451 | 293 | outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); |
a8bed8b6 | 294 | mb(); |
c8f4fe43 AS |
295 | udelay(5); |
296 | ||
297 | /* If we're auto-stopping then no devices have been attached | |
298 | * for a while, so there shouldn't be any active URBs and the | |
299 | * controller should stop after a few microseconds. Otherwise | |
300 | * we will give the controller one frame to stop. | |
301 | */ | |
302 | if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { | |
303 | uhci->rh_state = UHCI_RH_SUSPENDING; | |
304 | spin_unlock_irq(&uhci->lock); | |
305 | msleep(1); | |
306 | spin_lock_irq(&uhci->lock); | |
e323de46 | 307 | if (uhci->dead) |
4daaa87c | 308 | return; |
c8f4fe43 AS |
309 | } |
310 | if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) | |
be3cbc5f DB |
311 | dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev, |
312 | "Controller not stopped yet!\n"); | |
1da177e4 | 313 | |
1da177e4 | 314 | uhci_get_current_frame_number(uhci); |
c8f4fe43 AS |
315 | |
316 | uhci->rh_state = new_state; | |
1da177e4 | 317 | uhci->is_stopped = UHCI_IS_STOPPED; |
6c1b445c | 318 | uhci_to_hcd(uhci)->poll_rh = !int_enable; |
1da177e4 | 319 | |
7d12e780 | 320 | uhci_scan_schedule(uhci); |
84afddd7 | 321 | uhci_fsbr_off(uhci); |
1da177e4 LT |
322 | } |
323 | ||
a8bed8b6 AS |
324 | static void start_rh(struct uhci_hcd *uhci) |
325 | { | |
f37be9b9 | 326 | uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; |
a8bed8b6 | 327 | uhci->is_stopped = 0; |
a8bed8b6 AS |
328 | |
329 | /* Mark it configured and running with a 64-byte max packet. | |
330 | * All interrupts are enabled, even though RESUME won't do anything. | |
331 | */ | |
332 | outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); | |
333 | outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, | |
334 | uhci->io_addr + USBINTR); | |
335 | mb(); | |
6c1b445c AS |
336 | uhci->rh_state = UHCI_RH_RUNNING; |
337 | uhci_to_hcd(uhci)->poll_rh = 1; | |
a8bed8b6 AS |
338 | } |
339 | ||
340 | static void wakeup_rh(struct uhci_hcd *uhci) | |
c8f4fe43 AS |
341 | __releases(uhci->lock) |
342 | __acquires(uhci->lock) | |
1da177e4 | 343 | { |
be3cbc5f DB |
344 | dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, |
345 | "%s%s\n", __FUNCTION__, | |
c8f4fe43 AS |
346 | uhci->rh_state == UHCI_RH_AUTO_STOPPED ? |
347 | " (auto-start)" : ""); | |
1da177e4 | 348 | |
c8f4fe43 AS |
349 | /* If we are auto-stopped then no devices are attached so there's |
350 | * no need for wakeup signals. Otherwise we send Global Resume | |
351 | * for 20 ms. | |
352 | */ | |
353 | if (uhci->rh_state == UHCI_RH_SUSPENDED) { | |
354 | uhci->rh_state = UHCI_RH_RESUMING; | |
355 | outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF, | |
356 | uhci->io_addr + USBCMD); | |
357 | spin_unlock_irq(&uhci->lock); | |
358 | msleep(20); | |
359 | spin_lock_irq(&uhci->lock); | |
e323de46 | 360 | if (uhci->dead) |
4daaa87c | 361 | return; |
1da177e4 | 362 | |
c8f4fe43 AS |
363 | /* End Global Resume and wait for EOP to be sent */ |
364 | outw(USBCMD_CF, uhci->io_addr + USBCMD); | |
a8bed8b6 | 365 | mb(); |
c8f4fe43 AS |
366 | udelay(4); |
367 | if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) | |
368 | dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); | |
369 | } | |
1da177e4 | 370 | |
a8bed8b6 | 371 | start_rh(uhci); |
c8f4fe43 | 372 | |
6c1b445c AS |
373 | /* Restart root hub polling */ |
374 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); | |
1da177e4 LT |
375 | } |
376 | ||
7d12e780 | 377 | static irqreturn_t uhci_irq(struct usb_hcd *hcd) |
014e73c9 AS |
378 | { |
379 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
014e73c9 | 380 | unsigned short status; |
1da177e4 LT |
381 | |
382 | /* | |
014e73c9 AS |
383 | * Read the interrupt status, and write it back to clear the |
384 | * interrupt cause. Contrary to the UHCI specification, the | |
385 | * "HC Halted" status bit is persistent: it is RO, not R/WC. | |
1da177e4 | 386 | */ |
a8bed8b6 | 387 | status = inw(uhci->io_addr + USBSTS); |
014e73c9 AS |
388 | if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ |
389 | return IRQ_NONE; | |
a8bed8b6 | 390 | outw(status, uhci->io_addr + USBSTS); /* Clear it */ |
014e73c9 AS |
391 | |
392 | if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { | |
393 | if (status & USBSTS_HSE) | |
394 | dev_err(uhci_dev(uhci), "host system error, " | |
395 | "PCI problems?\n"); | |
396 | if (status & USBSTS_HCPE) | |
397 | dev_err(uhci_dev(uhci), "host controller process " | |
398 | "error, something bad happened!\n"); | |
4daaa87c | 399 | if (status & USBSTS_HCH) { |
442258e2 | 400 | spin_lock(&uhci->lock); |
4daaa87c AS |
401 | if (uhci->rh_state >= UHCI_RH_RUNNING) { |
402 | dev_err(uhci_dev(uhci), | |
403 | "host controller halted, " | |
014e73c9 | 404 | "very bad!\n"); |
8d402e1a AS |
405 | if (debug > 1 && errbuf) { |
406 | /* Print the schedule for debugging */ | |
407 | uhci_sprint_schedule(uhci, | |
408 | errbuf, ERRBUF_LEN); | |
409 | lprintk(errbuf); | |
410 | } | |
e323de46 | 411 | uhci_hc_died(uhci); |
1f09df8b AS |
412 | |
413 | /* Force a callback in case there are | |
414 | * pending unlinks */ | |
415 | mod_timer(&hcd->rh_timer, jiffies); | |
4daaa87c | 416 | } |
442258e2 | 417 | spin_unlock(&uhci->lock); |
1da177e4 | 418 | } |
1da177e4 LT |
419 | } |
420 | ||
014e73c9 | 421 | if (status & USBSTS_RD) |
6c1b445c | 422 | usb_hcd_poll_rh_status(hcd); |
1f09df8b | 423 | else { |
442258e2 | 424 | spin_lock(&uhci->lock); |
7d12e780 | 425 | uhci_scan_schedule(uhci); |
442258e2 | 426 | spin_unlock(&uhci->lock); |
1f09df8b | 427 | } |
1da177e4 | 428 | |
014e73c9 AS |
429 | return IRQ_HANDLED; |
430 | } | |
1da177e4 | 431 | |
014e73c9 AS |
432 | /* |
433 | * Store the current frame number in uhci->frame_number if the controller | |
c4334726 AS |
434 | * is runnning. Expand from 11 bits (of which we use only 10) to a |
435 | * full-sized integer. | |
436 | * | |
437 | * Like many other parts of the driver, this code relies on being polled | |
438 | * more than once per second as long as the controller is running. | |
014e73c9 AS |
439 | */ |
440 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci) | |
441 | { | |
c4334726 AS |
442 | if (!uhci->is_stopped) { |
443 | unsigned delta; | |
444 | ||
445 | delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & | |
446 | (UHCI_NUMFRAMES - 1); | |
447 | uhci->frame_number += delta; | |
448 | } | |
1da177e4 LT |
449 | } |
450 | ||
451 | /* | |
452 | * De-allocate all resources | |
453 | */ | |
454 | static void release_uhci(struct uhci_hcd *uhci) | |
455 | { | |
456 | int i; | |
457 | ||
8d402e1a AS |
458 | if (DEBUG_CONFIGURED) { |
459 | spin_lock_irq(&uhci->lock); | |
460 | uhci->is_initialized = 0; | |
461 | spin_unlock_irq(&uhci->lock); | |
462 | ||
463 | debugfs_remove(uhci->dentry); | |
464 | } | |
465 | ||
1da177e4 | 466 | for (i = 0; i < UHCI_NUM_SKELQH; i++) |
8b4cd421 | 467 | uhci_free_qh(uhci, uhci->skelqh[i]); |
1da177e4 | 468 | |
8b4cd421 | 469 | uhci_free_td(uhci, uhci->term_td); |
1da177e4 | 470 | |
8b4cd421 | 471 | dma_pool_destroy(uhci->qh_pool); |
1da177e4 | 472 | |
8b4cd421 | 473 | dma_pool_destroy(uhci->td_pool); |
1da177e4 | 474 | |
a1d59ce8 AS |
475 | kfree(uhci->frame_cpu); |
476 | ||
477 | dma_free_coherent(uhci_dev(uhci), | |
478 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | |
479 | uhci->frame, uhci->frame_dma_handle); | |
1da177e4 LT |
480 | } |
481 | ||
be3cbc5f | 482 | static int uhci_init(struct usb_hcd *hcd) |
1da177e4 LT |
483 | { |
484 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
c074b416 AS |
485 | unsigned io_size = (unsigned) hcd->rsrc_len; |
486 | int port; | |
1da177e4 LT |
487 | |
488 | uhci->io_addr = (unsigned long) hcd->rsrc_start; | |
489 | ||
c074b416 AS |
490 | /* The UHCI spec says devices must have 2 ports, and goes on to say |
491 | * they may have more but gives no way to determine how many there | |
e07fefa6 | 492 | * are. However according to the UHCI spec, Bit 7 of the port |
c074b416 | 493 | * status and control register is always set to 1. So we try to |
e07fefa6 AS |
494 | * use this to our advantage. Another common failure mode when |
495 | * a nonexistent register is addressed is to return all ones, so | |
496 | * we test for that also. | |
c074b416 AS |
497 | */ |
498 | for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { | |
499 | unsigned int portstatus; | |
500 | ||
501 | portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); | |
e07fefa6 | 502 | if (!(portstatus & 0x0080) || portstatus == 0xffff) |
c074b416 AS |
503 | break; |
504 | } | |
505 | if (debug) | |
506 | dev_info(uhci_dev(uhci), "detected %d ports\n", port); | |
507 | ||
e07fefa6 AS |
508 | /* Anything greater than 7 is weird so we'll ignore it. */ |
509 | if (port > UHCI_RH_MAXCHILD) { | |
c074b416 AS |
510 | dev_info(uhci_dev(uhci), "port count misdetected? " |
511 | "forcing to 2 ports\n"); | |
512 | port = 2; | |
513 | } | |
514 | uhci->rh_numports = port; | |
515 | ||
a8bed8b6 AS |
516 | /* Kick BIOS off this hardware and reset if the controller |
517 | * isn't already safely quiescent. | |
1da177e4 | 518 | */ |
a8bed8b6 | 519 | check_and_reset_hc(uhci); |
1da177e4 LT |
520 | return 0; |
521 | } | |
522 | ||
02597d2d AS |
523 | /* Make sure the controller is quiescent and that we're not using it |
524 | * any more. This is mainly for the benefit of programs which, like kexec, | |
525 | * expect the hardware to be idle: not doing DMA or generating IRQs. | |
526 | * | |
527 | * This routine may be called in a damaged or failing kernel. Hence we | |
528 | * do not acquire the spinlock before shutting down the controller. | |
529 | */ | |
530 | static void uhci_shutdown(struct pci_dev *pdev) | |
531 | { | |
532 | struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev); | |
533 | ||
e323de46 | 534 | uhci_hc_died(hcd_to_uhci(hcd)); |
02597d2d AS |
535 | } |
536 | ||
1da177e4 LT |
537 | /* |
538 | * Allocate a frame list, and then setup the skeleton | |
539 | * | |
540 | * The hardware doesn't really know any difference | |
541 | * in the queues, but the order does matter for the | |
17230acd AS |
542 | * protocols higher up. The order in which the queues |
543 | * are encountered by the hardware is: | |
1da177e4 | 544 | * |
17230acd | 545 | * - All isochronous events are handled before any |
1da177e4 LT |
546 | * of the queues. We don't do that here, because |
547 | * we'll create the actual TD entries on demand. | |
17230acd AS |
548 | * - The first queue is the high-period interrupt queue. |
549 | * - The second queue is the period-1 interrupt and async | |
550 | * (low-speed control, full-speed control, then bulk) queue. | |
551 | * - The third queue is the terminating bandwidth reclamation queue, | |
552 | * which contains no members, loops back to itself, and is present | |
553 | * only when FSBR is on and there are no full-speed control or bulk QHs. | |
1da177e4 LT |
554 | */ |
555 | static int uhci_start(struct usb_hcd *hcd) | |
556 | { | |
557 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
558 | int retval = -EBUSY; | |
c074b416 | 559 | int i; |
1da177e4 LT |
560 | struct dentry *dentry; |
561 | ||
6c1b445c | 562 | hcd->uses_new_polling = 1; |
1da177e4 | 563 | |
1da177e4 | 564 | spin_lock_init(&uhci->lock); |
c5e3b741 AS |
565 | setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout, |
566 | (unsigned long) uhci); | |
dccf4a48 | 567 | INIT_LIST_HEAD(&uhci->idle_qh_list); |
1da177e4 LT |
568 | init_waitqueue_head(&uhci->waitqh); |
569 | ||
8d402e1a AS |
570 | if (DEBUG_CONFIGURED) { |
571 | dentry = debugfs_create_file(hcd->self.bus_name, | |
572 | S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, | |
573 | uhci, &uhci_debug_operations); | |
574 | if (!dentry) { | |
575 | dev_err(uhci_dev(uhci), "couldn't create uhci " | |
576 | "debugfs entry\n"); | |
577 | retval = -ENOMEM; | |
578 | goto err_create_debug_entry; | |
579 | } | |
580 | uhci->dentry = dentry; | |
581 | } | |
582 | ||
a1d59ce8 AS |
583 | uhci->frame = dma_alloc_coherent(uhci_dev(uhci), |
584 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | |
585 | &uhci->frame_dma_handle, 0); | |
586 | if (!uhci->frame) { | |
1da177e4 LT |
587 | dev_err(uhci_dev(uhci), "unable to allocate " |
588 | "consistent memory for frame list\n"); | |
a1d59ce8 | 589 | goto err_alloc_frame; |
1da177e4 | 590 | } |
a1d59ce8 | 591 | memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame)); |
1da177e4 | 592 | |
a1d59ce8 AS |
593 | uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu), |
594 | GFP_KERNEL); | |
595 | if (!uhci->frame_cpu) { | |
596 | dev_err(uhci_dev(uhci), "unable to allocate " | |
597 | "memory for frame pointers\n"); | |
598 | goto err_alloc_frame_cpu; | |
599 | } | |
1da177e4 LT |
600 | |
601 | uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), | |
602 | sizeof(struct uhci_td), 16, 0); | |
603 | if (!uhci->td_pool) { | |
604 | dev_err(uhci_dev(uhci), "unable to create td dma_pool\n"); | |
605 | goto err_create_td_pool; | |
606 | } | |
607 | ||
608 | uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci), | |
609 | sizeof(struct uhci_qh), 16, 0); | |
610 | if (!uhci->qh_pool) { | |
611 | dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n"); | |
612 | goto err_create_qh_pool; | |
613 | } | |
614 | ||
2532178a | 615 | uhci->term_td = uhci_alloc_td(uhci); |
1da177e4 LT |
616 | if (!uhci->term_td) { |
617 | dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); | |
618 | goto err_alloc_term_td; | |
619 | } | |
620 | ||
621 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { | |
dccf4a48 | 622 | uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); |
1da177e4 LT |
623 | if (!uhci->skelqh[i]) { |
624 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); | |
625 | goto err_alloc_skelqh; | |
626 | } | |
627 | } | |
628 | ||
629 | /* | |
17230acd | 630 | * 8 Interrupt queues; link all higher int queues to int1 = async |
1da177e4 | 631 | */ |
17230acd AS |
632 | for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i) |
633 | uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh); | |
e009f1b2 AS |
634 | uhci->skel_async_qh->link = UHCI_PTR_TERM; |
635 | uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh); | |
1da177e4 LT |
636 | |
637 | /* This dummy TD is to work around a bug in Intel PIIX controllers */ | |
fa346568 | 638 | uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | |
17230acd AS |
639 | (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); |
640 | uhci->term_td->link = UHCI_PTR_TERM; | |
641 | uhci->skel_async_qh->element = uhci->skel_term_qh->element = | |
642 | LINK_TO_TD(uhci->term_td); | |
1da177e4 LT |
643 | |
644 | /* | |
645 | * Fill the frame list: make all entries point to the proper | |
646 | * interrupt queue. | |
1da177e4 LT |
647 | */ |
648 | for (i = 0; i < UHCI_NUMFRAMES; i++) { | |
1da177e4 LT |
649 | |
650 | /* Only place we don't use the frame list routines */ | |
f3fe239b | 651 | uhci->frame[i] = uhci_frame_skel_link(uhci, i); |
1da177e4 LT |
652 | } |
653 | ||
654 | /* | |
655 | * Some architectures require a full mb() to enforce completion of | |
a8bed8b6 | 656 | * the memory writes above before the I/O transfers in configure_hc(). |
1da177e4 LT |
657 | */ |
658 | mb(); | |
a8bed8b6 AS |
659 | |
660 | configure_hc(uhci); | |
8d402e1a | 661 | uhci->is_initialized = 1; |
a8bed8b6 | 662 | start_rh(uhci); |
1da177e4 LT |
663 | return 0; |
664 | ||
665 | /* | |
666 | * error exits: | |
667 | */ | |
1da177e4 | 668 | err_alloc_skelqh: |
8b4cd421 AS |
669 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { |
670 | if (uhci->skelqh[i]) | |
1da177e4 | 671 | uhci_free_qh(uhci, uhci->skelqh[i]); |
8b4cd421 | 672 | } |
1da177e4 LT |
673 | |
674 | uhci_free_td(uhci, uhci->term_td); | |
1da177e4 LT |
675 | |
676 | err_alloc_term_td: | |
1da177e4 | 677 | dma_pool_destroy(uhci->qh_pool); |
1da177e4 LT |
678 | |
679 | err_create_qh_pool: | |
680 | dma_pool_destroy(uhci->td_pool); | |
1da177e4 LT |
681 | |
682 | err_create_td_pool: | |
a1d59ce8 AS |
683 | kfree(uhci->frame_cpu); |
684 | ||
685 | err_alloc_frame_cpu: | |
686 | dma_free_coherent(uhci_dev(uhci), | |
687 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | |
688 | uhci->frame, uhci->frame_dma_handle); | |
1da177e4 | 689 | |
a1d59ce8 | 690 | err_alloc_frame: |
1da177e4 | 691 | debugfs_remove(uhci->dentry); |
1da177e4 LT |
692 | |
693 | err_create_debug_entry: | |
694 | return retval; | |
695 | } | |
696 | ||
697 | static void uhci_stop(struct usb_hcd *hcd) | |
698 | { | |
699 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
700 | ||
1da177e4 | 701 | spin_lock_irq(&uhci->lock); |
e323de46 AS |
702 | if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead) |
703 | uhci_hc_died(uhci); | |
7d12e780 | 704 | uhci_scan_schedule(uhci); |
1da177e4 | 705 | spin_unlock_irq(&uhci->lock); |
6c1b445c | 706 | |
c5e3b741 | 707 | del_timer_sync(&uhci->fsbr_timer); |
1da177e4 LT |
708 | release_uhci(uhci); |
709 | } | |
710 | ||
711 | #ifdef CONFIG_PM | |
a8bed8b6 AS |
712 | static int uhci_rh_suspend(struct usb_hcd *hcd) |
713 | { | |
714 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
be3cbc5f | 715 | int rc = 0; |
a8bed8b6 AS |
716 | |
717 | spin_lock_irq(&uhci->lock); | |
be3cbc5f DB |
718 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) |
719 | rc = -ESHUTDOWN; | |
e323de46 | 720 | else if (!uhci->dead) |
4daaa87c | 721 | suspend_rh(uhci, UHCI_RH_SUSPENDED); |
a8bed8b6 | 722 | spin_unlock_irq(&uhci->lock); |
be3cbc5f | 723 | return rc; |
a8bed8b6 AS |
724 | } |
725 | ||
726 | static int uhci_rh_resume(struct usb_hcd *hcd) | |
727 | { | |
728 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
4daaa87c | 729 | int rc = 0; |
a8bed8b6 AS |
730 | |
731 | spin_lock_irq(&uhci->lock); | |
cfa59dab | 732 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) |
be3cbc5f | 733 | rc = -ESHUTDOWN; |
cfa59dab | 734 | else if (!uhci->dead) |
4daaa87c | 735 | wakeup_rh(uhci); |
a8bed8b6 | 736 | spin_unlock_irq(&uhci->lock); |
4daaa87c | 737 | return rc; |
a8bed8b6 AS |
738 | } |
739 | ||
7be7d741 | 740 | static int uhci_pci_suspend(struct usb_hcd *hcd, pm_message_t message) |
1da177e4 LT |
741 | { |
742 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
4daaa87c | 743 | int rc = 0; |
1da177e4 | 744 | |
a8bed8b6 AS |
745 | dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); |
746 | ||
1da177e4 | 747 | spin_lock_irq(&uhci->lock); |
e323de46 AS |
748 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead) |
749 | goto done_okay; /* Already suspended or dead */ | |
a8bed8b6 | 750 | |
4daaa87c AS |
751 | if (uhci->rh_state > UHCI_RH_SUSPENDED) { |
752 | dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); | |
4daaa87c AS |
753 | rc = -EBUSY; |
754 | goto done; | |
755 | }; | |
756 | ||
a8bed8b6 AS |
757 | /* All PCI host controllers are required to disable IRQ generation |
758 | * at the source, so we must turn off PIRQ. | |
759 | */ | |
760 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); | |
42245e65 | 761 | mb(); |
1f09df8b | 762 | hcd->poll_rh = 0; |
a8bed8b6 AS |
763 | |
764 | /* FIXME: Enable non-PME# remote wakeup? */ | |
765 | ||
18584999 DB |
766 | /* make sure snapshot being resumed re-enumerates everything */ |
767 | if (message.event == PM_EVENT_PRETHAW) | |
768 | uhci_hc_died(uhci); | |
769 | ||
e323de46 AS |
770 | done_okay: |
771 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
4daaa87c | 772 | done: |
1da177e4 | 773 | spin_unlock_irq(&uhci->lock); |
4daaa87c | 774 | return rc; |
1da177e4 LT |
775 | } |
776 | ||
7be7d741 | 777 | static int uhci_pci_resume(struct usb_hcd *hcd) |
1da177e4 LT |
778 | { |
779 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
1da177e4 | 780 | |
a8bed8b6 AS |
781 | dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); |
782 | ||
687f5f34 | 783 | /* Since we aren't in D3 any more, it's safe to set this flag |
e323de46 | 784 | * even if the controller was dead. |
8de98402 BH |
785 | */ |
786 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
42245e65 | 787 | mb(); |
8de98402 | 788 | |
1da177e4 | 789 | spin_lock_irq(&uhci->lock); |
1da177e4 | 790 | |
a8bed8b6 AS |
791 | /* FIXME: Disable non-PME# remote wakeup? */ |
792 | ||
e323de46 AS |
793 | /* The firmware or a boot kernel may have changed the controller |
794 | * settings during a system wakeup. Check it and reconfigure | |
795 | * to avoid problems. | |
a8bed8b6 AS |
796 | */ |
797 | check_and_reset_hc(uhci); | |
e323de46 AS |
798 | |
799 | /* If the controller was dead before, it's back alive now */ | |
a8bed8b6 AS |
800 | configure_hc(uhci); |
801 | ||
1c50c317 AS |
802 | if (uhci->rh_state == UHCI_RH_RESET) { |
803 | ||
804 | /* The controller had to be reset */ | |
805 | usb_root_hub_lost_power(hcd->self.root_hub); | |
a8bed8b6 | 806 | suspend_rh(uhci, UHCI_RH_SUSPENDED); |
1c50c317 | 807 | } |
c8f4fe43 | 808 | |
a8bed8b6 | 809 | spin_unlock_irq(&uhci->lock); |
6c1b445c | 810 | |
1f09df8b AS |
811 | if (!uhci->working_RD) { |
812 | /* Suspended root hub needs to be polled */ | |
813 | hcd->poll_rh = 1; | |
6c1b445c | 814 | usb_hcd_poll_rh_status(hcd); |
1f09df8b | 815 | } |
1da177e4 LT |
816 | return 0; |
817 | } | |
818 | #endif | |
819 | ||
dccf4a48 | 820 | /* Wait until a particular device/endpoint's QH is idle, and free it */ |
1da177e4 | 821 | static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, |
dccf4a48 | 822 | struct usb_host_endpoint *hep) |
1da177e4 LT |
823 | { |
824 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
dccf4a48 AS |
825 | struct uhci_qh *qh; |
826 | ||
827 | spin_lock_irq(&uhci->lock); | |
828 | qh = (struct uhci_qh *) hep->hcpriv; | |
829 | if (qh == NULL) | |
830 | goto done; | |
1da177e4 | 831 | |
dccf4a48 AS |
832 | while (qh->state != QH_STATE_IDLE) { |
833 | ++uhci->num_waiting; | |
834 | spin_unlock_irq(&uhci->lock); | |
835 | wait_event_interruptible(uhci->waitqh, | |
836 | qh->state == QH_STATE_IDLE); | |
837 | spin_lock_irq(&uhci->lock); | |
838 | --uhci->num_waiting; | |
839 | } | |
840 | ||
841 | uhci_free_qh(uhci, qh); | |
842 | done: | |
843 | spin_unlock_irq(&uhci->lock); | |
1da177e4 LT |
844 | } |
845 | ||
846 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) | |
847 | { | |
848 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
c4334726 AS |
849 | unsigned frame_number; |
850 | unsigned delta; | |
1da177e4 LT |
851 | |
852 | /* Minimize latency by avoiding the spinlock */ | |
c4334726 AS |
853 | frame_number = uhci->frame_number; |
854 | barrier(); | |
855 | delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & | |
856 | (UHCI_NUMFRAMES - 1); | |
857 | return frame_number + delta; | |
1da177e4 LT |
858 | } |
859 | ||
860 | static const char hcd_name[] = "uhci_hcd"; | |
861 | ||
862 | static const struct hc_driver uhci_driver = { | |
863 | .description = hcd_name, | |
864 | .product_desc = "UHCI Host Controller", | |
865 | .hcd_priv_size = sizeof(struct uhci_hcd), | |
866 | ||
867 | /* Generic hardware linkage */ | |
868 | .irq = uhci_irq, | |
869 | .flags = HCD_USB11, | |
870 | ||
871 | /* Basic lifecycle operations */ | |
be3cbc5f | 872 | .reset = uhci_init, |
1da177e4 LT |
873 | .start = uhci_start, |
874 | #ifdef CONFIG_PM | |
7be7d741 AS |
875 | .pci_suspend = uhci_pci_suspend, |
876 | .pci_resume = uhci_pci_resume, | |
0c0382e3 AS |
877 | .bus_suspend = uhci_rh_suspend, |
878 | .bus_resume = uhci_rh_resume, | |
1da177e4 LT |
879 | #endif |
880 | .stop = uhci_stop, | |
881 | ||
882 | .urb_enqueue = uhci_urb_enqueue, | |
883 | .urb_dequeue = uhci_urb_dequeue, | |
884 | ||
885 | .endpoint_disable = uhci_hcd_endpoint_disable, | |
886 | .get_frame_number = uhci_hcd_get_frame_number, | |
887 | ||
888 | .hub_status_data = uhci_hub_status_data, | |
889 | .hub_control = uhci_hub_control, | |
890 | }; | |
891 | ||
892 | static const struct pci_device_id uhci_pci_ids[] = { { | |
893 | /* handle any USB UHCI controller */ | |
c67808ee | 894 | PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0), |
1da177e4 LT |
895 | .driver_data = (unsigned long) &uhci_driver, |
896 | }, { /* end: all zeroes */ } | |
897 | }; | |
898 | ||
899 | MODULE_DEVICE_TABLE(pci, uhci_pci_ids); | |
900 | ||
901 | static struct pci_driver uhci_pci_driver = { | |
902 | .name = (char *)hcd_name, | |
903 | .id_table = uhci_pci_ids, | |
904 | ||
905 | .probe = usb_hcd_pci_probe, | |
906 | .remove = usb_hcd_pci_remove, | |
02597d2d | 907 | .shutdown = uhci_shutdown, |
1da177e4 LT |
908 | |
909 | #ifdef CONFIG_PM | |
910 | .suspend = usb_hcd_pci_suspend, | |
911 | .resume = usb_hcd_pci_resume, | |
912 | #endif /* PM */ | |
913 | }; | |
914 | ||
915 | static int __init uhci_hcd_init(void) | |
916 | { | |
917 | int retval = -ENOMEM; | |
918 | ||
5f8364b7 AS |
919 | printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n", |
920 | ignore_oc ? ", overcurrent ignored" : ""); | |
1da177e4 LT |
921 | |
922 | if (usb_disabled()) | |
923 | return -ENODEV; | |
924 | ||
8d402e1a | 925 | if (DEBUG_CONFIGURED) { |
1da177e4 LT |
926 | errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); |
927 | if (!errbuf) | |
928 | goto errbuf_failed; | |
8d402e1a AS |
929 | uhci_debugfs_root = debugfs_create_dir("uhci", NULL); |
930 | if (!uhci_debugfs_root) | |
931 | goto debug_failed; | |
1da177e4 LT |
932 | } |
933 | ||
1da177e4 | 934 | uhci_up_cachep = kmem_cache_create("uhci_urb_priv", |
20c2df83 | 935 | sizeof(struct urb_priv), 0, 0, NULL); |
1da177e4 LT |
936 | if (!uhci_up_cachep) |
937 | goto up_failed; | |
938 | ||
939 | retval = pci_register_driver(&uhci_pci_driver); | |
940 | if (retval) | |
941 | goto init_failed; | |
942 | ||
943 | return 0; | |
944 | ||
945 | init_failed: | |
1a1d92c1 | 946 | kmem_cache_destroy(uhci_up_cachep); |
1da177e4 LT |
947 | |
948 | up_failed: | |
949 | debugfs_remove(uhci_debugfs_root); | |
950 | ||
951 | debug_failed: | |
1bc3c9e1 | 952 | kfree(errbuf); |
1da177e4 LT |
953 | |
954 | errbuf_failed: | |
955 | ||
956 | return retval; | |
957 | } | |
958 | ||
959 | static void __exit uhci_hcd_cleanup(void) | |
960 | { | |
961 | pci_unregister_driver(&uhci_pci_driver); | |
1a1d92c1 | 962 | kmem_cache_destroy(uhci_up_cachep); |
1da177e4 | 963 | debugfs_remove(uhci_debugfs_root); |
1bc3c9e1 | 964 | kfree(errbuf); |
1da177e4 LT |
965 | } |
966 | ||
967 | module_init(uhci_hcd_init); | |
968 | module_exit(uhci_hcd_cleanup); | |
969 | ||
970 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
971 | MODULE_DESCRIPTION(DRIVER_DESC); | |
972 | MODULE_LICENSE("GPL"); |