[deliverable/linux.git] / drivers / usb / host / uhci-hub.c

/*
 * Universal Host Controller Interface driver for USB.
 *
 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
 *
 * (C) Copyright 1999 Linus Torvalds
 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
 * (C) Copyright 1999 Randy Dunlap
 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
 * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
 */

static const __u8 root_hub_hub_des[] =
{
	0x09,			/*  __u8  bLength; */
	0x29,			/*  __u8  bDescriptorType; Hub-descriptor */
	0x02,			/*  __u8  bNbrPorts; */
	0x0a,			/* __u16  wHubCharacteristics; */
	0x00,			/*   (per-port OC, no power switching) */
	0x01,			/*  __u8  bPwrOn2pwrGood; 2ms */
	0x00,			/*  __u8  bHubContrCurrent; 0 mA */
	0x00,			/*  __u8  DeviceRemovable; *** 7 Ports max *** */
	0xff			/*  __u8  PortPwrCtrlMask; *** 7 ports max *** */
};

#define	UHCI_RH_MAXCHILD	7

/* must write as zeroes */
#define WZ_BITS		(USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)

/* status change bits:  nonzero writes will clear */
#define RWC_BITS	(USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)

/* suspend/resume bits: port suspended or port resuming */
#define SUSPEND_BITS	(USBPORTSC_SUSP | USBPORTSC_RD)

/* A port that either is connected or has a changed-bit set will prevent
 * us from AUTO_STOPPING.
 */
static int any_ports_active(struct uhci_hcd *uhci)
{
	int port;

	for (port = 0; port < uhci->rh_numports; ++port) {
		if ((uhci_readw(uhci, USBPORTSC1 + port * 2) &
				(USBPORTSC_CCS | RWC_BITS)) ||
				test_bit(port, &uhci->port_c_suspend))
			return 1;
	}
	return 0;
}

static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
{
	int port;
	int mask = RWC_BITS;

	/* Some boards (both VIA and Intel apparently) report bogus
	 * overcurrent indications, causing massive log spam unless
	 * we completely ignore them.  This doesn't seem to be a problem
	 * with the chipset so much as with the way it is connected on
	 * the motherboard; if the overcurrent input is left to float
	 * then it may constantly register false positives. */
	if (ignore_oc)
		mask &= ~USBPORTSC_OCC;

	*buf = 0;
	for (port = 0; port < uhci->rh_numports; ++port) {
		if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & mask) ||
				test_bit(port, &uhci->port_c_suspend))
			*buf |= (1 << (port + 1));
	}
	return !!*buf;
}

#define OK(x)			len = (x); break

#define CLR_RH_PORTSTAT(x) \
	status = uhci_readw(uhci, port_addr);	\
	status &= ~(RWC_BITS|WZ_BITS); \
	status &= ~(x); \
	status |= RWC_BITS & (x); \
	uhci_writew(uhci, status, port_addr)

#define SET_RH_PORTSTAT(x) \
	status = uhci_readw(uhci, port_addr);	\
	status |= (x); \
	status &= ~(RWC_BITS|WZ_BITS); \
	uhci_writew(uhci, status, port_addr)

/* UHCI controllers don't automatically stop resume signalling after 20 msec,
 * so we have to poll and check timeouts in order to take care of it.
 */
static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
		unsigned long port_addr)
{
	int status;
	int i;

	if (uhci_readw(uhci, port_addr) & SUSPEND_BITS) {
		CLR_RH_PORTSTAT(SUSPEND_BITS);
		if (test_bit(port, &uhci->resuming_ports))
			set_bit(port, &uhci->port_c_suspend);

		/* The controller won't actually turn off the RD bit until
		 * it has had a chance to send a low-speed EOP sequence,
		 * which is supposed to take 3 bit times (= 2 microseconds).
		 * Experiments show that some controllers take longer, so
		 * we'll poll for completion. */
		for (i = 0; i < 10; ++i) {
			if (!(uhci_readw(uhci, port_addr) & SUSPEND_BITS))
				break;
			udelay(1);
		}
	}
	clear_bit(port, &uhci->resuming_ports);
}

/* Wait for the UHCI controller in HP's iLO2 server management chip.
 * It can take up to 250 us to finish a reset and set the CSC bit.
 */
static void wait_for_HP(struct uhci_hcd *uhci, unsigned long port_addr)
{
	int i;

	for (i = 10; i < 250; i += 10) {
		if (uhci_readw(uhci, port_addr) & USBPORTSC_CSC)
			return;
		udelay(10);
	}
	/* Log a warning? */
}

static void uhci_check_ports(struct uhci_hcd *uhci)
{
	unsigned int port;
	unsigned long port_addr;
	int status;

	for (port = 0; port < uhci->rh_numports; ++port) {
		port_addr = USBPORTSC1 + 2 * port;
		status = uhci_readw(uhci, port_addr);
		if (unlikely(status & USBPORTSC_PR)) {
			if (time_after_eq(jiffies, uhci->ports_timeout)) {
				CLR_RH_PORTSTAT(USBPORTSC_PR);
				udelay(10);

				/* HP's server management chip requires
				 * a longer delay. */
				if (uhci->wait_for_hp)
					wait_for_HP(uhci, port_addr);

				/* If the port was enabled before, turning
				 * reset on caused a port enable change.
				 * Turning reset off causes a port connect
				 * status change.  Clear these changes. */
				CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
				SET_RH_PORTSTAT(USBPORTSC_PE);
			}
		}
		if (unlikely(status & USBPORTSC_RD)) {
			if (!test_bit(port, &uhci->resuming_ports)) {

				/* Port received a wakeup request */
				set_bit(port, &uhci->resuming_ports);
				uhci->ports_timeout = jiffies +
						msecs_to_jiffies(25);

				/* Make sure we see the port again
				 * after the resuming period is over. */
				mod_timer(&uhci_to_hcd(uhci)->rh_timer,
						uhci->ports_timeout);
			} else if (time_after_eq(jiffies,
						uhci->ports_timeout)) {
				uhci_finish_suspend(uhci, port, port_addr);
			}
		}
	}
}

static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
{
	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
	unsigned long flags;
	int status = 0;

	spin_lock_irqsave(&uhci->lock, flags);

	uhci_scan_schedule(uhci);
	if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
		goto done;
	uhci_check_ports(uhci);

	status = get_hub_status_data(uhci, buf);

	switch (uhci->rh_state) {
	    case UHCI_RH_SUSPENDED:
		/* if port change, ask to be resumed */
		if (status || uhci->resuming_ports) {
			status = 1;
			usb_hcd_resume_root_hub(hcd);
		}
		break;

	    case UHCI_RH_AUTO_STOPPED:
		/* if port change, auto start */
		if (status)
			wakeup_rh(uhci);
		break;

	    case UHCI_RH_RUNNING:
		/* are any devices attached? */
		if (!any_ports_active(uhci)) {
			uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
			uhci->auto_stop_time = jiffies + HZ;
		}
		break;

	    case UHCI_RH_RUNNING_NODEVS:
		/* auto-stop if nothing connected for 1 second */
		if (any_ports_active(uhci))
			uhci->rh_state = UHCI_RH_RUNNING;
		else if (time_after_eq(jiffies, uhci->auto_stop_time))
			suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
		break;

	    default:
		break;
	}

done:
	spin_unlock_irqrestore(&uhci->lock, flags);
	return status;
}

/* size of returned buffer is part of USB spec */
static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
			u16 wIndex, char *buf, u16 wLength)
{
	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
	int status, lstatus, retval = 0, len = 0;
	unsigned int port = wIndex - 1;
	unsigned long port_addr = USBPORTSC1 + 2 * port;
	u16 wPortChange, wPortStatus;
	unsigned long flags;

	if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
		return -ETIMEDOUT;

	spin_lock_irqsave(&uhci->lock, flags);
	switch (typeReq) {

	case GetHubStatus:
		*(__le32 *)buf = cpu_to_le32(0);
		OK(4);		/* hub power */
	case GetPortStatus:
		if (port >= uhci->rh_numports)
			goto err;

		uhci_check_ports(uhci);
		status = uhci_readw(uhci, port_addr);

		/* Intel controllers report the OverCurrent bit active on.
		 * VIA controllers report it active off, so we'll adjust the
		 * bit value.  (It's not standardized in the UHCI spec.)
		 */
		if (uhci->oc_low)
			status ^= USBPORTSC_OC;

		/* UHCI doesn't support C_RESET (always false) */
		wPortChange = lstatus = 0;
		if (status & USBPORTSC_CSC)
			wPortChange |= USB_PORT_STAT_C_CONNECTION;
		if (status & USBPORTSC_PEC)
			wPortChange |= USB_PORT_STAT_C_ENABLE;
		if ((status & USBPORTSC_OCC) && !ignore_oc)
			wPortChange |= USB_PORT_STAT_C_OVERCURRENT;

		if (test_bit(port, &uhci->port_c_suspend)) {
			wPortChange |= USB_PORT_STAT_C_SUSPEND;
			lstatus |= 1;
		}
		if (test_bit(port, &uhci->resuming_ports))
			lstatus |= 4;

		/* UHCI has no power switching (always on) */
		wPortStatus = USB_PORT_STAT_POWER;
		if (status & USBPORTSC_CCS)
			wPortStatus |= USB_PORT_STAT_CONNECTION;
		if (status & USBPORTSC_PE) {
			wPortStatus |= USB_PORT_STAT_ENABLE;
			if (status & SUSPEND_BITS)
				wPortStatus |= USB_PORT_STAT_SUSPEND;
		}
		if (status & USBPORTSC_OC)
			wPortStatus |= USB_PORT_STAT_OVERCURRENT;
		if (status & USBPORTSC_PR)
			wPortStatus |= USB_PORT_STAT_RESET;
		if (status & USBPORTSC_LSDA)
			wPortStatus |= USB_PORT_STAT_LOW_SPEED;

		if (wPortChange)
			dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
					wIndex, status, lstatus);

		*(__le16 *)buf = cpu_to_le16(wPortStatus);
		*(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
		OK(4);
	case SetHubFeature:		/* We don't implement these */
	case ClearHubFeature:
		switch (wValue) {
		case C_HUB_OVER_CURRENT:
		case C_HUB_LOCAL_POWER:
			OK(0);
		default:
			goto err;
		}
		break;
	case SetPortFeature:
		if (port >= uhci->rh_numports)
			goto err;

		switch (wValue) {
		case USB_PORT_FEAT_SUSPEND:
			SET_RH_PORTSTAT(USBPORTSC_SUSP);
			OK(0);
		case USB_PORT_FEAT_RESET:
			SET_RH_PORTSTAT(USBPORTSC_PR);

			/* Reset terminates Resume signalling */
			uhci_finish_suspend(uhci, port, port_addr);

			/* USB v2.0 7.1.7.5 */
			uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
			OK(0);
		case USB_PORT_FEAT_POWER:
			/* UHCI has no power switching */
			OK(0);
		default:
			goto err;
		}
		break;
	case ClearPortFeature:
		if (port >= uhci->rh_numports)
			goto err;

		switch (wValue) {
		case USB_PORT_FEAT_ENABLE:
			CLR_RH_PORTSTAT(USBPORTSC_PE);

			/* Disable terminates Resume signalling */
			uhci_finish_suspend(uhci, port, port_addr);
			OK(0);
		case USB_PORT_FEAT_C_ENABLE:
			CLR_RH_PORTSTAT(USBPORTSC_PEC);
			OK(0);
		case USB_PORT_FEAT_SUSPEND:
			if (!(uhci_readw(uhci, port_addr) & USBPORTSC_SUSP)) {

				/* Make certain the port isn't suspended */
				uhci_finish_suspend(uhci, port, port_addr);
			} else if (!test_and_set_bit(port,
						&uhci->resuming_ports)) {
				SET_RH_PORTSTAT(USBPORTSC_RD);

				/* The controller won't allow RD to be set
				 * if the port is disabled.  When this happens
				 * just skip the Resume signalling.
				 */
				if (!(uhci_readw(uhci, port_addr) &
						USBPORTSC_RD))
					uhci_finish_suspend(uhci, port,
							port_addr);
				else
					/* USB v2.0 7.1.7.7 */
					uhci->ports_timeout = jiffies +
						msecs_to_jiffies(20);
			}
			OK(0);
		case USB_PORT_FEAT_C_SUSPEND:
			clear_bit(port, &uhci->port_c_suspend);
			OK(0);
		case USB_PORT_FEAT_POWER:
			/* UHCI has no power switching */
			goto err;
		case USB_PORT_FEAT_C_CONNECTION:
			CLR_RH_PORTSTAT(USBPORTSC_CSC);
			OK(0);
		case USB_PORT_FEAT_C_OVER_CURRENT:
			CLR_RH_PORTSTAT(USBPORTSC_OCC);
			OK(0);
		case USB_PORT_FEAT_C_RESET:
			/* this driver won't report these */
			OK(0);
		default:
			goto err;
		}
		break;
	case GetHubDescriptor:
		len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
		memcpy(buf, root_hub_hub_des, len);
		if (len > 2)
			buf[2] = uhci->rh_numports;
		OK(len);
	default:
err:
		retval = -EPIPE;
	}
	spin_unlock_irqrestore(&uhci->lock, flags);

	return retval;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Universal Host Controller Interface driver for USB.
	3	*
	4	* Maintainer: Alan Stern <stern@rowland.harvard.edu>
	5	*
	6	* (C) Copyright 1999 Linus Torvalds
	7	* (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
	8	* (C) Copyright 1999 Randy Dunlap
	9	* (C) Copyright 1999 Georg Acher, acher@in.tum.de
	10	* (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
	11	* (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
	12	* (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
	13	*/
	14
bef4665a	15	static const __u8 root_hub_hub_des[] =
1da177e4 LT	16	{
	17	0x09, /* __u8 bLength; */
	18	0x29, /* __u8 bDescriptorType; Hub-descriptor */
	19	0x02, /* __u8 bNbrPorts; */
	20	0x0a, /* __u16 wHubCharacteristics; */
	21	0x00, /* (per-port OC, no power switching) */
	22	0x01, /* __u8 bPwrOn2pwrGood; 2ms */
	23	0x00, /* __u8 bHubContrCurrent; 0 mA */
	24	0x00, /* __u8 DeviceRemovable; * 7 Ports max * */
	25	0xff /* __u8 PortPwrCtrlMask; * 7 ports max * */
	26	};
	27
	28	#define UHCI_RH_MAXCHILD 7
	29
	30	/* must write as zeroes */
	31	#define WZ_BITS (USBPORTSC_RES2 \| USBPORTSC_RES3 \| USBPORTSC_RES4)
	32
	33	/* status change bits: nonzero writes will clear */
	34	#define RWC_BITS (USBPORTSC_OCC \| USBPORTSC_PEC \| USBPORTSC_CSC)
	35
88018158 AS	36	/* suspend/resume bits: port suspended or port resuming */
	37	#define SUSPEND_BITS (USBPORTSC_SUSP \| USBPORTSC_RD)
	38
f5946f82 AS	39	/* A port that either is connected or has a changed-bit set will prevent
	40	* us from AUTO_STOPPING.
	41	*/
	42	static int any_ports_active(struct uhci_hcd *uhci)
	43	{
	44	int port;
	45
	46	for (port = 0; port < uhci->rh_numports; ++port) {
9faa091a	47	if ((uhci_readw(uhci, USBPORTSC1 + port * 2) &
f5946f82 AS	48	(USBPORTSC_CCS \| RWC_BITS)) \|\|
	49	test_bit(port, &uhci->port_c_suspend))
	50	return 1;
	51	}
	52	return 0;
	53	}
	54
6c1b445c	55	static inline int get_hub_status_data(struct uhci_hcd uhci, char buf)
1da177e4	56	{
1da177e4	57	int port;
5f8364b7 AS	58	int mask = RWC_BITS;
	59
	60	/* Some boards (both VIA and Intel apparently) report bogus
	61	* overcurrent indications, causing massive log spam unless
	62	* we completely ignore them. This doesn't seem to be a problem
	63	* with the chipset so much as with the way it is connected on
	64	* the motherboard; if the overcurrent input is left to float
	65	* then it may constantly register false positives. */
	66	if (ignore_oc)
	67	mask &= ~USBPORTSC_OCC;
1da177e4 LT	68
	69	*buf = 0;
	70	for (port = 0; port < uhci->rh_numports; ++port) {
9faa091a	71	if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & mask) \|\|
1da177e4 LT	72	test_bit(port, &uhci->port_c_suspend))
	73	*buf \|= (1 << (port + 1));
	74	}
1da177e4 LT	75	return !!*buf;
	76	}
	77
	78	#define OK(x) len = (x); break
	79
	80	#define CLR_RH_PORTSTAT(x) \
9faa091a	81	status = uhci_readw(uhci, port_addr); \
1da177e4 LT	82	status &= ~(RWC_BITS\|WZ_BITS); \
	83	status &= ~(x); \
	84	status \|= RWC_BITS & (x); \
9faa091a	85	uhci_writew(uhci, status, port_addr)
1da177e4 LT	86
1da177e4 LT	87	#define SET_RH_PORTSTAT(x) \
9faa091a	88	status = uhci_readw(uhci, port_addr); \
1da177e4 LT	89	status \|= (x); \
1da177e4 LT	90	status &= ~(RWC_BITS\|WZ_BITS); \
9faa091a	91	uhci_writew(uhci, status, port_addr)
1da177e4 LT	92
	93	/* UHCI controllers don't automatically stop resume signalling after 20 msec,
	94	* so we have to poll and check timeouts in order to take care of it.
	95	*/
	96	static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
	97	unsigned long port_addr)
	98	{
	99	int status;
de06a3b8	100	int i;
1da177e4	101
9faa091a	102	if (uhci_readw(uhci, port_addr) & SUSPEND_BITS) {
88018158	103	CLR_RH_PORTSTAT(SUSPEND_BITS);
8e326406 AS	104	if (test_bit(port, &uhci->resuming_ports))
8e326406 AS	105	set_bit(port, &uhci->port_c_suspend);
1da177e4 LT	106
	107	/* The controller won't actually turn off the RD bit until
	108	* it has had a chance to send a low-speed EOP sequence,
de06a3b8 AS	109	* which is supposed to take 3 bit times (= 2 microseconds).
	110	* Experiments show that some controllers take longer, so
	111	* we'll poll for completion. */
	112	for (i = 0; i < 10; ++i) {
9faa091a	113	if (!(uhci_readw(uhci, port_addr) & SUSPEND_BITS))
de06a3b8 AS	114	break;
	115	udelay(1);
	116	}
1da177e4	117	}
8e326406	118	clear_bit(port, &uhci->resuming_ports);
1da177e4 LT	119	}
1da177e4 LT	120
ae557175 AS	121	/* Wait for the UHCI controller in HP's iLO2 server management chip.
	122	* It can take up to 250 us to finish a reset and set the CSC bit.
	123	*/
9faa091a	124	static void wait_for_HP(struct uhci_hcd *uhci, unsigned long port_addr)
ae557175 AS	125	{
	126	int i;
	127
	128	for (i = 10; i < 250; i += 10) {
9faa091a	129	if (uhci_readw(uhci, port_addr) & USBPORTSC_CSC)
ae557175 AS	130	return;
	131	udelay(10);
	132	}
	133	/* Log a warning? */
	134	}
	135
1da177e4 LT	136	static void uhci_check_ports(struct uhci_hcd *uhci)
	137	{
	138	unsigned int port;
	139	unsigned long port_addr;
	140	int status;
	141
	142	for (port = 0; port < uhci->rh_numports; ++port) {
9faa091a JA	143	port_addr = USBPORTSC1 + 2 * port;
9faa091a JA	144	status = uhci_readw(uhci, port_addr);
1da177e4 LT	145	if (unlikely(status & USBPORTSC_PR)) {
	146	if (time_after_eq(jiffies, uhci->ports_timeout)) {
	147	CLR_RH_PORTSTAT(USBPORTSC_PR);
	148	udelay(10);
	149
ae557175 AS	150	/* HP's server management chip requires
ae557175 AS	151	* a longer delay. */
dfeca7a8	152	if (uhci->wait_for_hp)
9faa091a	153	wait_for_HP(uhci, port_addr);
ae557175	154
1da177e4 LT	155	/* If the port was enabled before, turning
	156	* reset on caused a port enable change.
	157	* Turning reset off causes a port connect
	158	* status change. Clear these changes. */
	159	CLR_RH_PORTSTAT(USBPORTSC_CSC \| USBPORTSC_PEC);
	160	SET_RH_PORTSTAT(USBPORTSC_PE);
	161	}
	162	}
	163	if (unlikely(status & USBPORTSC_RD)) {
	164	if (!test_bit(port, &uhci->resuming_ports)) {
	165
	166	/* Port received a wakeup request */
	167	set_bit(port, &uhci->resuming_ports);
	168	uhci->ports_timeout = jiffies +
49d0f078	169	msecs_to_jiffies(25);
6c1b445c AS	170
	171	/* Make sure we see the port again
	172	* after the resuming period is over. */
	173	mod_timer(&uhci_to_hcd(uhci)->rh_timer,
	174	uhci->ports_timeout);
1da177e4 LT	175	} else if (time_after_eq(jiffies,
	176	uhci->ports_timeout)) {
	177	uhci_finish_suspend(uhci, port, port_addr);
	178	}
	179	}
	180	}
	181	}
	182
6c1b445c AS	183	static int uhci_hub_status_data(struct usb_hcd hcd, char buf)
	184	{
	185	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
	186	unsigned long flags;
1f09df8b	187	int status = 0;
6c1b445c AS	188
6c1b445c AS	189	spin_lock_irqsave(&uhci->lock, flags);
6c1b445c	190
7d12e780	191	uhci_scan_schedule(uhci);
541c7d43	192	if (!HCD_HW_ACCESSIBLE(hcd) \|\| uhci->dead)
1f09df8b	193	goto done;
6c1b445c	194	uhci_check_ports(uhci);
1f09df8b	195
6c1b445c AS	196	status = get_hub_status_data(uhci, buf);
	197
	198	switch (uhci->rh_state) {
6c1b445c AS	199	case UHCI_RH_SUSPENDED:
6c1b445c AS	200	/* if port change, ask to be resumed */
b446b96f AS	201	if (status \|\| uhci->resuming_ports) {
b446b96f AS	202	status = 1;
6c1b445c	203	usb_hcd_resume_root_hub(hcd);
b446b96f	204	}
6c1b445c AS	205	break;
	206
	207	case UHCI_RH_AUTO_STOPPED:
	208	/* if port change, auto start */
	209	if (status)
	210	wakeup_rh(uhci);
	211	break;
	212
	213	case UHCI_RH_RUNNING:
	214	/* are any devices attached? */
	215	if (!any_ports_active(uhci)) {
	216	uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
	217	uhci->auto_stop_time = jiffies + HZ;
	218	}
	219	break;
	220
	221	case UHCI_RH_RUNNING_NODEVS:
	222	/* auto-stop if nothing connected for 1 second */
	223	if (any_ports_active(uhci))
	224	uhci->rh_state = UHCI_RH_RUNNING;
	225	else if (time_after_eq(jiffies, uhci->auto_stop_time))
	226	suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
	227	break;
	228
	229	default:
	230	break;
	231	}
	232
	233	done:
	234	spin_unlock_irqrestore(&uhci->lock, flags);
	235	return status;
	236	}
	237
1da177e4 LT	238	/* size of returned buffer is part of USB spec */
	239	static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
	240	u16 wIndex, char *buf, u16 wLength)
	241	{
	242	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
	243	int status, lstatus, retval = 0, len = 0;
	244	unsigned int port = wIndex - 1;
9faa091a	245	unsigned long port_addr = USBPORTSC1 + 2 * port;
1da177e4 LT	246	u16 wPortChange, wPortStatus;
	247	unsigned long flags;
	248
541c7d43	249	if (!HCD_HW_ACCESSIBLE(hcd) \|\| uhci->dead)
a8bed8b6 AS	250	return -ETIMEDOUT;
a8bed8b6 AS	251
1da177e4 LT	252	spin_lock_irqsave(&uhci->lock, flags);
	253	switch (typeReq) {
	254
	255	case GetHubStatus:
	256	(__le32 )buf = cpu_to_le32(0);
	257	OK(4); /* hub power */
	258	case GetPortStatus:
	259	if (port >= uhci->rh_numports)
	260	goto err;
	261
	262	uhci_check_ports(uhci);
9faa091a	263	status = uhci_readw(uhci, port_addr);
1da177e4 LT	264
	265	/* Intel controllers report the OverCurrent bit active on.
	266	* VIA controllers report it active off, so we'll adjust the
	267	* bit value. (It's not standardized in the UHCI spec.)
	268	*/
dfeca7a8	269	if (uhci->oc_low)
1da177e4 LT	270	status ^= USBPORTSC_OC;
	271
	272	/* UHCI doesn't support C_RESET (always false) */
	273	wPortChange = lstatus = 0;
	274	if (status & USBPORTSC_CSC)
	275	wPortChange \|= USB_PORT_STAT_C_CONNECTION;
	276	if (status & USBPORTSC_PEC)
	277	wPortChange \|= USB_PORT_STAT_C_ENABLE;
5f8364b7	278	if ((status & USBPORTSC_OCC) && !ignore_oc)
1da177e4 LT	279	wPortChange \|= USB_PORT_STAT_C_OVERCURRENT;
	280
	281	if (test_bit(port, &uhci->port_c_suspend)) {
	282	wPortChange \|= USB_PORT_STAT_C_SUSPEND;
	283	lstatus \|= 1;
	284	}
1da177e4 LT	285	if (test_bit(port, &uhci->resuming_ports))
	286	lstatus \|= 4;
	287
	288	/* UHCI has no power switching (always on) */
	289	wPortStatus = USB_PORT_STAT_POWER;
	290	if (status & USBPORTSC_CCS)
	291	wPortStatus \|= USB_PORT_STAT_CONNECTION;
	292	if (status & USBPORTSC_PE) {
	293	wPortStatus \|= USB_PORT_STAT_ENABLE;
88018158	294	if (status & SUSPEND_BITS)
1da177e4 LT	295	wPortStatus \|= USB_PORT_STAT_SUSPEND;
	296	}
	297	if (status & USBPORTSC_OC)
	298	wPortStatus \|= USB_PORT_STAT_OVERCURRENT;
	299	if (status & USBPORTSC_PR)
	300	wPortStatus \|= USB_PORT_STAT_RESET;
	301	if (status & USBPORTSC_LSDA)
	302	wPortStatus \|= USB_PORT_STAT_LOW_SPEED;
	303
	304	if (wPortChange)
	305	dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
	306	wIndex, status, lstatus);
	307
	308	(__le16 )buf = cpu_to_le16(wPortStatus);
	309	(__le16 )(buf + 2) = cpu_to_le16(wPortChange);
	310	OK(4);
	311	case SetHubFeature: /* We don't implement these */
	312	case ClearHubFeature:
	313	switch (wValue) {
	314	case C_HUB_OVER_CURRENT:
	315	case C_HUB_LOCAL_POWER:
	316	OK(0);
	317	default:
	318	goto err;
	319	}
	320	break;
	321	case SetPortFeature:
	322	if (port >= uhci->rh_numports)
	323	goto err;
	324
	325	switch (wValue) {
	326	case USB_PORT_FEAT_SUSPEND:
1da177e4 LT	327	SET_RH_PORTSTAT(USBPORTSC_SUSP);
	328	OK(0);
	329	case USB_PORT_FEAT_RESET:
	330	SET_RH_PORTSTAT(USBPORTSC_PR);
	331
	332	/* Reset terminates Resume signalling */
	333	uhci_finish_suspend(uhci, port, port_addr);
	334
	335	/* USB v2.0 7.1.7.5 */
	336	uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
	337	OK(0);
	338	case USB_PORT_FEAT_POWER:
	339	/* UHCI has no power switching */
	340	OK(0);
	341	default:
	342	goto err;
	343	}
	344	break;
	345	case ClearPortFeature:
	346	if (port >= uhci->rh_numports)
	347	goto err;
	348
	349	switch (wValue) {
	350	case USB_PORT_FEAT_ENABLE:
	351	CLR_RH_PORTSTAT(USBPORTSC_PE);
	352
	353	/* Disable terminates Resume signalling */
	354	uhci_finish_suspend(uhci, port, port_addr);
	355	OK(0);
	356	case USB_PORT_FEAT_C_ENABLE:
	357	CLR_RH_PORTSTAT(USBPORTSC_PEC);
	358	OK(0);
	359	case USB_PORT_FEAT_SUSPEND:
9faa091a	360	if (!(uhci_readw(uhci, port_addr) & USBPORTSC_SUSP)) {
8e326406 AS	361
	362	/* Make certain the port isn't suspended */
	363	uhci_finish_suspend(uhci, port, port_addr);
	364	} else if (!test_and_set_bit(port,
1da177e4 LT	365	&uhci->resuming_ports)) {
	366	SET_RH_PORTSTAT(USBPORTSC_RD);
	367
	368	/* The controller won't allow RD to be set
	369	* if the port is disabled. When this happens
	370	* just skip the Resume signalling.
	371	*/
9faa091a JA	372	if (!(uhci_readw(uhci, port_addr) &
9faa091a JA	373	USBPORTSC_RD))
1da177e4 LT	374	uhci_finish_suspend(uhci, port,
	375	port_addr);
	376	else
	377	/* USB v2.0 7.1.7.7 */
	378	uhci->ports_timeout = jiffies +
	379	msecs_to_jiffies(20);
	380	}
	381	OK(0);
	382	case USB_PORT_FEAT_C_SUSPEND:
	383	clear_bit(port, &uhci->port_c_suspend);
	384	OK(0);
	385	case USB_PORT_FEAT_POWER:
	386	/* UHCI has no power switching */
	387	goto err;
	388	case USB_PORT_FEAT_C_CONNECTION:
	389	CLR_RH_PORTSTAT(USBPORTSC_CSC);
	390	OK(0);
	391	case USB_PORT_FEAT_C_OVER_CURRENT:
	392	CLR_RH_PORTSTAT(USBPORTSC_OCC);
	393	OK(0);
	394	case USB_PORT_FEAT_C_RESET:
	395	/* this driver won't report these */
	396	OK(0);
	397	default:
	398	goto err;
	399	}
	400	break;
	401	case GetHubDescriptor:
	402	len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
	403	memcpy(buf, root_hub_hub_des, len);
	404	if (len > 2)
	405	buf[2] = uhci->rh_numports;
	406	OK(len);
	407	default:
	408	err:
	409	retval = -EPIPE;
	410	}
	411	spin_unlock_irqrestore(&uhci->lock, flags);
	412
	413	return retval;
	414	}