Commit | Line | Data |
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66d4eadd SS |
1 | /* |
2 | * xHCI host controller driver | |
3 | * | |
4 | * Copyright (C) 2008 Intel Corp. | |
5 | * | |
6 | * Author: Sarah Sharp | |
7 | * Some code borrowed from the Linux EHCI driver. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | * for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software Foundation, | |
20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/irq.h> | |
24 | #include <linux/module.h> | |
b0567b3f | 25 | #include <linux/moduleparam.h> |
66d4eadd SS |
26 | |
27 | #include "xhci.h" | |
28 | ||
29 | #define DRIVER_AUTHOR "Sarah Sharp" | |
30 | #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver" | |
31 | ||
b0567b3f SS |
32 | /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */ |
33 | static int link_quirk; | |
34 | module_param(link_quirk, int, S_IRUGO | S_IWUSR); | |
35 | MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB"); | |
36 | ||
66d4eadd SS |
37 | /* TODO: copied from ehci-hcd.c - can this be refactored? */ |
38 | /* | |
39 | * handshake - spin reading hc until handshake completes or fails | |
40 | * @ptr: address of hc register to be read | |
41 | * @mask: bits to look at in result of read | |
42 | * @done: value of those bits when handshake succeeds | |
43 | * @usec: timeout in microseconds | |
44 | * | |
45 | * Returns negative errno, or zero on success | |
46 | * | |
47 | * Success happens when the "mask" bits have the specified value (hardware | |
48 | * handshake done). There are two failure modes: "usec" have passed (major | |
49 | * hardware flakeout), or the register reads as all-ones (hardware removed). | |
50 | */ | |
51 | static int handshake(struct xhci_hcd *xhci, void __iomem *ptr, | |
52 | u32 mask, u32 done, int usec) | |
53 | { | |
54 | u32 result; | |
55 | ||
56 | do { | |
57 | result = xhci_readl(xhci, ptr); | |
58 | if (result == ~(u32)0) /* card removed */ | |
59 | return -ENODEV; | |
60 | result &= mask; | |
61 | if (result == done) | |
62 | return 0; | |
63 | udelay(1); | |
64 | usec--; | |
65 | } while (usec > 0); | |
66 | return -ETIMEDOUT; | |
67 | } | |
68 | ||
69 | /* | |
70 | * Force HC into halt state. | |
71 | * | |
72 | * Disable any IRQs and clear the run/stop bit. | |
73 | * HC will complete any current and actively pipelined transactions, and | |
74 | * should halt within 16 microframes of the run/stop bit being cleared. | |
75 | * Read HC Halted bit in the status register to see when the HC is finished. | |
76 | * XXX: shouldn't we set HC_STATE_HALT here somewhere? | |
77 | */ | |
78 | int xhci_halt(struct xhci_hcd *xhci) | |
79 | { | |
80 | u32 halted; | |
81 | u32 cmd; | |
82 | u32 mask; | |
83 | ||
84 | xhci_dbg(xhci, "// Halt the HC\n"); | |
85 | /* Disable all interrupts from the host controller */ | |
86 | mask = ~(XHCI_IRQS); | |
87 | halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT; | |
88 | if (!halted) | |
89 | mask &= ~CMD_RUN; | |
90 | ||
91 | cmd = xhci_readl(xhci, &xhci->op_regs->command); | |
92 | cmd &= mask; | |
93 | xhci_writel(xhci, cmd, &xhci->op_regs->command); | |
94 | ||
95 | return handshake(xhci, &xhci->op_regs->status, | |
96 | STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC); | |
97 | } | |
98 | ||
99 | /* | |
100 | * Reset a halted HC, and set the internal HC state to HC_STATE_HALT. | |
101 | * | |
102 | * This resets pipelines, timers, counters, state machines, etc. | |
103 | * Transactions will be terminated immediately, and operational registers | |
104 | * will be set to their defaults. | |
105 | */ | |
106 | int xhci_reset(struct xhci_hcd *xhci) | |
107 | { | |
108 | u32 command; | |
109 | u32 state; | |
110 | ||
111 | state = xhci_readl(xhci, &xhci->op_regs->status); | |
d3512f63 SS |
112 | if ((state & STS_HALT) == 0) { |
113 | xhci_warn(xhci, "Host controller not halted, aborting reset.\n"); | |
114 | return 0; | |
115 | } | |
66d4eadd SS |
116 | |
117 | xhci_dbg(xhci, "// Reset the HC\n"); | |
118 | command = xhci_readl(xhci, &xhci->op_regs->command); | |
119 | command |= CMD_RESET; | |
120 | xhci_writel(xhci, command, &xhci->op_regs->command); | |
121 | /* XXX: Why does EHCI set this here? Shouldn't other code do this? */ | |
122 | xhci_to_hcd(xhci)->state = HC_STATE_HALT; | |
123 | ||
124 | return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000); | |
125 | } | |
126 | ||
127 | /* | |
128 | * Stop the HC from processing the endpoint queues. | |
129 | */ | |
130 | static void xhci_quiesce(struct xhci_hcd *xhci) | |
131 | { | |
132 | /* | |
133 | * Queues are per endpoint, so we need to disable an endpoint or slot. | |
134 | * | |
135 | * To disable a slot, we need to insert a disable slot command on the | |
136 | * command ring and ring the doorbell. This will also free any internal | |
137 | * resources associated with the slot (which might not be what we want). | |
138 | * | |
139 | * A Release Endpoint command sounds better - doesn't free internal HC | |
140 | * memory, but removes the endpoints from the schedule and releases the | |
141 | * bandwidth, disables the doorbells, and clears the endpoint enable | |
142 | * flag. Usually used prior to a set interface command. | |
143 | * | |
144 | * TODO: Implement after command ring code is done. | |
145 | */ | |
146 | BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state)); | |
147 | xhci_dbg(xhci, "Finished quiescing -- code not written yet\n"); | |
148 | } | |
149 | ||
150 | #if 0 | |
151 | /* Set up MSI-X table for entry 0 (may claim other entries later) */ | |
152 | static int xhci_setup_msix(struct xhci_hcd *xhci) | |
153 | { | |
154 | int ret; | |
155 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); | |
156 | ||
157 | xhci->msix_count = 0; | |
158 | /* XXX: did I do this right? ixgbe does kcalloc for more than one */ | |
159 | xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL); | |
160 | if (!xhci->msix_entries) { | |
161 | xhci_err(xhci, "Failed to allocate MSI-X entries\n"); | |
162 | return -ENOMEM; | |
163 | } | |
164 | xhci->msix_entries[0].entry = 0; | |
165 | ||
166 | ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count); | |
167 | if (ret) { | |
168 | xhci_err(xhci, "Failed to enable MSI-X\n"); | |
169 | goto free_entries; | |
170 | } | |
171 | ||
172 | /* | |
173 | * Pass the xhci pointer value as the request_irq "cookie". | |
174 | * If more irqs are added, this will need to be unique for each one. | |
175 | */ | |
176 | ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0, | |
177 | "xHCI", xhci_to_hcd(xhci)); | |
178 | if (ret) { | |
179 | xhci_err(xhci, "Failed to allocate MSI-X interrupt\n"); | |
180 | goto disable_msix; | |
181 | } | |
182 | xhci_dbg(xhci, "Finished setting up MSI-X\n"); | |
183 | return 0; | |
184 | ||
185 | disable_msix: | |
186 | pci_disable_msix(pdev); | |
187 | free_entries: | |
188 | kfree(xhci->msix_entries); | |
189 | xhci->msix_entries = NULL; | |
190 | return ret; | |
191 | } | |
192 | ||
193 | /* XXX: code duplication; can xhci_setup_msix call this? */ | |
194 | /* Free any IRQs and disable MSI-X */ | |
195 | static void xhci_cleanup_msix(struct xhci_hcd *xhci) | |
196 | { | |
197 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); | |
198 | if (!xhci->msix_entries) | |
199 | return; | |
200 | ||
201 | free_irq(xhci->msix_entries[0].vector, xhci); | |
202 | pci_disable_msix(pdev); | |
203 | kfree(xhci->msix_entries); | |
204 | xhci->msix_entries = NULL; | |
205 | xhci_dbg(xhci, "Finished cleaning up MSI-X\n"); | |
206 | } | |
207 | #endif | |
208 | ||
209 | /* | |
210 | * Initialize memory for HCD and xHC (one-time init). | |
211 | * | |
212 | * Program the PAGESIZE register, initialize the device context array, create | |
213 | * device contexts (?), set up a command ring segment (or two?), create event | |
214 | * ring (one for now). | |
215 | */ | |
216 | int xhci_init(struct usb_hcd *hcd) | |
217 | { | |
218 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
219 | int retval = 0; | |
220 | ||
221 | xhci_dbg(xhci, "xhci_init\n"); | |
222 | spin_lock_init(&xhci->lock); | |
b0567b3f SS |
223 | if (link_quirk) { |
224 | xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n"); | |
225 | xhci->quirks |= XHCI_LINK_TRB_QUIRK; | |
226 | } else { | |
ac9d8fe7 | 227 | xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n"); |
b0567b3f | 228 | } |
66d4eadd SS |
229 | retval = xhci_mem_init(xhci, GFP_KERNEL); |
230 | xhci_dbg(xhci, "Finished xhci_init\n"); | |
231 | ||
232 | return retval; | |
233 | } | |
234 | ||
7f84eef0 SS |
235 | /* |
236 | * Called in interrupt context when there might be work | |
237 | * queued on the event ring | |
238 | * | |
239 | * xhci->lock must be held by caller. | |
240 | */ | |
241 | static void xhci_work(struct xhci_hcd *xhci) | |
242 | { | |
243 | u32 temp; | |
8e595a5d | 244 | u64 temp_64; |
7f84eef0 SS |
245 | |
246 | /* | |
247 | * Clear the op reg interrupt status first, | |
248 | * so we can receive interrupts from other MSI-X interrupters. | |
249 | * Write 1 to clear the interrupt status. | |
250 | */ | |
251 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
252 | temp |= STS_EINT; | |
253 | xhci_writel(xhci, temp, &xhci->op_regs->status); | |
254 | /* FIXME when MSI-X is supported and there are multiple vectors */ | |
255 | /* Clear the MSI-X event interrupt status */ | |
256 | ||
257 | /* Acknowledge the interrupt */ | |
258 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
259 | temp |= 0x3; | |
260 | xhci_writel(xhci, temp, &xhci->ir_set->irq_pending); | |
261 | /* Flush posted writes */ | |
262 | xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
263 | ||
264 | /* FIXME this should be a delayed service routine that clears the EHB */ | |
b7258a4a | 265 | xhci_handle_event(xhci); |
7f84eef0 | 266 | |
2d83109b | 267 | /* Clear the event handler busy flag (RW1C); the event ring should be empty. */ |
8e595a5d | 268 | temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
2d83109b | 269 | xhci_write_64(xhci, temp_64 | ERST_EHB, &xhci->ir_set->erst_dequeue); |
7f84eef0 SS |
270 | /* Flush posted writes -- FIXME is this necessary? */ |
271 | xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
272 | } | |
273 | ||
274 | /*-------------------------------------------------------------------------*/ | |
275 | ||
276 | /* | |
277 | * xHCI spec says we can get an interrupt, and if the HC has an error condition, | |
278 | * we might get bad data out of the event ring. Section 4.10.2.7 has a list of | |
279 | * indicators of an event TRB error, but we check the status *first* to be safe. | |
280 | */ | |
281 | irqreturn_t xhci_irq(struct usb_hcd *hcd) | |
282 | { | |
283 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
284 | u32 temp, temp2; | |
66e49d87 | 285 | union xhci_trb *trb; |
7f84eef0 SS |
286 | |
287 | spin_lock(&xhci->lock); | |
66e49d87 | 288 | trb = xhci->event_ring->dequeue; |
7f84eef0 SS |
289 | /* Check if the xHC generated the interrupt, or the irq is shared */ |
290 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
291 | temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
fcf8f576 SS |
292 | if (temp == 0xffffffff && temp2 == 0xffffffff) |
293 | goto hw_died; | |
294 | ||
7f84eef0 SS |
295 | if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) { |
296 | spin_unlock(&xhci->lock); | |
297 | return IRQ_NONE; | |
298 | } | |
66e49d87 SS |
299 | xhci_dbg(xhci, "op reg status = %08x\n", temp); |
300 | xhci_dbg(xhci, "ir set irq_pending = %08x\n", temp2); | |
301 | xhci_dbg(xhci, "Event ring dequeue ptr:\n"); | |
302 | xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n", | |
303 | (unsigned long long)xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb), | |
304 | lower_32_bits(trb->link.segment_ptr), | |
305 | upper_32_bits(trb->link.segment_ptr), | |
306 | (unsigned int) trb->link.intr_target, | |
307 | (unsigned int) trb->link.control); | |
7f84eef0 | 308 | |
7f84eef0 SS |
309 | if (temp & STS_FATAL) { |
310 | xhci_warn(xhci, "WARNING: Host System Error\n"); | |
311 | xhci_halt(xhci); | |
fcf8f576 | 312 | hw_died: |
7f84eef0 | 313 | xhci_to_hcd(xhci)->state = HC_STATE_HALT; |
c96a2b81 | 314 | spin_unlock(&xhci->lock); |
7f84eef0 SS |
315 | return -ESHUTDOWN; |
316 | } | |
317 | ||
318 | xhci_work(xhci); | |
319 | spin_unlock(&xhci->lock); | |
320 | ||
321 | return IRQ_HANDLED; | |
322 | } | |
323 | ||
324 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING | |
23e3be11 | 325 | void xhci_event_ring_work(unsigned long arg) |
7f84eef0 SS |
326 | { |
327 | unsigned long flags; | |
328 | int temp; | |
8e595a5d | 329 | u64 temp_64; |
7f84eef0 SS |
330 | struct xhci_hcd *xhci = (struct xhci_hcd *) arg; |
331 | int i, j; | |
332 | ||
333 | xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies); | |
334 | ||
335 | spin_lock_irqsave(&xhci->lock, flags); | |
336 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
337 | xhci_dbg(xhci, "op reg status = 0x%x\n", temp); | |
e4ab05df SS |
338 | if (temp == 0xffffffff) { |
339 | xhci_dbg(xhci, "HW died, polling stopped.\n"); | |
340 | spin_unlock_irqrestore(&xhci->lock, flags); | |
341 | return; | |
342 | } | |
343 | ||
7f84eef0 SS |
344 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
345 | xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp); | |
346 | xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled); | |
347 | xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask); | |
348 | xhci->error_bitmask = 0; | |
349 | xhci_dbg(xhci, "Event ring:\n"); | |
350 | xhci_debug_segment(xhci, xhci->event_ring->deq_seg); | |
351 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); | |
8e595a5d SS |
352 | temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
353 | temp_64 &= ~ERST_PTR_MASK; | |
354 | xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64); | |
7f84eef0 SS |
355 | xhci_dbg(xhci, "Command ring:\n"); |
356 | xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg); | |
357 | xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); | |
358 | xhci_dbg_cmd_ptrs(xhci); | |
3ffbba95 | 359 | for (i = 0; i < MAX_HC_SLOTS; ++i) { |
63a0d9ab SS |
360 | if (!xhci->devs[i]) |
361 | continue; | |
362 | for (j = 0; j < 31; ++j) { | |
363 | struct xhci_ring *ring = xhci->devs[i]->eps[j].ring; | |
364 | if (!ring) | |
365 | continue; | |
366 | xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j); | |
367 | xhci_debug_segment(xhci, ring->deq_seg); | |
3ffbba95 SS |
368 | } |
369 | } | |
7f84eef0 SS |
370 | |
371 | if (xhci->noops_submitted != NUM_TEST_NOOPS) | |
23e3be11 SS |
372 | if (xhci_setup_one_noop(xhci)) |
373 | xhci_ring_cmd_db(xhci); | |
7f84eef0 SS |
374 | spin_unlock_irqrestore(&xhci->lock, flags); |
375 | ||
376 | if (!xhci->zombie) | |
377 | mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ); | |
378 | else | |
379 | xhci_dbg(xhci, "Quit polling the event ring.\n"); | |
380 | } | |
381 | #endif | |
382 | ||
66d4eadd SS |
383 | /* |
384 | * Start the HC after it was halted. | |
385 | * | |
386 | * This function is called by the USB core when the HC driver is added. | |
387 | * Its opposite is xhci_stop(). | |
388 | * | |
389 | * xhci_init() must be called once before this function can be called. | |
390 | * Reset the HC, enable device slot contexts, program DCBAAP, and | |
391 | * set command ring pointer and event ring pointer. | |
392 | * | |
393 | * Setup MSI-X vectors and enable interrupts. | |
394 | */ | |
395 | int xhci_run(struct usb_hcd *hcd) | |
396 | { | |
397 | u32 temp; | |
8e595a5d | 398 | u64 temp_64; |
66d4eadd | 399 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
7f84eef0 | 400 | void (*doorbell)(struct xhci_hcd *) = NULL; |
66d4eadd | 401 | |
0f2a7930 SS |
402 | hcd->uses_new_polling = 1; |
403 | hcd->poll_rh = 0; | |
404 | ||
7f84eef0 | 405 | xhci_dbg(xhci, "xhci_run\n"); |
66d4eadd SS |
406 | #if 0 /* FIXME: MSI not setup yet */ |
407 | /* Do this at the very last minute */ | |
408 | ret = xhci_setup_msix(xhci); | |
409 | if (!ret) | |
410 | return ret; | |
411 | ||
412 | return -ENOSYS; | |
413 | #endif | |
7f84eef0 SS |
414 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
415 | init_timer(&xhci->event_ring_timer); | |
416 | xhci->event_ring_timer.data = (unsigned long) xhci; | |
23e3be11 | 417 | xhci->event_ring_timer.function = xhci_event_ring_work; |
7f84eef0 SS |
418 | /* Poll the event ring */ |
419 | xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ; | |
420 | xhci->zombie = 0; | |
421 | xhci_dbg(xhci, "Setting event ring polling timer\n"); | |
422 | add_timer(&xhci->event_ring_timer); | |
423 | #endif | |
424 | ||
66e49d87 SS |
425 | xhci_dbg(xhci, "Command ring memory map follows:\n"); |
426 | xhci_debug_ring(xhci, xhci->cmd_ring); | |
427 | xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); | |
428 | xhci_dbg_cmd_ptrs(xhci); | |
429 | ||
430 | xhci_dbg(xhci, "ERST memory map follows:\n"); | |
431 | xhci_dbg_erst(xhci, &xhci->erst); | |
432 | xhci_dbg(xhci, "Event ring:\n"); | |
433 | xhci_debug_ring(xhci, xhci->event_ring); | |
434 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); | |
435 | temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); | |
436 | temp_64 &= ~ERST_PTR_MASK; | |
437 | xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64); | |
438 | ||
66d4eadd SS |
439 | xhci_dbg(xhci, "// Set the interrupt modulation register\n"); |
440 | temp = xhci_readl(xhci, &xhci->ir_set->irq_control); | |
a4d88302 | 441 | temp &= ~ER_IRQ_INTERVAL_MASK; |
66d4eadd SS |
442 | temp |= (u32) 160; |
443 | xhci_writel(xhci, temp, &xhci->ir_set->irq_control); | |
444 | ||
445 | /* Set the HCD state before we enable the irqs */ | |
446 | hcd->state = HC_STATE_RUNNING; | |
447 | temp = xhci_readl(xhci, &xhci->op_regs->command); | |
448 | temp |= (CMD_EIE); | |
449 | xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n", | |
450 | temp); | |
451 | xhci_writel(xhci, temp, &xhci->op_regs->command); | |
452 | ||
453 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
700e2052 GKH |
454 | xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n", |
455 | xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); | |
66d4eadd SS |
456 | xhci_writel(xhci, ER_IRQ_ENABLE(temp), |
457 | &xhci->ir_set->irq_pending); | |
458 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | |
459 | ||
7f84eef0 | 460 | if (NUM_TEST_NOOPS > 0) |
23e3be11 | 461 | doorbell = xhci_setup_one_noop(xhci); |
7f84eef0 | 462 | |
66d4eadd SS |
463 | temp = xhci_readl(xhci, &xhci->op_regs->command); |
464 | temp |= (CMD_RUN); | |
465 | xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n", | |
466 | temp); | |
467 | xhci_writel(xhci, temp, &xhci->op_regs->command); | |
468 | /* Flush PCI posted writes */ | |
469 | temp = xhci_readl(xhci, &xhci->op_regs->command); | |
700e2052 | 470 | xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp); |
7f84eef0 SS |
471 | if (doorbell) |
472 | (*doorbell)(xhci); | |
66d4eadd SS |
473 | |
474 | xhci_dbg(xhci, "Finished xhci_run\n"); | |
475 | return 0; | |
476 | } | |
477 | ||
478 | /* | |
479 | * Stop xHCI driver. | |
480 | * | |
481 | * This function is called by the USB core when the HC driver is removed. | |
482 | * Its opposite is xhci_run(). | |
483 | * | |
484 | * Disable device contexts, disable IRQs, and quiesce the HC. | |
485 | * Reset the HC, finish any completed transactions, and cleanup memory. | |
486 | */ | |
487 | void xhci_stop(struct usb_hcd *hcd) | |
488 | { | |
489 | u32 temp; | |
490 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
491 | ||
492 | spin_lock_irq(&xhci->lock); | |
493 | if (HC_IS_RUNNING(hcd->state)) | |
494 | xhci_quiesce(xhci); | |
495 | xhci_halt(xhci); | |
496 | xhci_reset(xhci); | |
497 | spin_unlock_irq(&xhci->lock); | |
498 | ||
499 | #if 0 /* No MSI yet */ | |
500 | xhci_cleanup_msix(xhci); | |
501 | #endif | |
7f84eef0 SS |
502 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
503 | /* Tell the event ring poll function not to reschedule */ | |
504 | xhci->zombie = 1; | |
505 | del_timer_sync(&xhci->event_ring_timer); | |
506 | #endif | |
507 | ||
66d4eadd SS |
508 | xhci_dbg(xhci, "// Disabling event ring interrupts\n"); |
509 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
510 | xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status); | |
511 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
512 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), | |
513 | &xhci->ir_set->irq_pending); | |
514 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | |
515 | ||
516 | xhci_dbg(xhci, "cleaning up memory\n"); | |
517 | xhci_mem_cleanup(xhci); | |
518 | xhci_dbg(xhci, "xhci_stop completed - status = %x\n", | |
519 | xhci_readl(xhci, &xhci->op_regs->status)); | |
520 | } | |
521 | ||
522 | /* | |
523 | * Shutdown HC (not bus-specific) | |
524 | * | |
525 | * This is called when the machine is rebooting or halting. We assume that the | |
526 | * machine will be powered off, and the HC's internal state will be reset. | |
527 | * Don't bother to free memory. | |
528 | */ | |
529 | void xhci_shutdown(struct usb_hcd *hcd) | |
530 | { | |
531 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
532 | ||
533 | spin_lock_irq(&xhci->lock); | |
534 | xhci_halt(xhci); | |
535 | spin_unlock_irq(&xhci->lock); | |
536 | ||
537 | #if 0 | |
538 | xhci_cleanup_msix(xhci); | |
539 | #endif | |
540 | ||
541 | xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n", | |
542 | xhci_readl(xhci, &xhci->op_regs->status)); | |
543 | } | |
544 | ||
7f84eef0 SS |
545 | /*-------------------------------------------------------------------------*/ |
546 | ||
d0e96f5a SS |
547 | /** |
548 | * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and | |
549 | * HCDs. Find the index for an endpoint given its descriptor. Use the return | |
550 | * value to right shift 1 for the bitmask. | |
551 | * | |
552 | * Index = (epnum * 2) + direction - 1, | |
553 | * where direction = 0 for OUT, 1 for IN. | |
554 | * For control endpoints, the IN index is used (OUT index is unused), so | |
555 | * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2) | |
556 | */ | |
557 | unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc) | |
558 | { | |
559 | unsigned int index; | |
560 | if (usb_endpoint_xfer_control(desc)) | |
561 | index = (unsigned int) (usb_endpoint_num(desc)*2); | |
562 | else | |
563 | index = (unsigned int) (usb_endpoint_num(desc)*2) + | |
564 | (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; | |
565 | return index; | |
566 | } | |
567 | ||
f94e0186 SS |
568 | /* Find the flag for this endpoint (for use in the control context). Use the |
569 | * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is | |
570 | * bit 1, etc. | |
571 | */ | |
572 | unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc) | |
573 | { | |
574 | return 1 << (xhci_get_endpoint_index(desc) + 1); | |
575 | } | |
576 | ||
ac9d8fe7 SS |
577 | /* Find the flag for this endpoint (for use in the control context). Use the |
578 | * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is | |
579 | * bit 1, etc. | |
580 | */ | |
581 | unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index) | |
582 | { | |
583 | return 1 << (ep_index + 1); | |
584 | } | |
585 | ||
f94e0186 SS |
586 | /* Compute the last valid endpoint context index. Basically, this is the |
587 | * endpoint index plus one. For slot contexts with more than valid endpoint, | |
588 | * we find the most significant bit set in the added contexts flags. | |
589 | * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000 | |
590 | * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one. | |
591 | */ | |
ac9d8fe7 | 592 | unsigned int xhci_last_valid_endpoint(u32 added_ctxs) |
f94e0186 SS |
593 | { |
594 | return fls(added_ctxs) - 1; | |
595 | } | |
596 | ||
d0e96f5a SS |
597 | /* Returns 1 if the arguments are OK; |
598 | * returns 0 this is a root hub; returns -EINVAL for NULL pointers. | |
599 | */ | |
600 | int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev, | |
601 | struct usb_host_endpoint *ep, int check_ep, const char *func) { | |
602 | if (!hcd || (check_ep && !ep) || !udev) { | |
603 | printk(KERN_DEBUG "xHCI %s called with invalid args\n", | |
604 | func); | |
605 | return -EINVAL; | |
606 | } | |
607 | if (!udev->parent) { | |
608 | printk(KERN_DEBUG "xHCI %s called for root hub\n", | |
609 | func); | |
610 | return 0; | |
611 | } | |
612 | if (!udev->slot_id) { | |
613 | printk(KERN_DEBUG "xHCI %s called with unaddressed device\n", | |
614 | func); | |
615 | return -EINVAL; | |
616 | } | |
617 | return 1; | |
618 | } | |
619 | ||
2d3f1fac | 620 | static int xhci_configure_endpoint(struct xhci_hcd *xhci, |
913a8a34 SS |
621 | struct usb_device *udev, struct xhci_command *command, |
622 | bool ctx_change, bool must_succeed); | |
2d3f1fac SS |
623 | |
624 | /* | |
625 | * Full speed devices may have a max packet size greater than 8 bytes, but the | |
626 | * USB core doesn't know that until it reads the first 8 bytes of the | |
627 | * descriptor. If the usb_device's max packet size changes after that point, | |
628 | * we need to issue an evaluate context command and wait on it. | |
629 | */ | |
630 | static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id, | |
631 | unsigned int ep_index, struct urb *urb) | |
632 | { | |
633 | struct xhci_container_ctx *in_ctx; | |
634 | struct xhci_container_ctx *out_ctx; | |
635 | struct xhci_input_control_ctx *ctrl_ctx; | |
636 | struct xhci_ep_ctx *ep_ctx; | |
637 | int max_packet_size; | |
638 | int hw_max_packet_size; | |
639 | int ret = 0; | |
640 | ||
641 | out_ctx = xhci->devs[slot_id]->out_ctx; | |
642 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); | |
643 | hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2); | |
644 | max_packet_size = urb->dev->ep0.desc.wMaxPacketSize; | |
645 | if (hw_max_packet_size != max_packet_size) { | |
646 | xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n"); | |
647 | xhci_dbg(xhci, "Max packet size in usb_device = %d\n", | |
648 | max_packet_size); | |
649 | xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n", | |
650 | hw_max_packet_size); | |
651 | xhci_dbg(xhci, "Issuing evaluate context command.\n"); | |
652 | ||
653 | /* Set up the modified control endpoint 0 */ | |
913a8a34 SS |
654 | xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, |
655 | xhci->devs[slot_id]->out_ctx, ep_index); | |
2d3f1fac SS |
656 | in_ctx = xhci->devs[slot_id]->in_ctx; |
657 | ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); | |
658 | ep_ctx->ep_info2 &= ~MAX_PACKET_MASK; | |
659 | ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size); | |
660 | ||
661 | /* Set up the input context flags for the command */ | |
662 | /* FIXME: This won't work if a non-default control endpoint | |
663 | * changes max packet sizes. | |
664 | */ | |
665 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); | |
666 | ctrl_ctx->add_flags = EP0_FLAG; | |
667 | ctrl_ctx->drop_flags = 0; | |
668 | ||
669 | xhci_dbg(xhci, "Slot %d input context\n", slot_id); | |
670 | xhci_dbg_ctx(xhci, in_ctx, ep_index); | |
671 | xhci_dbg(xhci, "Slot %d output context\n", slot_id); | |
672 | xhci_dbg_ctx(xhci, out_ctx, ep_index); | |
673 | ||
913a8a34 SS |
674 | ret = xhci_configure_endpoint(xhci, urb->dev, NULL, |
675 | true, false); | |
2d3f1fac SS |
676 | |
677 | /* Clean up the input context for later use by bandwidth | |
678 | * functions. | |
679 | */ | |
680 | ctrl_ctx->add_flags = SLOT_FLAG; | |
681 | } | |
682 | return ret; | |
683 | } | |
684 | ||
d0e96f5a SS |
685 | /* |
686 | * non-error returns are a promise to giveback() the urb later | |
687 | * we drop ownership so next owner (or urb unlink) can get it | |
688 | */ | |
689 | int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) | |
690 | { | |
691 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
692 | unsigned long flags; | |
693 | int ret = 0; | |
694 | unsigned int slot_id, ep_index; | |
695 | ||
2d3f1fac | 696 | |
d0e96f5a SS |
697 | if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0) |
698 | return -EINVAL; | |
699 | ||
700 | slot_id = urb->dev->slot_id; | |
701 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); | |
d0e96f5a | 702 | |
d0e96f5a SS |
703 | if (!xhci->devs || !xhci->devs[slot_id]) { |
704 | if (!in_interrupt()) | |
705 | dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n"); | |
c7959fb2 SS |
706 | ret = -EINVAL; |
707 | goto exit; | |
d0e96f5a SS |
708 | } |
709 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { | |
710 | if (!in_interrupt()) | |
711 | xhci_dbg(xhci, "urb submitted during PCI suspend\n"); | |
712 | ret = -ESHUTDOWN; | |
713 | goto exit; | |
714 | } | |
2d3f1fac SS |
715 | if (usb_endpoint_xfer_control(&urb->ep->desc)) { |
716 | /* Check to see if the max packet size for the default control | |
717 | * endpoint changed during FS device enumeration | |
718 | */ | |
719 | if (urb->dev->speed == USB_SPEED_FULL) { | |
720 | ret = xhci_check_maxpacket(xhci, slot_id, | |
721 | ep_index, urb); | |
722 | if (ret < 0) | |
723 | return ret; | |
724 | } | |
725 | ||
b11069f5 SS |
726 | /* We have a spinlock and interrupts disabled, so we must pass |
727 | * atomic context to this function, which may allocate memory. | |
728 | */ | |
2d3f1fac | 729 | spin_lock_irqsave(&xhci->lock, flags); |
b11069f5 | 730 | ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb, |
23e3be11 | 731 | slot_id, ep_index); |
2d3f1fac SS |
732 | spin_unlock_irqrestore(&xhci->lock, flags); |
733 | } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) { | |
734 | spin_lock_irqsave(&xhci->lock, flags); | |
b11069f5 | 735 | ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb, |
23e3be11 | 736 | slot_id, ep_index); |
2d3f1fac | 737 | spin_unlock_irqrestore(&xhci->lock, flags); |
624defa1 SS |
738 | } else if (usb_endpoint_xfer_int(&urb->ep->desc)) { |
739 | spin_lock_irqsave(&xhci->lock, flags); | |
740 | ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb, | |
741 | slot_id, ep_index); | |
742 | spin_unlock_irqrestore(&xhci->lock, flags); | |
2d3f1fac | 743 | } else { |
b10de142 | 744 | ret = -EINVAL; |
2d3f1fac | 745 | } |
d0e96f5a | 746 | exit: |
d0e96f5a SS |
747 | return ret; |
748 | } | |
749 | ||
ae636747 SS |
750 | /* |
751 | * Remove the URB's TD from the endpoint ring. This may cause the HC to stop | |
752 | * USB transfers, potentially stopping in the middle of a TRB buffer. The HC | |
753 | * should pick up where it left off in the TD, unless a Set Transfer Ring | |
754 | * Dequeue Pointer is issued. | |
755 | * | |
756 | * The TRBs that make up the buffers for the canceled URB will be "removed" from | |
757 | * the ring. Since the ring is a contiguous structure, they can't be physically | |
758 | * removed. Instead, there are two options: | |
759 | * | |
760 | * 1) If the HC is in the middle of processing the URB to be canceled, we | |
761 | * simply move the ring's dequeue pointer past those TRBs using the Set | |
762 | * Transfer Ring Dequeue Pointer command. This will be the common case, | |
763 | * when drivers timeout on the last submitted URB and attempt to cancel. | |
764 | * | |
765 | * 2) If the HC is in the middle of a different TD, we turn the TRBs into a | |
766 | * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The | |
767 | * HC will need to invalidate the any TRBs it has cached after the stop | |
768 | * endpoint command, as noted in the xHCI 0.95 errata. | |
769 | * | |
770 | * 3) The TD may have completed by the time the Stop Endpoint Command | |
771 | * completes, so software needs to handle that case too. | |
772 | * | |
773 | * This function should protect against the TD enqueueing code ringing the | |
774 | * doorbell while this code is waiting for a Stop Endpoint command to complete. | |
775 | * It also needs to account for multiple cancellations on happening at the same | |
776 | * time for the same endpoint. | |
777 | * | |
778 | * Note that this function can be called in any context, or so says | |
779 | * usb_hcd_unlink_urb() | |
d0e96f5a SS |
780 | */ |
781 | int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) | |
782 | { | |
ae636747 SS |
783 | unsigned long flags; |
784 | int ret; | |
e34b2fbf | 785 | u32 temp; |
ae636747 SS |
786 | struct xhci_hcd *xhci; |
787 | struct xhci_td *td; | |
788 | unsigned int ep_index; | |
789 | struct xhci_ring *ep_ring; | |
63a0d9ab | 790 | struct xhci_virt_ep *ep; |
ae636747 SS |
791 | |
792 | xhci = hcd_to_xhci(hcd); | |
793 | spin_lock_irqsave(&xhci->lock, flags); | |
794 | /* Make sure the URB hasn't completed or been unlinked already */ | |
795 | ret = usb_hcd_check_unlink_urb(hcd, urb, status); | |
796 | if (ret || !urb->hcpriv) | |
797 | goto done; | |
e34b2fbf SS |
798 | temp = xhci_readl(xhci, &xhci->op_regs->status); |
799 | if (temp == 0xffffffff) { | |
800 | xhci_dbg(xhci, "HW died, freeing TD.\n"); | |
801 | td = (struct xhci_td *) urb->hcpriv; | |
802 | ||
803 | usb_hcd_unlink_urb_from_ep(hcd, urb); | |
804 | spin_unlock_irqrestore(&xhci->lock, flags); | |
805 | usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, -ESHUTDOWN); | |
806 | kfree(td); | |
807 | return ret; | |
808 | } | |
ae636747 | 809 | |
700e2052 | 810 | xhci_dbg(xhci, "Cancel URB %p\n", urb); |
66e49d87 SS |
811 | xhci_dbg(xhci, "Event ring:\n"); |
812 | xhci_debug_ring(xhci, xhci->event_ring); | |
ae636747 | 813 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
63a0d9ab SS |
814 | ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index]; |
815 | ep_ring = ep->ring; | |
66e49d87 SS |
816 | xhci_dbg(xhci, "Endpoint ring:\n"); |
817 | xhci_debug_ring(xhci, ep_ring); | |
ae636747 SS |
818 | td = (struct xhci_td *) urb->hcpriv; |
819 | ||
63a0d9ab SS |
820 | ep->cancels_pending++; |
821 | list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list); | |
ae636747 SS |
822 | /* Queue a stop endpoint command, but only if this is |
823 | * the first cancellation to be handled. | |
824 | */ | |
63a0d9ab | 825 | if (ep->cancels_pending == 1) { |
23e3be11 SS |
826 | xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index); |
827 | xhci_ring_cmd_db(xhci); | |
ae636747 SS |
828 | } |
829 | done: | |
830 | spin_unlock_irqrestore(&xhci->lock, flags); | |
831 | return ret; | |
d0e96f5a SS |
832 | } |
833 | ||
f94e0186 SS |
834 | /* Drop an endpoint from a new bandwidth configuration for this device. |
835 | * Only one call to this function is allowed per endpoint before | |
836 | * check_bandwidth() or reset_bandwidth() must be called. | |
837 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will | |
838 | * add the endpoint to the schedule with possibly new parameters denoted by a | |
839 | * different endpoint descriptor in usb_host_endpoint. | |
840 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is | |
841 | * not allowed. | |
f88ba78d SS |
842 | * |
843 | * The USB core will not allow URBs to be queued to an endpoint that is being | |
844 | * disabled, so there's no need for mutual exclusion to protect | |
845 | * the xhci->devs[slot_id] structure. | |
f94e0186 SS |
846 | */ |
847 | int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |
848 | struct usb_host_endpoint *ep) | |
849 | { | |
f94e0186 | 850 | struct xhci_hcd *xhci; |
d115b048 JY |
851 | struct xhci_container_ctx *in_ctx, *out_ctx; |
852 | struct xhci_input_control_ctx *ctrl_ctx; | |
853 | struct xhci_slot_ctx *slot_ctx; | |
f94e0186 SS |
854 | unsigned int last_ctx; |
855 | unsigned int ep_index; | |
856 | struct xhci_ep_ctx *ep_ctx; | |
857 | u32 drop_flag; | |
858 | u32 new_add_flags, new_drop_flags, new_slot_info; | |
859 | int ret; | |
860 | ||
861 | ret = xhci_check_args(hcd, udev, ep, 1, __func__); | |
f94e0186 SS |
862 | if (ret <= 0) |
863 | return ret; | |
864 | xhci = hcd_to_xhci(hcd); | |
700e2052 | 865 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
f94e0186 SS |
866 | |
867 | drop_flag = xhci_get_endpoint_flag(&ep->desc); | |
868 | if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) { | |
869 | xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", | |
870 | __func__, drop_flag); | |
871 | return 0; | |
872 | } | |
873 | ||
f94e0186 SS |
874 | if (!xhci->devs || !xhci->devs[udev->slot_id]) { |
875 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
876 | __func__); | |
f94e0186 SS |
877 | return -EINVAL; |
878 | } | |
879 | ||
880 | in_ctx = xhci->devs[udev->slot_id]->in_ctx; | |
d115b048 JY |
881 | out_ctx = xhci->devs[udev->slot_id]->out_ctx; |
882 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); | |
f94e0186 | 883 | ep_index = xhci_get_endpoint_index(&ep->desc); |
d115b048 | 884 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
f94e0186 SS |
885 | /* If the HC already knows the endpoint is disabled, |
886 | * or the HCD has noted it is disabled, ignore this request | |
887 | */ | |
888 | if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED || | |
d115b048 | 889 | ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) { |
700e2052 GKH |
890 | xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", |
891 | __func__, ep); | |
f94e0186 SS |
892 | return 0; |
893 | } | |
894 | ||
d115b048 JY |
895 | ctrl_ctx->drop_flags |= drop_flag; |
896 | new_drop_flags = ctrl_ctx->drop_flags; | |
f94e0186 | 897 | |
d115b048 JY |
898 | ctrl_ctx->add_flags = ~drop_flag; |
899 | new_add_flags = ctrl_ctx->add_flags; | |
f94e0186 | 900 | |
d115b048 JY |
901 | last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags); |
902 | slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); | |
f94e0186 | 903 | /* Update the last valid endpoint context, if we deleted the last one */ |
d115b048 JY |
904 | if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) { |
905 | slot_ctx->dev_info &= ~LAST_CTX_MASK; | |
906 | slot_ctx->dev_info |= LAST_CTX(last_ctx); | |
f94e0186 | 907 | } |
d115b048 | 908 | new_slot_info = slot_ctx->dev_info; |
f94e0186 SS |
909 | |
910 | xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); | |
911 | ||
f94e0186 SS |
912 | xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n", |
913 | (unsigned int) ep->desc.bEndpointAddress, | |
914 | udev->slot_id, | |
915 | (unsigned int) new_drop_flags, | |
916 | (unsigned int) new_add_flags, | |
917 | (unsigned int) new_slot_info); | |
918 | return 0; | |
919 | } | |
920 | ||
921 | /* Add an endpoint to a new possible bandwidth configuration for this device. | |
922 | * Only one call to this function is allowed per endpoint before | |
923 | * check_bandwidth() or reset_bandwidth() must be called. | |
924 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will | |
925 | * add the endpoint to the schedule with possibly new parameters denoted by a | |
926 | * different endpoint descriptor in usb_host_endpoint. | |
927 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is | |
928 | * not allowed. | |
f88ba78d SS |
929 | * |
930 | * The USB core will not allow URBs to be queued to an endpoint until the | |
931 | * configuration or alt setting is installed in the device, so there's no need | |
932 | * for mutual exclusion to protect the xhci->devs[slot_id] structure. | |
f94e0186 SS |
933 | */ |
934 | int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |
935 | struct usb_host_endpoint *ep) | |
936 | { | |
f94e0186 | 937 | struct xhci_hcd *xhci; |
d115b048 | 938 | struct xhci_container_ctx *in_ctx, *out_ctx; |
f94e0186 SS |
939 | unsigned int ep_index; |
940 | struct xhci_ep_ctx *ep_ctx; | |
d115b048 JY |
941 | struct xhci_slot_ctx *slot_ctx; |
942 | struct xhci_input_control_ctx *ctrl_ctx; | |
f94e0186 SS |
943 | u32 added_ctxs; |
944 | unsigned int last_ctx; | |
945 | u32 new_add_flags, new_drop_flags, new_slot_info; | |
946 | int ret = 0; | |
947 | ||
948 | ret = xhci_check_args(hcd, udev, ep, 1, __func__); | |
a1587d97 SS |
949 | if (ret <= 0) { |
950 | /* So we won't queue a reset ep command for a root hub */ | |
951 | ep->hcpriv = NULL; | |
f94e0186 | 952 | return ret; |
a1587d97 | 953 | } |
f94e0186 SS |
954 | xhci = hcd_to_xhci(hcd); |
955 | ||
956 | added_ctxs = xhci_get_endpoint_flag(&ep->desc); | |
957 | last_ctx = xhci_last_valid_endpoint(added_ctxs); | |
958 | if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) { | |
959 | /* FIXME when we have to issue an evaluate endpoint command to | |
960 | * deal with ep0 max packet size changing once we get the | |
961 | * descriptors | |
962 | */ | |
963 | xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", | |
964 | __func__, added_ctxs); | |
965 | return 0; | |
966 | } | |
967 | ||
f94e0186 SS |
968 | if (!xhci->devs || !xhci->devs[udev->slot_id]) { |
969 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
970 | __func__); | |
f94e0186 SS |
971 | return -EINVAL; |
972 | } | |
973 | ||
974 | in_ctx = xhci->devs[udev->slot_id]->in_ctx; | |
d115b048 JY |
975 | out_ctx = xhci->devs[udev->slot_id]->out_ctx; |
976 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); | |
f94e0186 | 977 | ep_index = xhci_get_endpoint_index(&ep->desc); |
d115b048 | 978 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
f94e0186 SS |
979 | /* If the HCD has already noted the endpoint is enabled, |
980 | * ignore this request. | |
981 | */ | |
d115b048 | 982 | if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) { |
700e2052 GKH |
983 | xhci_warn(xhci, "xHCI %s called with enabled ep %p\n", |
984 | __func__, ep); | |
f94e0186 SS |
985 | return 0; |
986 | } | |
987 | ||
f88ba78d SS |
988 | /* |
989 | * Configuration and alternate setting changes must be done in | |
990 | * process context, not interrupt context (or so documenation | |
991 | * for usb_set_interface() and usb_set_configuration() claim). | |
992 | */ | |
993 | if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id], | |
994 | udev, ep, GFP_KERNEL) < 0) { | |
f94e0186 SS |
995 | dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", |
996 | __func__, ep->desc.bEndpointAddress); | |
f94e0186 SS |
997 | return -ENOMEM; |
998 | } | |
999 | ||
d115b048 JY |
1000 | ctrl_ctx->add_flags |= added_ctxs; |
1001 | new_add_flags = ctrl_ctx->add_flags; | |
f94e0186 SS |
1002 | |
1003 | /* If xhci_endpoint_disable() was called for this endpoint, but the | |
1004 | * xHC hasn't been notified yet through the check_bandwidth() call, | |
1005 | * this re-adds a new state for the endpoint from the new endpoint | |
1006 | * descriptors. We must drop and re-add this endpoint, so we leave the | |
1007 | * drop flags alone. | |
1008 | */ | |
d115b048 | 1009 | new_drop_flags = ctrl_ctx->drop_flags; |
f94e0186 | 1010 | |
d115b048 | 1011 | slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); |
f94e0186 | 1012 | /* Update the last valid endpoint context, if we just added one past */ |
d115b048 JY |
1013 | if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) { |
1014 | slot_ctx->dev_info &= ~LAST_CTX_MASK; | |
1015 | slot_ctx->dev_info |= LAST_CTX(last_ctx); | |
f94e0186 | 1016 | } |
d115b048 | 1017 | new_slot_info = slot_ctx->dev_info; |
f94e0186 | 1018 | |
a1587d97 SS |
1019 | /* Store the usb_device pointer for later use */ |
1020 | ep->hcpriv = udev; | |
1021 | ||
f94e0186 SS |
1022 | xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n", |
1023 | (unsigned int) ep->desc.bEndpointAddress, | |
1024 | udev->slot_id, | |
1025 | (unsigned int) new_drop_flags, | |
1026 | (unsigned int) new_add_flags, | |
1027 | (unsigned int) new_slot_info); | |
1028 | return 0; | |
1029 | } | |
1030 | ||
d115b048 | 1031 | static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev) |
f94e0186 | 1032 | { |
d115b048 | 1033 | struct xhci_input_control_ctx *ctrl_ctx; |
f94e0186 | 1034 | struct xhci_ep_ctx *ep_ctx; |
d115b048 | 1035 | struct xhci_slot_ctx *slot_ctx; |
f94e0186 SS |
1036 | int i; |
1037 | ||
1038 | /* When a device's add flag and drop flag are zero, any subsequent | |
1039 | * configure endpoint command will leave that endpoint's state | |
1040 | * untouched. Make sure we don't leave any old state in the input | |
1041 | * endpoint contexts. | |
1042 | */ | |
d115b048 JY |
1043 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); |
1044 | ctrl_ctx->drop_flags = 0; | |
1045 | ctrl_ctx->add_flags = 0; | |
1046 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); | |
1047 | slot_ctx->dev_info &= ~LAST_CTX_MASK; | |
f94e0186 | 1048 | /* Endpoint 0 is always valid */ |
d115b048 | 1049 | slot_ctx->dev_info |= LAST_CTX(1); |
f94e0186 | 1050 | for (i = 1; i < 31; ++i) { |
d115b048 | 1051 | ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); |
f94e0186 SS |
1052 | ep_ctx->ep_info = 0; |
1053 | ep_ctx->ep_info2 = 0; | |
8e595a5d | 1054 | ep_ctx->deq = 0; |
f94e0186 SS |
1055 | ep_ctx->tx_info = 0; |
1056 | } | |
1057 | } | |
1058 | ||
f2217e8e | 1059 | static int xhci_configure_endpoint_result(struct xhci_hcd *xhci, |
913a8a34 | 1060 | struct usb_device *udev, int *cmd_status) |
f2217e8e SS |
1061 | { |
1062 | int ret; | |
1063 | ||
913a8a34 | 1064 | switch (*cmd_status) { |
f2217e8e SS |
1065 | case COMP_ENOMEM: |
1066 | dev_warn(&udev->dev, "Not enough host controller resources " | |
1067 | "for new device state.\n"); | |
1068 | ret = -ENOMEM; | |
1069 | /* FIXME: can we allocate more resources for the HC? */ | |
1070 | break; | |
1071 | case COMP_BW_ERR: | |
1072 | dev_warn(&udev->dev, "Not enough bandwidth " | |
1073 | "for new device state.\n"); | |
1074 | ret = -ENOSPC; | |
1075 | /* FIXME: can we go back to the old state? */ | |
1076 | break; | |
1077 | case COMP_TRB_ERR: | |
1078 | /* the HCD set up something wrong */ | |
1079 | dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " | |
1080 | "add flag = 1, " | |
1081 | "and endpoint is not disabled.\n"); | |
1082 | ret = -EINVAL; | |
1083 | break; | |
1084 | case COMP_SUCCESS: | |
1085 | dev_dbg(&udev->dev, "Successful Endpoint Configure command\n"); | |
1086 | ret = 0; | |
1087 | break; | |
1088 | default: | |
1089 | xhci_err(xhci, "ERROR: unexpected command completion " | |
913a8a34 | 1090 | "code 0x%x.\n", *cmd_status); |
f2217e8e SS |
1091 | ret = -EINVAL; |
1092 | break; | |
1093 | } | |
1094 | return ret; | |
1095 | } | |
1096 | ||
1097 | static int xhci_evaluate_context_result(struct xhci_hcd *xhci, | |
913a8a34 | 1098 | struct usb_device *udev, int *cmd_status) |
f2217e8e SS |
1099 | { |
1100 | int ret; | |
913a8a34 | 1101 | struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id]; |
f2217e8e | 1102 | |
913a8a34 | 1103 | switch (*cmd_status) { |
f2217e8e SS |
1104 | case COMP_EINVAL: |
1105 | dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate " | |
1106 | "context command.\n"); | |
1107 | ret = -EINVAL; | |
1108 | break; | |
1109 | case COMP_EBADSLT: | |
1110 | dev_warn(&udev->dev, "WARN: slot not enabled for" | |
1111 | "evaluate context command.\n"); | |
1112 | case COMP_CTX_STATE: | |
1113 | dev_warn(&udev->dev, "WARN: invalid context state for " | |
1114 | "evaluate context command.\n"); | |
1115 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1); | |
1116 | ret = -EINVAL; | |
1117 | break; | |
1118 | case COMP_SUCCESS: | |
1119 | dev_dbg(&udev->dev, "Successful evaluate context command\n"); | |
1120 | ret = 0; | |
1121 | break; | |
1122 | default: | |
1123 | xhci_err(xhci, "ERROR: unexpected command completion " | |
913a8a34 | 1124 | "code 0x%x.\n", *cmd_status); |
f2217e8e SS |
1125 | ret = -EINVAL; |
1126 | break; | |
1127 | } | |
1128 | return ret; | |
1129 | } | |
1130 | ||
1131 | /* Issue a configure endpoint command or evaluate context command | |
1132 | * and wait for it to finish. | |
1133 | */ | |
1134 | static int xhci_configure_endpoint(struct xhci_hcd *xhci, | |
913a8a34 SS |
1135 | struct usb_device *udev, |
1136 | struct xhci_command *command, | |
1137 | bool ctx_change, bool must_succeed) | |
f2217e8e SS |
1138 | { |
1139 | int ret; | |
1140 | int timeleft; | |
1141 | unsigned long flags; | |
913a8a34 SS |
1142 | struct xhci_container_ctx *in_ctx; |
1143 | struct completion *cmd_completion; | |
1144 | int *cmd_status; | |
1145 | struct xhci_virt_device *virt_dev; | |
f2217e8e SS |
1146 | |
1147 | spin_lock_irqsave(&xhci->lock, flags); | |
913a8a34 SS |
1148 | virt_dev = xhci->devs[udev->slot_id]; |
1149 | if (command) { | |
1150 | in_ctx = command->in_ctx; | |
1151 | cmd_completion = command->completion; | |
1152 | cmd_status = &command->status; | |
1153 | command->command_trb = xhci->cmd_ring->enqueue; | |
1154 | list_add_tail(&command->cmd_list, &virt_dev->cmd_list); | |
1155 | } else { | |
1156 | in_ctx = virt_dev->in_ctx; | |
1157 | cmd_completion = &virt_dev->cmd_completion; | |
1158 | cmd_status = &virt_dev->cmd_status; | |
1159 | } | |
1160 | ||
f2217e8e | 1161 | if (!ctx_change) |
913a8a34 SS |
1162 | ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma, |
1163 | udev->slot_id, must_succeed); | |
f2217e8e | 1164 | else |
913a8a34 | 1165 | ret = xhci_queue_evaluate_context(xhci, in_ctx->dma, |
f2217e8e SS |
1166 | udev->slot_id); |
1167 | if (ret < 0) { | |
1168 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1169 | xhci_dbg(xhci, "FIXME allocate a new ring segment\n"); | |
1170 | return -ENOMEM; | |
1171 | } | |
1172 | xhci_ring_cmd_db(xhci); | |
1173 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1174 | ||
1175 | /* Wait for the configure endpoint command to complete */ | |
1176 | timeleft = wait_for_completion_interruptible_timeout( | |
913a8a34 | 1177 | cmd_completion, |
f2217e8e SS |
1178 | USB_CTRL_SET_TIMEOUT); |
1179 | if (timeleft <= 0) { | |
1180 | xhci_warn(xhci, "%s while waiting for %s command\n", | |
1181 | timeleft == 0 ? "Timeout" : "Signal", | |
1182 | ctx_change == 0 ? | |
1183 | "configure endpoint" : | |
1184 | "evaluate context"); | |
1185 | /* FIXME cancel the configure endpoint command */ | |
1186 | return -ETIME; | |
1187 | } | |
1188 | ||
1189 | if (!ctx_change) | |
913a8a34 SS |
1190 | return xhci_configure_endpoint_result(xhci, udev, cmd_status); |
1191 | return xhci_evaluate_context_result(xhci, udev, cmd_status); | |
f2217e8e SS |
1192 | } |
1193 | ||
f88ba78d SS |
1194 | /* Called after one or more calls to xhci_add_endpoint() or |
1195 | * xhci_drop_endpoint(). If this call fails, the USB core is expected | |
1196 | * to call xhci_reset_bandwidth(). | |
1197 | * | |
1198 | * Since we are in the middle of changing either configuration or | |
1199 | * installing a new alt setting, the USB core won't allow URBs to be | |
1200 | * enqueued for any endpoint on the old config or interface. Nothing | |
1201 | * else should be touching the xhci->devs[slot_id] structure, so we | |
1202 | * don't need to take the xhci->lock for manipulating that. | |
1203 | */ | |
f94e0186 SS |
1204 | int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) |
1205 | { | |
1206 | int i; | |
1207 | int ret = 0; | |
f94e0186 SS |
1208 | struct xhci_hcd *xhci; |
1209 | struct xhci_virt_device *virt_dev; | |
d115b048 JY |
1210 | struct xhci_input_control_ctx *ctrl_ctx; |
1211 | struct xhci_slot_ctx *slot_ctx; | |
f94e0186 SS |
1212 | |
1213 | ret = xhci_check_args(hcd, udev, NULL, 0, __func__); | |
1214 | if (ret <= 0) | |
1215 | return ret; | |
1216 | xhci = hcd_to_xhci(hcd); | |
1217 | ||
f94e0186 SS |
1218 | if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) { |
1219 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
1220 | __func__); | |
f94e0186 SS |
1221 | return -EINVAL; |
1222 | } | |
700e2052 | 1223 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
f94e0186 SS |
1224 | virt_dev = xhci->devs[udev->slot_id]; |
1225 | ||
1226 | /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ | |
d115b048 JY |
1227 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); |
1228 | ctrl_ctx->add_flags |= SLOT_FLAG; | |
1229 | ctrl_ctx->add_flags &= ~EP0_FLAG; | |
1230 | ctrl_ctx->drop_flags &= ~SLOT_FLAG; | |
1231 | ctrl_ctx->drop_flags &= ~EP0_FLAG; | |
f94e0186 | 1232 | xhci_dbg(xhci, "New Input Control Context:\n"); |
d115b048 JY |
1233 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
1234 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, | |
1235 | LAST_CTX_TO_EP_NUM(slot_ctx->dev_info)); | |
f94e0186 | 1236 | |
913a8a34 SS |
1237 | ret = xhci_configure_endpoint(xhci, udev, NULL, |
1238 | false, false); | |
f94e0186 SS |
1239 | if (ret) { |
1240 | /* Callee should call reset_bandwidth() */ | |
f94e0186 SS |
1241 | return ret; |
1242 | } | |
1243 | ||
1244 | xhci_dbg(xhci, "Output context after successful config ep cmd:\n"); | |
d115b048 JY |
1245 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, |
1246 | LAST_CTX_TO_EP_NUM(slot_ctx->dev_info)); | |
f94e0186 | 1247 | |
d115b048 | 1248 | xhci_zero_in_ctx(xhci, virt_dev); |
f94e0186 SS |
1249 | /* Free any old rings */ |
1250 | for (i = 1; i < 31; ++i) { | |
63a0d9ab SS |
1251 | if (virt_dev->eps[i].new_ring) { |
1252 | xhci_ring_free(xhci, virt_dev->eps[i].ring); | |
1253 | virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; | |
1254 | virt_dev->eps[i].new_ring = NULL; | |
f94e0186 SS |
1255 | } |
1256 | } | |
1257 | ||
f94e0186 SS |
1258 | return ret; |
1259 | } | |
1260 | ||
1261 | void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) | |
1262 | { | |
f94e0186 SS |
1263 | struct xhci_hcd *xhci; |
1264 | struct xhci_virt_device *virt_dev; | |
1265 | int i, ret; | |
1266 | ||
1267 | ret = xhci_check_args(hcd, udev, NULL, 0, __func__); | |
1268 | if (ret <= 0) | |
1269 | return; | |
1270 | xhci = hcd_to_xhci(hcd); | |
1271 | ||
f94e0186 SS |
1272 | if (!xhci->devs || !xhci->devs[udev->slot_id]) { |
1273 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
1274 | __func__); | |
f94e0186 SS |
1275 | return; |
1276 | } | |
700e2052 | 1277 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
f94e0186 SS |
1278 | virt_dev = xhci->devs[udev->slot_id]; |
1279 | /* Free any rings allocated for added endpoints */ | |
1280 | for (i = 0; i < 31; ++i) { | |
63a0d9ab SS |
1281 | if (virt_dev->eps[i].new_ring) { |
1282 | xhci_ring_free(xhci, virt_dev->eps[i].new_ring); | |
1283 | virt_dev->eps[i].new_ring = NULL; | |
f94e0186 SS |
1284 | } |
1285 | } | |
d115b048 | 1286 | xhci_zero_in_ctx(xhci, virt_dev); |
f94e0186 SS |
1287 | } |
1288 | ||
5270b951 | 1289 | static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci, |
913a8a34 SS |
1290 | struct xhci_container_ctx *in_ctx, |
1291 | struct xhci_container_ctx *out_ctx, | |
1292 | u32 add_flags, u32 drop_flags) | |
5270b951 SS |
1293 | { |
1294 | struct xhci_input_control_ctx *ctrl_ctx; | |
913a8a34 | 1295 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
5270b951 SS |
1296 | ctrl_ctx->add_flags = add_flags; |
1297 | ctrl_ctx->drop_flags = drop_flags; | |
913a8a34 | 1298 | xhci_slot_copy(xhci, in_ctx, out_ctx); |
5270b951 SS |
1299 | ctrl_ctx->add_flags |= SLOT_FLAG; |
1300 | ||
913a8a34 SS |
1301 | xhci_dbg(xhci, "Input Context:\n"); |
1302 | xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags)); | |
5270b951 SS |
1303 | } |
1304 | ||
ac9d8fe7 SS |
1305 | void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci, |
1306 | unsigned int slot_id, unsigned int ep_index, | |
1307 | struct xhci_dequeue_state *deq_state) | |
1308 | { | |
1309 | struct xhci_container_ctx *in_ctx; | |
ac9d8fe7 SS |
1310 | struct xhci_ep_ctx *ep_ctx; |
1311 | u32 added_ctxs; | |
1312 | dma_addr_t addr; | |
1313 | ||
913a8a34 SS |
1314 | xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, |
1315 | xhci->devs[slot_id]->out_ctx, ep_index); | |
ac9d8fe7 SS |
1316 | in_ctx = xhci->devs[slot_id]->in_ctx; |
1317 | ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); | |
1318 | addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg, | |
1319 | deq_state->new_deq_ptr); | |
1320 | if (addr == 0) { | |
1321 | xhci_warn(xhci, "WARN Cannot submit config ep after " | |
1322 | "reset ep command\n"); | |
1323 | xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n", | |
1324 | deq_state->new_deq_seg, | |
1325 | deq_state->new_deq_ptr); | |
1326 | return; | |
1327 | } | |
1328 | ep_ctx->deq = addr | deq_state->new_cycle_state; | |
1329 | ||
ac9d8fe7 | 1330 | added_ctxs = xhci_get_endpoint_flag_from_index(ep_index); |
913a8a34 SS |
1331 | xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx, |
1332 | xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs); | |
ac9d8fe7 SS |
1333 | } |
1334 | ||
82d1009f | 1335 | void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, |
63a0d9ab | 1336 | struct usb_device *udev, unsigned int ep_index) |
82d1009f SS |
1337 | { |
1338 | struct xhci_dequeue_state deq_state; | |
63a0d9ab | 1339 | struct xhci_virt_ep *ep; |
82d1009f SS |
1340 | |
1341 | xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n"); | |
63a0d9ab | 1342 | ep = &xhci->devs[udev->slot_id]->eps[ep_index]; |
82d1009f SS |
1343 | /* We need to move the HW's dequeue pointer past this TD, |
1344 | * or it will attempt to resend it on the next doorbell ring. | |
1345 | */ | |
1346 | xhci_find_new_dequeue_state(xhci, udev->slot_id, | |
63a0d9ab | 1347 | ep_index, ep->stopped_td, |
ac9d8fe7 | 1348 | &deq_state); |
82d1009f | 1349 | |
ac9d8fe7 SS |
1350 | /* HW with the reset endpoint quirk will use the saved dequeue state to |
1351 | * issue a configure endpoint command later. | |
1352 | */ | |
1353 | if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) { | |
1354 | xhci_dbg(xhci, "Queueing new dequeue state\n"); | |
63a0d9ab | 1355 | xhci_queue_new_dequeue_state(xhci, udev->slot_id, |
ac9d8fe7 SS |
1356 | ep_index, &deq_state); |
1357 | } else { | |
1358 | /* Better hope no one uses the input context between now and the | |
1359 | * reset endpoint completion! | |
1360 | */ | |
1361 | xhci_dbg(xhci, "Setting up input context for " | |
1362 | "configure endpoint command\n"); | |
1363 | xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id, | |
1364 | ep_index, &deq_state); | |
1365 | } | |
82d1009f SS |
1366 | } |
1367 | ||
a1587d97 SS |
1368 | /* Deal with stalled endpoints. The core should have sent the control message |
1369 | * to clear the halt condition. However, we need to make the xHCI hardware | |
1370 | * reset its sequence number, since a device will expect a sequence number of | |
1371 | * zero after the halt condition is cleared. | |
1372 | * Context: in_interrupt | |
1373 | */ | |
1374 | void xhci_endpoint_reset(struct usb_hcd *hcd, | |
1375 | struct usb_host_endpoint *ep) | |
1376 | { | |
1377 | struct xhci_hcd *xhci; | |
1378 | struct usb_device *udev; | |
1379 | unsigned int ep_index; | |
1380 | unsigned long flags; | |
1381 | int ret; | |
63a0d9ab | 1382 | struct xhci_virt_ep *virt_ep; |
a1587d97 SS |
1383 | |
1384 | xhci = hcd_to_xhci(hcd); | |
1385 | udev = (struct usb_device *) ep->hcpriv; | |
1386 | /* Called with a root hub endpoint (or an endpoint that wasn't added | |
1387 | * with xhci_add_endpoint() | |
1388 | */ | |
1389 | if (!ep->hcpriv) | |
1390 | return; | |
1391 | ep_index = xhci_get_endpoint_index(&ep->desc); | |
63a0d9ab SS |
1392 | virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index]; |
1393 | if (!virt_ep->stopped_td) { | |
c92bcfa7 SS |
1394 | xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n", |
1395 | ep->desc.bEndpointAddress); | |
1396 | return; | |
1397 | } | |
82d1009f SS |
1398 | if (usb_endpoint_xfer_control(&ep->desc)) { |
1399 | xhci_dbg(xhci, "Control endpoint stall already handled.\n"); | |
1400 | return; | |
1401 | } | |
a1587d97 SS |
1402 | |
1403 | xhci_dbg(xhci, "Queueing reset endpoint command\n"); | |
1404 | spin_lock_irqsave(&xhci->lock, flags); | |
1405 | ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index); | |
c92bcfa7 SS |
1406 | /* |
1407 | * Can't change the ring dequeue pointer until it's transitioned to the | |
1408 | * stopped state, which is only upon a successful reset endpoint | |
1409 | * command. Better hope that last command worked! | |
1410 | */ | |
a1587d97 | 1411 | if (!ret) { |
63a0d9ab SS |
1412 | xhci_cleanup_stalled_ring(xhci, udev, ep_index); |
1413 | kfree(virt_ep->stopped_td); | |
a1587d97 SS |
1414 | xhci_ring_cmd_db(xhci); |
1415 | } | |
1416 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1417 | ||
1418 | if (ret) | |
1419 | xhci_warn(xhci, "FIXME allocate a new ring segment\n"); | |
1420 | } | |
1421 | ||
3ffbba95 SS |
1422 | /* |
1423 | * At this point, the struct usb_device is about to go away, the device has | |
1424 | * disconnected, and all traffic has been stopped and the endpoints have been | |
1425 | * disabled. Free any HC data structures associated with that device. | |
1426 | */ | |
1427 | void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev) | |
1428 | { | |
1429 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1430 | unsigned long flags; | |
c526d0d4 | 1431 | u32 state; |
3ffbba95 SS |
1432 | |
1433 | if (udev->slot_id == 0) | |
1434 | return; | |
1435 | ||
1436 | spin_lock_irqsave(&xhci->lock, flags); | |
c526d0d4 SS |
1437 | /* Don't disable the slot if the host controller is dead. */ |
1438 | state = xhci_readl(xhci, &xhci->op_regs->status); | |
1439 | if (state == 0xffffffff) { | |
1440 | xhci_free_virt_device(xhci, udev->slot_id); | |
1441 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1442 | return; | |
1443 | } | |
1444 | ||
23e3be11 | 1445 | if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) { |
3ffbba95 SS |
1446 | spin_unlock_irqrestore(&xhci->lock, flags); |
1447 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); | |
1448 | return; | |
1449 | } | |
23e3be11 | 1450 | xhci_ring_cmd_db(xhci); |
3ffbba95 SS |
1451 | spin_unlock_irqrestore(&xhci->lock, flags); |
1452 | /* | |
1453 | * Event command completion handler will free any data structures | |
f88ba78d | 1454 | * associated with the slot. XXX Can free sleep? |
3ffbba95 SS |
1455 | */ |
1456 | } | |
1457 | ||
1458 | /* | |
1459 | * Returns 0 if the xHC ran out of device slots, the Enable Slot command | |
1460 | * timed out, or allocating memory failed. Returns 1 on success. | |
1461 | */ | |
1462 | int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev) | |
1463 | { | |
1464 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1465 | unsigned long flags; | |
1466 | int timeleft; | |
1467 | int ret; | |
1468 | ||
1469 | spin_lock_irqsave(&xhci->lock, flags); | |
23e3be11 | 1470 | ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0); |
3ffbba95 SS |
1471 | if (ret) { |
1472 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1473 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); | |
1474 | return 0; | |
1475 | } | |
23e3be11 | 1476 | xhci_ring_cmd_db(xhci); |
3ffbba95 SS |
1477 | spin_unlock_irqrestore(&xhci->lock, flags); |
1478 | ||
1479 | /* XXX: how much time for xHC slot assignment? */ | |
1480 | timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev, | |
1481 | USB_CTRL_SET_TIMEOUT); | |
1482 | if (timeleft <= 0) { | |
1483 | xhci_warn(xhci, "%s while waiting for a slot\n", | |
1484 | timeleft == 0 ? "Timeout" : "Signal"); | |
1485 | /* FIXME cancel the enable slot request */ | |
1486 | return 0; | |
1487 | } | |
1488 | ||
3ffbba95 SS |
1489 | if (!xhci->slot_id) { |
1490 | xhci_err(xhci, "Error while assigning device slot ID\n"); | |
3ffbba95 SS |
1491 | return 0; |
1492 | } | |
f88ba78d | 1493 | /* xhci_alloc_virt_device() does not touch rings; no need to lock */ |
3ffbba95 SS |
1494 | if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) { |
1495 | /* Disable slot, if we can do it without mem alloc */ | |
1496 | xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n"); | |
f88ba78d | 1497 | spin_lock_irqsave(&xhci->lock, flags); |
23e3be11 SS |
1498 | if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) |
1499 | xhci_ring_cmd_db(xhci); | |
3ffbba95 SS |
1500 | spin_unlock_irqrestore(&xhci->lock, flags); |
1501 | return 0; | |
1502 | } | |
1503 | udev->slot_id = xhci->slot_id; | |
1504 | /* Is this a LS or FS device under a HS hub? */ | |
1505 | /* Hub or peripherial? */ | |
3ffbba95 SS |
1506 | return 1; |
1507 | } | |
1508 | ||
1509 | /* | |
1510 | * Issue an Address Device command (which will issue a SetAddress request to | |
1511 | * the device). | |
1512 | * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so | |
1513 | * we should only issue and wait on one address command at the same time. | |
1514 | * | |
1515 | * We add one to the device address issued by the hardware because the USB core | |
1516 | * uses address 1 for the root hubs (even though they're not really devices). | |
1517 | */ | |
1518 | int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) | |
1519 | { | |
1520 | unsigned long flags; | |
1521 | int timeleft; | |
1522 | struct xhci_virt_device *virt_dev; | |
1523 | int ret = 0; | |
1524 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
d115b048 JY |
1525 | struct xhci_slot_ctx *slot_ctx; |
1526 | struct xhci_input_control_ctx *ctrl_ctx; | |
8e595a5d | 1527 | u64 temp_64; |
3ffbba95 SS |
1528 | |
1529 | if (!udev->slot_id) { | |
1530 | xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id); | |
1531 | return -EINVAL; | |
1532 | } | |
1533 | ||
3ffbba95 SS |
1534 | virt_dev = xhci->devs[udev->slot_id]; |
1535 | ||
1536 | /* If this is a Set Address to an unconfigured device, setup ep 0 */ | |
1537 | if (!udev->config) | |
1538 | xhci_setup_addressable_virt_dev(xhci, udev); | |
1539 | /* Otherwise, assume the core has the device configured how it wants */ | |
66e49d87 | 1540 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
d115b048 | 1541 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); |
3ffbba95 | 1542 | |
f88ba78d | 1543 | spin_lock_irqsave(&xhci->lock, flags); |
d115b048 JY |
1544 | ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma, |
1545 | udev->slot_id); | |
3ffbba95 SS |
1546 | if (ret) { |
1547 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1548 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); | |
1549 | return ret; | |
1550 | } | |
23e3be11 | 1551 | xhci_ring_cmd_db(xhci); |
3ffbba95 SS |
1552 | spin_unlock_irqrestore(&xhci->lock, flags); |
1553 | ||
1554 | /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */ | |
1555 | timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev, | |
1556 | USB_CTRL_SET_TIMEOUT); | |
1557 | /* FIXME: From section 4.3.4: "Software shall be responsible for timing | |
1558 | * the SetAddress() "recovery interval" required by USB and aborting the | |
1559 | * command on a timeout. | |
1560 | */ | |
1561 | if (timeleft <= 0) { | |
1562 | xhci_warn(xhci, "%s while waiting for a slot\n", | |
1563 | timeleft == 0 ? "Timeout" : "Signal"); | |
1564 | /* FIXME cancel the address device command */ | |
1565 | return -ETIME; | |
1566 | } | |
1567 | ||
3ffbba95 SS |
1568 | switch (virt_dev->cmd_status) { |
1569 | case COMP_CTX_STATE: | |
1570 | case COMP_EBADSLT: | |
1571 | xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n", | |
1572 | udev->slot_id); | |
1573 | ret = -EINVAL; | |
1574 | break; | |
1575 | case COMP_TX_ERR: | |
1576 | dev_warn(&udev->dev, "Device not responding to set address.\n"); | |
1577 | ret = -EPROTO; | |
1578 | break; | |
1579 | case COMP_SUCCESS: | |
1580 | xhci_dbg(xhci, "Successful Address Device command\n"); | |
1581 | break; | |
1582 | default: | |
1583 | xhci_err(xhci, "ERROR: unexpected command completion " | |
1584 | "code 0x%x.\n", virt_dev->cmd_status); | |
66e49d87 | 1585 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); |
d115b048 | 1586 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2); |
3ffbba95 SS |
1587 | ret = -EINVAL; |
1588 | break; | |
1589 | } | |
1590 | if (ret) { | |
3ffbba95 SS |
1591 | return ret; |
1592 | } | |
8e595a5d SS |
1593 | temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); |
1594 | xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64); | |
1595 | xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n", | |
3ffbba95 | 1596 | udev->slot_id, |
8e595a5d SS |
1597 | &xhci->dcbaa->dev_context_ptrs[udev->slot_id], |
1598 | (unsigned long long) | |
1599 | xhci->dcbaa->dev_context_ptrs[udev->slot_id]); | |
700e2052 | 1600 | xhci_dbg(xhci, "Output Context DMA address = %#08llx\n", |
d115b048 | 1601 | (unsigned long long)virt_dev->out_ctx->dma); |
3ffbba95 | 1602 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
d115b048 | 1603 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); |
3ffbba95 | 1604 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); |
d115b048 | 1605 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2); |
3ffbba95 SS |
1606 | /* |
1607 | * USB core uses address 1 for the roothubs, so we add one to the | |
1608 | * address given back to us by the HC. | |
1609 | */ | |
d115b048 JY |
1610 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); |
1611 | udev->devnum = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1; | |
f94e0186 | 1612 | /* Zero the input context control for later use */ |
d115b048 JY |
1613 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); |
1614 | ctrl_ctx->add_flags = 0; | |
1615 | ctrl_ctx->drop_flags = 0; | |
3ffbba95 SS |
1616 | |
1617 | xhci_dbg(xhci, "Device address = %d\n", udev->devnum); | |
1618 | /* XXX Meh, not sure if anyone else but choose_address uses this. */ | |
1619 | set_bit(udev->devnum, udev->bus->devmap.devicemap); | |
1620 | ||
1621 | return 0; | |
1622 | } | |
1623 | ||
ac1c1b7f SS |
1624 | /* Once a hub descriptor is fetched for a device, we need to update the xHC's |
1625 | * internal data structures for the device. | |
1626 | */ | |
1627 | int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev, | |
1628 | struct usb_tt *tt, gfp_t mem_flags) | |
1629 | { | |
1630 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1631 | struct xhci_virt_device *vdev; | |
1632 | struct xhci_command *config_cmd; | |
1633 | struct xhci_input_control_ctx *ctrl_ctx; | |
1634 | struct xhci_slot_ctx *slot_ctx; | |
1635 | unsigned long flags; | |
1636 | unsigned think_time; | |
1637 | int ret; | |
1638 | ||
1639 | /* Ignore root hubs */ | |
1640 | if (!hdev->parent) | |
1641 | return 0; | |
1642 | ||
1643 | vdev = xhci->devs[hdev->slot_id]; | |
1644 | if (!vdev) { | |
1645 | xhci_warn(xhci, "Cannot update hub desc for unknown device.\n"); | |
1646 | return -EINVAL; | |
1647 | } | |
1648 | config_cmd = xhci_alloc_command(xhci, true, mem_flags); | |
1649 | if (!config_cmd) { | |
1650 | xhci_dbg(xhci, "Could not allocate xHCI command structure.\n"); | |
1651 | return -ENOMEM; | |
1652 | } | |
1653 | ||
1654 | spin_lock_irqsave(&xhci->lock, flags); | |
1655 | xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); | |
1656 | ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx); | |
1657 | ctrl_ctx->add_flags |= SLOT_FLAG; | |
1658 | slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); | |
1659 | slot_ctx->dev_info |= DEV_HUB; | |
1660 | if (tt->multi) | |
1661 | slot_ctx->dev_info |= DEV_MTT; | |
1662 | if (xhci->hci_version > 0x95) { | |
1663 | xhci_dbg(xhci, "xHCI version %x needs hub " | |
1664 | "TT think time and number of ports\n", | |
1665 | (unsigned int) xhci->hci_version); | |
1666 | slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild); | |
1667 | /* Set TT think time - convert from ns to FS bit times. | |
1668 | * 0 = 8 FS bit times, 1 = 16 FS bit times, | |
1669 | * 2 = 24 FS bit times, 3 = 32 FS bit times. | |
1670 | */ | |
1671 | think_time = tt->think_time; | |
1672 | if (think_time != 0) | |
1673 | think_time = (think_time / 666) - 1; | |
1674 | slot_ctx->tt_info |= TT_THINK_TIME(think_time); | |
1675 | } else { | |
1676 | xhci_dbg(xhci, "xHCI version %x doesn't need hub " | |
1677 | "TT think time or number of ports\n", | |
1678 | (unsigned int) xhci->hci_version); | |
1679 | } | |
1680 | slot_ctx->dev_state = 0; | |
1681 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1682 | ||
1683 | xhci_dbg(xhci, "Set up %s for hub device.\n", | |
1684 | (xhci->hci_version > 0x95) ? | |
1685 | "configure endpoint" : "evaluate context"); | |
1686 | xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id); | |
1687 | xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0); | |
1688 | ||
1689 | /* Issue and wait for the configure endpoint or | |
1690 | * evaluate context command. | |
1691 | */ | |
1692 | if (xhci->hci_version > 0x95) | |
1693 | ret = xhci_configure_endpoint(xhci, hdev, config_cmd, | |
1694 | false, false); | |
1695 | else | |
1696 | ret = xhci_configure_endpoint(xhci, hdev, config_cmd, | |
1697 | true, false); | |
1698 | ||
1699 | xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id); | |
1700 | xhci_dbg_ctx(xhci, vdev->out_ctx, 0); | |
1701 | ||
1702 | xhci_free_command(xhci, config_cmd); | |
1703 | return ret; | |
1704 | } | |
1705 | ||
66d4eadd SS |
1706 | int xhci_get_frame(struct usb_hcd *hcd) |
1707 | { | |
1708 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1709 | /* EHCI mods by the periodic size. Why? */ | |
1710 | return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3; | |
1711 | } | |
1712 | ||
1713 | MODULE_DESCRIPTION(DRIVER_DESC); | |
1714 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
1715 | MODULE_LICENSE("GPL"); | |
1716 | ||
1717 | static int __init xhci_hcd_init(void) | |
1718 | { | |
1719 | #ifdef CONFIG_PCI | |
1720 | int retval = 0; | |
1721 | ||
1722 | retval = xhci_register_pci(); | |
1723 | ||
1724 | if (retval < 0) { | |
1725 | printk(KERN_DEBUG "Problem registering PCI driver."); | |
1726 | return retval; | |
1727 | } | |
1728 | #endif | |
98441973 SS |
1729 | /* |
1730 | * Check the compiler generated sizes of structures that must be laid | |
1731 | * out in specific ways for hardware access. | |
1732 | */ | |
1733 | BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8); | |
1734 | BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8); | |
1735 | BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8); | |
1736 | /* xhci_device_control has eight fields, and also | |
1737 | * embeds one xhci_slot_ctx and 31 xhci_ep_ctx | |
1738 | */ | |
98441973 SS |
1739 | BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8); |
1740 | BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8); | |
1741 | BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8); | |
1742 | BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8); | |
1743 | BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8); | |
1744 | /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */ | |
1745 | BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8); | |
1746 | BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8); | |
66d4eadd SS |
1747 | return 0; |
1748 | } | |
1749 | module_init(xhci_hcd_init); | |
1750 | ||
1751 | static void __exit xhci_hcd_cleanup(void) | |
1752 | { | |
1753 | #ifdef CONFIG_PCI | |
1754 | xhci_unregister_pci(); | |
1755 | #endif | |
1756 | } | |
1757 | module_exit(xhci_hcd_cleanup); |