Commit | Line | Data |
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0f2a7930 SS |
1 | /* |
2 | * xHCI host controller driver | |
3 | * | |
4 | * Copyright (C) 2008 Intel Corp. | |
5 | * | |
6 | * Author: Sarah Sharp | |
7 | * Some code borrowed from the Linux EHCI driver. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | * for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software Foundation, | |
20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <asm/unaligned.h> | |
24 | ||
25 | #include "xhci.h" | |
26 | ||
9777e3ce AX |
27 | #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E) |
28 | #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \ | |
29 | PORT_RC | PORT_PLC | PORT_PE) | |
30 | ||
0f2a7930 SS |
31 | static void xhci_hub_descriptor(struct xhci_hcd *xhci, |
32 | struct usb_hub_descriptor *desc) | |
33 | { | |
34 | int ports; | |
35 | u16 temp; | |
36 | ||
37 | ports = HCS_MAX_PORTS(xhci->hcs_params1); | |
38 | ||
39 | /* USB 3.0 hubs have a different descriptor, but we fake this for now */ | |
40 | desc->bDescriptorType = 0x29; | |
41 | desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */ | |
42 | desc->bHubContrCurrent = 0; | |
43 | ||
44 | desc->bNbrPorts = ports; | |
45 | temp = 1 + (ports / 8); | |
46 | desc->bDescLength = 7 + 2 * temp; | |
47 | ||
dbe79bbe JY |
48 | memset(&desc->u.hs.DeviceRemovable[0], 0, temp); |
49 | memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); | |
0f2a7930 SS |
50 | |
51 | /* Ugh, these should be #defines, FIXME */ | |
52 | /* Using table 11-13 in USB 2.0 spec. */ | |
53 | temp = 0; | |
54 | /* Bits 1:0 - support port power switching, or power always on */ | |
55 | if (HCC_PPC(xhci->hcc_params)) | |
56 | temp |= 0x0001; | |
57 | else | |
58 | temp |= 0x0002; | |
59 | /* Bit 2 - root hubs are not part of a compound device */ | |
60 | /* Bits 4:3 - individual port over current protection */ | |
61 | temp |= 0x0008; | |
62 | /* Bits 6:5 - no TTs in root ports */ | |
63 | /* Bit 7 - no port indicators */ | |
64 | desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp); | |
65 | } | |
66 | ||
67 | static unsigned int xhci_port_speed(unsigned int port_status) | |
68 | { | |
69 | if (DEV_LOWSPEED(port_status)) | |
288ead45 | 70 | return USB_PORT_STAT_LOW_SPEED; |
0f2a7930 | 71 | if (DEV_HIGHSPEED(port_status)) |
288ead45 | 72 | return USB_PORT_STAT_HIGH_SPEED; |
0f2a7930 | 73 | if (DEV_SUPERSPEED(port_status)) |
288ead45 | 74 | return USB_PORT_STAT_SUPER_SPEED; |
0f2a7930 SS |
75 | /* |
76 | * FIXME: Yes, we should check for full speed, but the core uses that as | |
77 | * a default in portspeed() in usb/core/hub.c (which is the only place | |
288ead45 | 78 | * USB_PORT_STAT_*_SPEED is used). |
0f2a7930 SS |
79 | */ |
80 | return 0; | |
81 | } | |
82 | ||
83 | /* | |
84 | * These bits are Read Only (RO) and should be saved and written to the | |
85 | * registers: 0, 3, 10:13, 30 | |
86 | * connect status, over-current status, port speed, and device removable. | |
87 | * connect status and port speed are also sticky - meaning they're in | |
88 | * the AUX well and they aren't changed by a hot, warm, or cold reset. | |
89 | */ | |
90 | #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30)) | |
91 | /* | |
92 | * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit: | |
93 | * bits 5:8, 9, 14:15, 25:27 | |
94 | * link state, port power, port indicator state, "wake on" enable state | |
95 | */ | |
96 | #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25)) | |
97 | /* | |
98 | * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect: | |
99 | * bit 4 (port reset) | |
100 | */ | |
101 | #define XHCI_PORT_RW1S ((1<<4)) | |
102 | /* | |
103 | * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect: | |
104 | * bits 1, 17, 18, 19, 20, 21, 22, 23 | |
105 | * port enable/disable, and | |
106 | * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports), | |
107 | * over-current, reset, link state, and L1 change | |
108 | */ | |
109 | #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17)) | |
110 | /* | |
111 | * Bit 16 is RW, and writing a '1' to it causes the link state control to be | |
112 | * latched in | |
113 | */ | |
114 | #define XHCI_PORT_RW ((1<<16)) | |
115 | /* | |
116 | * These bits are Reserved Zero (RsvdZ) and zero should be written to them: | |
117 | * bits 2, 24, 28:31 | |
118 | */ | |
119 | #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28)) | |
120 | ||
121 | /* | |
122 | * Given a port state, this function returns a value that would result in the | |
123 | * port being in the same state, if the value was written to the port status | |
124 | * control register. | |
125 | * Save Read Only (RO) bits and save read/write bits where | |
126 | * writing a 0 clears the bit and writing a 1 sets the bit (RWS). | |
127 | * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect. | |
128 | */ | |
56192531 | 129 | u32 xhci_port_state_to_neutral(u32 state) |
0f2a7930 SS |
130 | { |
131 | /* Save read-only status and port state */ | |
132 | return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS); | |
133 | } | |
134 | ||
be88fe4f AX |
135 | /* |
136 | * find slot id based on port number. | |
137 | */ | |
56192531 | 138 | int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port) |
be88fe4f AX |
139 | { |
140 | int slot_id; | |
141 | int i; | |
142 | ||
143 | slot_id = 0; | |
144 | for (i = 0; i < MAX_HC_SLOTS; i++) { | |
145 | if (!xhci->devs[i]) | |
146 | continue; | |
147 | if (xhci->devs[i]->port == port) { | |
148 | slot_id = i; | |
149 | break; | |
150 | } | |
151 | } | |
152 | ||
153 | return slot_id; | |
154 | } | |
155 | ||
156 | /* | |
157 | * Stop device | |
158 | * It issues stop endpoint command for EP 0 to 30. And wait the last command | |
159 | * to complete. | |
160 | * suspend will set to 1, if suspend bit need to set in command. | |
161 | */ | |
162 | static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend) | |
163 | { | |
164 | struct xhci_virt_device *virt_dev; | |
165 | struct xhci_command *cmd; | |
166 | unsigned long flags; | |
167 | int timeleft; | |
168 | int ret; | |
169 | int i; | |
170 | ||
171 | ret = 0; | |
172 | virt_dev = xhci->devs[slot_id]; | |
173 | cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO); | |
174 | if (!cmd) { | |
175 | xhci_dbg(xhci, "Couldn't allocate command structure.\n"); | |
176 | return -ENOMEM; | |
177 | } | |
178 | ||
179 | spin_lock_irqsave(&xhci->lock, flags); | |
180 | for (i = LAST_EP_INDEX; i > 0; i--) { | |
181 | if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) | |
182 | xhci_queue_stop_endpoint(xhci, slot_id, i, suspend); | |
183 | } | |
184 | cmd->command_trb = xhci->cmd_ring->enqueue; | |
185 | list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list); | |
186 | xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend); | |
187 | xhci_ring_cmd_db(xhci); | |
188 | spin_unlock_irqrestore(&xhci->lock, flags); | |
189 | ||
190 | /* Wait for last stop endpoint command to finish */ | |
191 | timeleft = wait_for_completion_interruptible_timeout( | |
192 | cmd->completion, | |
193 | USB_CTRL_SET_TIMEOUT); | |
194 | if (timeleft <= 0) { | |
195 | xhci_warn(xhci, "%s while waiting for stop endpoint command\n", | |
196 | timeleft == 0 ? "Timeout" : "Signal"); | |
197 | spin_lock_irqsave(&xhci->lock, flags); | |
198 | /* The timeout might have raced with the event ring handler, so | |
199 | * only delete from the list if the item isn't poisoned. | |
200 | */ | |
201 | if (cmd->cmd_list.next != LIST_POISON1) | |
202 | list_del(&cmd->cmd_list); | |
203 | spin_unlock_irqrestore(&xhci->lock, flags); | |
204 | ret = -ETIME; | |
205 | goto command_cleanup; | |
206 | } | |
207 | ||
208 | command_cleanup: | |
209 | xhci_free_command(xhci, cmd); | |
210 | return ret; | |
211 | } | |
212 | ||
213 | /* | |
214 | * Ring device, it rings the all doorbells unconditionally. | |
215 | */ | |
56192531 | 216 | void xhci_ring_device(struct xhci_hcd *xhci, int slot_id) |
be88fe4f AX |
217 | { |
218 | int i; | |
219 | ||
220 | for (i = 0; i < LAST_EP_INDEX + 1; i++) | |
221 | if (xhci->devs[slot_id]->eps[i].ring && | |
222 | xhci->devs[slot_id]->eps[i].ring->dequeue) | |
223 | xhci_ring_ep_doorbell(xhci, slot_id, i, 0); | |
224 | ||
225 | return; | |
226 | } | |
227 | ||
6219c047 SS |
228 | static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex, |
229 | u32 __iomem *addr, u32 port_status) | |
230 | { | |
6dd0a3a7 SS |
231 | /* Don't allow the USB core to disable SuperSpeed ports. */ |
232 | if (xhci->port_array[wIndex] == 0x03) { | |
233 | xhci_dbg(xhci, "Ignoring request to disable " | |
234 | "SuperSpeed port.\n"); | |
235 | return; | |
236 | } | |
237 | ||
6219c047 SS |
238 | /* Write 1 to disable the port */ |
239 | xhci_writel(xhci, port_status | PORT_PE, addr); | |
240 | port_status = xhci_readl(xhci, addr); | |
241 | xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n", | |
242 | wIndex, port_status); | |
243 | } | |
244 | ||
34fb562a SS |
245 | static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue, |
246 | u16 wIndex, u32 __iomem *addr, u32 port_status) | |
247 | { | |
248 | char *port_change_bit; | |
249 | u32 status; | |
250 | ||
251 | switch (wValue) { | |
252 | case USB_PORT_FEAT_C_RESET: | |
253 | status = PORT_RC; | |
254 | port_change_bit = "reset"; | |
255 | break; | |
256 | case USB_PORT_FEAT_C_CONNECTION: | |
257 | status = PORT_CSC; | |
258 | port_change_bit = "connect"; | |
259 | break; | |
260 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
261 | status = PORT_OCC; | |
262 | port_change_bit = "over-current"; | |
263 | break; | |
6219c047 SS |
264 | case USB_PORT_FEAT_C_ENABLE: |
265 | status = PORT_PEC; | |
266 | port_change_bit = "enable/disable"; | |
267 | break; | |
be88fe4f AX |
268 | case USB_PORT_FEAT_C_SUSPEND: |
269 | status = PORT_PLC; | |
270 | port_change_bit = "suspend/resume"; | |
271 | break; | |
34fb562a SS |
272 | default: |
273 | /* Should never happen */ | |
274 | return; | |
275 | } | |
276 | /* Change bits are all write 1 to clear */ | |
277 | xhci_writel(xhci, port_status | status, addr); | |
278 | port_status = xhci_readl(xhci, addr); | |
279 | xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n", | |
280 | port_change_bit, wIndex, port_status); | |
281 | } | |
282 | ||
0f2a7930 SS |
283 | int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, |
284 | u16 wIndex, char *buf, u16 wLength) | |
285 | { | |
286 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
287 | int ports; | |
288 | unsigned long flags; | |
56192531 | 289 | u32 temp, temp1, status; |
0f2a7930 | 290 | int retval = 0; |
5308a91b SS |
291 | u32 __iomem *port_array[15 + USB_MAXCHILDREN]; |
292 | int i; | |
be88fe4f | 293 | int slot_id; |
0f2a7930 SS |
294 | |
295 | ports = HCS_MAX_PORTS(xhci->hcs_params1); | |
5308a91b SS |
296 | for (i = 0; i < ports; i++) { |
297 | if (i < xhci->num_usb3_ports) | |
298 | port_array[i] = xhci->usb3_ports[i]; | |
299 | else | |
300 | port_array[i] = | |
301 | xhci->usb2_ports[i - xhci->num_usb3_ports]; | |
302 | } | |
0f2a7930 SS |
303 | |
304 | spin_lock_irqsave(&xhci->lock, flags); | |
305 | switch (typeReq) { | |
306 | case GetHubStatus: | |
307 | /* No power source, over-current reported per port */ | |
308 | memset(buf, 0, 4); | |
309 | break; | |
310 | case GetHubDescriptor: | |
311 | xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf); | |
312 | break; | |
313 | case GetPortStatus: | |
314 | if (!wIndex || wIndex > ports) | |
315 | goto error; | |
316 | wIndex--; | |
317 | status = 0; | |
5308a91b | 318 | temp = xhci_readl(xhci, port_array[wIndex]); |
0f2a7930 SS |
319 | xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp); |
320 | ||
321 | /* wPortChange bits */ | |
322 | if (temp & PORT_CSC) | |
749da5f8 | 323 | status |= USB_PORT_STAT_C_CONNECTION << 16; |
0f2a7930 | 324 | if (temp & PORT_PEC) |
749da5f8 | 325 | status |= USB_PORT_STAT_C_ENABLE << 16; |
0f2a7930 | 326 | if ((temp & PORT_OCC)) |
749da5f8 | 327 | status |= USB_PORT_STAT_C_OVERCURRENT << 16; |
0f2a7930 | 328 | /* |
be88fe4f | 329 | * FIXME ignoring reset and USB 2.1/3.0 specific |
0f2a7930 SS |
330 | * changes |
331 | */ | |
be88fe4f AX |
332 | if ((temp & PORT_PLS_MASK) == XDEV_U3 |
333 | && (temp & PORT_POWER)) | |
334 | status |= 1 << USB_PORT_FEAT_SUSPEND; | |
56192531 AX |
335 | if ((temp & PORT_PLS_MASK) == XDEV_RESUME) { |
336 | if ((temp & PORT_RESET) || !(temp & PORT_PE)) | |
337 | goto error; | |
338 | if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies, | |
339 | xhci->resume_done[wIndex])) { | |
340 | xhci_dbg(xhci, "Resume USB2 port %d\n", | |
341 | wIndex + 1); | |
342 | xhci->resume_done[wIndex] = 0; | |
343 | temp1 = xhci_port_state_to_neutral(temp); | |
344 | temp1 &= ~PORT_PLS_MASK; | |
345 | temp1 |= PORT_LINK_STROBE | XDEV_U0; | |
5308a91b | 346 | xhci_writel(xhci, temp1, port_array[wIndex]); |
56192531 AX |
347 | |
348 | xhci_dbg(xhci, "set port %d resume\n", | |
349 | wIndex + 1); | |
350 | slot_id = xhci_find_slot_id_by_port(xhci, | |
351 | wIndex + 1); | |
352 | if (!slot_id) { | |
353 | xhci_dbg(xhci, "slot_id is zero\n"); | |
354 | goto error; | |
355 | } | |
356 | xhci_ring_device(xhci, slot_id); | |
1d5810b6 SS |
357 | xhci->port_c_suspend |= 1 << wIndex; |
358 | xhci->suspended_ports &= ~(1 << wIndex); | |
56192531 AX |
359 | } |
360 | } | |
be88fe4f AX |
361 | if ((temp & PORT_PLS_MASK) == XDEV_U0 |
362 | && (temp & PORT_POWER) | |
1d5810b6 SS |
363 | && (xhci->suspended_ports & (1 << wIndex))) { |
364 | xhci->suspended_ports &= ~(1 << wIndex); | |
365 | xhci->port_c_suspend |= 1 << wIndex; | |
be88fe4f | 366 | } |
0f2a7930 | 367 | if (temp & PORT_CONNECT) { |
749da5f8 | 368 | status |= USB_PORT_STAT_CONNECTION; |
0f2a7930 SS |
369 | status |= xhci_port_speed(temp); |
370 | } | |
371 | if (temp & PORT_PE) | |
749da5f8 | 372 | status |= USB_PORT_STAT_ENABLE; |
0f2a7930 | 373 | if (temp & PORT_OC) |
749da5f8 | 374 | status |= USB_PORT_STAT_OVERCURRENT; |
0f2a7930 | 375 | if (temp & PORT_RESET) |
749da5f8 | 376 | status |= USB_PORT_STAT_RESET; |
0f2a7930 | 377 | if (temp & PORT_POWER) |
749da5f8 | 378 | status |= USB_PORT_STAT_POWER; |
1d5810b6 | 379 | if (xhci->port_c_suspend & (1 << wIndex)) |
be88fe4f | 380 | status |= 1 << USB_PORT_FEAT_C_SUSPEND; |
0f2a7930 SS |
381 | xhci_dbg(xhci, "Get port status returned 0x%x\n", status); |
382 | put_unaligned(cpu_to_le32(status), (__le32 *) buf); | |
383 | break; | |
384 | case SetPortFeature: | |
385 | wIndex &= 0xff; | |
386 | if (!wIndex || wIndex > ports) | |
387 | goto error; | |
388 | wIndex--; | |
5308a91b | 389 | temp = xhci_readl(xhci, port_array[wIndex]); |
0f2a7930 SS |
390 | temp = xhci_port_state_to_neutral(temp); |
391 | switch (wValue) { | |
be88fe4f | 392 | case USB_PORT_FEAT_SUSPEND: |
5308a91b | 393 | temp = xhci_readl(xhci, port_array[wIndex]); |
be88fe4f AX |
394 | /* In spec software should not attempt to suspend |
395 | * a port unless the port reports that it is in the | |
396 | * enabled (PED = ‘1’,PLS < ‘3’) state. | |
397 | */ | |
398 | if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) | |
399 | || (temp & PORT_PLS_MASK) >= XDEV_U3) { | |
400 | xhci_warn(xhci, "USB core suspending device " | |
401 | "not in U0/U1/U2.\n"); | |
402 | goto error; | |
403 | } | |
404 | ||
405 | slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1); | |
406 | if (!slot_id) { | |
407 | xhci_warn(xhci, "slot_id is zero\n"); | |
408 | goto error; | |
409 | } | |
410 | /* unlock to execute stop endpoint commands */ | |
411 | spin_unlock_irqrestore(&xhci->lock, flags); | |
412 | xhci_stop_device(xhci, slot_id, 1); | |
413 | spin_lock_irqsave(&xhci->lock, flags); | |
414 | ||
415 | temp = xhci_port_state_to_neutral(temp); | |
416 | temp &= ~PORT_PLS_MASK; | |
417 | temp |= PORT_LINK_STROBE | XDEV_U3; | |
5308a91b | 418 | xhci_writel(xhci, temp, port_array[wIndex]); |
be88fe4f AX |
419 | |
420 | spin_unlock_irqrestore(&xhci->lock, flags); | |
421 | msleep(10); /* wait device to enter */ | |
422 | spin_lock_irqsave(&xhci->lock, flags); | |
423 | ||
5308a91b | 424 | temp = xhci_readl(xhci, port_array[wIndex]); |
1d5810b6 | 425 | xhci->suspended_ports |= 1 << wIndex; |
be88fe4f | 426 | break; |
0f2a7930 SS |
427 | case USB_PORT_FEAT_POWER: |
428 | /* | |
429 | * Turn on ports, even if there isn't per-port switching. | |
430 | * HC will report connect events even before this is set. | |
431 | * However, khubd will ignore the roothub events until | |
432 | * the roothub is registered. | |
433 | */ | |
5308a91b SS |
434 | xhci_writel(xhci, temp | PORT_POWER, |
435 | port_array[wIndex]); | |
0f2a7930 | 436 | |
5308a91b | 437 | temp = xhci_readl(xhci, port_array[wIndex]); |
0f2a7930 SS |
438 | xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp); |
439 | break; | |
440 | case USB_PORT_FEAT_RESET: | |
441 | temp = (temp | PORT_RESET); | |
5308a91b | 442 | xhci_writel(xhci, temp, port_array[wIndex]); |
0f2a7930 | 443 | |
5308a91b | 444 | temp = xhci_readl(xhci, port_array[wIndex]); |
0f2a7930 SS |
445 | xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp); |
446 | break; | |
447 | default: | |
448 | goto error; | |
449 | } | |
5308a91b SS |
450 | /* unblock any posted writes */ |
451 | temp = xhci_readl(xhci, port_array[wIndex]); | |
0f2a7930 SS |
452 | break; |
453 | case ClearPortFeature: | |
454 | if (!wIndex || wIndex > ports) | |
455 | goto error; | |
456 | wIndex--; | |
5308a91b | 457 | temp = xhci_readl(xhci, port_array[wIndex]); |
0f2a7930 SS |
458 | temp = xhci_port_state_to_neutral(temp); |
459 | switch (wValue) { | |
be88fe4f | 460 | case USB_PORT_FEAT_SUSPEND: |
5308a91b | 461 | temp = xhci_readl(xhci, port_array[wIndex]); |
be88fe4f AX |
462 | xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n"); |
463 | xhci_dbg(xhci, "PORTSC %04x\n", temp); | |
464 | if (temp & PORT_RESET) | |
465 | goto error; | |
466 | if (temp & XDEV_U3) { | |
467 | if ((temp & PORT_PE) == 0) | |
468 | goto error; | |
469 | if (DEV_SUPERSPEED(temp)) { | |
470 | temp = xhci_port_state_to_neutral(temp); | |
471 | temp &= ~PORT_PLS_MASK; | |
472 | temp |= PORT_LINK_STROBE | XDEV_U0; | |
5308a91b SS |
473 | xhci_writel(xhci, temp, |
474 | port_array[wIndex]); | |
475 | xhci_readl(xhci, port_array[wIndex]); | |
be88fe4f AX |
476 | } else { |
477 | temp = xhci_port_state_to_neutral(temp); | |
478 | temp &= ~PORT_PLS_MASK; | |
479 | temp |= PORT_LINK_STROBE | XDEV_RESUME; | |
5308a91b SS |
480 | xhci_writel(xhci, temp, |
481 | port_array[wIndex]); | |
be88fe4f AX |
482 | |
483 | spin_unlock_irqrestore(&xhci->lock, | |
484 | flags); | |
485 | msleep(20); | |
486 | spin_lock_irqsave(&xhci->lock, flags); | |
487 | ||
5308a91b SS |
488 | temp = xhci_readl(xhci, |
489 | port_array[wIndex]); | |
be88fe4f AX |
490 | temp = xhci_port_state_to_neutral(temp); |
491 | temp &= ~PORT_PLS_MASK; | |
492 | temp |= PORT_LINK_STROBE | XDEV_U0; | |
5308a91b SS |
493 | xhci_writel(xhci, temp, |
494 | port_array[wIndex]); | |
be88fe4f | 495 | } |
1d5810b6 | 496 | xhci->port_c_suspend |= 1 << wIndex; |
be88fe4f AX |
497 | } |
498 | ||
499 | slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1); | |
500 | if (!slot_id) { | |
501 | xhci_dbg(xhci, "slot_id is zero\n"); | |
502 | goto error; | |
503 | } | |
504 | xhci_ring_device(xhci, slot_id); | |
505 | break; | |
506 | case USB_PORT_FEAT_C_SUSPEND: | |
1d5810b6 | 507 | xhci->port_c_suspend &= ~(1 << wIndex); |
0f2a7930 | 508 | case USB_PORT_FEAT_C_RESET: |
0f2a7930 | 509 | case USB_PORT_FEAT_C_CONNECTION: |
0f2a7930 | 510 | case USB_PORT_FEAT_C_OVER_CURRENT: |
6219c047 | 511 | case USB_PORT_FEAT_C_ENABLE: |
34fb562a | 512 | xhci_clear_port_change_bit(xhci, wValue, wIndex, |
5308a91b | 513 | port_array[wIndex], temp); |
0f2a7930 | 514 | break; |
6219c047 | 515 | case USB_PORT_FEAT_ENABLE: |
5308a91b SS |
516 | xhci_disable_port(xhci, wIndex, |
517 | port_array[wIndex], temp); | |
6219c047 | 518 | break; |
0f2a7930 SS |
519 | default: |
520 | goto error; | |
521 | } | |
0f2a7930 SS |
522 | break; |
523 | default: | |
524 | error: | |
525 | /* "stall" on error */ | |
526 | retval = -EPIPE; | |
527 | } | |
528 | spin_unlock_irqrestore(&xhci->lock, flags); | |
529 | return retval; | |
530 | } | |
531 | ||
532 | /* | |
533 | * Returns 0 if the status hasn't changed, or the number of bytes in buf. | |
534 | * Ports are 0-indexed from the HCD point of view, | |
535 | * and 1-indexed from the USB core pointer of view. | |
0f2a7930 SS |
536 | * |
537 | * Note that the status change bits will be cleared as soon as a port status | |
538 | * change event is generated, so we use the saved status from that event. | |
539 | */ | |
540 | int xhci_hub_status_data(struct usb_hcd *hcd, char *buf) | |
541 | { | |
542 | unsigned long flags; | |
543 | u32 temp, status; | |
56192531 | 544 | u32 mask; |
0f2a7930 SS |
545 | int i, retval; |
546 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
547 | int ports; | |
5308a91b | 548 | u32 __iomem *port_array[15 + USB_MAXCHILDREN]; |
0f2a7930 SS |
549 | |
550 | ports = HCS_MAX_PORTS(xhci->hcs_params1); | |
5308a91b SS |
551 | for (i = 0; i < ports; i++) { |
552 | if (i < xhci->num_usb3_ports) | |
553 | port_array[i] = xhci->usb3_ports[i]; | |
554 | else | |
555 | port_array[i] = | |
556 | xhci->usb2_ports[i - xhci->num_usb3_ports]; | |
557 | } | |
0f2a7930 SS |
558 | |
559 | /* Initial status is no changes */ | |
419a8e81 WG |
560 | retval = (ports + 8) / 8; |
561 | memset(buf, 0, retval); | |
0f2a7930 | 562 | status = 0; |
0f2a7930 | 563 | |
56192531 AX |
564 | mask = PORT_CSC | PORT_PEC | PORT_OCC; |
565 | ||
0f2a7930 SS |
566 | spin_lock_irqsave(&xhci->lock, flags); |
567 | /* For each port, did anything change? If so, set that bit in buf. */ | |
568 | for (i = 0; i < ports; i++) { | |
5308a91b | 569 | temp = xhci_readl(xhci, port_array[i]); |
56192531 | 570 | if ((temp & mask) != 0 || |
1d5810b6 | 571 | (xhci->port_c_suspend & 1 << i) || |
56192531 AX |
572 | (xhci->resume_done[i] && time_after_eq( |
573 | jiffies, xhci->resume_done[i]))) { | |
419a8e81 | 574 | buf[(i + 1) / 8] |= 1 << (i + 1) % 8; |
0f2a7930 SS |
575 | status = 1; |
576 | } | |
577 | } | |
578 | spin_unlock_irqrestore(&xhci->lock, flags); | |
579 | return status ? retval : 0; | |
580 | } | |
9777e3ce AX |
581 | |
582 | #ifdef CONFIG_PM | |
583 | ||
584 | int xhci_bus_suspend(struct usb_hcd *hcd) | |
585 | { | |
586 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
518e848e | 587 | int max_ports, port_index; |
5308a91b SS |
588 | u32 __iomem *port_array[15 + USB_MAXCHILDREN]; |
589 | int i; | |
9777e3ce AX |
590 | unsigned long flags; |
591 | ||
592 | xhci_dbg(xhci, "suspend root hub\n"); | |
518e848e | 593 | max_ports = HCS_MAX_PORTS(xhci->hcs_params1); |
5308a91b SS |
594 | for (i = 0; i < max_ports; i++) { |
595 | if (i < xhci->num_usb3_ports) | |
596 | port_array[i] = xhci->usb3_ports[i]; | |
597 | else | |
598 | port_array[i] = | |
599 | xhci->usb2_ports[i - xhci->num_usb3_ports]; | |
600 | } | |
9777e3ce AX |
601 | |
602 | spin_lock_irqsave(&xhci->lock, flags); | |
603 | ||
604 | if (hcd->self.root_hub->do_remote_wakeup) { | |
518e848e SS |
605 | port_index = max_ports; |
606 | while (port_index--) { | |
607 | if (xhci->resume_done[port_index] != 0) { | |
9777e3ce AX |
608 | spin_unlock_irqrestore(&xhci->lock, flags); |
609 | xhci_dbg(xhci, "suspend failed because " | |
610 | "port %d is resuming\n", | |
518e848e | 611 | port_index + 1); |
9777e3ce AX |
612 | return -EBUSY; |
613 | } | |
614 | } | |
615 | } | |
616 | ||
518e848e | 617 | port_index = max_ports; |
9777e3ce | 618 | xhci->bus_suspended = 0; |
518e848e | 619 | while (port_index--) { |
9777e3ce | 620 | /* suspend the port if the port is not suspended */ |
9777e3ce AX |
621 | u32 t1, t2; |
622 | int slot_id; | |
623 | ||
5308a91b | 624 | t1 = xhci_readl(xhci, port_array[port_index]); |
9777e3ce AX |
625 | t2 = xhci_port_state_to_neutral(t1); |
626 | ||
627 | if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) { | |
518e848e SS |
628 | xhci_dbg(xhci, "port %d not suspended\n", port_index); |
629 | slot_id = xhci_find_slot_id_by_port(xhci, | |
630 | port_index + 1); | |
9777e3ce AX |
631 | if (slot_id) { |
632 | spin_unlock_irqrestore(&xhci->lock, flags); | |
633 | xhci_stop_device(xhci, slot_id, 1); | |
634 | spin_lock_irqsave(&xhci->lock, flags); | |
635 | } | |
636 | t2 &= ~PORT_PLS_MASK; | |
637 | t2 |= PORT_LINK_STROBE | XDEV_U3; | |
518e848e | 638 | set_bit(port_index, &xhci->bus_suspended); |
9777e3ce AX |
639 | } |
640 | if (hcd->self.root_hub->do_remote_wakeup) { | |
641 | if (t1 & PORT_CONNECT) { | |
642 | t2 |= PORT_WKOC_E | PORT_WKDISC_E; | |
643 | t2 &= ~PORT_WKCONN_E; | |
644 | } else { | |
645 | t2 |= PORT_WKOC_E | PORT_WKCONN_E; | |
646 | t2 &= ~PORT_WKDISC_E; | |
647 | } | |
648 | } else | |
649 | t2 &= ~PORT_WAKE_BITS; | |
650 | ||
651 | t1 = xhci_port_state_to_neutral(t1); | |
652 | if (t1 != t2) | |
5308a91b | 653 | xhci_writel(xhci, t2, port_array[port_index]); |
9777e3ce AX |
654 | |
655 | if (DEV_HIGHSPEED(t1)) { | |
656 | /* enable remote wake up for USB 2.0 */ | |
657 | u32 __iomem *addr; | |
658 | u32 tmp; | |
659 | ||
5308a91b SS |
660 | /* Add one to the port status register address to get |
661 | * the port power control register address. | |
662 | */ | |
663 | addr = port_array[port_index] + 1; | |
9777e3ce AX |
664 | tmp = xhci_readl(xhci, addr); |
665 | tmp |= PORT_RWE; | |
666 | xhci_writel(xhci, tmp, addr); | |
667 | } | |
668 | } | |
669 | hcd->state = HC_STATE_SUSPENDED; | |
670 | xhci->next_statechange = jiffies + msecs_to_jiffies(10); | |
671 | spin_unlock_irqrestore(&xhci->lock, flags); | |
672 | return 0; | |
673 | } | |
674 | ||
675 | int xhci_bus_resume(struct usb_hcd *hcd) | |
676 | { | |
677 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
518e848e | 678 | int max_ports, port_index; |
5308a91b SS |
679 | u32 __iomem *port_array[15 + USB_MAXCHILDREN]; |
680 | int i; | |
9777e3ce AX |
681 | u32 temp; |
682 | unsigned long flags; | |
683 | ||
684 | xhci_dbg(xhci, "resume root hub\n"); | |
518e848e | 685 | max_ports = HCS_MAX_PORTS(xhci->hcs_params1); |
5308a91b SS |
686 | for (i = 0; i < max_ports; i++) { |
687 | if (i < xhci->num_usb3_ports) | |
688 | port_array[i] = xhci->usb3_ports[i]; | |
689 | else | |
690 | port_array[i] = | |
691 | xhci->usb2_ports[i - xhci->num_usb3_ports]; | |
692 | } | |
9777e3ce AX |
693 | |
694 | if (time_before(jiffies, xhci->next_statechange)) | |
695 | msleep(5); | |
696 | ||
697 | spin_lock_irqsave(&xhci->lock, flags); | |
698 | if (!HCD_HW_ACCESSIBLE(hcd)) { | |
699 | spin_unlock_irqrestore(&xhci->lock, flags); | |
700 | return -ESHUTDOWN; | |
701 | } | |
702 | ||
703 | /* delay the irqs */ | |
704 | temp = xhci_readl(xhci, &xhci->op_regs->command); | |
705 | temp &= ~CMD_EIE; | |
706 | xhci_writel(xhci, temp, &xhci->op_regs->command); | |
707 | ||
518e848e SS |
708 | port_index = max_ports; |
709 | while (port_index--) { | |
9777e3ce AX |
710 | /* Check whether need resume ports. If needed |
711 | resume port and disable remote wakeup */ | |
9777e3ce AX |
712 | u32 temp; |
713 | int slot_id; | |
714 | ||
5308a91b | 715 | temp = xhci_readl(xhci, port_array[port_index]); |
9777e3ce AX |
716 | if (DEV_SUPERSPEED(temp)) |
717 | temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS); | |
718 | else | |
719 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); | |
518e848e | 720 | if (test_bit(port_index, &xhci->bus_suspended) && |
9777e3ce AX |
721 | (temp & PORT_PLS_MASK)) { |
722 | if (DEV_SUPERSPEED(temp)) { | |
723 | temp = xhci_port_state_to_neutral(temp); | |
724 | temp &= ~PORT_PLS_MASK; | |
725 | temp |= PORT_LINK_STROBE | XDEV_U0; | |
5308a91b | 726 | xhci_writel(xhci, temp, port_array[port_index]); |
9777e3ce AX |
727 | } else { |
728 | temp = xhci_port_state_to_neutral(temp); | |
729 | temp &= ~PORT_PLS_MASK; | |
730 | temp |= PORT_LINK_STROBE | XDEV_RESUME; | |
5308a91b | 731 | xhci_writel(xhci, temp, port_array[port_index]); |
9777e3ce AX |
732 | |
733 | spin_unlock_irqrestore(&xhci->lock, flags); | |
734 | msleep(20); | |
735 | spin_lock_irqsave(&xhci->lock, flags); | |
736 | ||
5308a91b | 737 | temp = xhci_readl(xhci, port_array[port_index]); |
9777e3ce AX |
738 | temp = xhci_port_state_to_neutral(temp); |
739 | temp &= ~PORT_PLS_MASK; | |
740 | temp |= PORT_LINK_STROBE | XDEV_U0; | |
5308a91b | 741 | xhci_writel(xhci, temp, port_array[port_index]); |
9777e3ce | 742 | } |
518e848e | 743 | slot_id = xhci_find_slot_id_by_port(xhci, port_index + 1); |
9777e3ce AX |
744 | if (slot_id) |
745 | xhci_ring_device(xhci, slot_id); | |
746 | } else | |
5308a91b | 747 | xhci_writel(xhci, temp, port_array[port_index]); |
9777e3ce AX |
748 | |
749 | if (DEV_HIGHSPEED(temp)) { | |
750 | /* disable remote wake up for USB 2.0 */ | |
751 | u32 __iomem *addr; | |
752 | u32 tmp; | |
753 | ||
5308a91b SS |
754 | /* Add one to the port status register address to get |
755 | * the port power control register address. | |
756 | */ | |
757 | addr = port_array[port_index] + 1; | |
9777e3ce AX |
758 | tmp = xhci_readl(xhci, addr); |
759 | tmp &= ~PORT_RWE; | |
760 | xhci_writel(xhci, tmp, addr); | |
761 | } | |
762 | } | |
763 | ||
764 | (void) xhci_readl(xhci, &xhci->op_regs->command); | |
765 | ||
766 | xhci->next_statechange = jiffies + msecs_to_jiffies(5); | |
9777e3ce AX |
767 | /* re-enable irqs */ |
768 | temp = xhci_readl(xhci, &xhci->op_regs->command); | |
769 | temp |= CMD_EIE; | |
770 | xhci_writel(xhci, temp, &xhci->op_regs->command); | |
771 | temp = xhci_readl(xhci, &xhci->op_regs->command); | |
772 | ||
773 | spin_unlock_irqrestore(&xhci->lock, flags); | |
774 | return 0; | |
775 | } | |
776 | ||
436a3890 | 777 | #endif /* CONFIG_PM */ |