xHCI: warm reset support
[deliverable/linux.git] / drivers / usb / host / xhci-hub.c
CommitLineData
0f2a7930
SS
1/*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <asm/unaligned.h>
24
25#include "xhci.h"
26
9777e3ce
AX
27#define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
30
4bbb0ace
SS
31static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc, int ports)
0f2a7930 33{
0f2a7930
SS
34 u16 temp;
35
0f2a7930
SS
36 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
37 desc->bHubContrCurrent = 0;
38
39 desc->bNbrPorts = ports;
0f2a7930
SS
40 /* Ugh, these should be #defines, FIXME */
41 /* Using table 11-13 in USB 2.0 spec. */
42 temp = 0;
43 /* Bits 1:0 - support port power switching, or power always on */
44 if (HCC_PPC(xhci->hcc_params))
45 temp |= 0x0001;
46 else
47 temp |= 0x0002;
48 /* Bit 2 - root hubs are not part of a compound device */
49 /* Bits 4:3 - individual port over current protection */
50 temp |= 0x0008;
51 /* Bits 6:5 - no TTs in root ports */
52 /* Bit 7 - no port indicators */
28ccd296 53 desc->wHubCharacteristics = cpu_to_le16(temp);
0f2a7930
SS
54}
55
4bbb0ace
SS
56/* Fill in the USB 2.0 roothub descriptor */
57static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
58 struct usb_hub_descriptor *desc)
59{
60 int ports;
61 u16 temp;
62 __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
63 u32 portsc;
64 unsigned int i;
65
66 ports = xhci->num_usb2_ports;
67
68 xhci_common_hub_descriptor(xhci, desc, ports);
69 desc->bDescriptorType = 0x29;
70 temp = 1 + (ports / 8);
71 desc->bDescLength = 7 + 2 * temp;
72
73 /* The Device Removable bits are reported on a byte granularity.
74 * If the port doesn't exist within that byte, the bit is set to 0.
75 */
76 memset(port_removable, 0, sizeof(port_removable));
77 for (i = 0; i < ports; i++) {
78 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
79 /* If a device is removable, PORTSC reports a 0, same as in the
80 * hub descriptor DeviceRemovable bits.
81 */
82 if (portsc & PORT_DEV_REMOVE)
83 /* This math is hairy because bit 0 of DeviceRemovable
84 * is reserved, and bit 1 is for port 1, etc.
85 */
86 port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
87 }
88
89 /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
90 * ports on it. The USB 2.0 specification says that there are two
91 * variable length fields at the end of the hub descriptor:
92 * DeviceRemovable and PortPwrCtrlMask. But since we can have less than
93 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
94 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
95 * 0xFF, so we initialize the both arrays (DeviceRemovable and
96 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
97 * set of ports that actually exist.
98 */
99 memset(desc->u.hs.DeviceRemovable, 0xff,
100 sizeof(desc->u.hs.DeviceRemovable));
101 memset(desc->u.hs.PortPwrCtrlMask, 0xff,
102 sizeof(desc->u.hs.PortPwrCtrlMask));
103
104 for (i = 0; i < (ports + 1 + 7) / 8; i++)
105 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
106 sizeof(__u8));
107}
108
109/* Fill in the USB 3.0 roothub descriptor */
110static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
111 struct usb_hub_descriptor *desc)
112{
113 int ports;
114 u16 port_removable;
115 u32 portsc;
116 unsigned int i;
117
118 ports = xhci->num_usb3_ports;
119 xhci_common_hub_descriptor(xhci, desc, ports);
120 desc->bDescriptorType = 0x2a;
121 desc->bDescLength = 12;
122
123 /* header decode latency should be zero for roothubs,
124 * see section 4.23.5.2.
125 */
126 desc->u.ss.bHubHdrDecLat = 0;
127 desc->u.ss.wHubDelay = 0;
128
129 port_removable = 0;
130 /* bit 0 is reserved, bit 1 is for port 1, etc. */
131 for (i = 0; i < ports; i++) {
132 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
133 if (portsc & PORT_DEV_REMOVE)
134 port_removable |= 1 << (i + 1);
135 }
136 memset(&desc->u.ss.DeviceRemovable,
137 (__force __u16) cpu_to_le16(port_removable),
138 sizeof(__u16));
139}
140
141static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
142 struct usb_hub_descriptor *desc)
143{
144
145 if (hcd->speed == HCD_USB3)
146 xhci_usb3_hub_descriptor(hcd, xhci, desc);
147 else
148 xhci_usb2_hub_descriptor(hcd, xhci, desc);
149
150}
151
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SS
152static unsigned int xhci_port_speed(unsigned int port_status)
153{
154 if (DEV_LOWSPEED(port_status))
288ead45 155 return USB_PORT_STAT_LOW_SPEED;
0f2a7930 156 if (DEV_HIGHSPEED(port_status))
288ead45 157 return USB_PORT_STAT_HIGH_SPEED;
0f2a7930
SS
158 /*
159 * FIXME: Yes, we should check for full speed, but the core uses that as
160 * a default in portspeed() in usb/core/hub.c (which is the only place
288ead45 161 * USB_PORT_STAT_*_SPEED is used).
0f2a7930
SS
162 */
163 return 0;
164}
165
166/*
167 * These bits are Read Only (RO) and should be saved and written to the
168 * registers: 0, 3, 10:13, 30
169 * connect status, over-current status, port speed, and device removable.
170 * connect status and port speed are also sticky - meaning they're in
171 * the AUX well and they aren't changed by a hot, warm, or cold reset.
172 */
173#define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
174/*
175 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
176 * bits 5:8, 9, 14:15, 25:27
177 * link state, port power, port indicator state, "wake on" enable state
178 */
179#define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
180/*
181 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
182 * bit 4 (port reset)
183 */
184#define XHCI_PORT_RW1S ((1<<4))
185/*
186 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
187 * bits 1, 17, 18, 19, 20, 21, 22, 23
188 * port enable/disable, and
189 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
190 * over-current, reset, link state, and L1 change
191 */
192#define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
193/*
194 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
195 * latched in
196 */
197#define XHCI_PORT_RW ((1<<16))
198/*
199 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
200 * bits 2, 24, 28:31
201 */
202#define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
203
204/*
205 * Given a port state, this function returns a value that would result in the
206 * port being in the same state, if the value was written to the port status
207 * control register.
208 * Save Read Only (RO) bits and save read/write bits where
209 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
210 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
211 */
56192531 212u32 xhci_port_state_to_neutral(u32 state)
0f2a7930
SS
213{
214 /* Save read-only status and port state */
215 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
216}
217
be88fe4f
AX
218/*
219 * find slot id based on port number.
f6ff0ac8 220 * @port: The one-based port number from one of the two split roothubs.
be88fe4f 221 */
5233630f
SS
222int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
223 u16 port)
be88fe4f
AX
224{
225 int slot_id;
226 int i;
f6ff0ac8 227 enum usb_device_speed speed;
be88fe4f
AX
228
229 slot_id = 0;
230 for (i = 0; i < MAX_HC_SLOTS; i++) {
231 if (!xhci->devs[i])
232 continue;
f6ff0ac8
SS
233 speed = xhci->devs[i]->udev->speed;
234 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
235 && xhci->devs[i]->port == port) {
be88fe4f
AX
236 slot_id = i;
237 break;
238 }
239 }
240
241 return slot_id;
242}
243
244/*
245 * Stop device
246 * It issues stop endpoint command for EP 0 to 30. And wait the last command
247 * to complete.
248 * suspend will set to 1, if suspend bit need to set in command.
249 */
250static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
251{
252 struct xhci_virt_device *virt_dev;
253 struct xhci_command *cmd;
254 unsigned long flags;
255 int timeleft;
256 int ret;
257 int i;
258
259 ret = 0;
260 virt_dev = xhci->devs[slot_id];
261 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
262 if (!cmd) {
263 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
264 return -ENOMEM;
265 }
266
267 spin_lock_irqsave(&xhci->lock, flags);
268 for (i = LAST_EP_INDEX; i > 0; i--) {
269 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
270 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
271 }
272 cmd->command_trb = xhci->cmd_ring->enqueue;
273 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
274 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
275 xhci_ring_cmd_db(xhci);
276 spin_unlock_irqrestore(&xhci->lock, flags);
277
278 /* Wait for last stop endpoint command to finish */
279 timeleft = wait_for_completion_interruptible_timeout(
280 cmd->completion,
281 USB_CTRL_SET_TIMEOUT);
282 if (timeleft <= 0) {
283 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
284 timeleft == 0 ? "Timeout" : "Signal");
285 spin_lock_irqsave(&xhci->lock, flags);
286 /* The timeout might have raced with the event ring handler, so
287 * only delete from the list if the item isn't poisoned.
288 */
289 if (cmd->cmd_list.next != LIST_POISON1)
290 list_del(&cmd->cmd_list);
291 spin_unlock_irqrestore(&xhci->lock, flags);
292 ret = -ETIME;
293 goto command_cleanup;
294 }
295
296command_cleanup:
297 xhci_free_command(xhci, cmd);
298 return ret;
299}
300
301/*
302 * Ring device, it rings the all doorbells unconditionally.
303 */
56192531 304void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
be88fe4f
AX
305{
306 int i;
307
308 for (i = 0; i < LAST_EP_INDEX + 1; i++)
309 if (xhci->devs[slot_id]->eps[i].ring &&
310 xhci->devs[slot_id]->eps[i].ring->dequeue)
311 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
312
313 return;
314}
315
f6ff0ac8 316static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
28ccd296 317 u16 wIndex, __le32 __iomem *addr, u32 port_status)
6219c047 318{
6dd0a3a7 319 /* Don't allow the USB core to disable SuperSpeed ports. */
f6ff0ac8 320 if (hcd->speed == HCD_USB3) {
6dd0a3a7
SS
321 xhci_dbg(xhci, "Ignoring request to disable "
322 "SuperSpeed port.\n");
323 return;
324 }
325
6219c047
SS
326 /* Write 1 to disable the port */
327 xhci_writel(xhci, port_status | PORT_PE, addr);
328 port_status = xhci_readl(xhci, addr);
329 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
330 wIndex, port_status);
331}
332
34fb562a 333static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
28ccd296 334 u16 wIndex, __le32 __iomem *addr, u32 port_status)
34fb562a
SS
335{
336 char *port_change_bit;
337 u32 status;
338
339 switch (wValue) {
340 case USB_PORT_FEAT_C_RESET:
341 status = PORT_RC;
342 port_change_bit = "reset";
343 break;
a11496eb
AX
344 case USB_PORT_FEAT_C_BH_PORT_RESET:
345 status = PORT_WRC;
346 port_change_bit = "warm(BH) reset";
347 break;
34fb562a
SS
348 case USB_PORT_FEAT_C_CONNECTION:
349 status = PORT_CSC;
350 port_change_bit = "connect";
351 break;
352 case USB_PORT_FEAT_C_OVER_CURRENT:
353 status = PORT_OCC;
354 port_change_bit = "over-current";
355 break;
6219c047
SS
356 case USB_PORT_FEAT_C_ENABLE:
357 status = PORT_PEC;
358 port_change_bit = "enable/disable";
359 break;
be88fe4f
AX
360 case USB_PORT_FEAT_C_SUSPEND:
361 status = PORT_PLC;
362 port_change_bit = "suspend/resume";
363 break;
34fb562a
SS
364 default:
365 /* Should never happen */
366 return;
367 }
368 /* Change bits are all write 1 to clear */
369 xhci_writel(xhci, port_status | status, addr);
370 port_status = xhci_readl(xhci, addr);
371 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
372 port_change_bit, wIndex, port_status);
373}
374
0f2a7930
SS
375int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
376 u16 wIndex, char *buf, u16 wLength)
377{
378 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
379 int ports;
380 unsigned long flags;
56192531 381 u32 temp, temp1, status;
0f2a7930 382 int retval = 0;
28ccd296 383 __le32 __iomem **port_array;
be88fe4f 384 int slot_id;
20b67cf5 385 struct xhci_bus_state *bus_state;
0f2a7930 386
f6ff0ac8
SS
387 if (hcd->speed == HCD_USB3) {
388 ports = xhci->num_usb3_ports;
389 port_array = xhci->usb3_ports;
390 } else {
391 ports = xhci->num_usb2_ports;
392 port_array = xhci->usb2_ports;
5308a91b 393 }
20b67cf5 394 bus_state = &xhci->bus_state[hcd_index(hcd)];
0f2a7930
SS
395
396 spin_lock_irqsave(&xhci->lock, flags);
397 switch (typeReq) {
398 case GetHubStatus:
399 /* No power source, over-current reported per port */
400 memset(buf, 0, 4);
401 break;
402 case GetHubDescriptor:
4bbb0ace
SS
403 /* Check to make sure userspace is asking for the USB 3.0 hub
404 * descriptor for the USB 3.0 roothub. If not, we stall the
405 * endpoint, like external hubs do.
406 */
407 if (hcd->speed == HCD_USB3 &&
408 (wLength < USB_DT_SS_HUB_SIZE ||
409 wValue != (USB_DT_SS_HUB << 8))) {
410 xhci_dbg(xhci, "Wrong hub descriptor type for "
411 "USB 3.0 roothub.\n");
412 goto error;
413 }
f6ff0ac8
SS
414 xhci_hub_descriptor(hcd, xhci,
415 (struct usb_hub_descriptor *) buf);
0f2a7930
SS
416 break;
417 case GetPortStatus:
418 if (!wIndex || wIndex > ports)
419 goto error;
420 wIndex--;
421 status = 0;
5308a91b 422 temp = xhci_readl(xhci, port_array[wIndex]);
f9de8151
SS
423 if (temp == 0xffffffff) {
424 retval = -ENODEV;
425 break;
426 }
0f2a7930
SS
427 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
428
4bbb0ace
SS
429 /* FIXME - should we return a port status value like the USB
430 * 3.0 external hubs do?
431 */
0f2a7930
SS
432 /* wPortChange bits */
433 if (temp & PORT_CSC)
749da5f8 434 status |= USB_PORT_STAT_C_CONNECTION << 16;
0f2a7930 435 if (temp & PORT_PEC)
749da5f8 436 status |= USB_PORT_STAT_C_ENABLE << 16;
0f2a7930 437 if ((temp & PORT_OCC))
749da5f8 438 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
0f2a7930 439 /*
be88fe4f 440 * FIXME ignoring reset and USB 2.1/3.0 specific
0f2a7930
SS
441 * changes
442 */
be88fe4f
AX
443 if ((temp & PORT_PLS_MASK) == XDEV_U3
444 && (temp & PORT_POWER))
445 status |= 1 << USB_PORT_FEAT_SUSPEND;
56192531
AX
446 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
447 if ((temp & PORT_RESET) || !(temp & PORT_PE))
448 goto error;
449 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
20b67cf5 450 bus_state->resume_done[wIndex])) {
56192531
AX
451 xhci_dbg(xhci, "Resume USB2 port %d\n",
452 wIndex + 1);
20b67cf5 453 bus_state->resume_done[wIndex] = 0;
56192531
AX
454 temp1 = xhci_port_state_to_neutral(temp);
455 temp1 &= ~PORT_PLS_MASK;
456 temp1 |= PORT_LINK_STROBE | XDEV_U0;
5308a91b 457 xhci_writel(xhci, temp1, port_array[wIndex]);
56192531
AX
458
459 xhci_dbg(xhci, "set port %d resume\n",
460 wIndex + 1);
5233630f 461 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
56192531
AX
462 wIndex + 1);
463 if (!slot_id) {
464 xhci_dbg(xhci, "slot_id is zero\n");
465 goto error;
466 }
467 xhci_ring_device(xhci, slot_id);
20b67cf5
SS
468 bus_state->port_c_suspend |= 1 << wIndex;
469 bus_state->suspended_ports &= ~(1 << wIndex);
56192531
AX
470 }
471 }
be88fe4f
AX
472 if ((temp & PORT_PLS_MASK) == XDEV_U0
473 && (temp & PORT_POWER)
20b67cf5
SS
474 && (bus_state->suspended_ports & (1 << wIndex))) {
475 bus_state->suspended_ports &= ~(1 << wIndex);
476 bus_state->port_c_suspend |= 1 << wIndex;
be88fe4f 477 }
0f2a7930 478 if (temp & PORT_CONNECT) {
749da5f8 479 status |= USB_PORT_STAT_CONNECTION;
0f2a7930
SS
480 status |= xhci_port_speed(temp);
481 }
482 if (temp & PORT_PE)
749da5f8 483 status |= USB_PORT_STAT_ENABLE;
0f2a7930 484 if (temp & PORT_OC)
749da5f8 485 status |= USB_PORT_STAT_OVERCURRENT;
0f2a7930 486 if (temp & PORT_RESET)
749da5f8 487 status |= USB_PORT_STAT_RESET;
0f2a7930 488 if (temp & PORT_POWER)
749da5f8 489 status |= USB_PORT_STAT_POWER;
20b67cf5 490 if (bus_state->port_c_suspend & (1 << wIndex))
be88fe4f 491 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
0f2a7930
SS
492 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
493 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
494 break;
495 case SetPortFeature:
496 wIndex &= 0xff;
497 if (!wIndex || wIndex > ports)
498 goto error;
499 wIndex--;
5308a91b 500 temp = xhci_readl(xhci, port_array[wIndex]);
f9de8151
SS
501 if (temp == 0xffffffff) {
502 retval = -ENODEV;
503 break;
504 }
0f2a7930 505 temp = xhci_port_state_to_neutral(temp);
4bbb0ace 506 /* FIXME: What new port features do we need to support? */
0f2a7930 507 switch (wValue) {
be88fe4f 508 case USB_PORT_FEAT_SUSPEND:
5308a91b 509 temp = xhci_readl(xhci, port_array[wIndex]);
be88fe4f
AX
510 /* In spec software should not attempt to suspend
511 * a port unless the port reports that it is in the
512 * enabled (PED = ‘1’,PLS < ‘3’) state.
513 */
514 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
515 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
516 xhci_warn(xhci, "USB core suspending device "
517 "not in U0/U1/U2.\n");
518 goto error;
519 }
520
5233630f
SS
521 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
522 wIndex + 1);
be88fe4f
AX
523 if (!slot_id) {
524 xhci_warn(xhci, "slot_id is zero\n");
525 goto error;
526 }
527 /* unlock to execute stop endpoint commands */
528 spin_unlock_irqrestore(&xhci->lock, flags);
529 xhci_stop_device(xhci, slot_id, 1);
530 spin_lock_irqsave(&xhci->lock, flags);
531
532 temp = xhci_port_state_to_neutral(temp);
533 temp &= ~PORT_PLS_MASK;
534 temp |= PORT_LINK_STROBE | XDEV_U3;
5308a91b 535 xhci_writel(xhci, temp, port_array[wIndex]);
be88fe4f
AX
536
537 spin_unlock_irqrestore(&xhci->lock, flags);
538 msleep(10); /* wait device to enter */
539 spin_lock_irqsave(&xhci->lock, flags);
540
5308a91b 541 temp = xhci_readl(xhci, port_array[wIndex]);
20b67cf5 542 bus_state->suspended_ports |= 1 << wIndex;
be88fe4f 543 break;
0f2a7930
SS
544 case USB_PORT_FEAT_POWER:
545 /*
546 * Turn on ports, even if there isn't per-port switching.
547 * HC will report connect events even before this is set.
548 * However, khubd will ignore the roothub events until
549 * the roothub is registered.
550 */
5308a91b
SS
551 xhci_writel(xhci, temp | PORT_POWER,
552 port_array[wIndex]);
0f2a7930 553
5308a91b 554 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS
555 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
556 break;
557 case USB_PORT_FEAT_RESET:
558 temp = (temp | PORT_RESET);
5308a91b 559 xhci_writel(xhci, temp, port_array[wIndex]);
0f2a7930 560
5308a91b 561 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS
562 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
563 break;
a11496eb
AX
564 case USB_PORT_FEAT_BH_PORT_RESET:
565 temp |= PORT_WR;
566 xhci_writel(xhci, temp, port_array[wIndex]);
567
568 temp = xhci_readl(xhci, port_array[wIndex]);
569 break;
0f2a7930
SS
570 default:
571 goto error;
572 }
5308a91b
SS
573 /* unblock any posted writes */
574 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS
575 break;
576 case ClearPortFeature:
577 if (!wIndex || wIndex > ports)
578 goto error;
579 wIndex--;
5308a91b 580 temp = xhci_readl(xhci, port_array[wIndex]);
f9de8151
SS
581 if (temp == 0xffffffff) {
582 retval = -ENODEV;
583 break;
584 }
4bbb0ace 585 /* FIXME: What new port features do we need to support? */
0f2a7930
SS
586 temp = xhci_port_state_to_neutral(temp);
587 switch (wValue) {
be88fe4f 588 case USB_PORT_FEAT_SUSPEND:
5308a91b 589 temp = xhci_readl(xhci, port_array[wIndex]);
be88fe4f
AX
590 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
591 xhci_dbg(xhci, "PORTSC %04x\n", temp);
592 if (temp & PORT_RESET)
593 goto error;
594 if (temp & XDEV_U3) {
595 if ((temp & PORT_PE) == 0)
596 goto error;
597 if (DEV_SUPERSPEED(temp)) {
598 temp = xhci_port_state_to_neutral(temp);
599 temp &= ~PORT_PLS_MASK;
600 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b
SS
601 xhci_writel(xhci, temp,
602 port_array[wIndex]);
603 xhci_readl(xhci, port_array[wIndex]);
be88fe4f
AX
604 } else {
605 temp = xhci_port_state_to_neutral(temp);
606 temp &= ~PORT_PLS_MASK;
607 temp |= PORT_LINK_STROBE | XDEV_RESUME;
5308a91b
SS
608 xhci_writel(xhci, temp,
609 port_array[wIndex]);
be88fe4f
AX
610
611 spin_unlock_irqrestore(&xhci->lock,
612 flags);
613 msleep(20);
614 spin_lock_irqsave(&xhci->lock, flags);
615
5308a91b
SS
616 temp = xhci_readl(xhci,
617 port_array[wIndex]);
be88fe4f
AX
618 temp = xhci_port_state_to_neutral(temp);
619 temp &= ~PORT_PLS_MASK;
620 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b
SS
621 xhci_writel(xhci, temp,
622 port_array[wIndex]);
be88fe4f 623 }
20b67cf5 624 bus_state->port_c_suspend |= 1 << wIndex;
be88fe4f
AX
625 }
626
5233630f
SS
627 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
628 wIndex + 1);
be88fe4f
AX
629 if (!slot_id) {
630 xhci_dbg(xhci, "slot_id is zero\n");
631 goto error;
632 }
633 xhci_ring_device(xhci, slot_id);
634 break;
635 case USB_PORT_FEAT_C_SUSPEND:
20b67cf5 636 bus_state->port_c_suspend &= ~(1 << wIndex);
0f2a7930 637 case USB_PORT_FEAT_C_RESET:
a11496eb 638 case USB_PORT_FEAT_C_BH_PORT_RESET:
0f2a7930 639 case USB_PORT_FEAT_C_CONNECTION:
0f2a7930 640 case USB_PORT_FEAT_C_OVER_CURRENT:
6219c047 641 case USB_PORT_FEAT_C_ENABLE:
34fb562a 642 xhci_clear_port_change_bit(xhci, wValue, wIndex,
5308a91b 643 port_array[wIndex], temp);
0f2a7930 644 break;
6219c047 645 case USB_PORT_FEAT_ENABLE:
f6ff0ac8 646 xhci_disable_port(hcd, xhci, wIndex,
5308a91b 647 port_array[wIndex], temp);
6219c047 648 break;
0f2a7930
SS
649 default:
650 goto error;
651 }
0f2a7930
SS
652 break;
653 default:
654error:
655 /* "stall" on error */
656 retval = -EPIPE;
657 }
658 spin_unlock_irqrestore(&xhci->lock, flags);
659 return retval;
660}
661
662/*
663 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
664 * Ports are 0-indexed from the HCD point of view,
665 * and 1-indexed from the USB core pointer of view.
0f2a7930
SS
666 *
667 * Note that the status change bits will be cleared as soon as a port status
668 * change event is generated, so we use the saved status from that event.
669 */
670int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
671{
672 unsigned long flags;
673 u32 temp, status;
56192531 674 u32 mask;
0f2a7930
SS
675 int i, retval;
676 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
677 int ports;
28ccd296 678 __le32 __iomem **port_array;
20b67cf5 679 struct xhci_bus_state *bus_state;
0f2a7930 680
f6ff0ac8
SS
681 if (hcd->speed == HCD_USB3) {
682 ports = xhci->num_usb3_ports;
683 port_array = xhci->usb3_ports;
684 } else {
685 ports = xhci->num_usb2_ports;
686 port_array = xhci->usb2_ports;
5308a91b 687 }
20b67cf5 688 bus_state = &xhci->bus_state[hcd_index(hcd)];
0f2a7930
SS
689
690 /* Initial status is no changes */
419a8e81
WG
691 retval = (ports + 8) / 8;
692 memset(buf, 0, retval);
0f2a7930 693 status = 0;
0f2a7930 694
56192531
AX
695 mask = PORT_CSC | PORT_PEC | PORT_OCC;
696
0f2a7930
SS
697 spin_lock_irqsave(&xhci->lock, flags);
698 /* For each port, did anything change? If so, set that bit in buf. */
699 for (i = 0; i < ports; i++) {
5308a91b 700 temp = xhci_readl(xhci, port_array[i]);
f9de8151
SS
701 if (temp == 0xffffffff) {
702 retval = -ENODEV;
703 break;
704 }
56192531 705 if ((temp & mask) != 0 ||
20b67cf5
SS
706 (bus_state->port_c_suspend & 1 << i) ||
707 (bus_state->resume_done[i] && time_after_eq(
708 jiffies, bus_state->resume_done[i]))) {
419a8e81 709 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
0f2a7930
SS
710 status = 1;
711 }
712 }
713 spin_unlock_irqrestore(&xhci->lock, flags);
714 return status ? retval : 0;
715}
9777e3ce
AX
716
717#ifdef CONFIG_PM
718
719int xhci_bus_suspend(struct usb_hcd *hcd)
720{
721 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
518e848e 722 int max_ports, port_index;
28ccd296 723 __le32 __iomem **port_array;
20b67cf5 724 struct xhci_bus_state *bus_state;
9777e3ce
AX
725 unsigned long flags;
726
f6ff0ac8
SS
727 if (hcd->speed == HCD_USB3) {
728 max_ports = xhci->num_usb3_ports;
729 port_array = xhci->usb3_ports;
730 xhci_dbg(xhci, "suspend USB 3.0 root hub\n");
731 } else {
732 max_ports = xhci->num_usb2_ports;
733 port_array = xhci->usb2_ports;
734 xhci_dbg(xhci, "suspend USB 2.0 root hub\n");
5308a91b 735 }
20b67cf5 736 bus_state = &xhci->bus_state[hcd_index(hcd)];
9777e3ce
AX
737
738 spin_lock_irqsave(&xhci->lock, flags);
739
740 if (hcd->self.root_hub->do_remote_wakeup) {
518e848e
SS
741 port_index = max_ports;
742 while (port_index--) {
20b67cf5 743 if (bus_state->resume_done[port_index] != 0) {
9777e3ce
AX
744 spin_unlock_irqrestore(&xhci->lock, flags);
745 xhci_dbg(xhci, "suspend failed because "
746 "port %d is resuming\n",
518e848e 747 port_index + 1);
9777e3ce
AX
748 return -EBUSY;
749 }
750 }
751 }
752
518e848e 753 port_index = max_ports;
20b67cf5 754 bus_state->bus_suspended = 0;
518e848e 755 while (port_index--) {
9777e3ce 756 /* suspend the port if the port is not suspended */
9777e3ce
AX
757 u32 t1, t2;
758 int slot_id;
759
5308a91b 760 t1 = xhci_readl(xhci, port_array[port_index]);
9777e3ce
AX
761 t2 = xhci_port_state_to_neutral(t1);
762
763 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
518e848e 764 xhci_dbg(xhci, "port %d not suspended\n", port_index);
5233630f 765 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
518e848e 766 port_index + 1);
9777e3ce
AX
767 if (slot_id) {
768 spin_unlock_irqrestore(&xhci->lock, flags);
769 xhci_stop_device(xhci, slot_id, 1);
770 spin_lock_irqsave(&xhci->lock, flags);
771 }
772 t2 &= ~PORT_PLS_MASK;
773 t2 |= PORT_LINK_STROBE | XDEV_U3;
20b67cf5 774 set_bit(port_index, &bus_state->bus_suspended);
9777e3ce
AX
775 }
776 if (hcd->self.root_hub->do_remote_wakeup) {
777 if (t1 & PORT_CONNECT) {
778 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
779 t2 &= ~PORT_WKCONN_E;
780 } else {
781 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
782 t2 &= ~PORT_WKDISC_E;
783 }
784 } else
785 t2 &= ~PORT_WAKE_BITS;
786
787 t1 = xhci_port_state_to_neutral(t1);
788 if (t1 != t2)
5308a91b 789 xhci_writel(xhci, t2, port_array[port_index]);
9777e3ce
AX
790
791 if (DEV_HIGHSPEED(t1)) {
792 /* enable remote wake up for USB 2.0 */
28ccd296 793 __le32 __iomem *addr;
9777e3ce
AX
794 u32 tmp;
795
5308a91b
SS
796 /* Add one to the port status register address to get
797 * the port power control register address.
798 */
799 addr = port_array[port_index] + 1;
9777e3ce
AX
800 tmp = xhci_readl(xhci, addr);
801 tmp |= PORT_RWE;
802 xhci_writel(xhci, tmp, addr);
803 }
804 }
805 hcd->state = HC_STATE_SUSPENDED;
20b67cf5 806 bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
9777e3ce
AX
807 spin_unlock_irqrestore(&xhci->lock, flags);
808 return 0;
809}
810
811int xhci_bus_resume(struct usb_hcd *hcd)
812{
813 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
518e848e 814 int max_ports, port_index;
28ccd296 815 __le32 __iomem **port_array;
20b67cf5 816 struct xhci_bus_state *bus_state;
9777e3ce
AX
817 u32 temp;
818 unsigned long flags;
819
f6ff0ac8
SS
820 if (hcd->speed == HCD_USB3) {
821 max_ports = xhci->num_usb3_ports;
822 port_array = xhci->usb3_ports;
823 xhci_dbg(xhci, "resume USB 3.0 root hub\n");
824 } else {
825 max_ports = xhci->num_usb2_ports;
826 port_array = xhci->usb2_ports;
827 xhci_dbg(xhci, "resume USB 2.0 root hub\n");
5308a91b 828 }
20b67cf5 829 bus_state = &xhci->bus_state[hcd_index(hcd)];
9777e3ce 830
20b67cf5 831 if (time_before(jiffies, bus_state->next_statechange))
9777e3ce
AX
832 msleep(5);
833
834 spin_lock_irqsave(&xhci->lock, flags);
835 if (!HCD_HW_ACCESSIBLE(hcd)) {
836 spin_unlock_irqrestore(&xhci->lock, flags);
837 return -ESHUTDOWN;
838 }
839
840 /* delay the irqs */
841 temp = xhci_readl(xhci, &xhci->op_regs->command);
842 temp &= ~CMD_EIE;
843 xhci_writel(xhci, temp, &xhci->op_regs->command);
844
518e848e
SS
845 port_index = max_ports;
846 while (port_index--) {
9777e3ce
AX
847 /* Check whether need resume ports. If needed
848 resume port and disable remote wakeup */
9777e3ce
AX
849 u32 temp;
850 int slot_id;
851
5308a91b 852 temp = xhci_readl(xhci, port_array[port_index]);
9777e3ce
AX
853 if (DEV_SUPERSPEED(temp))
854 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
855 else
856 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
20b67cf5 857 if (test_bit(port_index, &bus_state->bus_suspended) &&
9777e3ce
AX
858 (temp & PORT_PLS_MASK)) {
859 if (DEV_SUPERSPEED(temp)) {
860 temp = xhci_port_state_to_neutral(temp);
861 temp &= ~PORT_PLS_MASK;
862 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b 863 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce
AX
864 } else {
865 temp = xhci_port_state_to_neutral(temp);
866 temp &= ~PORT_PLS_MASK;
867 temp |= PORT_LINK_STROBE | XDEV_RESUME;
5308a91b 868 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce
AX
869
870 spin_unlock_irqrestore(&xhci->lock, flags);
871 msleep(20);
872 spin_lock_irqsave(&xhci->lock, flags);
873
5308a91b 874 temp = xhci_readl(xhci, port_array[port_index]);
9777e3ce
AX
875 temp = xhci_port_state_to_neutral(temp);
876 temp &= ~PORT_PLS_MASK;
877 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b 878 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce 879 }
5233630f
SS
880 slot_id = xhci_find_slot_id_by_port(hcd,
881 xhci, port_index + 1);
9777e3ce
AX
882 if (slot_id)
883 xhci_ring_device(xhci, slot_id);
884 } else
5308a91b 885 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce
AX
886
887 if (DEV_HIGHSPEED(temp)) {
888 /* disable remote wake up for USB 2.0 */
28ccd296 889 __le32 __iomem *addr;
9777e3ce
AX
890 u32 tmp;
891
5308a91b
SS
892 /* Add one to the port status register address to get
893 * the port power control register address.
894 */
895 addr = port_array[port_index] + 1;
9777e3ce
AX
896 tmp = xhci_readl(xhci, addr);
897 tmp &= ~PORT_RWE;
898 xhci_writel(xhci, tmp, addr);
899 }
900 }
901
902 (void) xhci_readl(xhci, &xhci->op_regs->command);
903
20b67cf5 904 bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
9777e3ce
AX
905 /* re-enable irqs */
906 temp = xhci_readl(xhci, &xhci->op_regs->command);
907 temp |= CMD_EIE;
908 xhci_writel(xhci, temp, &xhci->op_regs->command);
909 temp = xhci_readl(xhci, &xhci->op_regs->command);
910
911 spin_unlock_irqrestore(&xhci->lock, flags);
912 return 0;
913}
914
436a3890 915#endif /* CONFIG_PM */
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