USB: Set usb_hcd->state and flags for shared roothubs.
[deliverable/linux.git] / drivers / usb / host / xhci-hub.c
CommitLineData
0f2a7930
SS
1/*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <asm/unaligned.h>
24
25#include "xhci.h"
26
9777e3ce
AX
27#define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
30
0f2a7930
SS
31static void xhci_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc)
33{
34 int ports;
35 u16 temp;
36
37 ports = HCS_MAX_PORTS(xhci->hcs_params1);
38
39 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
40 desc->bDescriptorType = 0x29;
41 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
42 desc->bHubContrCurrent = 0;
43
44 desc->bNbrPorts = ports;
45 temp = 1 + (ports / 8);
46 desc->bDescLength = 7 + 2 * temp;
47
dbe79bbe
JY
48 memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
49 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
0f2a7930
SS
50
51 /* Ugh, these should be #defines, FIXME */
52 /* Using table 11-13 in USB 2.0 spec. */
53 temp = 0;
54 /* Bits 1:0 - support port power switching, or power always on */
55 if (HCC_PPC(xhci->hcc_params))
56 temp |= 0x0001;
57 else
58 temp |= 0x0002;
59 /* Bit 2 - root hubs are not part of a compound device */
60 /* Bits 4:3 - individual port over current protection */
61 temp |= 0x0008;
62 /* Bits 6:5 - no TTs in root ports */
63 /* Bit 7 - no port indicators */
64 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
65}
66
67static unsigned int xhci_port_speed(unsigned int port_status)
68{
69 if (DEV_LOWSPEED(port_status))
288ead45 70 return USB_PORT_STAT_LOW_SPEED;
0f2a7930 71 if (DEV_HIGHSPEED(port_status))
288ead45 72 return USB_PORT_STAT_HIGH_SPEED;
0f2a7930 73 if (DEV_SUPERSPEED(port_status))
288ead45 74 return USB_PORT_STAT_SUPER_SPEED;
0f2a7930
SS
75 /*
76 * FIXME: Yes, we should check for full speed, but the core uses that as
77 * a default in portspeed() in usb/core/hub.c (which is the only place
288ead45 78 * USB_PORT_STAT_*_SPEED is used).
0f2a7930
SS
79 */
80 return 0;
81}
82
83/*
84 * These bits are Read Only (RO) and should be saved and written to the
85 * registers: 0, 3, 10:13, 30
86 * connect status, over-current status, port speed, and device removable.
87 * connect status and port speed are also sticky - meaning they're in
88 * the AUX well and they aren't changed by a hot, warm, or cold reset.
89 */
90#define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
91/*
92 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
93 * bits 5:8, 9, 14:15, 25:27
94 * link state, port power, port indicator state, "wake on" enable state
95 */
96#define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
97/*
98 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
99 * bit 4 (port reset)
100 */
101#define XHCI_PORT_RW1S ((1<<4))
102/*
103 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
104 * bits 1, 17, 18, 19, 20, 21, 22, 23
105 * port enable/disable, and
106 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
107 * over-current, reset, link state, and L1 change
108 */
109#define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
110/*
111 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
112 * latched in
113 */
114#define XHCI_PORT_RW ((1<<16))
115/*
116 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
117 * bits 2, 24, 28:31
118 */
119#define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
120
121/*
122 * Given a port state, this function returns a value that would result in the
123 * port being in the same state, if the value was written to the port status
124 * control register.
125 * Save Read Only (RO) bits and save read/write bits where
126 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
127 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
128 */
56192531 129u32 xhci_port_state_to_neutral(u32 state)
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SS
130{
131 /* Save read-only status and port state */
132 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
133}
134
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AX
135/*
136 * find slot id based on port number.
137 */
56192531 138int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
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AX
139{
140 int slot_id;
141 int i;
142
143 slot_id = 0;
144 for (i = 0; i < MAX_HC_SLOTS; i++) {
145 if (!xhci->devs[i])
146 continue;
147 if (xhci->devs[i]->port == port) {
148 slot_id = i;
149 break;
150 }
151 }
152
153 return slot_id;
154}
155
156/*
157 * Stop device
158 * It issues stop endpoint command for EP 0 to 30. And wait the last command
159 * to complete.
160 * suspend will set to 1, if suspend bit need to set in command.
161 */
162static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
163{
164 struct xhci_virt_device *virt_dev;
165 struct xhci_command *cmd;
166 unsigned long flags;
167 int timeleft;
168 int ret;
169 int i;
170
171 ret = 0;
172 virt_dev = xhci->devs[slot_id];
173 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
174 if (!cmd) {
175 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
176 return -ENOMEM;
177 }
178
179 spin_lock_irqsave(&xhci->lock, flags);
180 for (i = LAST_EP_INDEX; i > 0; i--) {
181 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
182 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
183 }
184 cmd->command_trb = xhci->cmd_ring->enqueue;
185 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
186 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
187 xhci_ring_cmd_db(xhci);
188 spin_unlock_irqrestore(&xhci->lock, flags);
189
190 /* Wait for last stop endpoint command to finish */
191 timeleft = wait_for_completion_interruptible_timeout(
192 cmd->completion,
193 USB_CTRL_SET_TIMEOUT);
194 if (timeleft <= 0) {
195 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
196 timeleft == 0 ? "Timeout" : "Signal");
197 spin_lock_irqsave(&xhci->lock, flags);
198 /* The timeout might have raced with the event ring handler, so
199 * only delete from the list if the item isn't poisoned.
200 */
201 if (cmd->cmd_list.next != LIST_POISON1)
202 list_del(&cmd->cmd_list);
203 spin_unlock_irqrestore(&xhci->lock, flags);
204 ret = -ETIME;
205 goto command_cleanup;
206 }
207
208command_cleanup:
209 xhci_free_command(xhci, cmd);
210 return ret;
211}
212
213/*
214 * Ring device, it rings the all doorbells unconditionally.
215 */
56192531 216void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
be88fe4f
AX
217{
218 int i;
219
220 for (i = 0; i < LAST_EP_INDEX + 1; i++)
221 if (xhci->devs[slot_id]->eps[i].ring &&
222 xhci->devs[slot_id]->eps[i].ring->dequeue)
223 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
224
225 return;
226}
227
6219c047
SS
228static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
229 u32 __iomem *addr, u32 port_status)
230{
6dd0a3a7
SS
231 /* Don't allow the USB core to disable SuperSpeed ports. */
232 if (xhci->port_array[wIndex] == 0x03) {
233 xhci_dbg(xhci, "Ignoring request to disable "
234 "SuperSpeed port.\n");
235 return;
236 }
237
6219c047
SS
238 /* Write 1 to disable the port */
239 xhci_writel(xhci, port_status | PORT_PE, addr);
240 port_status = xhci_readl(xhci, addr);
241 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
242 wIndex, port_status);
243}
244
34fb562a
SS
245static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
246 u16 wIndex, u32 __iomem *addr, u32 port_status)
247{
248 char *port_change_bit;
249 u32 status;
250
251 switch (wValue) {
252 case USB_PORT_FEAT_C_RESET:
253 status = PORT_RC;
254 port_change_bit = "reset";
255 break;
256 case USB_PORT_FEAT_C_CONNECTION:
257 status = PORT_CSC;
258 port_change_bit = "connect";
259 break;
260 case USB_PORT_FEAT_C_OVER_CURRENT:
261 status = PORT_OCC;
262 port_change_bit = "over-current";
263 break;
6219c047
SS
264 case USB_PORT_FEAT_C_ENABLE:
265 status = PORT_PEC;
266 port_change_bit = "enable/disable";
267 break;
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AX
268 case USB_PORT_FEAT_C_SUSPEND:
269 status = PORT_PLC;
270 port_change_bit = "suspend/resume";
271 break;
34fb562a
SS
272 default:
273 /* Should never happen */
274 return;
275 }
276 /* Change bits are all write 1 to clear */
277 xhci_writel(xhci, port_status | status, addr);
278 port_status = xhci_readl(xhci, addr);
279 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
280 port_change_bit, wIndex, port_status);
281}
282
0f2a7930
SS
283int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
284 u16 wIndex, char *buf, u16 wLength)
285{
286 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
287 int ports;
288 unsigned long flags;
56192531 289 u32 temp, temp1, status;
0f2a7930
SS
290 int retval = 0;
291 u32 __iomem *addr;
be88fe4f 292 int slot_id;
0f2a7930
SS
293
294 ports = HCS_MAX_PORTS(xhci->hcs_params1);
295
296 spin_lock_irqsave(&xhci->lock, flags);
297 switch (typeReq) {
298 case GetHubStatus:
299 /* No power source, over-current reported per port */
300 memset(buf, 0, 4);
301 break;
302 case GetHubDescriptor:
303 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
304 break;
305 case GetPortStatus:
306 if (!wIndex || wIndex > ports)
307 goto error;
308 wIndex--;
309 status = 0;
310 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
311 temp = xhci_readl(xhci, addr);
312 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
313
314 /* wPortChange bits */
315 if (temp & PORT_CSC)
749da5f8 316 status |= USB_PORT_STAT_C_CONNECTION << 16;
0f2a7930 317 if (temp & PORT_PEC)
749da5f8 318 status |= USB_PORT_STAT_C_ENABLE << 16;
0f2a7930 319 if ((temp & PORT_OCC))
749da5f8 320 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
0f2a7930 321 /*
be88fe4f 322 * FIXME ignoring reset and USB 2.1/3.0 specific
0f2a7930
SS
323 * changes
324 */
be88fe4f
AX
325 if ((temp & PORT_PLS_MASK) == XDEV_U3
326 && (temp & PORT_POWER))
327 status |= 1 << USB_PORT_FEAT_SUSPEND;
56192531
AX
328 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
329 if ((temp & PORT_RESET) || !(temp & PORT_PE))
330 goto error;
331 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
332 xhci->resume_done[wIndex])) {
333 xhci_dbg(xhci, "Resume USB2 port %d\n",
334 wIndex + 1);
335 xhci->resume_done[wIndex] = 0;
336 temp1 = xhci_port_state_to_neutral(temp);
337 temp1 &= ~PORT_PLS_MASK;
338 temp1 |= PORT_LINK_STROBE | XDEV_U0;
339 xhci_writel(xhci, temp1, addr);
340
341 xhci_dbg(xhci, "set port %d resume\n",
342 wIndex + 1);
343 slot_id = xhci_find_slot_id_by_port(xhci,
344 wIndex + 1);
345 if (!slot_id) {
346 xhci_dbg(xhci, "slot_id is zero\n");
347 goto error;
348 }
349 xhci_ring_device(xhci, slot_id);
1d5810b6
SS
350 xhci->port_c_suspend |= 1 << wIndex;
351 xhci->suspended_ports &= ~(1 << wIndex);
56192531
AX
352 }
353 }
be88fe4f
AX
354 if ((temp & PORT_PLS_MASK) == XDEV_U0
355 && (temp & PORT_POWER)
1d5810b6
SS
356 && (xhci->suspended_ports & (1 << wIndex))) {
357 xhci->suspended_ports &= ~(1 << wIndex);
358 xhci->port_c_suspend |= 1 << wIndex;
be88fe4f 359 }
0f2a7930 360 if (temp & PORT_CONNECT) {
749da5f8 361 status |= USB_PORT_STAT_CONNECTION;
0f2a7930
SS
362 status |= xhci_port_speed(temp);
363 }
364 if (temp & PORT_PE)
749da5f8 365 status |= USB_PORT_STAT_ENABLE;
0f2a7930 366 if (temp & PORT_OC)
749da5f8 367 status |= USB_PORT_STAT_OVERCURRENT;
0f2a7930 368 if (temp & PORT_RESET)
749da5f8 369 status |= USB_PORT_STAT_RESET;
0f2a7930 370 if (temp & PORT_POWER)
749da5f8 371 status |= USB_PORT_STAT_POWER;
1d5810b6 372 if (xhci->port_c_suspend & (1 << wIndex))
be88fe4f 373 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
0f2a7930
SS
374 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
375 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
376 break;
377 case SetPortFeature:
378 wIndex &= 0xff;
379 if (!wIndex || wIndex > ports)
380 goto error;
381 wIndex--;
382 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
383 temp = xhci_readl(xhci, addr);
384 temp = xhci_port_state_to_neutral(temp);
385 switch (wValue) {
be88fe4f
AX
386 case USB_PORT_FEAT_SUSPEND:
387 temp = xhci_readl(xhci, addr);
388 /* In spec software should not attempt to suspend
389 * a port unless the port reports that it is in the
390 * enabled (PED = ‘1’,PLS < ‘3’) state.
391 */
392 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
393 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
394 xhci_warn(xhci, "USB core suspending device "
395 "not in U0/U1/U2.\n");
396 goto error;
397 }
398
399 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
400 if (!slot_id) {
401 xhci_warn(xhci, "slot_id is zero\n");
402 goto error;
403 }
404 /* unlock to execute stop endpoint commands */
405 spin_unlock_irqrestore(&xhci->lock, flags);
406 xhci_stop_device(xhci, slot_id, 1);
407 spin_lock_irqsave(&xhci->lock, flags);
408
409 temp = xhci_port_state_to_neutral(temp);
410 temp &= ~PORT_PLS_MASK;
411 temp |= PORT_LINK_STROBE | XDEV_U3;
412 xhci_writel(xhci, temp, addr);
413
414 spin_unlock_irqrestore(&xhci->lock, flags);
415 msleep(10); /* wait device to enter */
416 spin_lock_irqsave(&xhci->lock, flags);
417
418 temp = xhci_readl(xhci, addr);
1d5810b6 419 xhci->suspended_ports |= 1 << wIndex;
be88fe4f 420 break;
0f2a7930
SS
421 case USB_PORT_FEAT_POWER:
422 /*
423 * Turn on ports, even if there isn't per-port switching.
424 * HC will report connect events even before this is set.
425 * However, khubd will ignore the roothub events until
426 * the roothub is registered.
427 */
428 xhci_writel(xhci, temp | PORT_POWER, addr);
429
430 temp = xhci_readl(xhci, addr);
431 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
432 break;
433 case USB_PORT_FEAT_RESET:
434 temp = (temp | PORT_RESET);
435 xhci_writel(xhci, temp, addr);
436
437 temp = xhci_readl(xhci, addr);
438 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
439 break;
440 default:
441 goto error;
442 }
443 temp = xhci_readl(xhci, addr); /* unblock any posted writes */
444 break;
445 case ClearPortFeature:
446 if (!wIndex || wIndex > ports)
447 goto error;
448 wIndex--;
449 addr = &xhci->op_regs->port_status_base +
450 NUM_PORT_REGS*(wIndex & 0xff);
451 temp = xhci_readl(xhci, addr);
452 temp = xhci_port_state_to_neutral(temp);
453 switch (wValue) {
be88fe4f
AX
454 case USB_PORT_FEAT_SUSPEND:
455 temp = xhci_readl(xhci, addr);
456 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
457 xhci_dbg(xhci, "PORTSC %04x\n", temp);
458 if (temp & PORT_RESET)
459 goto error;
460 if (temp & XDEV_U3) {
461 if ((temp & PORT_PE) == 0)
462 goto error;
463 if (DEV_SUPERSPEED(temp)) {
464 temp = xhci_port_state_to_neutral(temp);
465 temp &= ~PORT_PLS_MASK;
466 temp |= PORT_LINK_STROBE | XDEV_U0;
467 xhci_writel(xhci, temp, addr);
468 xhci_readl(xhci, addr);
469 } else {
470 temp = xhci_port_state_to_neutral(temp);
471 temp &= ~PORT_PLS_MASK;
472 temp |= PORT_LINK_STROBE | XDEV_RESUME;
473 xhci_writel(xhci, temp, addr);
474
475 spin_unlock_irqrestore(&xhci->lock,
476 flags);
477 msleep(20);
478 spin_lock_irqsave(&xhci->lock, flags);
479
480 temp = xhci_readl(xhci, addr);
481 temp = xhci_port_state_to_neutral(temp);
482 temp &= ~PORT_PLS_MASK;
483 temp |= PORT_LINK_STROBE | XDEV_U0;
484 xhci_writel(xhci, temp, addr);
485 }
1d5810b6 486 xhci->port_c_suspend |= 1 << wIndex;
be88fe4f
AX
487 }
488
489 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
490 if (!slot_id) {
491 xhci_dbg(xhci, "slot_id is zero\n");
492 goto error;
493 }
494 xhci_ring_device(xhci, slot_id);
495 break;
496 case USB_PORT_FEAT_C_SUSPEND:
1d5810b6 497 xhci->port_c_suspend &= ~(1 << wIndex);
0f2a7930 498 case USB_PORT_FEAT_C_RESET:
0f2a7930 499 case USB_PORT_FEAT_C_CONNECTION:
0f2a7930 500 case USB_PORT_FEAT_C_OVER_CURRENT:
6219c047 501 case USB_PORT_FEAT_C_ENABLE:
34fb562a
SS
502 xhci_clear_port_change_bit(xhci, wValue, wIndex,
503 addr, temp);
0f2a7930 504 break;
6219c047
SS
505 case USB_PORT_FEAT_ENABLE:
506 xhci_disable_port(xhci, wIndex, addr, temp);
507 break;
0f2a7930
SS
508 default:
509 goto error;
510 }
0f2a7930
SS
511 break;
512 default:
513error:
514 /* "stall" on error */
515 retval = -EPIPE;
516 }
517 spin_unlock_irqrestore(&xhci->lock, flags);
518 return retval;
519}
520
521/*
522 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
523 * Ports are 0-indexed from the HCD point of view,
524 * and 1-indexed from the USB core pointer of view.
0f2a7930
SS
525 *
526 * Note that the status change bits will be cleared as soon as a port status
527 * change event is generated, so we use the saved status from that event.
528 */
529int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
530{
531 unsigned long flags;
532 u32 temp, status;
56192531 533 u32 mask;
0f2a7930
SS
534 int i, retval;
535 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
536 int ports;
537 u32 __iomem *addr;
538
539 ports = HCS_MAX_PORTS(xhci->hcs_params1);
540
541 /* Initial status is no changes */
419a8e81
WG
542 retval = (ports + 8) / 8;
543 memset(buf, 0, retval);
0f2a7930 544 status = 0;
0f2a7930 545
56192531
AX
546 mask = PORT_CSC | PORT_PEC | PORT_OCC;
547
0f2a7930
SS
548 spin_lock_irqsave(&xhci->lock, flags);
549 /* For each port, did anything change? If so, set that bit in buf. */
550 for (i = 0; i < ports; i++) {
551 addr = &xhci->op_regs->port_status_base +
552 NUM_PORT_REGS*i;
553 temp = xhci_readl(xhci, addr);
56192531 554 if ((temp & mask) != 0 ||
1d5810b6 555 (xhci->port_c_suspend & 1 << i) ||
56192531
AX
556 (xhci->resume_done[i] && time_after_eq(
557 jiffies, xhci->resume_done[i]))) {
419a8e81 558 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
0f2a7930
SS
559 status = 1;
560 }
561 }
562 spin_unlock_irqrestore(&xhci->lock, flags);
563 return status ? retval : 0;
564}
9777e3ce
AX
565
566#ifdef CONFIG_PM
567
568int xhci_bus_suspend(struct usb_hcd *hcd)
569{
570 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
518e848e 571 int max_ports, port_index;
9777e3ce
AX
572 unsigned long flags;
573
574 xhci_dbg(xhci, "suspend root hub\n");
518e848e 575 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
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576
577 spin_lock_irqsave(&xhci->lock, flags);
578
579 if (hcd->self.root_hub->do_remote_wakeup) {
518e848e
SS
580 port_index = max_ports;
581 while (port_index--) {
582 if (xhci->resume_done[port_index] != 0) {
9777e3ce
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583 spin_unlock_irqrestore(&xhci->lock, flags);
584 xhci_dbg(xhci, "suspend failed because "
585 "port %d is resuming\n",
518e848e 586 port_index + 1);
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587 return -EBUSY;
588 }
589 }
590 }
591
518e848e 592 port_index = max_ports;
9777e3ce 593 xhci->bus_suspended = 0;
518e848e 594 while (port_index--) {
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595 /* suspend the port if the port is not suspended */
596 u32 __iomem *addr;
597 u32 t1, t2;
598 int slot_id;
599
600 addr = &xhci->op_regs->port_status_base +
518e848e 601 NUM_PORT_REGS * (port_index & 0xff);
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602 t1 = xhci_readl(xhci, addr);
603 t2 = xhci_port_state_to_neutral(t1);
604
605 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
518e848e
SS
606 xhci_dbg(xhci, "port %d not suspended\n", port_index);
607 slot_id = xhci_find_slot_id_by_port(xhci,
608 port_index + 1);
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609 if (slot_id) {
610 spin_unlock_irqrestore(&xhci->lock, flags);
611 xhci_stop_device(xhci, slot_id, 1);
612 spin_lock_irqsave(&xhci->lock, flags);
613 }
614 t2 &= ~PORT_PLS_MASK;
615 t2 |= PORT_LINK_STROBE | XDEV_U3;
518e848e 616 set_bit(port_index, &xhci->bus_suspended);
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617 }
618 if (hcd->self.root_hub->do_remote_wakeup) {
619 if (t1 & PORT_CONNECT) {
620 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
621 t2 &= ~PORT_WKCONN_E;
622 } else {
623 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
624 t2 &= ~PORT_WKDISC_E;
625 }
626 } else
627 t2 &= ~PORT_WAKE_BITS;
628
629 t1 = xhci_port_state_to_neutral(t1);
630 if (t1 != t2)
631 xhci_writel(xhci, t2, addr);
632
633 if (DEV_HIGHSPEED(t1)) {
634 /* enable remote wake up for USB 2.0 */
635 u32 __iomem *addr;
636 u32 tmp;
637
638 addr = &xhci->op_regs->port_power_base +
518e848e 639 NUM_PORT_REGS * (port_index & 0xff);
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640 tmp = xhci_readl(xhci, addr);
641 tmp |= PORT_RWE;
642 xhci_writel(xhci, tmp, addr);
643 }
644 }
645 hcd->state = HC_STATE_SUSPENDED;
646 xhci->next_statechange = jiffies + msecs_to_jiffies(10);
647 spin_unlock_irqrestore(&xhci->lock, flags);
648 return 0;
649}
650
651int xhci_bus_resume(struct usb_hcd *hcd)
652{
653 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
518e848e 654 int max_ports, port_index;
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655 u32 temp;
656 unsigned long flags;
657
658 xhci_dbg(xhci, "resume root hub\n");
518e848e 659 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
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660
661 if (time_before(jiffies, xhci->next_statechange))
662 msleep(5);
663
664 spin_lock_irqsave(&xhci->lock, flags);
665 if (!HCD_HW_ACCESSIBLE(hcd)) {
666 spin_unlock_irqrestore(&xhci->lock, flags);
667 return -ESHUTDOWN;
668 }
669
670 /* delay the irqs */
671 temp = xhci_readl(xhci, &xhci->op_regs->command);
672 temp &= ~CMD_EIE;
673 xhci_writel(xhci, temp, &xhci->op_regs->command);
674
518e848e
SS
675 port_index = max_ports;
676 while (port_index--) {
9777e3ce
AX
677 /* Check whether need resume ports. If needed
678 resume port and disable remote wakeup */
679 u32 __iomem *addr;
680 u32 temp;
681 int slot_id;
682
683 addr = &xhci->op_regs->port_status_base +
518e848e 684 NUM_PORT_REGS * (port_index & 0xff);
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685 temp = xhci_readl(xhci, addr);
686 if (DEV_SUPERSPEED(temp))
687 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
688 else
689 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
518e848e 690 if (test_bit(port_index, &xhci->bus_suspended) &&
9777e3ce
AX
691 (temp & PORT_PLS_MASK)) {
692 if (DEV_SUPERSPEED(temp)) {
693 temp = xhci_port_state_to_neutral(temp);
694 temp &= ~PORT_PLS_MASK;
695 temp |= PORT_LINK_STROBE | XDEV_U0;
696 xhci_writel(xhci, temp, addr);
697 } else {
698 temp = xhci_port_state_to_neutral(temp);
699 temp &= ~PORT_PLS_MASK;
700 temp |= PORT_LINK_STROBE | XDEV_RESUME;
701 xhci_writel(xhci, temp, addr);
702
703 spin_unlock_irqrestore(&xhci->lock, flags);
704 msleep(20);
705 spin_lock_irqsave(&xhci->lock, flags);
706
707 temp = xhci_readl(xhci, addr);
708 temp = xhci_port_state_to_neutral(temp);
709 temp &= ~PORT_PLS_MASK;
710 temp |= PORT_LINK_STROBE | XDEV_U0;
711 xhci_writel(xhci, temp, addr);
712 }
518e848e 713 slot_id = xhci_find_slot_id_by_port(xhci, port_index + 1);
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714 if (slot_id)
715 xhci_ring_device(xhci, slot_id);
716 } else
717 xhci_writel(xhci, temp, addr);
718
719 if (DEV_HIGHSPEED(temp)) {
720 /* disable remote wake up for USB 2.0 */
721 u32 __iomem *addr;
722 u32 tmp;
723
724 addr = &xhci->op_regs->port_power_base +
518e848e 725 NUM_PORT_REGS * (port_index & 0xff);
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726 tmp = xhci_readl(xhci, addr);
727 tmp &= ~PORT_RWE;
728 xhci_writel(xhci, tmp, addr);
729 }
730 }
731
732 (void) xhci_readl(xhci, &xhci->op_regs->command);
733
734 xhci->next_statechange = jiffies + msecs_to_jiffies(5);
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735 /* re-enable irqs */
736 temp = xhci_readl(xhci, &xhci->op_regs->command);
737 temp |= CMD_EIE;
738 xhci_writel(xhci, temp, &xhci->op_regs->command);
739 temp = xhci_readl(xhci, &xhci->op_regs->command);
740
741 spin_unlock_irqrestore(&xhci->lock, flags);
742 return 0;
743}
744
436a3890 745#endif /* CONFIG_PM */
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