[deliverable/linux.git] / drivers / usb / musb / musb_core.h

/*
 * MUSB OTG driver defines
 *
 * Copyright 2005 Mentor Graphics Corporation
 * Copyright (C) 2005-2006 by Texas Instruments
 * Copyright (C) 2006-2007 Nokia Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef __MUSB_CORE_H__
#define __MUSB_CORE_H__

#include <linux/slab.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/timer.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
#include <linux/usb/musb.h>

struct musb;
struct musb_hw_ep;
struct musb_ep;

/* Helper defines for struct musb->hwvers */
#define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
#define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
#define MUSB_HWVERS_RC		0x8000
#define MUSB_HWVERS_1300	0x52C
#define MUSB_HWVERS_1400	0x590
#define MUSB_HWVERS_1800	0x720
#define MUSB_HWVERS_1900	0x784
#define MUSB_HWVERS_2000	0x800

#include "musb_debug.h"
#include "musb_dma.h"

#include "musb_io.h"
#include "musb_regs.h"

#include "musb_gadget.h"
#include <linux/usb/hcd.h>
#include "musb_host.h"

#define	is_peripheral_enabled(musb)	((musb)->board_mode != MUSB_HOST)
#define	is_host_enabled(musb)		((musb)->board_mode != MUSB_PERIPHERAL)
#define	is_otg_enabled(musb)		((musb)->board_mode == MUSB_OTG)

/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
 * OTG or host-only go to A_IDLE when ID is sensed.
 */
#define is_peripheral_active(m)		(!(m)->is_host)
#define is_host_active(m)		((m)->is_host)

#ifndef CONFIG_HAVE_CLK
/* Dummy stub for clk framework */
#define clk_get(dev, id)	NULL
#define clk_put(clock)		do {} while (0)
#define clk_enable(clock)	do {} while (0)
#define clk_disable(clock)	do {} while (0)
#endif

#ifdef CONFIG_PROC_FS
#include <linux/fs.h>
#define MUSB_CONFIG_PROC_FS
#endif

/****************************** PERIPHERAL ROLE *****************************/

#define	is_peripheral_capable()	(1)

extern irqreturn_t musb_g_ep0_irq(struct musb *);
extern void musb_g_tx(struct musb *, u8);
extern void musb_g_rx(struct musb *, u8);
extern void musb_g_reset(struct musb *);
extern void musb_g_suspend(struct musb *);
extern void musb_g_resume(struct musb *);
extern void musb_g_wakeup(struct musb *);
extern void musb_g_disconnect(struct musb *);

/****************************** HOST ROLE ***********************************/

#define	is_host_capable()	(1)

extern irqreturn_t musb_h_ep0_irq(struct musb *);
extern void musb_host_tx(struct musb *, u8);
extern void musb_host_rx(struct musb *, u8);

/****************************** CONSTANTS ********************************/

#ifndef MUSB_C_NUM_EPS
#define MUSB_C_NUM_EPS ((u8)16)
#endif

#ifndef MUSB_MAX_END0_PACKET
#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
#endif

/* host side ep0 states */
enum musb_h_ep0_state {
	MUSB_EP0_IDLE,
	MUSB_EP0_START,			/* expect ack of setup */
	MUSB_EP0_IN,			/* expect IN DATA */
	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
	MUSB_EP0_STATUS,		/* expect ack of STATUS */
} __attribute__ ((packed));

/* peripheral side ep0 states */
enum musb_g_ep0_state {
	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
	MUSB_EP0_STAGE_TX,		/* IN data */
	MUSB_EP0_STAGE_RX,		/* OUT data */
	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
} __attribute__ ((packed));

/*
 * OTG protocol constants.  See USB OTG 1.3 spec,
 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 */
#define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
#define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
#define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
#define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */


/*************************** REGISTER ACCESS ********************************/

/* Endpoint registers (other than dynfifo setup) can be accessed either
 * directly with the "flat" model, or after setting up an index register.
 */

#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
		|| defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
		|| defined(CONFIG_ARCH_OMAP4)
/* REVISIT indexed access seemed to
 * misbehave (on DaVinci) for at least peripheral IN ...
 */
#define	MUSB_FLAT_REG
#endif

/* TUSB mapping: "flat" plus ep0 special cases */
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_TUSB_OFFSET

/* "flat" mapping: each endpoint has its own i/o address */
#elif	defined(MUSB_FLAT_REG)
#define musb_ep_select(_mbase, _epnum)	(((void)(_mbase)), ((void)(_epnum)))
#define	MUSB_EP_OFFSET			MUSB_FLAT_OFFSET

/* "indexed" mapping: INDEX register controls register bank select */
#else
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_INDEXED_OFFSET
#endif

/****************************** FUNCTIONS ********************************/

#define MUSB_HST_MODE(_musb)\
	{ (_musb)->is_host = true; }
#define MUSB_DEV_MODE(_musb) \
	{ (_musb)->is_host = false; }

#define test_devctl_hst_mode(_x) \
	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)

#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")

/******************************** TYPES *************************************/

/**
 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 * @init:	turns on clocks, sets up platform-specific registers, etc
 * @exit:	undoes @init
 * @set_mode:	forcefully changes operating mode
 * @try_ilde:	tries to idle the IP
 * @vbus_status: returns vbus status if possible
 * @set_vbus:	forces vbus status
 * @adjust_channel_params: pre check for standard dma channel_program func
 */
struct musb_platform_ops {
	int	(*init)(struct musb *musb);
	int	(*exit)(struct musb *musb);

	void	(*enable)(struct musb *musb);
	void	(*disable)(struct musb *musb);

	int	(*set_mode)(struct musb *musb, u8 mode);
	void	(*try_idle)(struct musb *musb, unsigned long timeout);

	int	(*vbus_status)(struct musb *musb);
	void	(*set_vbus)(struct musb *musb, int on);

	int	(*adjust_channel_params)(struct dma_channel *channel,
				u16 packet_sz, u8 *mode,
				dma_addr_t *dma_addr, u32 *len);
};

/*
 * struct musb_hw_ep - endpoint hardware (bidirectional)
 *
 * Ordered slightly for better cacheline locality.
 */
struct musb_hw_ep {
	struct musb		*musb;
	void __iomem		*fifo;
	void __iomem		*regs;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	void __iomem		*conf;
#endif

	/* index in musb->endpoints[]  */
	u8			epnum;

	/* hardware configuration, possibly dynamic */
	bool			is_shared_fifo;
	bool			tx_double_buffered;
	bool			rx_double_buffered;
	u16			max_packet_sz_tx;
	u16			max_packet_sz_rx;

	struct dma_channel	*tx_channel;
	struct dma_channel	*rx_channel;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	/* TUSB has "asynchronous" and "synchronous" dma modes */
	dma_addr_t		fifo_async;
	dma_addr_t		fifo_sync;
	void __iomem		*fifo_sync_va;
#endif

	void __iomem		*target_regs;

	/* currently scheduled peripheral endpoint */
	struct musb_qh		*in_qh;
	struct musb_qh		*out_qh;

	u8			rx_reinit;
	u8			tx_reinit;

	/* peripheral side */
	struct musb_ep		ep_in;			/* TX */
	struct musb_ep		ep_out;			/* RX */
};

static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_in);
}

static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_out);
}

struct musb_csr_regs {
	/* FIFO registers */
	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	u16 rxfifoadd, txfifoadd;
	u8 txtype, txinterval, rxtype, rxinterval;
	u8 rxfifosz, txfifosz;
	u8 txfunaddr, txhubaddr, txhubport;
	u8 rxfunaddr, rxhubaddr, rxhubport;
};

struct musb_context_registers {

	u8 power;
	u16 intrtxe, intrrxe;
	u8 intrusbe;
	u16 frame;
	u8 index, testmode;

	u8 devctl, busctl, misc;
	u32 otg_interfsel;

	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
};

/*
 * struct musb - Driver instance data.
 */
struct musb {
	/* device lock */
	spinlock_t		lock;

	const struct musb_platform_ops *ops;
	struct musb_context_registers context;

	irqreturn_t		(*isr)(int, void *);
	struct work_struct	irq_work;
	struct work_struct	otg_notifier_work;
	u16			hwvers;

/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
#define MUSB_PORT_STAT_RESUME	(1 << 31)

	u32			port1_status;

	unsigned long		rh_timer;

	enum musb_h_ep0_state	ep0_stage;

	/* bulk traffic normally dedicates endpoint hardware, and each
	 * direction has its own ring of host side endpoints.
	 * we try to progress the transfer at the head of each endpoint's
	 * queue until it completes or NAKs too much; then we try the next
	 * endpoint.
	 */
	struct musb_hw_ep	*bulk_ep;

	struct list_head	control;	/* of musb_qh */
	struct list_head	in_bulk;	/* of musb_qh */
	struct list_head	out_bulk;	/* of musb_qh */

	struct timer_list	otg_timer;
	struct notifier_block	nb;

	struct dma_controller	*dma_controller;

	struct device		*controller;
	void __iomem		*ctrl_base;
	void __iomem		*mregs;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	dma_addr_t		async;
	dma_addr_t		sync;
	void __iomem		*sync_va;
#endif

	/* passed down from chip/board specific irq handlers */
	u8			int_usb;
	u16			int_rx;
	u16			int_tx;

	struct usb_phy		*xceiv;
	u8			xceiv_event;

	int nIrq;
	unsigned		irq_wake:1;

	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
#define control_ep		endpoints

#define VBUSERR_RETRY_COUNT	3
	u16			vbuserr_retry;
	u16 epmask;
	u8 nr_endpoints;

	u8 board_mode;		/* enum musb_mode */
	int			(*board_set_power)(int state);

	u8			min_power;	/* vbus for periph, in mA/2 */

	bool			is_host;

	int			a_wait_bcon;	/* VBUS timeout in msecs */
	unsigned long		idle_timeout;	/* Next timeout in jiffies */

	/* active means connected and not suspended */
	unsigned		is_active:1;

	unsigned is_multipoint:1;
	unsigned ignore_disconnect:1;	/* during bus resets */

	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */

	unsigned		bulk_split:1;
#define	can_bulk_split(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)

	unsigned		bulk_combine:1;
#define	can_bulk_combine(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)

	/* is_suspended means USB B_PERIPHERAL suspend */
	unsigned		is_suspended:1;

	/* may_wakeup means remote wakeup is enabled */
	unsigned		may_wakeup:1;

	/* is_self_powered is reported in device status and the
	 * config descriptor.  is_bus_powered means B_PERIPHERAL
	 * draws some VBUS current; both can be true.
	 */
	unsigned		is_self_powered:1;
	unsigned		is_bus_powered:1;

	unsigned		set_address:1;
	unsigned		test_mode:1;
	unsigned		softconnect:1;

	u8			address;
	u8			test_mode_nr;
	u16			ackpend;		/* ep0 */
	enum musb_g_ep0_state	ep0_state;
	struct usb_gadget	g;			/* the gadget */
	struct usb_gadget_driver *gadget_driver;	/* its driver */

	/*
	 * FIXME: Remove this flag.
	 *
	 * This is only added to allow Blackfin to work
	 * with current driver. For some unknown reason
	 * Blackfin doesn't work with double buffering
	 * and that's enabled by default.
	 *
	 * We added this flag to forcefully disable double
	 * buffering until we get it working.
	 */
	unsigned                double_buffer_not_ok:1 __deprecated;

	struct musb_hdrc_config	*config;

#ifdef MUSB_CONFIG_PROC_FS
	struct proc_dir_entry *proc_entry;
#endif
};

static inline struct musb *gadget_to_musb(struct usb_gadget *g)
{
	return container_of(g, struct musb, g);
}

#ifdef CONFIG_BLACKFIN
static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	if (epnum < 5) {
		hw_ep->max_packet_sz_tx = 128;
		hw_ep->max_packet_sz_rx = 128;
	} else {
		hw_ep->max_packet_sz_tx = 1024;
		hw_ep->max_packet_sz_rx = 1024;
	}
	hw_ep->is_shared_fifo = false;

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}

#else

static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	void *mbase = musb->mregs;
	u8 reg = 0;

	/* read from core using indexed model */
	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
	/* 0's returned when no more endpoints */
	if (!reg)
		return -ENODEV;

	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);

	/* shared TX/RX FIFO? */
	if ((reg & 0xf0) == 0xf0) {
		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
		hw_ep->is_shared_fifo = true;
		return 0;
	} else {
		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
		hw_ep->is_shared_fifo = false;
	}

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}
#endif /* CONFIG_BLACKFIN */


/***************************** Glue it together *****************************/

extern const char musb_driver_name[];

extern void musb_start(struct musb *musb);
extern void musb_stop(struct musb *musb);

extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);

extern void musb_load_testpacket(struct musb *);

extern irqreturn_t musb_interrupt(struct musb *);

extern void musb_hnp_stop(struct musb *musb);

static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
{
	if (musb->ops->set_vbus)
		musb->ops->set_vbus(musb, is_on);
}

static inline void musb_platform_enable(struct musb *musb)
{
	if (musb->ops->enable)
		musb->ops->enable(musb);
}

static inline void musb_platform_disable(struct musb *musb)
{
	if (musb->ops->disable)
		musb->ops->disable(musb);
}

static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
{
	if (!musb->ops->set_mode)
		return 0;

	return musb->ops->set_mode(musb, mode);
}

static inline void musb_platform_try_idle(struct musb *musb,
		unsigned long timeout)
{
	if (musb->ops->try_idle)
		musb->ops->try_idle(musb, timeout);
}

static inline int musb_platform_get_vbus_status(struct musb *musb)
{
	if (!musb->ops->vbus_status)
		return 0;

	return musb->ops->vbus_status(musb);
}

static inline int musb_platform_init(struct musb *musb)
{
	if (!musb->ops->init)
		return -EINVAL;

	return musb->ops->init(musb);
}

static inline int musb_platform_exit(struct musb *musb)
{
	if (!musb->ops->exit)
		return -EINVAL;

	return musb->ops->exit(musb);
}

#endif	/* __MUSB_CORE_H__ */
Commit	Line	Data
550a7375 FB	1	/*
	2	* MUSB OTG driver defines
	3	*
	4	* Copyright 2005 Mentor Graphics Corporation
	5	* Copyright (C) 2005-2006 by Texas Instruments
	6	* Copyright (C) 2006-2007 Nokia Corporation
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
	23	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	24	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	25	* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
	26	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	27	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	28	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	29	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	31	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	*/
	34
	35	#ifndef __MUSB_CORE_H__
	36	#define __MUSB_CORE_H__
	37
	38	#include <linux/slab.h>
	39	#include <linux/list.h>
	40	#include <linux/interrupt.h>
550a7375	41	#include <linux/errno.h>
f7f9d63e	42	#include <linux/timer.h>
550a7375 FB	43	#include <linux/device.h>
	44	#include <linux/usb/ch9.h>
	45	#include <linux/usb/gadget.h>
	46	#include <linux/usb.h>
	47	#include <linux/usb/otg.h>
	48	#include <linux/usb/musb.h>
	49
	50	struct musb;
	51	struct musb_hw_ep;
	52	struct musb_ep;
	53
0ded2f14 CC	54	/* Helper defines for struct musb->hwvers */
	55	#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
	56	#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
	57	#define MUSB_HWVERS_RC 0x8000
	58	#define MUSB_HWVERS_1300 0x52C
	59	#define MUSB_HWVERS_1400 0x590
	60	#define MUSB_HWVERS_1800 0x720
	61	#define MUSB_HWVERS_1900 0x784
	62	#define MUSB_HWVERS_2000 0x800
550a7375 FB	63
	64	#include "musb_debug.h"
	65	#include "musb_dma.h"
	66
550a7375 FB	67	#include "musb_io.h"
	68	#include "musb_regs.h"
	69
	70	#include "musb_gadget.h"
27729aad	71	#include <linux/usb/hcd.h>
550a7375 FB	72	#include "musb_host.h"
550a7375 FB	73
550a7375 FB	74	#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
	75	#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
	76	#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
	77
	78	/* NOTE: otg and peripheral-only state machines start at B_IDLE.
	79	* OTG or host-only go to A_IDLE when ID is sensed.
	80	*/
	81	#define is_peripheral_active(m) (!(m)->is_host)
	82	#define is_host_active(m) ((m)->is_host)
	83
b20cf906 MF	84	#ifndef CONFIG_HAVE_CLK
	85	/* Dummy stub for clk framework */
	86	#define clk_get(dev, id) NULL
	87	#define clk_put(clock) do {} while (0)
	88	#define clk_enable(clock) do {} while (0)
	89	#define clk_disable(clock) do {} while (0)
	90	#endif
550a7375 FB	91
	92	#ifdef CONFIG_PROC_FS
	93	#include <linux/fs.h>
	94	#define MUSB_CONFIG_PROC_FS
	95	#endif
	96
	97	/**************************** PERIPHERAL ROLE ***************************/
	98
550a7375 FB	99	#define is_peripheral_capable() (1)
	100
	101	extern irqreturn_t musb_g_ep0_irq(struct musb *);
	102	extern void musb_g_tx(struct musb *, u8);
	103	extern void musb_g_rx(struct musb *, u8);
	104	extern void musb_g_reset(struct musb *);
	105	extern void musb_g_suspend(struct musb *);
	106	extern void musb_g_resume(struct musb *);
	107	extern void musb_g_wakeup(struct musb *);
	108	extern void musb_g_disconnect(struct musb *);
	109
550a7375 FB	110	/**************************** HOST ROLE *********************************/
550a7375 FB	111
550a7375 FB	112	#define is_host_capable() (1)
	113
	114	extern irqreturn_t musb_h_ep0_irq(struct musb *);
	115	extern void musb_host_tx(struct musb *, u8);
	116	extern void musb_host_rx(struct musb *, u8);
	117
550a7375 FB	118	/**************************** CONSTANTS ******************************/
	119
	120	#ifndef MUSB_C_NUM_EPS
	121	#define MUSB_C_NUM_EPS ((u8)16)
	122	#endif
	123
	124	#ifndef MUSB_MAX_END0_PACKET
	125	#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
	126	#endif
	127
	128	/* host side ep0 states */
	129	enum musb_h_ep0_state {
	130	MUSB_EP0_IDLE,
	131	MUSB_EP0_START, /* expect ack of setup */
	132	MUSB_EP0_IN, /* expect IN DATA */
	133	MUSB_EP0_OUT, /* expect ack of OUT DATA */
	134	MUSB_EP0_STATUS, /* expect ack of STATUS */
	135	} __attribute__ ((packed));
	136
	137	/* peripheral side ep0 states */
	138	enum musb_g_ep0_state {
a5073b52 SS	139	MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
a5073b52 SS	140	MUSB_EP0_STAGE_SETUP, /* received SETUP */
550a7375 FB	141	MUSB_EP0_STAGE_TX, /* IN data */
	142	MUSB_EP0_STAGE_RX, /* OUT data */
	143	MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
	144	MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
	145	MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
	146	} __attribute__ ((packed));
	147
f7f9d63e DB	148	/*
	149	* OTG protocol constants. See USB OTG 1.3 spec,
	150	* sections 5.5 "Device Timings" and 6.6.5 "Timers".
	151	*/
550a7375	152	#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
f7f9d63e DB	153	#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
	154	#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
	155	#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
	156
550a7375 FB	157
	158	/************************* REGISTER ACCESS ******************************/
	159
	160	/* Endpoint registers (other than dynfifo setup) can be accessed either
	161	* directly with the "flat" model, or after setting up an index register.
	162	*/
	163
59b479e0 TL	164	#if defined(CONFIG_ARCH_DAVINCI) \|\| defined(CONFIG_SOC_OMAP2430) \
59b479e0 TL	165	\|\| defined(CONFIG_SOC_OMAP3430) \|\| defined(CONFIG_BLACKFIN) \
fb9c58ed	166	\|\| defined(CONFIG_ARCH_OMAP4)
550a7375 FB	167	/* REVISIT indexed access seemed to
	168	* misbehave (on DaVinci) for at least peripheral IN ...
	169	*/
	170	#define MUSB_FLAT_REG
	171	#endif
	172
	173	/* TUSB mapping: "flat" plus ep0 special cases */
240a16e2 FB	174	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	175	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	176	#define musb_ep_select(_mbase, _epnum) \
	177	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	178	#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
	179
	180	/* "flat" mapping: each endpoint has its own i/o address */
	181	#elif defined(MUSB_FLAT_REG)
	182	#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
	183	#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
	184
	185	/* "indexed" mapping: INDEX register controls register bank select */
	186	#else
	187	#define musb_ep_select(_mbase, _epnum) \
	188	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	189	#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
	190	#endif
	191
	192	/**************************** FUNCTIONS ******************************/
	193
	194	#define MUSB_HST_MODE(_musb)\
	195	{ (_musb)->is_host = true; }
	196	#define MUSB_DEV_MODE(_musb) \
	197	{ (_musb)->is_host = false; }
	198
	199	#define test_devctl_hst_mode(_x) \
	200	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
	201
	202	#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
	203
	204	/****************************** TYPES ***********************************/
	205
3ca8abb8 FB	206	/**
	207	* struct musb_platform_ops - Operations passed to musb_core by HW glue layer
	208	* @init: turns on clocks, sets up platform-specific registers, etc
	209	* @exit: undoes @init
3ca8abb8 FB	210	* @set_mode: forcefully changes operating mode
	211	* @try_ilde: tries to idle the IP
	212	* @vbus_status: returns vbus status if possible
	213	* @set_vbus: forces vbus status
9ea35331	214	* @adjust_channel_params: pre check for standard dma channel_program func
3ca8abb8 FB	215	*/
	216	struct musb_platform_ops {
	217	int (init)(struct musb musb);
	218	int (exit)(struct musb musb);
	219
3ca8abb8 FB	220	void (enable)(struct musb musb);
	221	void (disable)(struct musb musb);
	222
	223	int (set_mode)(struct musb musb, u8 mode);
	224	void (try_idle)(struct musb musb, unsigned long timeout);
	225
	226	int (vbus_status)(struct musb musb);
	227	void (set_vbus)(struct musb musb, int on);
13254307 MF	228
	229	int (adjust_channel_params)(struct dma_channel channel,
	230	u16 packet_sz, u8 *mode,
	231	dma_addr_t dma_addr, u32 len);
3ca8abb8 FB	232	};
3ca8abb8 FB	233
550a7375 FB	234	/*
	235	* struct musb_hw_ep - endpoint hardware (bidirectional)
	236	*
	237	* Ordered slightly for better cacheline locality.
	238	*/
	239	struct musb_hw_ep {
	240	struct musb *musb;
	241	void __iomem *fifo;
	242	void __iomem *regs;
	243
240a16e2 FB	244	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	245	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	246	void __iomem *conf;
	247	#endif
	248
	249	/* index in musb->endpoints[] */
	250	u8 epnum;
	251
	252	/* hardware configuration, possibly dynamic */
	253	bool is_shared_fifo;
	254	bool tx_double_buffered;
	255	bool rx_double_buffered;
	256	u16 max_packet_sz_tx;
	257	u16 max_packet_sz_rx;
	258
	259	struct dma_channel *tx_channel;
	260	struct dma_channel *rx_channel;
	261
240a16e2 FB	262	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	263	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	264	/* TUSB has "asynchronous" and "synchronous" dma modes */
	265	dma_addr_t fifo_async;
	266	dma_addr_t fifo_sync;
	267	void __iomem *fifo_sync_va;
	268	#endif
	269
550a7375 FB	270	void __iomem *target_regs;
	271
	272	/* currently scheduled peripheral endpoint */
	273	struct musb_qh *in_qh;
	274	struct musb_qh *out_qh;
	275
	276	u8 rx_reinit;
	277	u8 tx_reinit;
550a7375	278
550a7375 FB	279	/* peripheral side */
	280	struct musb_ep ep_in; /* TX */
	281	struct musb_ep ep_out; /* RX */
550a7375 FB	282	};
550a7375 FB	283
ad1adb89	284	static inline struct musb_request next_in_request(struct musb_hw_ep hw_ep)
550a7375	285	{
550a7375	286	return next_request(&hw_ep->ep_in);
550a7375 FB	287	}
550a7375 FB	288
ad1adb89	289	static inline struct musb_request next_out_request(struct musb_hw_ep hw_ep)
550a7375	290	{
550a7375	291	return next_request(&hw_ep->ep_out);
550a7375 FB	292	}
550a7375 FB	293
7421107b FB	294	struct musb_csr_regs {
	295	/* FIFO registers */
	296	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	297	u16 rxfifoadd, txfifoadd;
	298	u8 txtype, txinterval, rxtype, rxinterval;
	299	u8 rxfifosz, txfifosz;
	300	u8 txfunaddr, txhubaddr, txhubport;
	301	u8 rxfunaddr, rxhubaddr, rxhubport;
	302	};
	303
	304	struct musb_context_registers {
	305
7421107b FB	306	u8 power;
	307	u16 intrtxe, intrrxe;
	308	u8 intrusbe;
	309	u16 frame;
	310	u8 index, testmode;
	311
	312	u8 devctl, busctl, misc;
e25bec16	313	u32 otg_interfsel;
7421107b FB	314
	315	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
	316	};
	317
550a7375 FB	318	/*
	319	* struct musb - Driver instance data.
	320	*/
	321	struct musb {
	322	/* device lock */
	323	spinlock_t lock;
743411b3 FB	324
743411b3 FB	325	const struct musb_platform_ops *ops;
7421107b	326	struct musb_context_registers context;
743411b3	327
550a7375 FB	328	irqreturn_t (isr)(int, void );
550a7375 FB	329	struct work_struct irq_work;
712d8efa	330	struct work_struct otg_notifier_work;
32c3b94e	331	u16 hwvers;
550a7375 FB	332
	333	/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
	334	#define MUSB_PORT_STAT_RESUME (1 << 31)
	335
	336	u32 port1_status;
	337
550a7375 FB	338	unsigned long rh_timer;
	339
	340	enum musb_h_ep0_state ep0_stage;
	341
	342	/* bulk traffic normally dedicates endpoint hardware, and each
	343	* direction has its own ring of host side endpoints.
	344	* we try to progress the transfer at the head of each endpoint's
	345	* queue until it completes or NAKs too much; then we try the next
	346	* endpoint.
	347	*/
	348	struct musb_hw_ep *bulk_ep;
	349
	350	struct list_head control; /* of musb_qh */
	351	struct list_head in_bulk; /* of musb_qh */
	352	struct list_head out_bulk; /* of musb_qh */
f7f9d63e DB	353
f7f9d63e DB	354	struct timer_list otg_timer;
594632ef	355	struct notifier_block nb;
550a7375	356
550a7375 FB	357	struct dma_controller *dma_controller;
	358
	359	struct device *controller;
	360	void __iomem *ctrl_base;
	361	void __iomem *mregs;
	362
240a16e2 FB	363	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	364	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	365	dma_addr_t async;
	366	dma_addr_t sync;
	367	void __iomem *sync_va;
	368	#endif
	369
	370	/* passed down from chip/board specific irq handlers */
	371	u8 int_usb;
	372	u16 int_rx;
	373	u16 int_tx;
	374
86753811	375	struct usb_phy *xceiv;
712d8efa	376	u8 xceiv_event;
550a7375 FB	377
550a7375 FB	378	int nIrq;
c48a5155	379	unsigned irq_wake:1;
550a7375 FB	380
	381	struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
	382	#define control_ep endpoints
	383
	384	#define VBUSERR_RETRY_COUNT 3
	385	u16 vbuserr_retry;
	386	u16 epmask;
	387	u8 nr_endpoints;
	388
	389	u8 board_mode; /* enum musb_mode */
	390	int (*board_set_power)(int state);
	391
550a7375 FB	392	u8 min_power; /* vbus for periph, in mA/2 */
	393
	394	bool is_host;
	395
	396	int a_wait_bcon; /* VBUS timeout in msecs */
	397	unsigned long idle_timeout; /* Next timeout in jiffies */
	398
	399	/* active means connected and not suspended */
	400	unsigned is_active:1;
	401
	402	unsigned is_multipoint:1;
	403	unsigned ignore_disconnect:1; /* during bus resets */
	404
a483d706 AKG	405	unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
a483d706 AKG	406	unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e	407	unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706	408
7ed069c1	409	unsigned bulk_split:1;
550a7375	410	#define can_bulk_split(musb,type) \
7ed069c1	411	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375	412
7ed069c1	413	unsigned bulk_combine:1;
550a7375	414	#define can_bulk_combine(musb,type) \
7ed069c1	415	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
550a7375	416
550a7375 FB	417	/* is_suspended means USB B_PERIPHERAL suspend */
	418	unsigned is_suspended:1;
	419
	420	/* may_wakeup means remote wakeup is enabled */
	421	unsigned may_wakeup:1;
	422
	423	/* is_self_powered is reported in device status and the
	424	* config descriptor. is_bus_powered means B_PERIPHERAL
	425	* draws some VBUS current; both can be true.
	426	*/
	427	unsigned is_self_powered:1;
	428	unsigned is_bus_powered:1;
	429
	430	unsigned set_address:1;
	431	unsigned test_mode:1;
	432	unsigned softconnect:1;
5990378b FB	433
	434	u8 address;
	435	u8 test_mode_nr;
	436	u16 ackpend; /* ep0 */
	437	enum musb_g_ep0_state ep0_state;
	438	struct usb_gadget g; /* the gadget */
	439	struct usb_gadget_driver gadget_driver; / its driver */
5990378b	440
06624818 FB	441	/*
	442	* FIXME: Remove this flag.
	443	*
	444	* This is only added to allow Blackfin to work
	445	* with current driver. For some unknown reason
	446	* Blackfin doesn't work with double buffering
	447	* and that's enabled by default.
	448	*
	449	* We added this flag to forcefully disable double
	450	* buffering until we get it working.
	451	*/
	452	unsigned double_buffer_not_ok:1 __deprecated;
550a7375	453
ca6d1b13 FB	454	struct musb_hdrc_config *config;
ca6d1b13 FB	455
550a7375 FB	456	#ifdef MUSB_CONFIG_PROC_FS
	457	struct proc_dir_entry *proc_entry;
	458	#endif
	459	};
	460
550a7375 FB	461	static inline struct musb gadget_to_musb(struct usb_gadget g)
	462	{
	463	return container_of(g, struct musb, g);
	464	}
550a7375	465
c6cf8b00 BW	466	#ifdef CONFIG_BLACKFIN
	467	static inline int musb_read_fifosize(struct musb *musb,
	468	struct musb_hw_ep *hw_ep, u8 epnum)
	469	{
	470	musb->nr_endpoints++;
	471	musb->epmask \|= (1 << epnum);
	472
	473	if (epnum < 5) {
	474	hw_ep->max_packet_sz_tx = 128;
	475	hw_ep->max_packet_sz_rx = 128;
	476	} else {
	477	hw_ep->max_packet_sz_tx = 1024;
	478	hw_ep->max_packet_sz_rx = 1024;
	479	}
	480	hw_ep->is_shared_fifo = false;
	481
	482	return 0;
	483	}
	484
	485	static inline void musb_configure_ep0(struct musb *musb)
	486	{
	487	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	488	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	489	musb->endpoints[0].is_shared_fifo = true;
	490	}
	491
	492	#else
	493
	494	static inline int musb_read_fifosize(struct musb *musb,
	495	struct musb_hw_ep *hw_ep, u8 epnum)
	496	{
32233716	497	void *mbase = musb->mregs;
c6cf8b00 BW	498	u8 reg = 0;
	499
	500	/* read from core using indexed model */
32233716	501	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
c6cf8b00 BW	502	/* 0's returned when no more endpoints */
	503	if (!reg)
	504	return -ENODEV;
	505
	506	musb->nr_endpoints++;
	507	musb->epmask \|= (1 << epnum);
	508
	509	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
	510
	511	/* shared TX/RX FIFO? */
	512	if ((reg & 0xf0) == 0xf0) {
	513	hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
	514	hw_ep->is_shared_fifo = true;
	515	return 0;
	516	} else {
	517	hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
	518	hw_ep->is_shared_fifo = false;
	519	}
	520
	521	return 0;
	522	}
	523
	524	static inline void musb_configure_ep0(struct musb *musb)
	525	{
	526	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	527	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716	528	musb->endpoints[0].is_shared_fifo = true;
c6cf8b00 BW	529	}
	530	#endif /* CONFIG_BLACKFIN */
	531
550a7375 FB	532
	533	/*************************** Glue it together ***************************/
	534
	535	extern const char musb_driver_name[];
	536
	537	extern void musb_start(struct musb *musb);
	538	extern void musb_stop(struct musb *musb);
	539
	540	extern void musb_write_fifo(struct musb_hw_ep ep, u16 len, const u8 src);
	541	extern void musb_read_fifo(struct musb_hw_ep ep, u16 len, u8 dst);
	542
	543	extern void musb_load_testpacket(struct musb *);
	544
	545	extern irqreturn_t musb_interrupt(struct musb *);
	546
550a7375 FB	547	extern void musb_hnp_stop(struct musb *musb);
550a7375 FB	548
743411b3 FB	549	static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
	550	{
	551	if (musb->ops->set_vbus)
	552	musb->ops->set_vbus(musb, is_on);
	553	}
	554
	555	static inline void musb_platform_enable(struct musb *musb)
	556	{
	557	if (musb->ops->enable)
	558	musb->ops->enable(musb);
	559	}
	560
	561	static inline void musb_platform_disable(struct musb *musb)
	562	{
	563	if (musb->ops->disable)
	564	musb->ops->disable(musb);
	565	}
	566
	567	static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
	568	{
	569	if (!musb->ops->set_mode)
	570	return 0;
	571
	572	return musb->ops->set_mode(musb, mode);
	573	}
	574
	575	static inline void musb_platform_try_idle(struct musb *musb,
	576	unsigned long timeout)
	577	{
	578	if (musb->ops->try_idle)
	579	musb->ops->try_idle(musb, timeout);
	580	}
	581
	582	static inline int musb_platform_get_vbus_status(struct musb *musb)
	583	{
	584	if (!musb->ops->vbus_status)
	585	return 0;
	586
	587	return musb->ops->vbus_status(musb);
	588	}
	589
	590	static inline int musb_platform_init(struct musb *musb)
	591	{
	592	if (!musb->ops->init)
	593	return -EINVAL;
	594
	595	return musb->ops->init(musb);
	596	}
	597
	598	static inline int musb_platform_exit(struct musb *musb)
	599	{
	600	if (!musb->ops->exit)
	601	return -EINVAL;
	602
	603	return musb->ops->exit(musb);
	604	}
	605
550a7375	606	#endif /* __MUSB_CORE_H__ */