usb: musb: core: fix highspeed check
[deliverable/linux.git] / drivers / usb / musb / musb_dsps.c
CommitLineData
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1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
9ecb8875 32#include <linux/io.h>
ded017ee 33#include <linux/err.h>
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34#include <linux/platform_device.h>
35#include <linux/dma-mapping.h>
36#include <linux/pm_runtime.h>
37#include <linux/module.h>
d7078df6 38#include <linux/usb/usb_phy_generic.h>
e8c4a7ac 39#include <linux/platform_data/usb-omap.h>
0f53e481 40#include <linux/sizes.h>
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41
42#include <linux/of.h>
43#include <linux/of_device.h>
44#include <linux/of_address.h>
97238b35 45#include <linux/of_irq.h>
c031a7d4 46#include <linux/usb/of.h>
9ecb8875 47
40f099e3
MP
48#include <linux/debugfs.h>
49
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50#include "musb_core.h"
51
65145677 52static const struct of_device_id musb_dsps_of_match[];
65145677 53
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54/**
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
57 */
58static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
fc7af215
LW
59{
60 return __raw_readb(addr + offset);
61}
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62
63static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
fc7af215
LW
64{
65 return __raw_readl(addr + offset);
66}
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67
68static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
fc7af215
LW
69{
70 __raw_writeb(data, addr + offset);
71}
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72
73static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
fc7af215
LW
74{
75 __raw_writel(data, addr + offset);
76}
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77
78/**
79 * DSPS musb wrapper register offset.
80 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
81 * musb ips.
82 */
83struct dsps_musb_wrapper {
84 u16 revision;
85 u16 control;
86 u16 status;
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87 u16 epintr_set;
88 u16 epintr_clear;
89 u16 epintr_status;
90 u16 coreintr_set;
91 u16 coreintr_clear;
92 u16 coreintr_status;
93 u16 phy_utmi;
94 u16 mode;
b991f9b7
DM
95 u16 tx_mode;
96 u16 rx_mode;
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97
98 /* bit positions for control */
99 unsigned reset:5;
100
101 /* bit positions for interrupt */
102 unsigned usb_shift:5;
103 u32 usb_mask;
104 u32 usb_bitmap;
105 unsigned drvvbus:5;
106
107 unsigned txep_shift:5;
108 u32 txep_mask;
109 u32 txep_bitmap;
110
111 unsigned rxep_shift:5;
112 u32 rxep_mask;
113 u32 rxep_bitmap;
114
115 /* bit positions for phy_utmi */
116 unsigned otg_disable:5;
117
118 /* bit positions for mode */
119 unsigned iddig:5;
943c1397 120 unsigned iddig_mux:5;
9ecb8875 121 /* miscellaneous stuff */
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122 u8 poll_seconds;
123};
124
869c5978
DM
125/*
126 * register shadow for suspend
127 */
128struct dsps_context {
129 u32 control;
130 u32 epintr;
131 u32 coreintr;
132 u32 phy_utmi;
133 u32 mode;
134 u32 tx_mode;
135 u32 rx_mode;
136};
137
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138/**
139 * DSPS glue structure.
140 */
141struct dsps_glue {
142 struct device *dev;
97238b35 143 struct platform_device *musb; /* child musb pdev */
9ecb8875 144 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
97238b35
SAS
145 struct timer_list timer; /* otg_workaround timer */
146 unsigned long last_timer; /* last timer data for each instance */
371254ce 147 bool sw_babble_enabled;
869c5978
DM
148
149 struct dsps_context context;
40f099e3
MP
150 struct debugfs_regset32 regset;
151 struct dentry *dbgfs_root;
152};
153
154static const struct debugfs_reg32 dsps_musb_regs[] = {
155 { "revision", 0x00 },
156 { "control", 0x14 },
157 { "status", 0x18 },
158 { "eoi", 0x24 },
159 { "intr0_stat", 0x30 },
160 { "intr1_stat", 0x34 },
161 { "intr0_set", 0x38 },
162 { "intr1_set", 0x3c },
163 { "txmode", 0x70 },
164 { "rxmode", 0x74 },
165 { "autoreq", 0xd0 },
166 { "srpfixtime", 0xd4 },
167 { "tdown", 0xd8 },
168 { "phy_utmi", 0xe0 },
169 { "mode", 0xe8 },
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170};
171
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172static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
173{
174 struct device *dev = musb->controller;
175 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
176
177 if (timeout == 0)
178 timeout = jiffies + msecs_to_jiffies(3);
179
180 /* Never idle if active, or when VBUS timeout is not set as host */
181 if (musb->is_active || (musb->a_wait_bcon == 0 &&
e47d9254 182 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
807d0d2b 183 dev_dbg(musb->controller, "%s active, deleting timer\n",
e47d9254 184 usb_otg_state_string(musb->xceiv->otg->state));
807d0d2b
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185 del_timer(&glue->timer);
186 glue->last_timer = jiffies;
187 return;
188 }
24616eb6 189 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
807d0d2b
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190 return;
191
192 if (!musb->g.dev.driver)
193 return;
194
195 if (time_after(glue->last_timer, timeout) &&
196 timer_pending(&glue->timer)) {
197 dev_dbg(musb->controller,
198 "Longer idle timer already pending, ignoring...\n");
199 return;
200 }
201 glue->last_timer = timeout;
202
203 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
e47d9254 204 usb_otg_state_string(musb->xceiv->otg->state),
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205 jiffies_to_msecs(timeout - jiffies));
206 mod_timer(&glue->timer, timeout);
207}
208
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209/**
210 * dsps_musb_enable - enable interrupts
211 */
212static void dsps_musb_enable(struct musb *musb)
213{
214 struct device *dev = musb->controller;
215 struct platform_device *pdev = to_platform_device(dev->parent);
216 struct dsps_glue *glue = platform_get_drvdata(pdev);
217 const struct dsps_musb_wrapper *wrp = glue->wrp;
218 void __iomem *reg_base = musb->ctrl_base;
219 u32 epmask, coremask;
220
221 /* Workaround: setup IRQs through both register sets. */
222 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
223 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
224 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
225
226 dsps_writel(reg_base, wrp->epintr_set, epmask);
227 dsps_writel(reg_base, wrp->coreintr_set, coremask);
228 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
032ec49f
FB
229 dsps_writel(reg_base, wrp->coreintr_set,
230 (1 << wrp->drvvbus) << wrp->usb_shift);
8b9fcce2 231 dsps_musb_try_idle(musb, 0);
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232}
233
234/**
235 * dsps_musb_disable - disable HDRC and flush interrupts
236 */
237static void dsps_musb_disable(struct musb *musb)
238{
239 struct device *dev = musb->controller;
240 struct platform_device *pdev = to_platform_device(dev->parent);
241 struct dsps_glue *glue = platform_get_drvdata(pdev);
242 const struct dsps_musb_wrapper *wrp = glue->wrp;
243 void __iomem *reg_base = musb->ctrl_base;
244
245 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
246 dsps_writel(reg_base, wrp->epintr_clear,
247 wrp->txep_bitmap | wrp->rxep_bitmap);
248 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
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249}
250
251static void otg_timer(unsigned long _musb)
252{
253 struct musb *musb = (void *)_musb;
254 void __iomem *mregs = musb->mregs;
255 struct device *dev = musb->controller;
db4a9320 256 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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257 const struct dsps_musb_wrapper *wrp = glue->wrp;
258 u8 devctl;
259 unsigned long flags;
0f901c98 260 int skip_session = 0;
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261
262 /*
263 * We poll because DSPS IP's won't expose several OTG-critical
264 * status change events (from the transceiver) otherwise.
265 */
266 devctl = dsps_readb(mregs, MUSB_DEVCTL);
267 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
e47d9254 268 usb_otg_state_string(musb->xceiv->otg->state));
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269
270 spin_lock_irqsave(&musb->lock, flags);
e47d9254 271 switch (musb->xceiv->otg->state) {
9ecb8875 272 case OTG_STATE_A_WAIT_BCON:
0f901c98
SAS
273 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
274 skip_session = 1;
275 /* fall */
9ecb8875 276
0f901c98
SAS
277 case OTG_STATE_A_IDLE:
278 case OTG_STATE_B_IDLE:
9ecb8875 279 if (devctl & MUSB_DEVCTL_BDEVICE) {
e47d9254 280 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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281 MUSB_DEV_MODE(musb);
282 } else {
e47d9254 283 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
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284 MUSB_HST_MODE(musb);
285 }
0f901c98
SAS
286 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
287 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
288 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
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289 break;
290 case OTG_STATE_A_WAIT_VFALL:
e47d9254 291 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
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292 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
293 MUSB_INTR_VBUSERROR << wrp->usb_shift);
294 break;
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295 default:
296 break;
297 }
298 spin_unlock_irqrestore(&musb->lock, flags);
299}
300
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301static irqreturn_t dsps_interrupt(int irq, void *hci)
302{
303 struct musb *musb = hci;
304 void __iomem *reg_base = musb->ctrl_base;
305 struct device *dev = musb->controller;
db4a9320 306 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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307 const struct dsps_musb_wrapper *wrp = glue->wrp;
308 unsigned long flags;
309 irqreturn_t ret = IRQ_NONE;
310 u32 epintr, usbintr;
311
312 spin_lock_irqsave(&musb->lock, flags);
313
314 /* Get endpoint interrupts */
315 epintr = dsps_readl(reg_base, wrp->epintr_status);
316 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
317 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
318
319 if (epintr)
320 dsps_writel(reg_base, wrp->epintr_status, epintr);
321
322 /* Get usb core interrupts */
323 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
324 if (!usbintr && !epintr)
9be73bae 325 goto out;
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326
327 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
328 if (usbintr)
329 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
330
331 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
332 usbintr, epintr);
333 /*
334 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
335 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
336 * switch appropriately between halves of the OTG state machine.
337 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
338 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
339 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
340 */
1d57de30 341 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
984e833c 342 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
9ecb8875 343
1d57de30
DM
344 /*
345 * When a babble condition occurs, the musb controller removes
346 * the session and is no longer in host mode. Hence, all
347 * devices connected to its root hub get disconnected.
348 *
349 * Hand this error down to the musb core isr, so it can
350 * recover.
351 */
352 musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
353 musb->int_tx = musb->int_rx = 0;
354 }
355
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356 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
357 int drvvbus = dsps_readl(reg_base, wrp->status);
358 void __iomem *mregs = musb->mregs;
359 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
360 int err;
361
032ec49f 362 err = musb->int_usb & MUSB_INTR_VBUSERROR;
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363 if (err) {
364 /*
365 * The Mentor core doesn't debounce VBUS as needed
366 * to cope with device connect current spikes. This
367 * means it's not uncommon for bus-powered devices
368 * to get VBUS errors during enumeration.
369 *
370 * This is a workaround, but newer RTL from Mentor
371 * seems to allow a better one: "re"-starting sessions
372 * without waiting for VBUS to stop registering in
373 * devctl.
374 */
375 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
e47d9254 376 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
97238b35 377 mod_timer(&glue->timer,
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378 jiffies + wrp->poll_seconds * HZ);
379 WARNING("VBUS error workaround (delay coming)\n");
032ec49f 380 } else if (drvvbus) {
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381 MUSB_HST_MODE(musb);
382 musb->xceiv->otg->default_a = 1;
e47d9254 383 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
97238b35 384 del_timer(&glue->timer);
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385 } else {
386 musb->is_active = 0;
387 MUSB_DEV_MODE(musb);
388 musb->xceiv->otg->default_a = 0;
e47d9254 389 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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390 }
391
392 /* NOTE: this must complete power-on within 100 ms. */
393 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
394 drvvbus ? "on" : "off",
e47d9254 395 usb_otg_state_string(musb->xceiv->otg->state),
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396 err ? " ERROR" : "",
397 devctl);
398 ret = IRQ_HANDLED;
399 }
400
401 if (musb->int_tx || musb->int_rx || musb->int_usb)
402 ret |= musb_interrupt(musb);
403
5ace3d00 404 /* Poll for ID change in OTG port mode */
e47d9254 405 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
5ace3d00 406 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
97238b35 407 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
9be73bae 408out:
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409 spin_unlock_irqrestore(&musb->lock, flags);
410
411 return ret;
412}
413
40f099e3
MP
414static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
415{
416 struct dentry *root;
417 struct dentry *file;
418 char buf[128];
419
420 sprintf(buf, "%s.dsps", dev_name(musb->controller));
421 root = debugfs_create_dir(buf, NULL);
422 if (!root)
423 return -ENOMEM;
424 glue->dbgfs_root = root;
425
426 glue->regset.regs = dsps_musb_regs;
427 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
428 glue->regset.base = musb->ctrl_base;
429
430 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
431 if (!file) {
432 debugfs_remove_recursive(root);
433 return -ENOMEM;
434 }
435 return 0;
436}
437
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438static int dsps_musb_init(struct musb *musb)
439{
440 struct device *dev = musb->controller;
db4a9320 441 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
97238b35 442 struct platform_device *parent = to_platform_device(dev->parent);
9ecb8875 443 const struct dsps_musb_wrapper *wrp = glue->wrp;
97238b35
SAS
444 void __iomem *reg_base;
445 struct resource *r;
9ecb8875 446 u32 rev, val;
40f099e3 447 int ret;
9ecb8875 448
97238b35 449 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
97238b35 450 reg_base = devm_ioremap_resource(dev, r);
51ef74f6
JL
451 if (IS_ERR(reg_base))
452 return PTR_ERR(reg_base);
97238b35 453 musb->ctrl_base = reg_base;
9ecb8875 454
d7554226 455 /* NOP driver needs change if supporting dual instance */
97238b35
SAS
456 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
457 if (IS_ERR(musb->xceiv))
458 return PTR_ERR(musb->xceiv);
9ecb8875 459
bb90600d
TL
460 musb->phy = devm_phy_get(dev->parent, "usb2-phy");
461
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AKG
462 /* Returns zero if e.g. not clocked */
463 rev = dsps_readl(reg_base, wrp->revision);
97238b35
SAS
464 if (!rev)
465 return -ENODEV;
9ecb8875 466
7557a57f 467 usb_phy_init(musb->xceiv);
bb90600d
TL
468 if (IS_ERR(musb->phy)) {
469 musb->phy = NULL;
470 } else {
471 ret = phy_init(musb->phy);
472 if (ret < 0)
473 return ret;
474 ret = phy_power_on(musb->phy);
475 if (ret) {
476 phy_exit(musb->phy);
477 return ret;
478 }
479 }
480
97238b35 481 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
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482
483 /* Reset the musb */
484 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
485
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486 musb->isr = dsps_interrupt;
487
488 /* reset the otgdisable bit, needed for host mode to work */
489 val = dsps_readl(reg_base, wrp->phy_utmi);
490 val &= ~(1 << wrp->otg_disable);
491 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
492
371254ce
GC
493 /*
494 * Check whether the dsps version has babble control enabled.
495 * In latest silicon revision the babble control logic is enabled.
496 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
497 * logic enabled.
498 */
499 val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
500 if (val == MUSB_BABBLE_RCV_DISABLE) {
501 glue->sw_babble_enabled = true;
502 val |= MUSB_BABBLE_SW_SESSION_CTRL;
503 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
504 }
505
40f099e3
MP
506 ret = dsps_musb_dbg_init(musb, glue);
507 if (ret)
508 return ret;
509
9ecb8875 510 return 0;
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AKG
511}
512
513static int dsps_musb_exit(struct musb *musb)
514{
515 struct device *dev = musb->controller;
db4a9320 516 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
9ecb8875 517
97238b35 518 del_timer_sync(&glue->timer);
7557a57f 519 usb_phy_shutdown(musb->xceiv);
bb90600d
TL
520 phy_power_off(musb->phy);
521 phy_exit(musb->phy);
0fca91b8
DM
522 debugfs_remove_recursive(glue->dbgfs_root);
523
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AKG
524 return 0;
525}
526
943c1397
FB
527static int dsps_musb_set_mode(struct musb *musb, u8 mode)
528{
529 struct device *dev = musb->controller;
530 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
531 const struct dsps_musb_wrapper *wrp = glue->wrp;
532 void __iomem *ctrl_base = musb->ctrl_base;
943c1397
FB
533 u32 reg;
534
80356913 535 reg = dsps_readl(ctrl_base, wrp->mode);
943c1397
FB
536
537 switch (mode) {
538 case MUSB_HOST:
539 reg &= ~(1 << wrp->iddig);
540
541 /*
542 * if we're setting mode to host-only or device-only, we're
543 * going to ignore whatever the PHY sends us and just force
544 * ID pin status by SW
545 */
546 reg |= (1 << wrp->iddig_mux);
547
80356913 548 dsps_writel(ctrl_base, wrp->mode, reg);
943c1397
FB
549 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
550 break;
551 case MUSB_PERIPHERAL:
552 reg |= (1 << wrp->iddig);
553
554 /*
555 * if we're setting mode to host-only or device-only, we're
556 * going to ignore whatever the PHY sends us and just force
557 * ID pin status by SW
558 */
559 reg |= (1 << wrp->iddig_mux);
560
80356913 561 dsps_writel(ctrl_base, wrp->mode, reg);
943c1397
FB
562 break;
563 case MUSB_OTG:
80356913 564 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
943c1397
FB
565 break;
566 default:
567 dev_err(glue->dev, "unsupported mode %d\n", mode);
568 return -EINVAL;
569 }
570
571 return 0;
572}
573
371254ce
GC
574static bool sw_babble_control(struct musb *musb)
575{
576 u8 babble_ctl;
577 bool session_restart = false;
578
579 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
580 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
581 babble_ctl);
582 /*
583 * check line monitor flag to check whether babble is
584 * due to noise
585 */
586 dev_dbg(musb->controller, "STUCK_J is %s\n",
587 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
588
589 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
590 int timeout = 10;
591
592 /*
593 * babble is due to noise, then set transmit idle (d7 bit)
594 * to resume normal operation
595 */
596 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
597 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
598 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
599
600 /* wait till line monitor flag cleared */
601 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
602 do {
603 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
604 udelay(1);
605 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
606
607 /* check whether stuck_at_j bit cleared */
608 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
609 /*
610 * real babble condition has occurred
611 * restart the controller to start the
612 * session again
613 */
614 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
615 babble_ctl);
616 session_restart = true;
617 }
618 } else {
619 session_restart = true;
620 }
621
622 return session_restart;
623}
624
d871c622 625static int dsps_musb_reset(struct musb *musb)
1d57de30
DM
626{
627 struct device *dev = musb->controller;
628 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
629 const struct dsps_musb_wrapper *wrp = glue->wrp;
bb90600d 630 int session_restart = 0, error;
1d57de30 631
371254ce
GC
632 if (glue->sw_babble_enabled)
633 session_restart = sw_babble_control(musb);
634 /*
635 * In case of new silicon version babble condition can be recovered
636 * without resetting the MUSB. But for older silicon versions, MUSB
637 * reset is needed
638 */
639 if (session_restart || !glue->sw_babble_enabled) {
640 dev_info(musb->controller, "Restarting MUSB to recover from Babble\n");
641 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
642 usleep_range(100, 200);
643 usb_phy_shutdown(musb->xceiv);
bb90600d
TL
644 error = phy_power_off(musb->phy);
645 if (error)
646 dev_err(dev, "phy shutdown failed: %i\n", error);
371254ce
GC
647 usleep_range(100, 200);
648 usb_phy_init(musb->xceiv);
bb90600d
TL
649 error = phy_power_on(musb->phy);
650 if (error)
651 dev_err(dev, "phy powerup failed: %i\n", error);
371254ce
GC
652 session_restart = 1;
653 }
1d57de30 654
371254ce 655 return !session_restart;
1d57de30
DM
656}
657
9ecb8875 658static struct musb_platform_ops dsps_ops = {
d026e9c7 659 .quirks = MUSB_INDEXED_EP,
9ecb8875
AKG
660 .init = dsps_musb_init,
661 .exit = dsps_musb_exit,
662
663 .enable = dsps_musb_enable,
664 .disable = dsps_musb_disable,
665
666 .try_idle = dsps_musb_try_idle,
943c1397 667 .set_mode = dsps_musb_set_mode,
1d57de30 668 .reset = dsps_musb_reset,
9ecb8875
AKG
669};
670
671static u64 musb_dmamask = DMA_BIT_MASK(32);
672
97238b35 673static int get_int_prop(struct device_node *dn, const char *s)
9ecb8875 674{
97238b35
SAS
675 int ret;
676 u32 val;
677
678 ret = of_property_read_u32(dn, s, &val);
679 if (ret)
680 return 0;
681 return val;
682}
683
c031a7d4
SAS
684static int get_musb_port_mode(struct device *dev)
685{
686 enum usb_dr_mode mode;
687
688 mode = of_usb_get_dr_mode(dev->of_node);
689 switch (mode) {
690 case USB_DR_MODE_HOST:
691 return MUSB_PORT_MODE_HOST;
692
693 case USB_DR_MODE_PERIPHERAL:
694 return MUSB_PORT_MODE_GADGET;
695
696 case USB_DR_MODE_UNKNOWN:
697 case USB_DR_MODE_OTG:
698 default:
699 return MUSB_PORT_MODE_DUAL_ROLE;
2b84f92b 700 }
c031a7d4
SAS
701}
702
97238b35
SAS
703static int dsps_create_musb_pdev(struct dsps_glue *glue,
704 struct platform_device *parent)
705{
706 struct musb_hdrc_platform_data pdata;
9ecb8875 707 struct resource resources[2];
c031a7d4 708 struct resource *res;
97238b35
SAS
709 struct device *dev = &parent->dev;
710 struct musb_hdrc_config *config;
711 struct platform_device *musb;
712 struct device_node *dn = parent->dev.of_node;
606bf4d5 713 int ret, val;
9ecb8875 714
97238b35 715 memset(resources, 0, sizeof(resources));
c031a7d4
SAS
716 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
717 if (!res) {
97238b35 718 dev_err(dev, "failed to get memory.\n");
c031a7d4 719 return -EINVAL;
9ecb8875 720 }
c031a7d4 721 resources[0] = *res;
97238b35 722
c031a7d4
SAS
723 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
724 if (!res) {
97238b35 725 dev_err(dev, "failed to get irq.\n");
c031a7d4 726 return -EINVAL;
9ecb8875 727 }
c031a7d4 728 resources[1] = *res;
9ecb8875
AKG
729
730 /* allocate the child platform device */
2f771164 731 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
9ecb8875
AKG
732 if (!musb) {
733 dev_err(dev, "failed to allocate musb device\n");
97238b35 734 return -ENOMEM;
9ecb8875
AKG
735 }
736
737 musb->dev.parent = dev;
738 musb->dev.dma_mask = &musb_dmamask;
739 musb->dev.coherent_dma_mask = musb_dmamask;
c031a7d4 740 musb->dev.of_node = of_node_get(dn);
9ecb8875 741
97238b35 742 glue->musb = musb;
9ecb8875 743
97238b35
SAS
744 ret = platform_device_add_resources(musb, resources,
745 ARRAY_SIZE(resources));
9ecb8875
AKG
746 if (ret) {
747 dev_err(dev, "failed to add resources\n");
97238b35 748 goto err;
9ecb8875
AKG
749 }
750
97238b35
SAS
751 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
752 if (!config) {
97238b35
SAS
753 ret = -ENOMEM;
754 goto err;
65145677 755 }
97238b35
SAS
756 pdata.config = config;
757 pdata.platform_ops = &dsps_ops;
65145677 758
c031a7d4
SAS
759 config->num_eps = get_int_prop(dn, "mentor,num-eps");
760 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
869c5978 761 config->host_port_deassert_reset_at_resume = 1;
c031a7d4
SAS
762 pdata.mode = get_musb_port_mode(dev);
763 /* DT keeps this entry in mA, musb expects it as per USB spec */
764 pdata.power = get_int_prop(dn, "mentor,power") / 2;
606bf4d5
TL
765
766 ret = of_property_read_u32(dn, "mentor,multipoint", &val);
767 if (!ret && val)
768 config->multipoint = true;
65145677 769
97238b35 770 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
9ecb8875
AKG
771 if (ret) {
772 dev_err(dev, "failed to add platform_data\n");
97238b35 773 goto err;
9ecb8875
AKG
774 }
775
776 ret = platform_device_add(musb);
777 if (ret) {
778 dev_err(dev, "failed to register musb device\n");
97238b35 779 goto err;
9ecb8875 780 }
9ecb8875
AKG
781 return 0;
782
97238b35 783err:
9ecb8875 784 platform_device_put(musb);
9ecb8875
AKG
785 return ret;
786}
787
41ac7b3a 788static int dsps_probe(struct platform_device *pdev)
9ecb8875 789{
65145677
AKG
790 const struct of_device_id *match;
791 const struct dsps_musb_wrapper *wrp;
9ecb8875 792 struct dsps_glue *glue;
97238b35 793 int ret;
9ecb8875 794
4fc4b274
SAS
795 if (!strcmp(pdev->name, "musb-hdrc"))
796 return -ENODEV;
797
cc506036 798 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
65145677
AKG
799 if (!match) {
800 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
97238b35 801 return -EINVAL;
65145677
AKG
802 }
803 wrp = match->data;
9ecb8875
AKG
804
805 /* allocate glue */
de9db572 806 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
0816ea2f 807 if (!glue)
97238b35 808 return -ENOMEM;
9ecb8875
AKG
809
810 glue->dev = &pdev->dev;
97238b35 811 glue->wrp = wrp;
9ecb8875 812
9ecb8875 813 platform_set_drvdata(pdev, glue);
9ecb8875
AKG
814 pm_runtime_enable(&pdev->dev);
815
816 ret = pm_runtime_get_sync(&pdev->dev);
817 if (ret < 0) {
818 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
0e38c4ed
AKG
819 goto err2;
820 }
821
97238b35
SAS
822 ret = dsps_create_musb_pdev(glue, pdev);
823 if (ret)
824 goto err3;
9ecb8875
AKG
825
826 return 0;
827
828err3:
0e38c4ed 829 pm_runtime_put(&pdev->dev);
9ecb8875 830err2:
0e38c4ed 831 pm_runtime_disable(&pdev->dev);
9ecb8875
AKG
832 return ret;
833}
97238b35 834
fb4e98ab 835static int dsps_remove(struct platform_device *pdev)
9ecb8875
AKG
836{
837 struct dsps_glue *glue = platform_get_drvdata(pdev);
838
97238b35 839 platform_device_unregister(glue->musb);
9ecb8875
AKG
840
841 /* disable usbss clocks */
842 pm_runtime_put(&pdev->dev);
843 pm_runtime_disable(&pdev->dev);
40f099e3 844
9ecb8875
AKG
845 return 0;
846}
847
fa7b4ca5 848static const struct dsps_musb_wrapper am33xx_driver_data = {
9ecb8875
AKG
849 .revision = 0x00,
850 .control = 0x14,
851 .status = 0x18,
9ecb8875
AKG
852 .epintr_set = 0x38,
853 .epintr_clear = 0x40,
854 .epintr_status = 0x30,
855 .coreintr_set = 0x3c,
856 .coreintr_clear = 0x44,
857 .coreintr_status = 0x34,
858 .phy_utmi = 0xe0,
859 .mode = 0xe8,
b991f9b7
DM
860 .tx_mode = 0x70,
861 .rx_mode = 0x74,
9ecb8875
AKG
862 .reset = 0,
863 .otg_disable = 21,
864 .iddig = 8,
943c1397 865 .iddig_mux = 7,
9ecb8875
AKG
866 .usb_shift = 0,
867 .usb_mask = 0x1ff,
868 .usb_bitmap = (0x1ff << 0),
869 .drvvbus = 8,
870 .txep_shift = 0,
871 .txep_mask = 0xffff,
872 .txep_bitmap = (0xffff << 0),
873 .rxep_shift = 16,
874 .rxep_mask = 0xfffe,
875 .rxep_bitmap = (0xfffe << 16),
9ecb8875
AKG
876 .poll_seconds = 2,
877};
878
2f82686e 879static const struct of_device_id musb_dsps_of_match[] = {
65145677 880 { .compatible = "ti,musb-am33xx",
fa7b4ca5 881 .data = (void *) &am33xx_driver_data, },
9ecb8875
AKG
882 { },
883};
884MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
885
5b783983 886#ifdef CONFIG_PM_SLEEP
869c5978
DM
887static int dsps_suspend(struct device *dev)
888{
889 struct dsps_glue *glue = dev_get_drvdata(dev);
890 const struct dsps_musb_wrapper *wrp = glue->wrp;
891 struct musb *musb = platform_get_drvdata(glue->musb);
f042e9cb 892 void __iomem *mbase;
869c5978 893
468bcc2a 894 del_timer_sync(&glue->timer);
f042e9cb
SAS
895
896 if (!musb)
897 /* This can happen if the musb device is in -EPROBE_DEFER */
898 return 0;
899
900 mbase = musb->ctrl_base;
869c5978
DM
901 glue->context.control = dsps_readl(mbase, wrp->control);
902 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
903 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
904 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
905 glue->context.mode = dsps_readl(mbase, wrp->mode);
906 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
907 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
908
909 return 0;
910}
911
912static int dsps_resume(struct device *dev)
913{
914 struct dsps_glue *glue = dev_get_drvdata(dev);
915 const struct dsps_musb_wrapper *wrp = glue->wrp;
916 struct musb *musb = platform_get_drvdata(glue->musb);
f042e9cb
SAS
917 void __iomem *mbase;
918
919 if (!musb)
920 return 0;
869c5978 921
f042e9cb 922 mbase = musb->ctrl_base;
869c5978
DM
923 dsps_writel(mbase, wrp->control, glue->context.control);
924 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
925 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
926 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
927 dsps_writel(mbase, wrp->mode, glue->context.mode);
928 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
929 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
e47d9254 930 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
53185b3a
SAS
931 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
932 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
869c5978
DM
933
934 return 0;
935}
936#endif
937
938static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
939
9ecb8875
AKG
940static struct platform_driver dsps_usbss_driver = {
941 .probe = dsps_probe,
7690417d 942 .remove = dsps_remove,
9ecb8875
AKG
943 .driver = {
944 .name = "musb-dsps",
869c5978 945 .pm = &dsps_pm_ops,
b432cb83 946 .of_match_table = musb_dsps_of_match,
9ecb8875 947 },
9ecb8875
AKG
948};
949
950MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
951MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
952MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
953MODULE_LICENSE("GPL v2");
954
97238b35 955module_platform_driver(dsps_usbss_driver);
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