usb: musb: call musb_port_suspend from musb_bus_suspend
[deliverable/linux.git] / drivers / usb / musb / musb_dsps.c
CommitLineData
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1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32#include <linux/init.h>
33#include <linux/io.h>
ded017ee 34#include <linux/err.h>
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35#include <linux/platform_device.h>
36#include <linux/dma-mapping.h>
37#include <linux/pm_runtime.h>
38#include <linux/module.h>
3fa4d734 39#include <linux/usb/usb_phy_gen_xceiv.h>
e8c4a7ac 40#include <linux/platform_data/usb-omap.h>
0f53e481 41#include <linux/sizes.h>
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42
43#include <linux/of.h>
44#include <linux/of_device.h>
45#include <linux/of_address.h>
97238b35 46#include <linux/of_irq.h>
c031a7d4 47#include <linux/usb/of.h>
9ecb8875 48
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49#include "musb_core.h"
50
65145677 51static const struct of_device_id musb_dsps_of_match[];
65145677 52
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53/**
54 * avoid using musb_readx()/musb_writex() as glue layer should not be
55 * dependent on musb core layer symbols.
56 */
57static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
58 { return __raw_readb(addr + offset); }
59
60static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
61 { return __raw_readl(addr + offset); }
62
63static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
64 { __raw_writeb(data, addr + offset); }
65
66static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
67 { __raw_writel(data, addr + offset); }
68
69/**
70 * DSPS musb wrapper register offset.
71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
72 * musb ips.
73 */
74struct dsps_musb_wrapper {
75 u16 revision;
76 u16 control;
77 u16 status;
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78 u16 epintr_set;
79 u16 epintr_clear;
80 u16 epintr_status;
81 u16 coreintr_set;
82 u16 coreintr_clear;
83 u16 coreintr_status;
84 u16 phy_utmi;
85 u16 mode;
86
87 /* bit positions for control */
88 unsigned reset:5;
89
90 /* bit positions for interrupt */
91 unsigned usb_shift:5;
92 u32 usb_mask;
93 u32 usb_bitmap;
94 unsigned drvvbus:5;
95
96 unsigned txep_shift:5;
97 u32 txep_mask;
98 u32 txep_bitmap;
99
100 unsigned rxep_shift:5;
101 u32 rxep_mask;
102 u32 rxep_bitmap;
103
104 /* bit positions for phy_utmi */
105 unsigned otg_disable:5;
106
107 /* bit positions for mode */
108 unsigned iddig:5;
943c1397 109 unsigned iddig_mux:5;
9ecb8875 110 /* miscellaneous stuff */
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111 u8 poll_seconds;
112};
113
114/**
115 * DSPS glue structure.
116 */
117struct dsps_glue {
118 struct device *dev;
97238b35 119 struct platform_device *musb; /* child musb pdev */
9ecb8875 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
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121 struct timer_list timer; /* otg_workaround timer */
122 unsigned long last_timer; /* last timer data for each instance */
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123};
124
807d0d2b
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125static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
126{
127 struct device *dev = musb->controller;
128 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
129
130 if (timeout == 0)
131 timeout = jiffies + msecs_to_jiffies(3);
132
133 /* Never idle if active, or when VBUS timeout is not set as host */
134 if (musb->is_active || (musb->a_wait_bcon == 0 &&
135 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
136 dev_dbg(musb->controller, "%s active, deleting timer\n",
137 usb_otg_state_string(musb->xceiv->state));
138 del_timer(&glue->timer);
139 glue->last_timer = jiffies;
140 return;
141 }
24616eb6 142 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
807d0d2b
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143 return;
144
145 if (!musb->g.dev.driver)
146 return;
147
148 if (time_after(glue->last_timer, timeout) &&
149 timer_pending(&glue->timer)) {
150 dev_dbg(musb->controller,
151 "Longer idle timer already pending, ignoring...\n");
152 return;
153 }
154 glue->last_timer = timeout;
155
156 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
157 usb_otg_state_string(musb->xceiv->state),
158 jiffies_to_msecs(timeout - jiffies));
159 mod_timer(&glue->timer, timeout);
160}
161
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162/**
163 * dsps_musb_enable - enable interrupts
164 */
165static void dsps_musb_enable(struct musb *musb)
166{
167 struct device *dev = musb->controller;
168 struct platform_device *pdev = to_platform_device(dev->parent);
169 struct dsps_glue *glue = platform_get_drvdata(pdev);
170 const struct dsps_musb_wrapper *wrp = glue->wrp;
171 void __iomem *reg_base = musb->ctrl_base;
172 u32 epmask, coremask;
173
174 /* Workaround: setup IRQs through both register sets. */
175 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
176 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
177 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
178
179 dsps_writel(reg_base, wrp->epintr_set, epmask);
180 dsps_writel(reg_base, wrp->coreintr_set, coremask);
181 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
032ec49f
FB
182 dsps_writel(reg_base, wrp->coreintr_set,
183 (1 << wrp->drvvbus) << wrp->usb_shift);
8b9fcce2 184 dsps_musb_try_idle(musb, 0);
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185}
186
187/**
188 * dsps_musb_disable - disable HDRC and flush interrupts
189 */
190static void dsps_musb_disable(struct musb *musb)
191{
192 struct device *dev = musb->controller;
193 struct platform_device *pdev = to_platform_device(dev->parent);
194 struct dsps_glue *glue = platform_get_drvdata(pdev);
195 const struct dsps_musb_wrapper *wrp = glue->wrp;
196 void __iomem *reg_base = musb->ctrl_base;
197
198 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
199 dsps_writel(reg_base, wrp->epintr_clear,
200 wrp->txep_bitmap | wrp->rxep_bitmap);
201 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
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202}
203
204static void otg_timer(unsigned long _musb)
205{
206 struct musb *musb = (void *)_musb;
207 void __iomem *mregs = musb->mregs;
208 struct device *dev = musb->controller;
db4a9320 209 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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210 const struct dsps_musb_wrapper *wrp = glue->wrp;
211 u8 devctl;
212 unsigned long flags;
0f901c98 213 int skip_session = 0;
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214
215 /*
216 * We poll because DSPS IP's won't expose several OTG-critical
217 * status change events (from the transceiver) otherwise.
218 */
219 devctl = dsps_readb(mregs, MUSB_DEVCTL);
220 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
42c0bf1c 221 usb_otg_state_string(musb->xceiv->state));
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222
223 spin_lock_irqsave(&musb->lock, flags);
224 switch (musb->xceiv->state) {
225 case OTG_STATE_A_WAIT_BCON:
0f901c98
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226 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
227 skip_session = 1;
228 /* fall */
9ecb8875 229
0f901c98
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230 case OTG_STATE_A_IDLE:
231 case OTG_STATE_B_IDLE:
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232 if (devctl & MUSB_DEVCTL_BDEVICE) {
233 musb->xceiv->state = OTG_STATE_B_IDLE;
234 MUSB_DEV_MODE(musb);
235 } else {
236 musb->xceiv->state = OTG_STATE_A_IDLE;
237 MUSB_HST_MODE(musb);
238 }
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239 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
240 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
241 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
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242 break;
243 case OTG_STATE_A_WAIT_VFALL:
244 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
245 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
246 MUSB_INTR_VBUSERROR << wrp->usb_shift);
247 break;
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248 default:
249 break;
250 }
251 spin_unlock_irqrestore(&musb->lock, flags);
252}
253
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254static irqreturn_t dsps_interrupt(int irq, void *hci)
255{
256 struct musb *musb = hci;
257 void __iomem *reg_base = musb->ctrl_base;
258 struct device *dev = musb->controller;
db4a9320 259 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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260 const struct dsps_musb_wrapper *wrp = glue->wrp;
261 unsigned long flags;
262 irqreturn_t ret = IRQ_NONE;
263 u32 epintr, usbintr;
264
265 spin_lock_irqsave(&musb->lock, flags);
266
267 /* Get endpoint interrupts */
268 epintr = dsps_readl(reg_base, wrp->epintr_status);
269 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
270 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
271
272 if (epintr)
273 dsps_writel(reg_base, wrp->epintr_status, epintr);
274
275 /* Get usb core interrupts */
276 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
277 if (!usbintr && !epintr)
9be73bae 278 goto out;
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279
280 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
281 if (usbintr)
282 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
283
284 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
285 usbintr, epintr);
286 /*
287 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
288 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
289 * switch appropriately between halves of the OTG state machine.
290 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
291 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
292 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
293 */
96449f09 294 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE)
984e833c 295 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
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296
297 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
298 int drvvbus = dsps_readl(reg_base, wrp->status);
299 void __iomem *mregs = musb->mregs;
300 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
301 int err;
302
032ec49f 303 err = musb->int_usb & MUSB_INTR_VBUSERROR;
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304 if (err) {
305 /*
306 * The Mentor core doesn't debounce VBUS as needed
307 * to cope with device connect current spikes. This
308 * means it's not uncommon for bus-powered devices
309 * to get VBUS errors during enumeration.
310 *
311 * This is a workaround, but newer RTL from Mentor
312 * seems to allow a better one: "re"-starting sessions
313 * without waiting for VBUS to stop registering in
314 * devctl.
315 */
316 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
317 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
97238b35 318 mod_timer(&glue->timer,
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319 jiffies + wrp->poll_seconds * HZ);
320 WARNING("VBUS error workaround (delay coming)\n");
032ec49f 321 } else if (drvvbus) {
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322 MUSB_HST_MODE(musb);
323 musb->xceiv->otg->default_a = 1;
324 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
97238b35 325 del_timer(&glue->timer);
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326 } else {
327 musb->is_active = 0;
328 MUSB_DEV_MODE(musb);
329 musb->xceiv->otg->default_a = 0;
330 musb->xceiv->state = OTG_STATE_B_IDLE;
331 }
332
333 /* NOTE: this must complete power-on within 100 ms. */
334 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
335 drvvbus ? "on" : "off",
42c0bf1c 336 usb_otg_state_string(musb->xceiv->state),
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337 err ? " ERROR" : "",
338 devctl);
339 ret = IRQ_HANDLED;
340 }
341
342 if (musb->int_tx || musb->int_rx || musb->int_usb)
343 ret |= musb_interrupt(musb);
344
9ecb8875 345 /* Poll for ID change */
032ec49f 346 if (musb->xceiv->state == OTG_STATE_B_IDLE)
97238b35 347 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
9be73bae 348out:
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349 spin_unlock_irqrestore(&musb->lock, flags);
350
351 return ret;
352}
353
354static int dsps_musb_init(struct musb *musb)
355{
356 struct device *dev = musb->controller;
db4a9320 357 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
97238b35 358 struct platform_device *parent = to_platform_device(dev->parent);
9ecb8875 359 const struct dsps_musb_wrapper *wrp = glue->wrp;
97238b35
SAS
360 void __iomem *reg_base;
361 struct resource *r;
9ecb8875 362 u32 rev, val;
9ecb8875 363
97238b35
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364 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
365 if (!r)
366 return -EINVAL;
367
368 reg_base = devm_ioremap_resource(dev, r);
51ef74f6
JL
369 if (IS_ERR(reg_base))
370 return PTR_ERR(reg_base);
97238b35 371 musb->ctrl_base = reg_base;
9ecb8875 372
d7554226 373 /* NOP driver needs change if supporting dual instance */
97238b35
SAS
374 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
375 if (IS_ERR(musb->xceiv))
376 return PTR_ERR(musb->xceiv);
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377
378 /* Returns zero if e.g. not clocked */
379 rev = dsps_readl(reg_base, wrp->revision);
97238b35
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380 if (!rev)
381 return -ENODEV;
9ecb8875 382
7557a57f 383 usb_phy_init(musb->xceiv);
97238b35 384 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
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385
386 /* Reset the musb */
387 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
388
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389 musb->isr = dsps_interrupt;
390
391 /* reset the otgdisable bit, needed for host mode to work */
392 val = dsps_readl(reg_base, wrp->phy_utmi);
393 val &= ~(1 << wrp->otg_disable);
394 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
395
9ecb8875 396 return 0;
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397}
398
399static int dsps_musb_exit(struct musb *musb)
400{
401 struct device *dev = musb->controller;
db4a9320 402 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
9ecb8875 403
97238b35 404 del_timer_sync(&glue->timer);
9ecb8875 405
7557a57f 406 usb_phy_shutdown(musb->xceiv);
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AKG
407 return 0;
408}
409
943c1397
FB
410static int dsps_musb_set_mode(struct musb *musb, u8 mode)
411{
412 struct device *dev = musb->controller;
413 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
414 const struct dsps_musb_wrapper *wrp = glue->wrp;
415 void __iomem *ctrl_base = musb->ctrl_base;
416 void __iomem *base = musb->mregs;
417 u32 reg;
418
419 reg = dsps_readl(base, wrp->mode);
420
421 switch (mode) {
422 case MUSB_HOST:
423 reg &= ~(1 << wrp->iddig);
424
425 /*
426 * if we're setting mode to host-only or device-only, we're
427 * going to ignore whatever the PHY sends us and just force
428 * ID pin status by SW
429 */
430 reg |= (1 << wrp->iddig_mux);
431
432 dsps_writel(base, wrp->mode, reg);
433 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
434 break;
435 case MUSB_PERIPHERAL:
436 reg |= (1 << wrp->iddig);
437
438 /*
439 * if we're setting mode to host-only or device-only, we're
440 * going to ignore whatever the PHY sends us and just force
441 * ID pin status by SW
442 */
443 reg |= (1 << wrp->iddig_mux);
444
445 dsps_writel(base, wrp->mode, reg);
446 break;
447 case MUSB_OTG:
448 dsps_writel(base, wrp->phy_utmi, 0x02);
449 break;
450 default:
451 dev_err(glue->dev, "unsupported mode %d\n", mode);
452 return -EINVAL;
453 }
454
455 return 0;
456}
457
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458static struct musb_platform_ops dsps_ops = {
459 .init = dsps_musb_init,
460 .exit = dsps_musb_exit,
461
462 .enable = dsps_musb_enable,
463 .disable = dsps_musb_disable,
464
465 .try_idle = dsps_musb_try_idle,
943c1397 466 .set_mode = dsps_musb_set_mode,
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467};
468
469static u64 musb_dmamask = DMA_BIT_MASK(32);
470
97238b35 471static int get_int_prop(struct device_node *dn, const char *s)
9ecb8875 472{
97238b35
SAS
473 int ret;
474 u32 val;
475
476 ret = of_property_read_u32(dn, s, &val);
477 if (ret)
478 return 0;
479 return val;
480}
481
c031a7d4
SAS
482static int get_musb_port_mode(struct device *dev)
483{
484 enum usb_dr_mode mode;
485
486 mode = of_usb_get_dr_mode(dev->of_node);
487 switch (mode) {
488 case USB_DR_MODE_HOST:
489 return MUSB_PORT_MODE_HOST;
490
491 case USB_DR_MODE_PERIPHERAL:
492 return MUSB_PORT_MODE_GADGET;
493
494 case USB_DR_MODE_UNKNOWN:
495 case USB_DR_MODE_OTG:
496 default:
497 return MUSB_PORT_MODE_DUAL_ROLE;
2b84f92b 498 }
c031a7d4
SAS
499}
500
97238b35
SAS
501static int dsps_create_musb_pdev(struct dsps_glue *glue,
502 struct platform_device *parent)
503{
504 struct musb_hdrc_platform_data pdata;
9ecb8875 505 struct resource resources[2];
c031a7d4 506 struct resource *res;
97238b35
SAS
507 struct device *dev = &parent->dev;
508 struct musb_hdrc_config *config;
509 struct platform_device *musb;
510 struct device_node *dn = parent->dev.of_node;
2f771164 511 int ret;
9ecb8875 512
97238b35 513 memset(resources, 0, sizeof(resources));
c031a7d4
SAS
514 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
515 if (!res) {
97238b35 516 dev_err(dev, "failed to get memory.\n");
c031a7d4 517 return -EINVAL;
9ecb8875 518 }
c031a7d4 519 resources[0] = *res;
97238b35 520
c031a7d4
SAS
521 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
522 if (!res) {
97238b35 523 dev_err(dev, "failed to get irq.\n");
c031a7d4 524 return -EINVAL;
9ecb8875 525 }
c031a7d4 526 resources[1] = *res;
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AKG
527
528 /* allocate the child platform device */
2f771164 529 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
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530 if (!musb) {
531 dev_err(dev, "failed to allocate musb device\n");
97238b35 532 return -ENOMEM;
9ecb8875
AKG
533 }
534
535 musb->dev.parent = dev;
536 musb->dev.dma_mask = &musb_dmamask;
537 musb->dev.coherent_dma_mask = musb_dmamask;
c031a7d4 538 musb->dev.of_node = of_node_get(dn);
9ecb8875 539
97238b35 540 glue->musb = musb;
9ecb8875 541
97238b35
SAS
542 ret = platform_device_add_resources(musb, resources,
543 ARRAY_SIZE(resources));
9ecb8875
AKG
544 if (ret) {
545 dev_err(dev, "failed to add resources\n");
97238b35 546 goto err;
9ecb8875
AKG
547 }
548
97238b35
SAS
549 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
550 if (!config) {
551 dev_err(dev, "failed to allocate musb hdrc config\n");
552 ret = -ENOMEM;
553 goto err;
65145677 554 }
97238b35
SAS
555 pdata.config = config;
556 pdata.platform_ops = &dsps_ops;
65145677 557
c031a7d4
SAS
558 config->num_eps = get_int_prop(dn, "mentor,num-eps");
559 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
560 pdata.mode = get_musb_port_mode(dev);
561 /* DT keeps this entry in mA, musb expects it as per USB spec */
562 pdata.power = get_int_prop(dn, "mentor,power") / 2;
563 config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
65145677 564
97238b35 565 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
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566 if (ret) {
567 dev_err(dev, "failed to add platform_data\n");
97238b35 568 goto err;
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569 }
570
571 ret = platform_device_add(musb);
572 if (ret) {
573 dev_err(dev, "failed to register musb device\n");
97238b35 574 goto err;
9ecb8875 575 }
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576 return 0;
577
97238b35 578err:
9ecb8875 579 platform_device_put(musb);
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580 return ret;
581}
582
41ac7b3a 583static int dsps_probe(struct platform_device *pdev)
9ecb8875 584{
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585 const struct of_device_id *match;
586 const struct dsps_musb_wrapper *wrp;
9ecb8875 587 struct dsps_glue *glue;
97238b35 588 int ret;
9ecb8875 589
4fc4b274
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590 if (!strcmp(pdev->name, "musb-hdrc"))
591 return -ENODEV;
592
cc506036 593 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
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594 if (!match) {
595 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
97238b35 596 return -EINVAL;
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597 }
598 wrp = match->data;
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599
600 /* allocate glue */
601 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
602 if (!glue) {
603 dev_err(&pdev->dev, "unable to allocate glue memory\n");
97238b35 604 return -ENOMEM;
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605 }
606
607 glue->dev = &pdev->dev;
97238b35 608 glue->wrp = wrp;
9ecb8875 609
9ecb8875 610 platform_set_drvdata(pdev, glue);
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611 pm_runtime_enable(&pdev->dev);
612
613 ret = pm_runtime_get_sync(&pdev->dev);
614 if (ret < 0) {
615 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
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616 goto err2;
617 }
618
97238b35
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619 ret = dsps_create_musb_pdev(glue, pdev);
620 if (ret)
621 goto err3;
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622
623 return 0;
624
625err3:
0e38c4ed 626 pm_runtime_put(&pdev->dev);
9ecb8875 627err2:
0e38c4ed 628 pm_runtime_disable(&pdev->dev);
9ecb8875 629 kfree(glue);
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630 return ret;
631}
97238b35 632
fb4e98ab 633static int dsps_remove(struct platform_device *pdev)
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634{
635 struct dsps_glue *glue = platform_get_drvdata(pdev);
636
97238b35 637 platform_device_unregister(glue->musb);
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638
639 /* disable usbss clocks */
640 pm_runtime_put(&pdev->dev);
641 pm_runtime_disable(&pdev->dev);
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642 kfree(glue);
643 return 0;
644}
645
fa7b4ca5 646static const struct dsps_musb_wrapper am33xx_driver_data = {
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647 .revision = 0x00,
648 .control = 0x14,
649 .status = 0x18,
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650 .epintr_set = 0x38,
651 .epintr_clear = 0x40,
652 .epintr_status = 0x30,
653 .coreintr_set = 0x3c,
654 .coreintr_clear = 0x44,
655 .coreintr_status = 0x34,
656 .phy_utmi = 0xe0,
657 .mode = 0xe8,
658 .reset = 0,
659 .otg_disable = 21,
660 .iddig = 8,
943c1397 661 .iddig_mux = 7,
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662 .usb_shift = 0,
663 .usb_mask = 0x1ff,
664 .usb_bitmap = (0x1ff << 0),
665 .drvvbus = 8,
666 .txep_shift = 0,
667 .txep_mask = 0xffff,
668 .txep_bitmap = (0xffff << 0),
669 .rxep_shift = 16,
670 .rxep_mask = 0xfffe,
671 .rxep_bitmap = (0xfffe << 16),
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672 .poll_seconds = 2,
673};
674
2f82686e 675static const struct of_device_id musb_dsps_of_match[] = {
65145677 676 { .compatible = "ti,musb-am33xx",
fa7b4ca5 677 .data = (void *) &am33xx_driver_data, },
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678 { },
679};
680MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
681
682static struct platform_driver dsps_usbss_driver = {
683 .probe = dsps_probe,
7690417d 684 .remove = dsps_remove,
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685 .driver = {
686 .name = "musb-dsps",
b432cb83 687 .of_match_table = musb_dsps_of_match,
9ecb8875 688 },
9ecb8875
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689};
690
691MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
692MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
693MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
694MODULE_LICENSE("GPL v2");
695
97238b35 696module_platform_driver(dsps_usbss_driver);
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