usb: musb: use dev_get_platdata()
[deliverable/linux.git] / drivers / usb / musb / musb_dsps.c
CommitLineData
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1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32#include <linux/init.h>
33#include <linux/io.h>
ded017ee 34#include <linux/err.h>
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35#include <linux/platform_device.h>
36#include <linux/dma-mapping.h>
37#include <linux/pm_runtime.h>
38#include <linux/module.h>
78c289f8 39#include <linux/usb/nop-usb-xceiv.h>
e8c4a7ac 40#include <linux/platform_data/usb-omap.h>
0f53e481 41#include <linux/sizes.h>
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42
43#include <linux/of.h>
44#include <linux/of_device.h>
45#include <linux/of_address.h>
46
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47#include "musb_core.h"
48
65145677 49static const struct of_device_id musb_dsps_of_match[];
65145677 50
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51/**
52 * avoid using musb_readx()/musb_writex() as glue layer should not be
53 * dependent on musb core layer symbols.
54 */
55static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
56 { return __raw_readb(addr + offset); }
57
58static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
59 { return __raw_readl(addr + offset); }
60
61static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
62 { __raw_writeb(data, addr + offset); }
63
64static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
65 { __raw_writel(data, addr + offset); }
66
67/**
68 * DSPS musb wrapper register offset.
69 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
70 * musb ips.
71 */
72struct dsps_musb_wrapper {
73 u16 revision;
74 u16 control;
75 u16 status;
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76 u16 epintr_set;
77 u16 epintr_clear;
78 u16 epintr_status;
79 u16 coreintr_set;
80 u16 coreintr_clear;
81 u16 coreintr_status;
82 u16 phy_utmi;
83 u16 mode;
84
85 /* bit positions for control */
86 unsigned reset:5;
87
88 /* bit positions for interrupt */
89 unsigned usb_shift:5;
90 u32 usb_mask;
91 u32 usb_bitmap;
92 unsigned drvvbus:5;
93
94 unsigned txep_shift:5;
95 u32 txep_mask;
96 u32 txep_bitmap;
97
98 unsigned rxep_shift:5;
99 u32 rxep_mask;
100 u32 rxep_bitmap;
101
102 /* bit positions for phy_utmi */
103 unsigned otg_disable:5;
104
105 /* bit positions for mode */
106 unsigned iddig:5;
107 /* miscellaneous stuff */
108 u32 musb_core_offset;
109 u8 poll_seconds;
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110 /* number of musb instances */
111 u8 instances;
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112};
113
114/**
115 * DSPS glue structure.
116 */
117struct dsps_glue {
118 struct device *dev;
db4a9320 119 struct platform_device *musb[2]; /* child musb pdev */
9ecb8875 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
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121 struct timer_list timer[2]; /* otg_workaround timer */
122 unsigned long last_timer[2]; /* last timer data for each instance */
c68bb4c6 123 u32 __iomem *usb_ctrl[2];
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124};
125
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126#define DSPS_AM33XX_CONTROL_MODULE_PHYS_0 0x44e10620
127#define DSPS_AM33XX_CONTROL_MODULE_PHYS_1 0x44e10628
128
129static const resource_size_t dsps_control_module_phys[] = {
130 DSPS_AM33XX_CONTROL_MODULE_PHYS_0,
131 DSPS_AM33XX_CONTROL_MODULE_PHYS_1,
132};
133
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134#define USBPHY_CM_PWRDN (1 << 0)
135#define USBPHY_OTG_PWRDN (1 << 1)
136#define USBPHY_OTGVDET_EN (1 << 19)
137#define USBPHY_OTGSESSEND_EN (1 << 20)
138
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SD
139/**
140 * musb_dsps_phy_control - phy on/off
141 * @glue: struct dsps_glue *
142 * @id: musb instance
143 * @on: flag for phy to be switched on or off
144 *
145 * This is to enable the PHY using usb_ctrl register in system control
146 * module space.
147 *
148 * XXX: This function will be removed once we have a seperate driver for
149 * control module
150 */
151static void musb_dsps_phy_control(struct dsps_glue *glue, u8 id, u8 on)
152{
153 u32 usbphycfg;
154
155 usbphycfg = readl(glue->usb_ctrl[id]);
156
157 if (on) {
158 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN);
159 usbphycfg |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN;
160 } else {
161 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
162 }
163
164 writel(usbphycfg, glue->usb_ctrl[id]);
165}
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166/**
167 * dsps_musb_enable - enable interrupts
168 */
169static void dsps_musb_enable(struct musb *musb)
170{
171 struct device *dev = musb->controller;
172 struct platform_device *pdev = to_platform_device(dev->parent);
173 struct dsps_glue *glue = platform_get_drvdata(pdev);
174 const struct dsps_musb_wrapper *wrp = glue->wrp;
175 void __iomem *reg_base = musb->ctrl_base;
176 u32 epmask, coremask;
177
178 /* Workaround: setup IRQs through both register sets. */
179 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
180 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
181 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
182
183 dsps_writel(reg_base, wrp->epintr_set, epmask);
184 dsps_writel(reg_base, wrp->coreintr_set, coremask);
185 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
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186 dsps_writel(reg_base, wrp->coreintr_set,
187 (1 << wrp->drvvbus) << wrp->usb_shift);
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188}
189
190/**
191 * dsps_musb_disable - disable HDRC and flush interrupts
192 */
193static void dsps_musb_disable(struct musb *musb)
194{
195 struct device *dev = musb->controller;
196 struct platform_device *pdev = to_platform_device(dev->parent);
197 struct dsps_glue *glue = platform_get_drvdata(pdev);
198 const struct dsps_musb_wrapper *wrp = glue->wrp;
199 void __iomem *reg_base = musb->ctrl_base;
200
201 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
202 dsps_writel(reg_base, wrp->epintr_clear,
203 wrp->txep_bitmap | wrp->rxep_bitmap);
204 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
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205}
206
207static void otg_timer(unsigned long _musb)
208{
209 struct musb *musb = (void *)_musb;
210 void __iomem *mregs = musb->mregs;
211 struct device *dev = musb->controller;
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212 struct platform_device *pdev = to_platform_device(dev);
213 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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214 const struct dsps_musb_wrapper *wrp = glue->wrp;
215 u8 devctl;
216 unsigned long flags;
217
218 /*
219 * We poll because DSPS IP's won't expose several OTG-critical
220 * status change events (from the transceiver) otherwise.
221 */
222 devctl = dsps_readb(mregs, MUSB_DEVCTL);
223 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
42c0bf1c 224 usb_otg_state_string(musb->xceiv->state));
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225
226 spin_lock_irqsave(&musb->lock, flags);
227 switch (musb->xceiv->state) {
228 case OTG_STATE_A_WAIT_BCON:
229 devctl &= ~MUSB_DEVCTL_SESSION;
230 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
231
232 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
233 if (devctl & MUSB_DEVCTL_BDEVICE) {
234 musb->xceiv->state = OTG_STATE_B_IDLE;
235 MUSB_DEV_MODE(musb);
236 } else {
237 musb->xceiv->state = OTG_STATE_A_IDLE;
238 MUSB_HST_MODE(musb);
239 }
240 break;
241 case OTG_STATE_A_WAIT_VFALL:
242 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
243 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
244 MUSB_INTR_VBUSERROR << wrp->usb_shift);
245 break;
246 case OTG_STATE_B_IDLE:
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247 devctl = dsps_readb(mregs, MUSB_DEVCTL);
248 if (devctl & MUSB_DEVCTL_BDEVICE)
db4a9320 249 mod_timer(&glue->timer[pdev->id],
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250 jiffies + wrp->poll_seconds * HZ);
251 else
252 musb->xceiv->state = OTG_STATE_A_IDLE;
253 break;
254 default:
255 break;
256 }
257 spin_unlock_irqrestore(&musb->lock, flags);
258}
259
260static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
261{
262 struct device *dev = musb->controller;
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263 struct platform_device *pdev = to_platform_device(dev);
264 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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265
266 if (timeout == 0)
267 timeout = jiffies + msecs_to_jiffies(3);
268
269 /* Never idle if active, or when VBUS timeout is not set as host */
270 if (musb->is_active || (musb->a_wait_bcon == 0 &&
271 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
272 dev_dbg(musb->controller, "%s active, deleting timer\n",
42c0bf1c 273 usb_otg_state_string(musb->xceiv->state));
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274 del_timer(&glue->timer[pdev->id]);
275 glue->last_timer[pdev->id] = jiffies;
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276 return;
277 }
278
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279 if (time_after(glue->last_timer[pdev->id], timeout) &&
280 timer_pending(&glue->timer[pdev->id])) {
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281 dev_dbg(musb->controller,
282 "Longer idle timer already pending, ignoring...\n");
283 return;
284 }
db4a9320 285 glue->last_timer[pdev->id] = timeout;
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286
287 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
42c0bf1c 288 usb_otg_state_string(musb->xceiv->state),
9ecb8875 289 jiffies_to_msecs(timeout - jiffies));
db4a9320 290 mod_timer(&glue->timer[pdev->id], timeout);
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291}
292
293static irqreturn_t dsps_interrupt(int irq, void *hci)
294{
295 struct musb *musb = hci;
296 void __iomem *reg_base = musb->ctrl_base;
297 struct device *dev = musb->controller;
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298 struct platform_device *pdev = to_platform_device(dev);
299 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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300 const struct dsps_musb_wrapper *wrp = glue->wrp;
301 unsigned long flags;
302 irqreturn_t ret = IRQ_NONE;
303 u32 epintr, usbintr;
304
305 spin_lock_irqsave(&musb->lock, flags);
306
307 /* Get endpoint interrupts */
308 epintr = dsps_readl(reg_base, wrp->epintr_status);
309 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
310 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
311
312 if (epintr)
313 dsps_writel(reg_base, wrp->epintr_status, epintr);
314
315 /* Get usb core interrupts */
316 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
317 if (!usbintr && !epintr)
9be73bae 318 goto out;
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319
320 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
321 if (usbintr)
322 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
323
324 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
325 usbintr, epintr);
326 /*
327 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
328 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
329 * switch appropriately between halves of the OTG state machine.
330 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
331 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
332 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
333 */
96449f09 334 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE)
984e833c 335 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
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336
337 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
338 int drvvbus = dsps_readl(reg_base, wrp->status);
339 void __iomem *mregs = musb->mregs;
340 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
341 int err;
342
032ec49f 343 err = musb->int_usb & MUSB_INTR_VBUSERROR;
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344 if (err) {
345 /*
346 * The Mentor core doesn't debounce VBUS as needed
347 * to cope with device connect current spikes. This
348 * means it's not uncommon for bus-powered devices
349 * to get VBUS errors during enumeration.
350 *
351 * This is a workaround, but newer RTL from Mentor
352 * seems to allow a better one: "re"-starting sessions
353 * without waiting for VBUS to stop registering in
354 * devctl.
355 */
356 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
357 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
db4a9320 358 mod_timer(&glue->timer[pdev->id],
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359 jiffies + wrp->poll_seconds * HZ);
360 WARNING("VBUS error workaround (delay coming)\n");
032ec49f 361 } else if (drvvbus) {
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362 musb->is_active = 1;
363 MUSB_HST_MODE(musb);
364 musb->xceiv->otg->default_a = 1;
365 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
db4a9320 366 del_timer(&glue->timer[pdev->id]);
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367 } else {
368 musb->is_active = 0;
369 MUSB_DEV_MODE(musb);
370 musb->xceiv->otg->default_a = 0;
371 musb->xceiv->state = OTG_STATE_B_IDLE;
372 }
373
374 /* NOTE: this must complete power-on within 100 ms. */
375 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
376 drvvbus ? "on" : "off",
42c0bf1c 377 usb_otg_state_string(musb->xceiv->state),
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378 err ? " ERROR" : "",
379 devctl);
380 ret = IRQ_HANDLED;
381 }
382
383 if (musb->int_tx || musb->int_rx || musb->int_usb)
384 ret |= musb_interrupt(musb);
385
9ecb8875 386 /* Poll for ID change */
032ec49f 387 if (musb->xceiv->state == OTG_STATE_B_IDLE)
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388 mod_timer(&glue->timer[pdev->id],
389 jiffies + wrp->poll_seconds * HZ);
9be73bae 390out:
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391 spin_unlock_irqrestore(&musb->lock, flags);
392
393 return ret;
394}
395
396static int dsps_musb_init(struct musb *musb)
397{
398 struct device *dev = musb->controller;
db4a9320
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399 struct platform_device *pdev = to_platform_device(dev);
400 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
9ecb8875 401 const struct dsps_musb_wrapper *wrp = glue->wrp;
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402 void __iomem *reg_base = musb->ctrl_base;
403 u32 rev, val;
404 int status;
405
406 /* mentor core register starts at offset of 0x400 from musb base */
407 musb->mregs += wrp->musb_core_offset;
408
d7554226
AM
409 /* NOP driver needs change if supporting dual instance */
410 usb_nop_xceiv_register();
662dca54 411 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
ded017ee 412 if (IS_ERR_OR_NULL(musb->xceiv))
25736e0c 413 return -EPROBE_DEFER;
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414
415 /* Returns zero if e.g. not clocked */
416 rev = dsps_readl(reg_base, wrp->revision);
417 if (!rev) {
418 status = -ENODEV;
419 goto err0;
420 }
421
7557a57f
SAS
422 usb_phy_init(musb->xceiv);
423
db4a9320 424 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb);
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425
426 /* Reset the musb */
427 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
428
429 /* Start the on-chip PHY and its PLL. */
c68bb4c6 430 musb_dsps_phy_control(glue, pdev->id, 1);
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431
432 musb->isr = dsps_interrupt;
433
434 /* reset the otgdisable bit, needed for host mode to work */
435 val = dsps_readl(reg_base, wrp->phy_utmi);
436 val &= ~(1 << wrp->otg_disable);
437 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
438
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439 return 0;
440err0:
721002ec 441 usb_put_phy(musb->xceiv);
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442 usb_nop_xceiv_unregister();
443 return status;
444}
445
446static int dsps_musb_exit(struct musb *musb)
447{
448 struct device *dev = musb->controller;
db4a9320
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449 struct platform_device *pdev = to_platform_device(dev);
450 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
9ecb8875 451
db4a9320 452 del_timer_sync(&glue->timer[pdev->id]);
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453
454 /* Shutdown the on-chip PHY and its PLL. */
c68bb4c6 455 musb_dsps_phy_control(glue, pdev->id, 0);
7557a57f 456 usb_phy_shutdown(musb->xceiv);
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457
458 /* NOP driver needs change if supporting dual instance */
721002ec 459 usb_put_phy(musb->xceiv);
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460 usb_nop_xceiv_unregister();
461
462 return 0;
463}
464
465static struct musb_platform_ops dsps_ops = {
466 .init = dsps_musb_init,
467 .exit = dsps_musb_exit,
468
469 .enable = dsps_musb_enable,
470 .disable = dsps_musb_disable,
471
472 .try_idle = dsps_musb_try_idle,
473};
474
475static u64 musb_dmamask = DMA_BIT_MASK(32);
476
41ac7b3a 477static int dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
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478{
479 struct device *dev = glue->dev;
480 struct platform_device *pdev = to_platform_device(dev);
c1a7d67c 481 struct musb_hdrc_platform_data *pdata = dev_get_platdata(dev);
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482 struct device_node *np = pdev->dev.of_node;
483 struct musb_hdrc_config *config;
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484 struct platform_device *musb;
485 struct resource *res;
486 struct resource resources[2];
ca749b2a 487 char res_name[11];
2f771164 488 int ret;
9ecb8875 489
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SD
490 resources[0].start = dsps_control_module_phys[id];
491 resources[0].end = resources[0].start + SZ_4 - 1;
492 resources[0].flags = IORESOURCE_MEM;
493
148e1134
TR
494 glue->usb_ctrl[id] = devm_ioremap_resource(&pdev->dev, resources);
495 if (IS_ERR(glue->usb_ctrl[id])) {
496 ret = PTR_ERR(glue->usb_ctrl[id]);
c68bb4c6
SD
497 goto err0;
498 }
499
3e594b18
AM
500 /* first resource is for usbss, so start index from 1 */
501 res = platform_get_resource(pdev, IORESOURCE_MEM, id + 1);
9ecb8875 502 if (!res) {
3e594b18 503 dev_err(dev, "failed to get memory for instance %d\n", id);
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504 ret = -ENODEV;
505 goto err0;
506 }
507 res->parent = NULL;
508 resources[0] = *res;
509
3e594b18
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510 /* first resource is for usbss, so start index from 1 */
511 res = platform_get_resource(pdev, IORESOURCE_IRQ, id + 1);
9ecb8875 512 if (!res) {
3e594b18 513 dev_err(dev, "failed to get irq for instance %d\n", id);
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514 ret = -ENODEV;
515 goto err0;
516 }
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517 res->parent = NULL;
518 resources[1] = *res;
3bb55348 519 resources[1].name = "mc";
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520
521 /* allocate the child platform device */
2f771164 522 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
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523 if (!musb) {
524 dev_err(dev, "failed to allocate musb device\n");
525 ret = -ENOMEM;
2f771164 526 goto err0;
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527 }
528
529 musb->dev.parent = dev;
530 musb->dev.dma_mask = &musb_dmamask;
531 musb->dev.coherent_dma_mask = musb_dmamask;
532
db4a9320 533 glue->musb[id] = musb;
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534
535 ret = platform_device_add_resources(musb, resources, 2);
536 if (ret) {
537 dev_err(dev, "failed to add resources\n");
65b3d52d 538 goto err2;
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539 }
540
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541 if (np) {
542 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
543 if (!pdata) {
544 dev_err(&pdev->dev,
8b513d0c 545 "failed to allocate musb platform data\n");
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546 ret = -ENOMEM;
547 goto err2;
548 }
549
550 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
551 if (!config) {
552 dev_err(&pdev->dev,
553 "failed to allocate musb hdrc config\n");
b25e5f1c 554 ret = -ENOMEM;
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555 goto err2;
556 }
557
558 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps);
559 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits);
ca749b2a 560 snprintf(res_name, sizeof(res_name), "port%d-mode", id);
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561 of_property_read_u32(np, res_name, (u32 *)&pdata->mode);
562 of_property_read_u32(np, "power", (u32 *)&pdata->power);
563 config->multipoint = of_property_read_bool(np, "multipoint");
564
565 pdata->config = config;
566 }
567
568 pdata->platform_ops = &dsps_ops;
569
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570 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
571 if (ret) {
572 dev_err(dev, "failed to add platform_data\n");
65b3d52d 573 goto err2;
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574 }
575
576 ret = platform_device_add(musb);
577 if (ret) {
578 dev_err(dev, "failed to register musb device\n");
65b3d52d 579 goto err2;
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580 }
581
582 return 0;
583
65b3d52d 584err2:
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585 platform_device_put(musb);
586err0:
587 return ret;
588}
589
41ac7b3a 590static int dsps_probe(struct platform_device *pdev)
9ecb8875 591{
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592 const struct of_device_id *match;
593 const struct dsps_musb_wrapper *wrp;
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594 struct dsps_glue *glue;
595 struct resource *iomem;
db4a9320 596 int ret, i;
9ecb8875 597
cc506036 598 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
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599 if (!match) {
600 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
601 ret = -EINVAL;
602 goto err0;
603 }
604 wrp = match->data;
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605
606 /* allocate glue */
607 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
608 if (!glue) {
609 dev_err(&pdev->dev, "unable to allocate glue memory\n");
610 ret = -ENOMEM;
611 goto err0;
612 }
613
614 /* get memory resource */
615 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
616 if (!iomem) {
617 dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
618 ret = -ENODEV;
619 goto err1;
620 }
621
622 glue->dev = &pdev->dev;
623
624 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
625 if (!glue->wrp) {
626 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
627 ret = -ENOMEM;
628 goto err1;
629 }
630 platform_set_drvdata(pdev, glue);
631
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632 /* enable the usbss clocks */
633 pm_runtime_enable(&pdev->dev);
634
635 ret = pm_runtime_get_sync(&pdev->dev);
636 if (ret < 0) {
637 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
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638 goto err2;
639 }
640
db4a9320
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641 /* create the child platform device for all instances of musb */
642 for (i = 0; i < wrp->instances ; i++) {
643 ret = dsps_create_musb_pdev(glue, i);
644 if (ret != 0) {
645 dev_err(&pdev->dev, "failed to create child pdev\n");
646 /* release resources of previously created instances */
647 for (i--; i >= 0 ; i--)
2f771164 648 platform_device_unregister(glue->musb[i]);
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649 goto err3;
650 }
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651 }
652
653 return 0;
654
655err3:
0e38c4ed 656 pm_runtime_put(&pdev->dev);
9ecb8875 657err2:
0e38c4ed 658 pm_runtime_disable(&pdev->dev);
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659 kfree(glue->wrp);
660err1:
661 kfree(glue);
662err0:
663 return ret;
664}
fb4e98ab 665static int dsps_remove(struct platform_device *pdev)
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666{
667 struct dsps_glue *glue = platform_get_drvdata(pdev);
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668 const struct dsps_musb_wrapper *wrp = glue->wrp;
669 int i;
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670
671 /* delete the child platform device */
db4a9320 672 for (i = 0; i < wrp->instances ; i++)
2f771164 673 platform_device_unregister(glue->musb[i]);
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674
675 /* disable usbss clocks */
676 pm_runtime_put(&pdev->dev);
677 pm_runtime_disable(&pdev->dev);
678 kfree(glue->wrp);
679 kfree(glue);
680 return 0;
681}
682
683#ifdef CONFIG_PM_SLEEP
684static int dsps_suspend(struct device *dev)
685{
c68bb4c6
SD
686 struct platform_device *pdev = to_platform_device(dev->parent);
687 struct dsps_glue *glue = platform_get_drvdata(pdev);
688 const struct dsps_musb_wrapper *wrp = glue->wrp;
689 int i;
9ecb8875 690
c68bb4c6
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691 for (i = 0; i < wrp->instances; i++)
692 musb_dsps_phy_control(glue, i, 0);
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693
694 return 0;
695}
696
697static int dsps_resume(struct device *dev)
698{
c68bb4c6
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699 struct platform_device *pdev = to_platform_device(dev->parent);
700 struct dsps_glue *glue = platform_get_drvdata(pdev);
701 const struct dsps_musb_wrapper *wrp = glue->wrp;
702 int i;
9ecb8875 703
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SD
704 for (i = 0; i < wrp->instances; i++)
705 musb_dsps_phy_control(glue, i, 1);
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706
707 return 0;
708}
709#endif
710
711static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
712
fa7b4ca5 713static const struct dsps_musb_wrapper am33xx_driver_data = {
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714 .revision = 0x00,
715 .control = 0x14,
716 .status = 0x18,
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717 .epintr_set = 0x38,
718 .epintr_clear = 0x40,
719 .epintr_status = 0x30,
720 .coreintr_set = 0x3c,
721 .coreintr_clear = 0x44,
722 .coreintr_status = 0x34,
723 .phy_utmi = 0xe0,
724 .mode = 0xe8,
725 .reset = 0,
726 .otg_disable = 21,
727 .iddig = 8,
728 .usb_shift = 0,
729 .usb_mask = 0x1ff,
730 .usb_bitmap = (0x1ff << 0),
731 .drvvbus = 8,
732 .txep_shift = 0,
733 .txep_mask = 0xffff,
734 .txep_bitmap = (0xffff << 0),
735 .rxep_shift = 16,
736 .rxep_mask = 0xfffe,
737 .rxep_bitmap = (0xfffe << 16),
738 .musb_core_offset = 0x400,
739 .poll_seconds = 2,
3b46dd76 740 .instances = 1,
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741};
742
2f82686e 743static const struct of_device_id musb_dsps_of_match[] = {
65145677 744 { .compatible = "ti,musb-am33xx",
fa7b4ca5 745 .data = (void *) &am33xx_driver_data, },
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746 { },
747};
748MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
749
750static struct platform_driver dsps_usbss_driver = {
751 .probe = dsps_probe,
7690417d 752 .remove = dsps_remove,
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753 .driver = {
754 .name = "musb-dsps",
755 .pm = &dsps_pm_ops,
65145677 756 .of_match_table = of_match_ptr(musb_dsps_of_match),
9ecb8875 757 },
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758};
759
760MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
761MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
762MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
763MODULE_LICENSE("GPL v2");
764
765static int __init dsps_init(void)
766{
767 return platform_driver_register(&dsps_usbss_driver);
768}
769subsys_initcall(dsps_init);
770
771static void __exit dsps_exit(void)
772{
773 platform_driver_unregister(&dsps_usbss_driver);
774}
775module_exit(dsps_exit);
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