Commit | Line | Data |
---|---|---|
550a7375 FB |
1 | /* |
2 | * Copyright (C) 2005-2007 by Texas Instruments | |
3 | * Some code has been taken from tusb6010.c | |
4 | * Copyrights for that are attributable to: | |
5 | * Copyright (C) 2006 Nokia Corporation | |
550a7375 FB |
6 | * Tony Lindgren <tony@atomide.com> |
7 | * | |
8 | * This file is part of the Inventra Controller Driver for Linux. | |
9 | * | |
10 | * The Inventra Controller Driver for Linux is free software; you | |
11 | * can redistribute it and/or modify it under the terms of the GNU | |
12 | * General Public License version 2 as published by the Free Software | |
13 | * Foundation. | |
14 | * | |
15 | * The Inventra Controller Driver for Linux is distributed in | |
16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; | |
17 | * without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
19 | * License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with The Inventra Controller Driver for Linux ; if not, | |
23 | * write to the Free Software Foundation, Inc., 59 Temple Place, | |
24 | * Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | */ | |
27 | #include <linux/module.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/sched.h> | |
550a7375 FB |
30 | #include <linux/init.h> |
31 | #include <linux/list.h> | |
550a7375 | 32 | #include <linux/io.h> |
dc09886b FB |
33 | #include <linux/platform_device.h> |
34 | #include <linux/dma-mapping.h> | |
207b0e1f HH |
35 | #include <linux/pm_runtime.h> |
36 | #include <linux/err.h> | |
550a7375 | 37 | |
550a7375 FB |
38 | #include "musb_core.h" |
39 | #include "omap2430.h" | |
40 | ||
a3cee12a FB |
41 | struct omap2430_glue { |
42 | struct device *dev; | |
43 | struct platform_device *musb; | |
44 | }; | |
c20aebb9 | 45 | #define glue_to_musb(g) platform_get_drvdata(g->musb) |
a3cee12a | 46 | |
550a7375 FB |
47 | static struct timer_list musb_idle_timer; |
48 | ||
49 | static void musb_do_idle(unsigned long _musb) | |
50 | { | |
51 | struct musb *musb = (void *)_musb; | |
52 | unsigned long flags; | |
53 | u8 power; | |
54 | u8 devctl; | |
55 | ||
550a7375 FB |
56 | spin_lock_irqsave(&musb->lock, flags); |
57 | ||
84e250ff | 58 | switch (musb->xceiv->state) { |
550a7375 | 59 | case OTG_STATE_A_WAIT_BCON: |
550a7375 FB |
60 | |
61 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
62 | if (devctl & MUSB_DEVCTL_BDEVICE) { | |
84e250ff | 63 | musb->xceiv->state = OTG_STATE_B_IDLE; |
550a7375 FB |
64 | MUSB_DEV_MODE(musb); |
65 | } else { | |
84e250ff | 66 | musb->xceiv->state = OTG_STATE_A_IDLE; |
550a7375 FB |
67 | MUSB_HST_MODE(musb); |
68 | } | |
69 | break; | |
550a7375 FB |
70 | case OTG_STATE_A_SUSPEND: |
71 | /* finish RESUME signaling? */ | |
72 | if (musb->port1_status & MUSB_PORT_STAT_RESUME) { | |
73 | power = musb_readb(musb->mregs, MUSB_POWER); | |
74 | power &= ~MUSB_POWER_RESUME; | |
5c8a86e1 | 75 | dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power); |
550a7375 FB |
76 | musb_writeb(musb->mregs, MUSB_POWER, power); |
77 | musb->is_active = 1; | |
78 | musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | |
79 | | MUSB_PORT_STAT_RESUME); | |
80 | musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; | |
81 | usb_hcd_poll_rh_status(musb_to_hcd(musb)); | |
82 | /* NOTE: it might really be A_WAIT_BCON ... */ | |
84e250ff | 83 | musb->xceiv->state = OTG_STATE_A_HOST; |
550a7375 FB |
84 | } |
85 | break; | |
550a7375 FB |
86 | case OTG_STATE_A_HOST: |
87 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
88 | if (devctl & MUSB_DEVCTL_BDEVICE) | |
84e250ff | 89 | musb->xceiv->state = OTG_STATE_B_IDLE; |
550a7375 | 90 | else |
84e250ff | 91 | musb->xceiv->state = OTG_STATE_A_WAIT_BCON; |
550a7375 FB |
92 | default: |
93 | break; | |
94 | } | |
95 | spin_unlock_irqrestore(&musb->lock, flags); | |
96 | } | |
97 | ||
98 | ||
743411b3 | 99 | static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout) |
550a7375 FB |
100 | { |
101 | unsigned long default_timeout = jiffies + msecs_to_jiffies(3); | |
102 | static unsigned long last_timer; | |
103 | ||
104 | if (timeout == 0) | |
105 | timeout = default_timeout; | |
106 | ||
107 | /* Never idle if active, or when VBUS timeout is not set as host */ | |
108 | if (musb->is_active || ((musb->a_wait_bcon == 0) | |
84e250ff | 109 | && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { |
5c8a86e1 | 110 | dev_dbg(musb->controller, "%s active, deleting timer\n", |
3df00453 | 111 | otg_state_string(musb->xceiv->state)); |
550a7375 FB |
112 | del_timer(&musb_idle_timer); |
113 | last_timer = jiffies; | |
114 | return; | |
115 | } | |
116 | ||
117 | if (time_after(last_timer, timeout)) { | |
118 | if (!timer_pending(&musb_idle_timer)) | |
119 | last_timer = timeout; | |
120 | else { | |
5c8a86e1 | 121 | dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n"); |
550a7375 FB |
122 | return; |
123 | } | |
124 | } | |
125 | last_timer = timeout; | |
126 | ||
5c8a86e1 | 127 | dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n", |
3df00453 | 128 | otg_state_string(musb->xceiv->state), |
550a7375 FB |
129 | (unsigned long)jiffies_to_msecs(timeout - jiffies)); |
130 | mod_timer(&musb_idle_timer, timeout); | |
131 | } | |
132 | ||
743411b3 | 133 | static void omap2430_musb_set_vbus(struct musb *musb, int is_on) |
550a7375 FB |
134 | { |
135 | u8 devctl; | |
594632ef HH |
136 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); |
137 | int ret = 1; | |
550a7375 FB |
138 | /* HDRC controls CPEN, but beware current surges during device |
139 | * connect. They can trigger transient overcurrent conditions | |
140 | * that must be ignored. | |
141 | */ | |
142 | ||
143 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
144 | ||
145 | if (is_on) { | |
594632ef HH |
146 | if (musb->xceiv->state == OTG_STATE_A_IDLE) { |
147 | /* start the session */ | |
148 | devctl |= MUSB_DEVCTL_SESSION; | |
149 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
150 | /* | |
151 | * Wait for the musb to set as A device to enable the | |
152 | * VBUS | |
153 | */ | |
154 | while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) { | |
155 | ||
156 | cpu_relax(); | |
157 | ||
158 | if (time_after(jiffies, timeout)) { | |
159 | dev_err(musb->controller, | |
160 | "configured as A device timeout"); | |
161 | ret = -EINVAL; | |
162 | break; | |
163 | } | |
164 | } | |
165 | ||
166 | if (ret && musb->xceiv->set_vbus) | |
167 | otg_set_vbus(musb->xceiv, 1); | |
168 | } else { | |
169 | musb->is_active = 1; | |
170 | musb->xceiv->default_a = 1; | |
171 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; | |
172 | devctl |= MUSB_DEVCTL_SESSION; | |
173 | MUSB_HST_MODE(musb); | |
174 | } | |
550a7375 FB |
175 | } else { |
176 | musb->is_active = 0; | |
177 | ||
178 | /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and | |
179 | * jumping right to B_IDLE... | |
180 | */ | |
181 | ||
84e250ff DB |
182 | musb->xceiv->default_a = 0; |
183 | musb->xceiv->state = OTG_STATE_B_IDLE; | |
550a7375 FB |
184 | devctl &= ~MUSB_DEVCTL_SESSION; |
185 | ||
186 | MUSB_DEV_MODE(musb); | |
187 | } | |
188 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
189 | ||
5c8a86e1 | 190 | dev_dbg(musb->controller, "VBUS %s, devctl %02x " |
550a7375 | 191 | /* otg %3x conf %08x prcm %08x */ "\n", |
3df00453 | 192 | otg_state_string(musb->xceiv->state), |
550a7375 FB |
193 | musb_readb(musb->mregs, MUSB_DEVCTL)); |
194 | } | |
550a7375 | 195 | |
743411b3 | 196 | static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode) |
550a7375 FB |
197 | { |
198 | u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
199 | ||
200 | devctl |= MUSB_DEVCTL_SESSION; | |
201 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
202 | ||
96a274d1 | 203 | return 0; |
550a7375 FB |
204 | } |
205 | ||
c20aebb9 FB |
206 | static inline void omap2430_low_level_exit(struct musb *musb) |
207 | { | |
208 | u32 l; | |
209 | ||
210 | /* in any role */ | |
211 | l = musb_readl(musb->mregs, OTG_FORCESTDBY); | |
212 | l |= ENABLEFORCE; /* enable MSTANDBY */ | |
213 | musb_writel(musb->mregs, OTG_FORCESTDBY, l); | |
c20aebb9 FB |
214 | } |
215 | ||
216 | static inline void omap2430_low_level_init(struct musb *musb) | |
217 | { | |
218 | u32 l; | |
219 | ||
c20aebb9 FB |
220 | l = musb_readl(musb->mregs, OTG_FORCESTDBY); |
221 | l &= ~ENABLEFORCE; /* disable MSTANDBY */ | |
222 | musb_writel(musb->mregs, OTG_FORCESTDBY, l); | |
223 | } | |
224 | ||
594632ef HH |
225 | /* blocking notifier support */ |
226 | static int musb_otg_notifications(struct notifier_block *nb, | |
227 | unsigned long event, void *unused) | |
228 | { | |
229 | struct musb *musb = container_of(nb, struct musb, nb); | |
230 | struct device *dev = musb->controller; | |
231 | struct musb_hdrc_platform_data *pdata = dev->platform_data; | |
232 | struct omap_musb_board_data *data = pdata->board_data; | |
233 | ||
234 | switch (event) { | |
235 | case USB_EVENT_ID: | |
5c8a86e1 | 236 | dev_dbg(musb->controller, "ID GND\n"); |
594632ef HH |
237 | |
238 | if (is_otg_enabled(musb)) { | |
594632ef | 239 | if (musb->gadget_driver) { |
7acc6197 | 240 | pm_runtime_get_sync(musb->controller); |
594632ef | 241 | otg_init(musb->xceiv); |
70045c57 | 242 | omap2430_musb_set_vbus(musb, 1); |
594632ef | 243 | } |
594632ef | 244 | } else { |
7acc6197 | 245 | pm_runtime_get_sync(musb->controller); |
594632ef | 246 | otg_init(musb->xceiv); |
70045c57 | 247 | omap2430_musb_set_vbus(musb, 1); |
594632ef HH |
248 | } |
249 | break; | |
250 | ||
251 | case USB_EVENT_VBUS: | |
5c8a86e1 | 252 | dev_dbg(musb->controller, "VBUS Connect\n"); |
594632ef | 253 | |
7acc6197 HH |
254 | if (musb->gadget_driver) |
255 | pm_runtime_get_sync(musb->controller); | |
594632ef HH |
256 | otg_init(musb->xceiv); |
257 | break; | |
258 | ||
259 | case USB_EVENT_NONE: | |
5c8a86e1 | 260 | dev_dbg(musb->controller, "VBUS Disconnect\n"); |
594632ef | 261 | |
383cf4e8 | 262 | if (is_otg_enabled(musb) || is_peripheral_enabled(musb)) |
62285963 | 263 | if (musb->gadget_driver) { |
7acc6197 HH |
264 | pm_runtime_mark_last_busy(musb->controller); |
265 | pm_runtime_put_autosuspend(musb->controller); | |
266 | } | |
267 | ||
594632ef HH |
268 | if (data->interface_type == MUSB_INTERFACE_UTMI) { |
269 | if (musb->xceiv->set_vbus) | |
270 | otg_set_vbus(musb->xceiv, 0); | |
271 | } | |
272 | otg_shutdown(musb->xceiv); | |
273 | break; | |
274 | default: | |
5c8a86e1 | 275 | dev_dbg(musb->controller, "ID float\n"); |
594632ef HH |
276 | return NOTIFY_DONE; |
277 | } | |
278 | ||
279 | return NOTIFY_OK; | |
280 | } | |
281 | ||
743411b3 | 282 | static int omap2430_musb_init(struct musb *musb) |
550a7375 | 283 | { |
594632ef | 284 | u32 l, status = 0; |
ea65df57 HK |
285 | struct device *dev = musb->controller; |
286 | struct musb_hdrc_platform_data *plat = dev->platform_data; | |
287 | struct omap_musb_board_data *data = plat->board_data; | |
550a7375 | 288 | |
84e250ff DB |
289 | /* We require some kind of external transceiver, hooked |
290 | * up through ULPI. TWL4030-family PMICs include one, | |
291 | * which needs a driver, drivers aren't always needed. | |
292 | */ | |
293 | musb->xceiv = otg_get_transceiver(); | |
294 | if (!musb->xceiv) { | |
295 | pr_err("HS USB OTG: no transceiver configured\n"); | |
296 | return -ENODEV; | |
297 | } | |
298 | ||
7acc6197 HH |
299 | status = pm_runtime_get_sync(dev); |
300 | if (status < 0) { | |
301 | dev_err(dev, "pm_runtime_get_sync FAILED"); | |
302 | goto err1; | |
303 | } | |
550a7375 | 304 | |
8573e6a6 | 305 | l = musb_readl(musb->mregs, OTG_INTERFSEL); |
de2e1b0c MM |
306 | |
307 | if (data->interface_type == MUSB_INTERFACE_UTMI) { | |
308 | /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */ | |
309 | l &= ~ULPI_12PIN; /* Disable ULPI */ | |
310 | l |= UTMI_8BIT; /* Enable UTMI */ | |
311 | } else { | |
312 | l |= ULPI_12PIN; | |
313 | } | |
314 | ||
8573e6a6 | 315 | musb_writel(musb->mregs, OTG_INTERFSEL, l); |
550a7375 FB |
316 | |
317 | pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, " | |
318 | "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n", | |
8573e6a6 FB |
319 | musb_readl(musb->mregs, OTG_REVISION), |
320 | musb_readl(musb->mregs, OTG_SYSCONFIG), | |
321 | musb_readl(musb->mregs, OTG_SYSSTATUS), | |
322 | musb_readl(musb->mregs, OTG_INTERFSEL), | |
323 | musb_readl(musb->mregs, OTG_SIMENABLE)); | |
550a7375 | 324 | |
594632ef HH |
325 | musb->nb.notifier_call = musb_otg_notifications; |
326 | status = otg_register_notifier(musb->xceiv, &musb->nb); | |
327 | ||
328 | if (status) | |
5c8a86e1 | 329 | dev_dbg(musb->controller, "notification register failed\n"); |
594632ef | 330 | |
550a7375 FB |
331 | setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb); |
332 | ||
333 | return 0; | |
7acc6197 HH |
334 | |
335 | err1: | |
336 | pm_runtime_disable(dev); | |
337 | return status; | |
550a7375 FB |
338 | } |
339 | ||
002eda13 HH |
340 | static void omap2430_musb_enable(struct musb *musb) |
341 | { | |
342 | u8 devctl; | |
343 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | |
344 | struct device *dev = musb->controller; | |
345 | struct musb_hdrc_platform_data *pdata = dev->platform_data; | |
346 | struct omap_musb_board_data *data = pdata->board_data; | |
347 | ||
348 | switch (musb->xceiv->last_event) { | |
349 | ||
350 | case USB_EVENT_ID: | |
351 | otg_init(musb->xceiv); | |
352 | if (data->interface_type == MUSB_INTERFACE_UTMI) { | |
353 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
354 | /* start the session */ | |
355 | devctl |= MUSB_DEVCTL_SESSION; | |
356 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
357 | while (musb_readb(musb->mregs, MUSB_DEVCTL) & | |
358 | MUSB_DEVCTL_BDEVICE) { | |
359 | cpu_relax(); | |
360 | ||
361 | if (time_after(jiffies, timeout)) { | |
362 | dev_err(musb->controller, | |
363 | "configured as A device timeout"); | |
364 | break; | |
365 | } | |
366 | } | |
367 | } | |
368 | break; | |
369 | ||
370 | case USB_EVENT_VBUS: | |
371 | otg_init(musb->xceiv); | |
372 | break; | |
373 | ||
374 | default: | |
375 | break; | |
376 | } | |
377 | } | |
378 | ||
379 | static void omap2430_musb_disable(struct musb *musb) | |
380 | { | |
381 | if (musb->xceiv->last_event) | |
382 | otg_shutdown(musb->xceiv); | |
550a7375 FB |
383 | } |
384 | ||
743411b3 | 385 | static int omap2430_musb_exit(struct musb *musb) |
550a7375 | 386 | { |
19b9a83e | 387 | del_timer_sync(&musb_idle_timer); |
550a7375 | 388 | |
c20aebb9 | 389 | omap2430_low_level_exit(musb); |
f4053874 | 390 | otg_put_transceiver(musb->xceiv); |
c20aebb9 | 391 | |
550a7375 FB |
392 | return 0; |
393 | } | |
743411b3 | 394 | |
f7ec9437 | 395 | static const struct musb_platform_ops omap2430_ops = { |
743411b3 FB |
396 | .init = omap2430_musb_init, |
397 | .exit = omap2430_musb_exit, | |
398 | ||
743411b3 FB |
399 | .set_mode = omap2430_musb_set_mode, |
400 | .try_idle = omap2430_musb_try_idle, | |
401 | ||
402 | .set_vbus = omap2430_musb_set_vbus, | |
002eda13 HH |
403 | |
404 | .enable = omap2430_musb_enable, | |
405 | .disable = omap2430_musb_disable, | |
743411b3 | 406 | }; |
dc09886b FB |
407 | |
408 | static u64 omap2430_dmamask = DMA_BIT_MASK(32); | |
409 | ||
410 | static int __init omap2430_probe(struct platform_device *pdev) | |
411 | { | |
412 | struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data; | |
413 | struct platform_device *musb; | |
a3cee12a | 414 | struct omap2430_glue *glue; |
dc09886b FB |
415 | int ret = -ENOMEM; |
416 | ||
a3cee12a FB |
417 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); |
418 | if (!glue) { | |
419 | dev_err(&pdev->dev, "failed to allocate glue context\n"); | |
420 | goto err0; | |
421 | } | |
422 | ||
dc09886b FB |
423 | musb = platform_device_alloc("musb-hdrc", -1); |
424 | if (!musb) { | |
425 | dev_err(&pdev->dev, "failed to allocate musb device\n"); | |
a3cee12a | 426 | goto err1; |
dc09886b FB |
427 | } |
428 | ||
429 | musb->dev.parent = &pdev->dev; | |
430 | musb->dev.dma_mask = &omap2430_dmamask; | |
431 | musb->dev.coherent_dma_mask = omap2430_dmamask; | |
432 | ||
a3cee12a FB |
433 | glue->dev = &pdev->dev; |
434 | glue->musb = musb; | |
435 | ||
f7ec9437 FB |
436 | pdata->platform_ops = &omap2430_ops; |
437 | ||
a3cee12a | 438 | platform_set_drvdata(pdev, glue); |
dc09886b FB |
439 | |
440 | ret = platform_device_add_resources(musb, pdev->resource, | |
441 | pdev->num_resources); | |
442 | if (ret) { | |
443 | dev_err(&pdev->dev, "failed to add resources\n"); | |
207b0e1f | 444 | goto err2; |
dc09886b FB |
445 | } |
446 | ||
447 | ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); | |
448 | if (ret) { | |
449 | dev_err(&pdev->dev, "failed to add platform_data\n"); | |
207b0e1f | 450 | goto err2; |
dc09886b FB |
451 | } |
452 | ||
453 | ret = platform_device_add(musb); | |
454 | if (ret) { | |
455 | dev_err(&pdev->dev, "failed to register musb device\n"); | |
207b0e1f | 456 | goto err2; |
dc09886b FB |
457 | } |
458 | ||
207b0e1f | 459 | pm_runtime_enable(&pdev->dev); |
03491761 | 460 | |
207b0e1f | 461 | return 0; |
03491761 | 462 | |
a3cee12a | 463 | err2: |
dc09886b FB |
464 | platform_device_put(musb); |
465 | ||
a3cee12a FB |
466 | err1: |
467 | kfree(glue); | |
468 | ||
dc09886b FB |
469 | err0: |
470 | return ret; | |
471 | } | |
472 | ||
473 | static int __exit omap2430_remove(struct platform_device *pdev) | |
474 | { | |
a3cee12a | 475 | struct omap2430_glue *glue = platform_get_drvdata(pdev); |
dc09886b | 476 | |
a3cee12a FB |
477 | platform_device_del(glue->musb); |
478 | platform_device_put(glue->musb); | |
207b0e1f HH |
479 | pm_runtime_put(&pdev->dev); |
480 | pm_runtime_disable(&pdev->dev); | |
a3cee12a | 481 | kfree(glue); |
dc09886b FB |
482 | |
483 | return 0; | |
484 | } | |
485 | ||
c20aebb9 | 486 | #ifdef CONFIG_PM |
c20aebb9 | 487 | |
7acc6197 | 488 | static int omap2430_runtime_suspend(struct device *dev) |
c20aebb9 FB |
489 | { |
490 | struct omap2430_glue *glue = dev_get_drvdata(dev); | |
491 | struct musb *musb = glue_to_musb(glue); | |
492 | ||
e25bec16 HH |
493 | musb->context.otg_interfsel = musb_readl(musb->mregs, |
494 | OTG_INTERFSEL); | |
495 | ||
c20aebb9 FB |
496 | omap2430_low_level_exit(musb); |
497 | otg_set_suspend(musb->xceiv, 1); | |
c20aebb9 FB |
498 | |
499 | return 0; | |
500 | } | |
501 | ||
7acc6197 | 502 | static int omap2430_runtime_resume(struct device *dev) |
c20aebb9 FB |
503 | { |
504 | struct omap2430_glue *glue = dev_get_drvdata(dev); | |
505 | struct musb *musb = glue_to_musb(glue); | |
c20aebb9 FB |
506 | |
507 | omap2430_low_level_init(musb); | |
e25bec16 HH |
508 | musb_writel(musb->mregs, OTG_INTERFSEL, |
509 | musb->context.otg_interfsel); | |
510 | ||
c20aebb9 FB |
511 | otg_set_suspend(musb->xceiv, 0); |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
516 | static struct dev_pm_ops omap2430_pm_ops = { | |
7acc6197 HH |
517 | .runtime_suspend = omap2430_runtime_suspend, |
518 | .runtime_resume = omap2430_runtime_resume, | |
c20aebb9 FB |
519 | }; |
520 | ||
521 | #define DEV_PM_OPS (&omap2430_pm_ops) | |
522 | #else | |
523 | #define DEV_PM_OPS NULL | |
524 | #endif | |
525 | ||
dc09886b FB |
526 | static struct platform_driver omap2430_driver = { |
527 | .remove = __exit_p(omap2430_remove), | |
528 | .driver = { | |
529 | .name = "musb-omap2430", | |
c20aebb9 | 530 | .pm = DEV_PM_OPS, |
dc09886b FB |
531 | }, |
532 | }; | |
533 | ||
534 | MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer"); | |
535 | MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); | |
536 | MODULE_LICENSE("GPL v2"); | |
537 | ||
538 | static int __init omap2430_init(void) | |
539 | { | |
540 | return platform_driver_probe(&omap2430_driver, omap2430_probe); | |
541 | } | |
542 | subsys_initcall(omap2430_init); | |
543 | ||
544 | static void __exit omap2430_exit(void) | |
545 | { | |
546 | platform_driver_unregister(&omap2430_driver); | |
547 | } | |
548 | module_exit(omap2430_exit); |