xhci: move the common code to a function to get max ports and port array
[deliverable/linux.git] / drivers / usb / musb / omap2430.c
CommitLineData
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1/*
2 * Copyright (C) 2005-2007 by Texas Instruments
3 * Some code has been taken from tusb6010.c
4 * Copyrights for that are attributable to:
5 * Copyright (C) 2006 Nokia Corporation
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6 * Tony Lindgren <tony@atomide.com>
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/sched.h>
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30#include <linux/init.h>
31#include <linux/list.h>
32#include <linux/clk.h>
33#include <linux/io.h>
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34#include <linux/platform_device.h>
35#include <linux/dma-mapping.h>
207b0e1f
HH
36#include <linux/pm_runtime.h>
37#include <linux/err.h>
550a7375 38
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39#include "musb_core.h"
40#include "omap2430.h"
41
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42struct omap2430_glue {
43 struct device *dev;
44 struct platform_device *musb;
45};
c20aebb9 46#define glue_to_musb(g) platform_get_drvdata(g->musb)
a3cee12a 47
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48static struct timer_list musb_idle_timer;
49
50static void musb_do_idle(unsigned long _musb)
51{
52 struct musb *musb = (void *)_musb;
53 unsigned long flags;
eef767b7 54#ifdef CONFIG_USB_MUSB_HDRC_HCD
550a7375 55 u8 power;
eef767b7 56#endif
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57 u8 devctl;
58
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59 spin_lock_irqsave(&musb->lock, flags);
60
84e250ff 61 switch (musb->xceiv->state) {
550a7375 62 case OTG_STATE_A_WAIT_BCON:
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63
64 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
65 if (devctl & MUSB_DEVCTL_BDEVICE) {
84e250ff 66 musb->xceiv->state = OTG_STATE_B_IDLE;
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67 MUSB_DEV_MODE(musb);
68 } else {
84e250ff 69 musb->xceiv->state = OTG_STATE_A_IDLE;
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70 MUSB_HST_MODE(musb);
71 }
72 break;
73#ifdef CONFIG_USB_MUSB_HDRC_HCD
74 case OTG_STATE_A_SUSPEND:
75 /* finish RESUME signaling? */
76 if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
77 power = musb_readb(musb->mregs, MUSB_POWER);
78 power &= ~MUSB_POWER_RESUME;
79 DBG(1, "root port resume stopped, power %02x\n", power);
80 musb_writeb(musb->mregs, MUSB_POWER, power);
81 musb->is_active = 1;
82 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
83 | MUSB_PORT_STAT_RESUME);
84 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
85 usb_hcd_poll_rh_status(musb_to_hcd(musb));
86 /* NOTE: it might really be A_WAIT_BCON ... */
84e250ff 87 musb->xceiv->state = OTG_STATE_A_HOST;
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88 }
89 break;
90#endif
91#ifdef CONFIG_USB_MUSB_HDRC_HCD
92 case OTG_STATE_A_HOST:
93 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
94 if (devctl & MUSB_DEVCTL_BDEVICE)
84e250ff 95 musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375 96 else
84e250ff 97 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
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98#endif
99 default:
100 break;
101 }
102 spin_unlock_irqrestore(&musb->lock, flags);
103}
104
105
743411b3 106static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
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107{
108 unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
109 static unsigned long last_timer;
110
111 if (timeout == 0)
112 timeout = default_timeout;
113
114 /* Never idle if active, or when VBUS timeout is not set as host */
115 if (musb->is_active || ((musb->a_wait_bcon == 0)
84e250ff 116 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
3df00453
AG
117 DBG(4, "%s active, deleting timer\n",
118 otg_state_string(musb->xceiv->state));
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119 del_timer(&musb_idle_timer);
120 last_timer = jiffies;
121 return;
122 }
123
124 if (time_after(last_timer, timeout)) {
125 if (!timer_pending(&musb_idle_timer))
126 last_timer = timeout;
127 else {
128 DBG(4, "Longer idle timer already pending, ignoring\n");
129 return;
130 }
131 }
132 last_timer = timeout;
133
134 DBG(4, "%s inactive, for idle timer for %lu ms\n",
3df00453 135 otg_state_string(musb->xceiv->state),
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136 (unsigned long)jiffies_to_msecs(timeout - jiffies));
137 mod_timer(&musb_idle_timer, timeout);
138}
139
743411b3 140static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
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141{
142 u8 devctl;
594632ef
HH
143 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
144 int ret = 1;
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145 /* HDRC controls CPEN, but beware current surges during device
146 * connect. They can trigger transient overcurrent conditions
147 * that must be ignored.
148 */
149
150 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
151
152 if (is_on) {
594632ef
HH
153 if (musb->xceiv->state == OTG_STATE_A_IDLE) {
154 /* start the session */
155 devctl |= MUSB_DEVCTL_SESSION;
156 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
157 /*
158 * Wait for the musb to set as A device to enable the
159 * VBUS
160 */
161 while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
162
163 cpu_relax();
164
165 if (time_after(jiffies, timeout)) {
166 dev_err(musb->controller,
167 "configured as A device timeout");
168 ret = -EINVAL;
169 break;
170 }
171 }
172
173 if (ret && musb->xceiv->set_vbus)
174 otg_set_vbus(musb->xceiv, 1);
175 } else {
176 musb->is_active = 1;
177 musb->xceiv->default_a = 1;
178 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
179 devctl |= MUSB_DEVCTL_SESSION;
180 MUSB_HST_MODE(musb);
181 }
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182 } else {
183 musb->is_active = 0;
184
185 /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
186 * jumping right to B_IDLE...
187 */
188
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DB
189 musb->xceiv->default_a = 0;
190 musb->xceiv->state = OTG_STATE_B_IDLE;
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191 devctl &= ~MUSB_DEVCTL_SESSION;
192
193 MUSB_DEV_MODE(musb);
194 }
195 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
196
197 DBG(1, "VBUS %s, devctl %02x "
198 /* otg %3x conf %08x prcm %08x */ "\n",
3df00453 199 otg_state_string(musb->xceiv->state),
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200 musb_readb(musb->mregs, MUSB_DEVCTL));
201}
550a7375 202
743411b3 203static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
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204{
205 u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
206
207 devctl |= MUSB_DEVCTL_SESSION;
208 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
209
96a274d1 210 return 0;
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211}
212
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213static inline void omap2430_low_level_exit(struct musb *musb)
214{
215 u32 l;
216
217 /* in any role */
218 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
219 l |= ENABLEFORCE; /* enable MSTANDBY */
220 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
c20aebb9
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221}
222
223static inline void omap2430_low_level_init(struct musb *musb)
224{
225 u32 l;
226
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227 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
228 l &= ~ENABLEFORCE; /* disable MSTANDBY */
229 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
230}
231
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HH
232/* blocking notifier support */
233static int musb_otg_notifications(struct notifier_block *nb,
234 unsigned long event, void *unused)
235{
236 struct musb *musb = container_of(nb, struct musb, nb);
237 struct device *dev = musb->controller;
238 struct musb_hdrc_platform_data *pdata = dev->platform_data;
239 struct omap_musb_board_data *data = pdata->board_data;
240
241 switch (event) {
242 case USB_EVENT_ID:
243 DBG(4, "ID GND\n");
244
245 if (is_otg_enabled(musb)) {
246#ifdef CONFIG_USB_GADGET_MUSB_HDRC
247 if (musb->gadget_driver) {
7acc6197 248 pm_runtime_get_sync(musb->controller);
594632ef 249 otg_init(musb->xceiv);
70045c57 250 omap2430_musb_set_vbus(musb, 1);
594632ef
HH
251 }
252#endif
253 } else {
7acc6197 254 pm_runtime_get_sync(musb->controller);
594632ef 255 otg_init(musb->xceiv);
70045c57 256 omap2430_musb_set_vbus(musb, 1);
594632ef
HH
257 }
258 break;
259
260 case USB_EVENT_VBUS:
261 DBG(4, "VBUS Connect\n");
262
36a52c00 263#ifdef CONFIG_USB_GADGET_MUSB_HDRC
7acc6197
HH
264 if (musb->gadget_driver)
265 pm_runtime_get_sync(musb->controller);
36a52c00 266#endif
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HH
267 otg_init(musb->xceiv);
268 break;
269
270 case USB_EVENT_NONE:
271 DBG(4, "VBUS Disconnect\n");
272
7acc6197 273#ifdef CONFIG_USB_GADGET_MUSB_HDRC
383cf4e8 274 if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
7acc6197
HH
275 if (musb->gadget_driver)
276#endif
277 {
278 pm_runtime_mark_last_busy(musb->controller);
279 pm_runtime_put_autosuspend(musb->controller);
280 }
281
594632ef
HH
282 if (data->interface_type == MUSB_INTERFACE_UTMI) {
283 if (musb->xceiv->set_vbus)
284 otg_set_vbus(musb->xceiv, 0);
285 }
286 otg_shutdown(musb->xceiv);
287 break;
288 default:
289 DBG(4, "ID float\n");
290 return NOTIFY_DONE;
291 }
292
293 return NOTIFY_OK;
294}
295
743411b3 296static int omap2430_musb_init(struct musb *musb)
550a7375 297{
594632ef 298 u32 l, status = 0;
ea65df57
HK
299 struct device *dev = musb->controller;
300 struct musb_hdrc_platform_data *plat = dev->platform_data;
301 struct omap_musb_board_data *data = plat->board_data;
550a7375 302
84e250ff
DB
303 /* We require some kind of external transceiver, hooked
304 * up through ULPI. TWL4030-family PMICs include one,
305 * which needs a driver, drivers aren't always needed.
306 */
307 musb->xceiv = otg_get_transceiver();
308 if (!musb->xceiv) {
309 pr_err("HS USB OTG: no transceiver configured\n");
310 return -ENODEV;
311 }
312
7acc6197
HH
313 status = pm_runtime_get_sync(dev);
314 if (status < 0) {
315 dev_err(dev, "pm_runtime_get_sync FAILED");
316 goto err1;
317 }
550a7375 318
8573e6a6 319 l = musb_readl(musb->mregs, OTG_INTERFSEL);
de2e1b0c
MM
320
321 if (data->interface_type == MUSB_INTERFACE_UTMI) {
322 /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
323 l &= ~ULPI_12PIN; /* Disable ULPI */
324 l |= UTMI_8BIT; /* Enable UTMI */
325 } else {
326 l |= ULPI_12PIN;
327 }
328
8573e6a6 329 musb_writel(musb->mregs, OTG_INTERFSEL, l);
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FB
330
331 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
332 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
8573e6a6
FB
333 musb_readl(musb->mregs, OTG_REVISION),
334 musb_readl(musb->mregs, OTG_SYSCONFIG),
335 musb_readl(musb->mregs, OTG_SYSSTATUS),
336 musb_readl(musb->mregs, OTG_INTERFSEL),
337 musb_readl(musb->mregs, OTG_SIMENABLE));
550a7375 338
594632ef
HH
339 musb->nb.notifier_call = musb_otg_notifications;
340 status = otg_register_notifier(musb->xceiv, &musb->nb);
341
342 if (status)
343 DBG(1, "notification register failed\n");
344
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FB
345 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
346
347 return 0;
7acc6197
HH
348
349err1:
350 pm_runtime_disable(dev);
351 return status;
550a7375
FB
352}
353
002eda13
HH
354static void omap2430_musb_enable(struct musb *musb)
355{
356 u8 devctl;
357 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
358 struct device *dev = musb->controller;
359 struct musb_hdrc_platform_data *pdata = dev->platform_data;
360 struct omap_musb_board_data *data = pdata->board_data;
361
362 switch (musb->xceiv->last_event) {
363
364 case USB_EVENT_ID:
365 otg_init(musb->xceiv);
366 if (data->interface_type == MUSB_INTERFACE_UTMI) {
367 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
368 /* start the session */
369 devctl |= MUSB_DEVCTL_SESSION;
370 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
371 while (musb_readb(musb->mregs, MUSB_DEVCTL) &
372 MUSB_DEVCTL_BDEVICE) {
373 cpu_relax();
374
375 if (time_after(jiffies, timeout)) {
376 dev_err(musb->controller,
377 "configured as A device timeout");
378 break;
379 }
380 }
381 }
382 break;
383
384 case USB_EVENT_VBUS:
385 otg_init(musb->xceiv);
386 break;
387
388 default:
389 break;
390 }
391}
392
393static void omap2430_musb_disable(struct musb *musb)
394{
395 if (musb->xceiv->last_event)
396 otg_shutdown(musb->xceiv);
550a7375
FB
397}
398
743411b3 399static int omap2430_musb_exit(struct musb *musb)
550a7375 400{
19b9a83e 401 del_timer_sync(&musb_idle_timer);
550a7375 402
c20aebb9 403 omap2430_low_level_exit(musb);
f4053874 404 otg_put_transceiver(musb->xceiv);
c20aebb9 405
550a7375
FB
406 return 0;
407}
743411b3 408
f7ec9437 409static const struct musb_platform_ops omap2430_ops = {
743411b3
FB
410 .init = omap2430_musb_init,
411 .exit = omap2430_musb_exit,
412
743411b3
FB
413 .set_mode = omap2430_musb_set_mode,
414 .try_idle = omap2430_musb_try_idle,
415
416 .set_vbus = omap2430_musb_set_vbus,
002eda13
HH
417
418 .enable = omap2430_musb_enable,
419 .disable = omap2430_musb_disable,
743411b3 420};
dc09886b
FB
421
422static u64 omap2430_dmamask = DMA_BIT_MASK(32);
423
424static int __init omap2430_probe(struct platform_device *pdev)
425{
426 struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
427 struct platform_device *musb;
a3cee12a 428 struct omap2430_glue *glue;
dc09886b
FB
429 int ret = -ENOMEM;
430
a3cee12a
FB
431 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
432 if (!glue) {
433 dev_err(&pdev->dev, "failed to allocate glue context\n");
434 goto err0;
435 }
436
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FB
437 musb = platform_device_alloc("musb-hdrc", -1);
438 if (!musb) {
439 dev_err(&pdev->dev, "failed to allocate musb device\n");
a3cee12a 440 goto err1;
dc09886b
FB
441 }
442
443 musb->dev.parent = &pdev->dev;
444 musb->dev.dma_mask = &omap2430_dmamask;
445 musb->dev.coherent_dma_mask = omap2430_dmamask;
446
a3cee12a
FB
447 glue->dev = &pdev->dev;
448 glue->musb = musb;
449
f7ec9437
FB
450 pdata->platform_ops = &omap2430_ops;
451
a3cee12a 452 platform_set_drvdata(pdev, glue);
dc09886b
FB
453
454 ret = platform_device_add_resources(musb, pdev->resource,
455 pdev->num_resources);
456 if (ret) {
457 dev_err(&pdev->dev, "failed to add resources\n");
207b0e1f 458 goto err2;
dc09886b
FB
459 }
460
461 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
462 if (ret) {
463 dev_err(&pdev->dev, "failed to add platform_data\n");
207b0e1f 464 goto err2;
dc09886b
FB
465 }
466
467 ret = platform_device_add(musb);
468 if (ret) {
469 dev_err(&pdev->dev, "failed to register musb device\n");
207b0e1f 470 goto err2;
dc09886b
FB
471 }
472
207b0e1f 473 pm_runtime_enable(&pdev->dev);
03491761 474
207b0e1f 475 return 0;
03491761 476
a3cee12a 477err2:
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FB
478 platform_device_put(musb);
479
a3cee12a
FB
480err1:
481 kfree(glue);
482
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483err0:
484 return ret;
485}
486
487static int __exit omap2430_remove(struct platform_device *pdev)
488{
a3cee12a 489 struct omap2430_glue *glue = platform_get_drvdata(pdev);
dc09886b 490
a3cee12a
FB
491 platform_device_del(glue->musb);
492 platform_device_put(glue->musb);
207b0e1f
HH
493 pm_runtime_put(&pdev->dev);
494 pm_runtime_disable(&pdev->dev);
a3cee12a 495 kfree(glue);
dc09886b
FB
496
497 return 0;
498}
499
c20aebb9 500#ifdef CONFIG_PM
c20aebb9 501
7acc6197 502static int omap2430_runtime_suspend(struct device *dev)
c20aebb9
FB
503{
504 struct omap2430_glue *glue = dev_get_drvdata(dev);
505 struct musb *musb = glue_to_musb(glue);
506
507 omap2430_low_level_exit(musb);
508 otg_set_suspend(musb->xceiv, 1);
c20aebb9
FB
509
510 return 0;
511}
512
7acc6197 513static int omap2430_runtime_resume(struct device *dev)
c20aebb9
FB
514{
515 struct omap2430_glue *glue = dev_get_drvdata(dev);
516 struct musb *musb = glue_to_musb(glue);
c20aebb9
FB
517
518 omap2430_low_level_init(musb);
c20aebb9
FB
519 otg_set_suspend(musb->xceiv, 0);
520
521 return 0;
522}
523
524static struct dev_pm_ops omap2430_pm_ops = {
7acc6197
HH
525 .runtime_suspend = omap2430_runtime_suspend,
526 .runtime_resume = omap2430_runtime_resume,
c20aebb9
FB
527};
528
529#define DEV_PM_OPS (&omap2430_pm_ops)
530#else
531#define DEV_PM_OPS NULL
532#endif
533
dc09886b
FB
534static struct platform_driver omap2430_driver = {
535 .remove = __exit_p(omap2430_remove),
536 .driver = {
537 .name = "musb-omap2430",
c20aebb9 538 .pm = DEV_PM_OPS,
dc09886b
FB
539 },
540};
541
542MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
543MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
544MODULE_LICENSE("GPL v2");
545
546static int __init omap2430_init(void)
547{
548 return platform_driver_probe(&omap2430_driver, omap2430_probe);
549}
550subsys_initcall(omap2430_init);
551
552static void __exit omap2430_exit(void)
553{
554 platform_driver_unregister(&omap2430_driver);
555}
556module_exit(omap2430_exit);
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