[deliverable/linux.git] / drivers / usb / phy / phy-rcar-gen2-usb.c

/*
 * Renesas R-Car Gen2 USB phy driver
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 * Copyright (C) 2013 Cogent Embedded, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_data/usb-rcar-gen2-phy.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/usb/otg.h>

struct rcar_gen2_usb_phy_priv {
	struct usb_phy phy;
	void __iomem *base;
	struct clk *clk;
	spinlock_t lock;
	int usecount;
	u32 ugctrl2;
};

#define usb_phy_to_priv(p) container_of(p, struct rcar_gen2_usb_phy_priv, phy)

/* Low Power Status register */
#define USBHS_LPSTS_REG			0x02
#define USBHS_LPSTS_SUSPM		(1 << 14)

/* USB General control register */
#define USBHS_UGCTRL_REG		0x80
#define USBHS_UGCTRL_CONNECT		(1 << 2)
#define USBHS_UGCTRL_PLLRESET		(1 << 0)

/* USB General control register 2 */
#define USBHS_UGCTRL2_REG		0x84
#define USBHS_UGCTRL2_USB0_PCI		(1 << 4)
#define USBHS_UGCTRL2_USB0_HS		(3 << 4)
#define USBHS_UGCTRL2_USB2_PCI		(0 << 31)
#define USBHS_UGCTRL2_USB2_SS		(1 << 31)

/* USB General status register */
#define USBHS_UGSTS_REG			0x88
#define USBHS_UGSTS_LOCK		(1 << 8)

/* Enable USBHS internal phy */
static int __rcar_gen2_usbhs_phy_enable(void __iomem *base)
{
	u32 val;
	int i;

	/* USBHS PHY power on */
	val = ioread32(base + USBHS_UGCTRL_REG);
	val &= ~USBHS_UGCTRL_PLLRESET;
	iowrite32(val, base + USBHS_UGCTRL_REG);

	val = ioread16(base + USBHS_LPSTS_REG);
	val |= USBHS_LPSTS_SUSPM;
	iowrite16(val, base + USBHS_LPSTS_REG);

	for (i = 0; i < 20; i++) {
		val = ioread32(base + USBHS_UGSTS_REG);
		if ((val & USBHS_UGSTS_LOCK) == USBHS_UGSTS_LOCK) {
			val = ioread32(base + USBHS_UGCTRL_REG);
			val |= USBHS_UGCTRL_CONNECT;
			iowrite32(val, base + USBHS_UGCTRL_REG);
			return 0;
		}
		udelay(1);
	}

	/* Timed out waiting for the PLL lock */
	return -ETIMEDOUT;
}

/* Disable USBHS internal phy */
static int __rcar_gen2_usbhs_phy_disable(void __iomem *base)
{
	u32 val;

	/* USBHS PHY power off */
	val = ioread32(base + USBHS_UGCTRL_REG);
	val &= ~USBHS_UGCTRL_CONNECT;
	iowrite32(val, base + USBHS_UGCTRL_REG);

	val = ioread16(base + USBHS_LPSTS_REG);
	val &= ~USBHS_LPSTS_SUSPM;
	iowrite16(val, base + USBHS_LPSTS_REG);

	val = ioread32(base + USBHS_UGCTRL_REG);
	val |= USBHS_UGCTRL_PLLRESET;
	iowrite32(val, base + USBHS_UGCTRL_REG);
	return 0;
}

/* Setup USB channels */
static void __rcar_gen2_usb_phy_init(struct rcar_gen2_usb_phy_priv *priv)
{
	u32 val;

	clk_prepare_enable(priv->clk);

	/* Set USB channels in the USBHS UGCTRL2 register */
	val = ioread32(priv->base + USBHS_UGCTRL2_REG);
	val &= ~(USBHS_UGCTRL2_USB0_HS | USBHS_UGCTRL2_USB2_SS);
	val |= priv->ugctrl2;
	iowrite32(val, priv->base + USBHS_UGCTRL2_REG);
}

/* Shutdown USB channels */
static void __rcar_gen2_usb_phy_shutdown(struct rcar_gen2_usb_phy_priv *priv)
{
	__rcar_gen2_usbhs_phy_disable(priv->base);
	clk_disable_unprepare(priv->clk);
}

static int rcar_gen2_usb_phy_set_suspend(struct usb_phy *phy, int suspend)
{
	struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
	unsigned long flags;
	int retval;

	spin_lock_irqsave(&priv->lock, flags);
	retval = suspend ? __rcar_gen2_usbhs_phy_disable(priv->base) :
			   __rcar_gen2_usbhs_phy_enable(priv->base);
	spin_unlock_irqrestore(&priv->lock, flags);
	return retval;
}

static int rcar_gen2_usb_phy_init(struct usb_phy *phy)
{
	struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
	unsigned long flags;

	spin_lock_irqsave(&priv->lock, flags);
	/*
	 * Enable the clock and setup USB channels
	 * if it's the first user
	 */
	if (!priv->usecount++)
		__rcar_gen2_usb_phy_init(priv);
	spin_unlock_irqrestore(&priv->lock, flags);
	return 0;
}

static void rcar_gen2_usb_phy_shutdown(struct usb_phy *phy)
{
	struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
	unsigned long flags;

	spin_lock_irqsave(&priv->lock, flags);
	if (!priv->usecount) {
		dev_warn(phy->dev, "Trying to disable phy with 0 usecount\n");
		goto out;
	}

	/* Disable everything if it's the last user */
	if (!--priv->usecount)
		__rcar_gen2_usb_phy_shutdown(priv);
out:
	spin_unlock_irqrestore(&priv->lock, flags);
}

static int rcar_gen2_usb_phy_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct rcar_gen2_phy_platform_data *pdata;
	struct rcar_gen2_usb_phy_priv *priv;
	struct resource *res;
	void __iomem *base;
	struct clk *clk;
	int retval;

	pdata = dev_get_platdata(dev);
	if (!pdata) {
		dev_err(dev, "No platform data\n");
		return -EINVAL;
	}

	clk = devm_clk_get(dev, "usbhs");
	if (IS_ERR(clk)) {
		dev_err(dev, "Can't get the clock\n");
		return PTR_ERR(clk);
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	base = devm_ioremap_resource(dev, res);
	if (IS_ERR(base))
		return PTR_ERR(base);

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	spin_lock_init(&priv->lock);
	priv->clk = clk;
	priv->base = base;
	priv->ugctrl2 = pdata->chan0_pci ?
			USBHS_UGCTRL2_USB0_PCI : USBHS_UGCTRL2_USB0_HS;
	priv->ugctrl2 |= pdata->chan2_pci ?
			USBHS_UGCTRL2_USB2_PCI : USBHS_UGCTRL2_USB2_SS;
	priv->phy.dev = dev;
	priv->phy.label = dev_name(dev);
	priv->phy.init = rcar_gen2_usb_phy_init;
	priv->phy.shutdown = rcar_gen2_usb_phy_shutdown;
	priv->phy.set_suspend = rcar_gen2_usb_phy_set_suspend;

	retval = usb_add_phy_dev(&priv->phy);
	if (retval < 0) {
		dev_err(dev, "Failed to add USB phy\n");
		return retval;
	}

	platform_set_drvdata(pdev, priv);

	return retval;
}

static int rcar_gen2_usb_phy_remove(struct platform_device *pdev)
{
	struct rcar_gen2_usb_phy_priv *priv = platform_get_drvdata(pdev);

	usb_remove_phy(&priv->phy);

	return 0;
}

static struct platform_driver rcar_gen2_usb_phy_driver = {
	.driver = {
		.name = "usb_phy_rcar_gen2",
	},
	.probe = rcar_gen2_usb_phy_probe,
	.remove = rcar_gen2_usb_phy_remove,
};

module_platform_driver(rcar_gen2_usb_phy_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Renesas R-Car Gen2 USB phy");
MODULE_AUTHOR("Valentine Barshak <valentine.barshak@cogentembedded.com>");
Commit	Line	Data
5578b266 VB	1	/*
	2	* Renesas R-Car Gen2 USB phy driver
	3	*
	4	* Copyright (C) 2013 Renesas Solutions Corp.
	5	* Copyright (C) 2013 Cogent Embedded, Inc.
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/clk.h>
	13	#include <linux/delay.h>
	14	#include <linux/io.h>
	15	#include <linux/module.h>
	16	#include <linux/platform_data/usb-rcar-gen2-phy.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/spinlock.h>
	19	#include <linux/usb/otg.h>
	20
	21	struct rcar_gen2_usb_phy_priv {
	22	struct usb_phy phy;
	23	void __iomem *base;
	24	struct clk *clk;
	25	spinlock_t lock;
	26	int usecount;
	27	u32 ugctrl2;
	28	};
	29
	30	#define usb_phy_to_priv(p) container_of(p, struct rcar_gen2_usb_phy_priv, phy)
	31
	32	/* Low Power Status register */
	33	#define USBHS_LPSTS_REG 0x02
	34	#define USBHS_LPSTS_SUSPM (1 << 14)
	35
	36	/* USB General control register */
	37	#define USBHS_UGCTRL_REG 0x80
	38	#define USBHS_UGCTRL_CONNECT (1 << 2)
	39	#define USBHS_UGCTRL_PLLRESET (1 << 0)
	40
	41	/* USB General control register 2 */
	42	#define USBHS_UGCTRL2_REG 0x84
	43	#define USBHS_UGCTRL2_USB0_PCI (1 << 4)
	44	#define USBHS_UGCTRL2_USB0_HS (3 << 4)
	45	#define USBHS_UGCTRL2_USB2_PCI (0 << 31)
	46	#define USBHS_UGCTRL2_USB2_SS (1 << 31)
	47
	48	/* USB General status register */
	49	#define USBHS_UGSTS_REG 0x88
c6ab3aec	50	#define USBHS_UGSTS_LOCK (1 << 8)
5578b266 VB	51
	52	/* Enable USBHS internal phy */
	53	static int __rcar_gen2_usbhs_phy_enable(void __iomem *base)
	54	{
	55	u32 val;
	56	int i;
	57
	58	/* USBHS PHY power on */
	59	val = ioread32(base + USBHS_UGCTRL_REG);
	60	val &= ~USBHS_UGCTRL_PLLRESET;
	61	iowrite32(val, base + USBHS_UGCTRL_REG);
	62
	63	val = ioread16(base + USBHS_LPSTS_REG);
	64	val \|= USBHS_LPSTS_SUSPM;
	65	iowrite16(val, base + USBHS_LPSTS_REG);
	66
	67	for (i = 0; i < 20; i++) {
	68	val = ioread32(base + USBHS_UGSTS_REG);
	69	if ((val & USBHS_UGSTS_LOCK) == USBHS_UGSTS_LOCK) {
	70	val = ioread32(base + USBHS_UGCTRL_REG);
	71	val \|= USBHS_UGCTRL_CONNECT;
	72	iowrite32(val, base + USBHS_UGCTRL_REG);
	73	return 0;
	74	}
	75	udelay(1);
	76	}
	77
	78	/* Timed out waiting for the PLL lock */
	79	return -ETIMEDOUT;
	80	}
	81
	82	/* Disable USBHS internal phy */
	83	static int __rcar_gen2_usbhs_phy_disable(void __iomem *base)
	84	{
	85	u32 val;
	86
	87	/* USBHS PHY power off */
	88	val = ioread32(base + USBHS_UGCTRL_REG);
	89	val &= ~USBHS_UGCTRL_CONNECT;
	90	iowrite32(val, base + USBHS_UGCTRL_REG);
	91
	92	val = ioread16(base + USBHS_LPSTS_REG);
	93	val &= ~USBHS_LPSTS_SUSPM;
	94	iowrite16(val, base + USBHS_LPSTS_REG);
	95
	96	val = ioread32(base + USBHS_UGCTRL_REG);
	97	val \|= USBHS_UGCTRL_PLLRESET;
	98	iowrite32(val, base + USBHS_UGCTRL_REG);
	99	return 0;
	100	}
	101
	102	/* Setup USB channels */
	103	static void __rcar_gen2_usb_phy_init(struct rcar_gen2_usb_phy_priv *priv)
	104	{
	105	u32 val;
	106
	107	clk_prepare_enable(priv->clk);
	108
	109	/* Set USB channels in the USBHS UGCTRL2 register */
c8ba8115	110	val = ioread32(priv->base + USBHS_UGCTRL2_REG);
5578b266 VB	111	val &= ~(USBHS_UGCTRL2_USB0_HS \| USBHS_UGCTRL2_USB2_SS);
5578b266 VB	112	val \|= priv->ugctrl2;
c8ba8115	113	iowrite32(val, priv->base + USBHS_UGCTRL2_REG);
5578b266 VB	114	}
	115
	116	/* Shutdown USB channels */
	117	static void __rcar_gen2_usb_phy_shutdown(struct rcar_gen2_usb_phy_priv *priv)
	118	{
	119	__rcar_gen2_usbhs_phy_disable(priv->base);
	120	clk_disable_unprepare(priv->clk);
	121	}
	122
	123	static int rcar_gen2_usb_phy_set_suspend(struct usb_phy *phy, int suspend)
	124	{
	125	struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
	126	unsigned long flags;
	127	int retval;
	128
	129	spin_lock_irqsave(&priv->lock, flags);
	130	retval = suspend ? __rcar_gen2_usbhs_phy_disable(priv->base) :
	131	__rcar_gen2_usbhs_phy_enable(priv->base);
	132	spin_unlock_irqrestore(&priv->lock, flags);
	133	return retval;
	134	}
	135
	136	static int rcar_gen2_usb_phy_init(struct usb_phy *phy)
	137	{
	138	struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
	139	unsigned long flags;
	140
	141	spin_lock_irqsave(&priv->lock, flags);
	142	/*
	143	* Enable the clock and setup USB channels
	144	* if it's the first user
	145	*/
	146	if (!priv->usecount++)
	147	__rcar_gen2_usb_phy_init(priv);
	148	spin_unlock_irqrestore(&priv->lock, flags);
	149	return 0;
	150	}
	151
	152	static void rcar_gen2_usb_phy_shutdown(struct usb_phy *phy)
	153	{
	154	struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
	155	unsigned long flags;
	156
	157	spin_lock_irqsave(&priv->lock, flags);
	158	if (!priv->usecount) {
	159	dev_warn(phy->dev, "Trying to disable phy with 0 usecount\n");
	160	goto out;
	161	}
	162
	163	/* Disable everything if it's the last user */
	164	if (!--priv->usecount)
	165	__rcar_gen2_usb_phy_shutdown(priv);
	166	out:
	167	spin_unlock_irqrestore(&priv->lock, flags);
	168	}
	169
	170	static int rcar_gen2_usb_phy_probe(struct platform_device *pdev)
	171	{
	172	struct device *dev = &pdev->dev;
	173	struct rcar_gen2_phy_platform_data *pdata;
	174	struct rcar_gen2_usb_phy_priv *priv;
	175	struct resource *res;
	176	void __iomem *base;
	177	struct clk *clk;
178	int retval;
179
7241a21a	180	pdata = dev_get_platdata(dev);
5578b266 VB	181	if (!pdata) {
	182	dev_err(dev, "No platform data\n");
	183	return -EINVAL;
	184	}
	185
7241a21a	186	clk = devm_clk_get(dev, "usbhs");
5578b266	187	if (IS_ERR(clk)) {
7241a21a	188	dev_err(dev, "Can't get the clock\n");
5578b266 VB	189	return PTR_ERR(clk);
	190	}
	191
	192	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	193	base = devm_ioremap_resource(dev, res);
	194	if (IS_ERR(base))
	195	return PTR_ERR(base);
	196
	197	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
3f8acf35	198	if (!priv)
5578b266	199	return -ENOMEM;
5578b266 VB	200
	201	spin_lock_init(&priv->lock);
	202	priv->clk = clk;
	203	priv->base = base;
	204	priv->ugctrl2 = pdata->chan0_pci ?
	205	USBHS_UGCTRL2_USB0_PCI : USBHS_UGCTRL2_USB0_HS;
	206	priv->ugctrl2 \|= pdata->chan2_pci ?
	207	USBHS_UGCTRL2_USB2_PCI : USBHS_UGCTRL2_USB2_SS;
	208	priv->phy.dev = dev;
	209	priv->phy.label = dev_name(dev);
	210	priv->phy.init = rcar_gen2_usb_phy_init;
	211	priv->phy.shutdown = rcar_gen2_usb_phy_shutdown;
	212	priv->phy.set_suspend = rcar_gen2_usb_phy_set_suspend;
	213
c3e5d298	214	retval = usb_add_phy_dev(&priv->phy);
5578b266 VB	215	if (retval < 0) {
	216	dev_err(dev, "Failed to add USB phy\n");
	217	return retval;
	218	}
	219
	220	platform_set_drvdata(pdev, priv);
	221
	222	return retval;
	223	}
	224
	225	static int rcar_gen2_usb_phy_remove(struct platform_device *pdev)
	226	{
	227	struct rcar_gen2_usb_phy_priv *priv = platform_get_drvdata(pdev);
	228
	229	usb_remove_phy(&priv->phy);
	230
	231	return 0;
	232	}
	233
	234	static struct platform_driver rcar_gen2_usb_phy_driver = {
	235	.driver = {
	236	.name = "usb_phy_rcar_gen2",
	237	},
	238	.probe = rcar_gen2_usb_phy_probe,
	239	.remove = rcar_gen2_usb_phy_remove,
	240	};
	241
	242	module_platform_driver(rcar_gen2_usb_phy_driver);
	243
	244	MODULE_LICENSE("GPL v2");
	245	MODULE_DESCRIPTION("Renesas R-Car Gen2 USB phy");
	246	MODULE_AUTHOR("Valentine Barshak <valentine.barshak@cogentembedded.com>");