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89e1f7d4 AW |
1 | /* |
2 | * Copyright (C) 2012 Red Hat, Inc. All rights reserved. | |
3 | * Author: Alex Williamson <alex.williamson@redhat.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Derived from original vfio: | |
10 | * Copyright 2010 Cisco Systems, Inc. All rights reserved. | |
11 | * Author: Tom Lyon, pugs@cisco.com | |
12 | */ | |
13 | ||
14 | #include <linux/mutex.h> | |
15 | #include <linux/pci.h> | |
6d7425f1 | 16 | #include <linux/irqbypass.h> |
28541d41 | 17 | #include <linux/types.h> |
89e1f7d4 AW |
18 | |
19 | #ifndef VFIO_PCI_PRIVATE_H | |
20 | #define VFIO_PCI_PRIVATE_H | |
21 | ||
22 | #define VFIO_PCI_OFFSET_SHIFT 40 | |
23 | ||
24 | #define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT) | |
25 | #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT) | |
26 | #define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1) | |
27 | ||
345d7104 AW |
28 | /* Special capability IDs predefined access */ |
29 | #define PCI_CAP_ID_INVALID 0xFF /* default raw access */ | |
30 | #define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */ | |
31 | ||
89e1f7d4 AW |
32 | struct vfio_pci_irq_ctx { |
33 | struct eventfd_ctx *trigger; | |
34 | struct virqfd *unmask; | |
35 | struct virqfd *mask; | |
36 | char *name; | |
37 | bool masked; | |
6d7425f1 | 38 | struct irq_bypass_producer producer; |
89e1f7d4 AW |
39 | }; |
40 | ||
28541d41 AW |
41 | struct vfio_pci_device; |
42 | struct vfio_pci_region; | |
43 | ||
44 | struct vfio_pci_regops { | |
45 | size_t (*rw)(struct vfio_pci_device *vdev, char __user *buf, | |
46 | size_t count, loff_t *ppos, bool iswrite); | |
47 | void (*release)(struct vfio_pci_device *vdev, | |
48 | struct vfio_pci_region *region); | |
49 | }; | |
50 | ||
51 | struct vfio_pci_region { | |
52 | u32 type; | |
53 | u32 subtype; | |
54 | const struct vfio_pci_regops *ops; | |
55 | void *data; | |
56 | size_t size; | |
57 | u32 flags; | |
58 | }; | |
59 | ||
05f0c03f YX |
60 | struct vfio_pci_dummy_resource { |
61 | struct resource resource; | |
62 | int index; | |
63 | struct list_head res_next; | |
64 | }; | |
65 | ||
89e1f7d4 AW |
66 | struct vfio_pci_device { |
67 | struct pci_dev *pdev; | |
68 | void __iomem *barmap[PCI_STD_RESOURCE_END + 1]; | |
05f0c03f | 69 | bool bar_mmap_supported[PCI_STD_RESOURCE_END + 1]; |
89e1f7d4 AW |
70 | u8 *pci_config_map; |
71 | u8 *vconfig; | |
72 | struct perm_bits *msi_perm; | |
73 | spinlock_t irqlock; | |
74 | struct mutex igate; | |
75 | struct msix_entry *msix; | |
76 | struct vfio_pci_irq_ctx *ctx; | |
77 | int num_ctx; | |
78 | int irq_type; | |
28541d41 AW |
79 | int num_regions; |
80 | struct vfio_pci_region *region; | |
89e1f7d4 AW |
81 | u8 msi_qmax; |
82 | u8 msix_bar; | |
83 | u16 msix_size; | |
84 | u32 msix_offset; | |
85 | u32 rbar[7]; | |
86 | bool pci_2_3; | |
87 | bool virq_disabled; | |
88 | bool reset_works; | |
89 | bool extended_caps; | |
90 | bool bardirty; | |
84237a82 | 91 | bool has_vga; |
bc4fba77 | 92 | bool needs_reset; |
45074405 | 93 | bool nointx; |
89e1f7d4 | 94 | struct pci_saved_state *pci_saved_state; |
61d79256 | 95 | int refcnt; |
dad9f897 | 96 | struct eventfd_ctx *err_trigger; |
6140a8f5 | 97 | struct eventfd_ctx *req_trigger; |
05f0c03f | 98 | struct list_head dummy_resources_list; |
89e1f7d4 AW |
99 | }; |
100 | ||
101 | #define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) | |
102 | #define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX) | |
103 | #define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX) | |
104 | #define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev))) | |
105 | #define irq_is(vdev, type) (vdev->irq_type == type) | |
106 | ||
107 | extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev); | |
108 | extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev); | |
109 | ||
110 | extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, | |
111 | uint32_t flags, unsigned index, | |
112 | unsigned start, unsigned count, void *data); | |
113 | ||
906ee99d AW |
114 | extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev, |
115 | char __user *buf, size_t count, | |
116 | loff_t *ppos, bool iswrite); | |
117 | ||
118 | extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf, | |
119 | size_t count, loff_t *ppos, bool iswrite); | |
89e1f7d4 | 120 | |
84237a82 AW |
121 | extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf, |
122 | size_t count, loff_t *ppos, bool iswrite); | |
123 | ||
89e1f7d4 AW |
124 | extern int vfio_pci_init_perm_bits(void); |
125 | extern void vfio_pci_uninit_perm_bits(void); | |
126 | ||
89e1f7d4 AW |
127 | extern int vfio_config_init(struct vfio_pci_device *vdev); |
128 | extern void vfio_config_free(struct vfio_pci_device *vdev); | |
28541d41 AW |
129 | |
130 | extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev, | |
131 | unsigned int type, unsigned int subtype, | |
132 | const struct vfio_pci_regops *ops, | |
133 | size_t size, u32 flags, void *data); | |
5846ff54 | 134 | #ifdef CONFIG_VFIO_PCI_IGD |
f572a960 | 135 | extern int vfio_pci_igd_init(struct vfio_pci_device *vdev); |
5846ff54 | 136 | #else |
f572a960 | 137 | static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev) |
5846ff54 AW |
138 | { |
139 | return -ENODEV; | |
140 | } | |
141 | #endif | |
89e1f7d4 | 142 | #endif /* VFIO_PCI_PRIVATE_H */ |