[deliverable/linux.git] / drivers / video / bw2.c

/* bw2.c: BWTWO frame buffer driver
 *
 * Copyright (C) 2003 David S. Miller (davem@redhat.com)
 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
 *
 * Driver layout based loosely on tgafb.c, see that file for credits.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/fb.h>
#include <linux/mm.h>

#include <asm/io.h>
#include <asm/sbus.h>
#include <asm/oplib.h>
#include <asm/fbio.h>

#ifdef CONFIG_SPARC32
#include <asm/sun4paddr.h>
#endif

#include "sbuslib.h"

/*
 * Local functions.
 */

static int bw2_blank(int, struct fb_info *);

static int bw2_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
static int bw2_ioctl(struct inode *, struct file *, unsigned int,
		     unsigned long, struct fb_info *);

/*
 *  Frame buffer operations
 */

static struct fb_ops bw2_ops = {
	.owner			= THIS_MODULE,
	.fb_blank		= bw2_blank,
	.fb_fillrect		= cfb_fillrect,
	.fb_copyarea		= cfb_copyarea,
	.fb_imageblit		= cfb_imageblit,
	.fb_mmap		= bw2_mmap,
	.fb_ioctl		= bw2_ioctl,
#ifdef CONFIG_COMPAT
	.fb_compat_ioctl	= sbusfb_compat_ioctl,
#endif
};

/* OBio addresses for the bwtwo registers */
#define BWTWO_REGISTER_OFFSET 0x400000

struct bt_regs {
	volatile u32 addr;
	volatile u32 color_map;
	volatile u32 control;
	volatile u32 cursor;
};

struct bw2_regs {
	struct bt_regs	cmap;
	volatile u8	control;
	volatile u8	status;
	volatile u8	cursor_start;
	volatile u8	cursor_end;
	volatile u8	h_blank_start;
	volatile u8	h_blank_end;
	volatile u8	h_sync_start;
	volatile u8	h_sync_end;
	volatile u8	comp_sync_end;
	volatile u8	v_blank_start_high;
	volatile u8	v_blank_start_low;
	volatile u8	v_blank_end;
	volatile u8	v_sync_start;
	volatile u8	v_sync_end;
	volatile u8	xfer_holdoff_start;
	volatile u8	xfer_holdoff_end;
};

/* Status Register Constants */
#define BWTWO_SR_RES_MASK	0x70
#define BWTWO_SR_1600_1280	0x50
#define BWTWO_SR_1152_900_76_A	0x40
#define BWTWO_SR_1152_900_76_B	0x60
#define BWTWO_SR_ID_MASK	0x0f
#define BWTWO_SR_ID_MONO	0x02
#define BWTWO_SR_ID_MONO_ECL	0x03
#define BWTWO_SR_ID_MSYNC	0x04
#define BWTWO_SR_ID_NOCONN	0x0a

/* Control Register Constants */
#define BWTWO_CTL_ENABLE_INTS   0x80
#define BWTWO_CTL_ENABLE_VIDEO  0x40
#define BWTWO_CTL_ENABLE_TIMING 0x20
#define BWTWO_CTL_ENABLE_CURCMP 0x10
#define BWTWO_CTL_XTAL_MASK     0x0C
#define BWTWO_CTL_DIVISOR_MASK  0x03

/* Status Register Constants */
#define BWTWO_STAT_PENDING_INT  0x80
#define BWTWO_STAT_MSENSE_MASK  0x70
#define BWTWO_STAT_ID_MASK      0x0f

struct bw2_par {
	spinlock_t		lock;
	struct bw2_regs		__iomem *regs;

	u32			flags;
#define BW2_FLAG_BLANKED	0x00000001

	unsigned long		physbase;
	unsigned long		fbsize;

	struct sbus_dev		*sdev;
};

/**
 *      bw2_blank - Optional function.  Blanks the display.
 *      @blank_mode: the blank mode we want.
 *      @info: frame buffer structure that represents a single frame buffer
 */
static int
bw2_blank(int blank, struct fb_info *info)
{
	struct bw2_par *par = (struct bw2_par *) info->par;
	struct bw2_regs __iomem *regs = par->regs;
	unsigned long flags;
	u8 val;

	spin_lock_irqsave(&par->lock, flags);

	switch (blank) {
	case FB_BLANK_UNBLANK: /* Unblanking */
		val = sbus_readb(&regs->control);
		val |= BWTWO_CTL_ENABLE_VIDEO;
		sbus_writeb(val, &regs->control);
		par->flags &= ~BW2_FLAG_BLANKED;
		break;

	case FB_BLANK_NORMAL: /* Normal blanking */
	case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
	case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
	case FB_BLANK_POWERDOWN: /* Poweroff */
		val = sbus_readb(&regs->control);
		val &= ~BWTWO_CTL_ENABLE_VIDEO;
		sbus_writeb(val, &regs->control);
		par->flags |= BW2_FLAG_BLANKED;
		break;
	}

	spin_unlock_irqrestore(&par->lock, flags);

	return 0;
}

static struct sbus_mmap_map bw2_mmap_map[] = {
	{
		.size = SBUS_MMAP_FBSIZE(1)
	},
	{ .size = 0 }
};

static int bw2_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
{
	struct bw2_par *par = (struct bw2_par *)info->par;

	return sbusfb_mmap_helper(bw2_mmap_map,
				  par->physbase, par->fbsize,
				  (par->sdev ?
				   par->sdev->reg_addrs[0].which_io :
				   0),
				  vma);
}

static int bw2_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
		     unsigned long arg, struct fb_info *info)
{
	struct bw2_par *par = (struct bw2_par *) info->par;

	return sbusfb_ioctl_helper(cmd, arg, info,
				   FBTYPE_SUN2BW, 1, par->fbsize);
}

/*
 *  Initialisation
 */

static void
bw2_init_fix(struct fb_info *info, int linebytes)
{
	strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id));

	info->fix.type = FB_TYPE_PACKED_PIXELS;
	info->fix.visual = FB_VISUAL_MONO01;

	info->fix.line_length = linebytes;

	info->fix.accel = FB_ACCEL_SUN_BWTWO;
}

static u8 bw2regs_1600[] __initdata = {
	0x14, 0x8b,	0x15, 0x28,	0x16, 0x03,	0x17, 0x13,
	0x18, 0x7b,	0x19, 0x05,	0x1a, 0x34,	0x1b, 0x2e,
	0x1c, 0x00,	0x1d, 0x0a,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x21,	0
};

static u8 bw2regs_ecl[] __initdata = {
	0x14, 0x65,	0x15, 0x1e,	0x16, 0x04,	0x17, 0x0c,
	0x18, 0x5e,	0x19, 0x03,	0x1a, 0xa7,	0x1b, 0x23,
	0x1c, 0x00,	0x1d, 0x08,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x20,	0
};

static u8 bw2regs_analog[] __initdata = {
	0x14, 0xbb,	0x15, 0x2b,	0x16, 0x03,	0x17, 0x13,
	0x18, 0xb0,	0x19, 0x03,	0x1a, 0xa6,	0x1b, 0x22,
	0x1c, 0x01,	0x1d, 0x05,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x20,	0
};

static u8 bw2regs_76hz[] __initdata = {
	0x14, 0xb7,	0x15, 0x27,	0x16, 0x03,	0x17, 0x0f,
	0x18, 0xae,	0x19, 0x03,	0x1a, 0xae,	0x1b, 0x2a,
	0x1c, 0x01,	0x1d, 0x09,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x24,	0
};

static u8 bw2regs_66hz[] __initdata = {
	0x14, 0xbb,	0x15, 0x2b,	0x16, 0x04,	0x17, 0x14,
	0x18, 0xae,	0x19, 0x03,	0x1a, 0xa8,	0x1b, 0x24,
	0x1c, 0x01,	0x1d, 0x05,	0x1e, 0xff,	0x1f, 0x01,
	0x10, 0x20,	0
};

static void bw2_do_default_mode(struct bw2_par *par, struct fb_info *info,
				int *linebytes)
{
	u8 status, mon;
	u8 *p;

	status = sbus_readb(&par->regs->status);
	mon = status & BWTWO_SR_RES_MASK;
	switch (status & BWTWO_SR_ID_MASK) {
	case BWTWO_SR_ID_MONO_ECL:
		if (mon == BWTWO_SR_1600_1280) {
			p = bw2regs_1600;
			info->var.xres = info->var.xres_virtual = 1600;
			info->var.yres = info->var.yres_virtual = 1280;
			*linebytes = 1600 / 8;
		} else
			p = bw2regs_ecl;
		break;

	case BWTWO_SR_ID_MONO:
		p = bw2regs_analog;
		break;

	case BWTWO_SR_ID_MSYNC:
		if (mon == BWTWO_SR_1152_900_76_A ||
		    mon == BWTWO_SR_1152_900_76_B)
			p = bw2regs_76hz;
		else
			p = bw2regs_66hz;
		break;

	case BWTWO_SR_ID_NOCONN:
		return;

	default:
		prom_printf("bw2: can't handle SR %02x\n",
			    status);
		prom_halt();
	}
	for ( ; *p; p += 2) {
		u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]];
		sbus_writeb(p[1], regp);
	}
}

struct all_info {
	struct fb_info info;
	struct bw2_par par;
	struct list_head list;
};
static LIST_HEAD(bw2_list);

static void bw2_init_one(struct sbus_dev *sdev)
{
	struct all_info *all;
	struct resource *resp;
#ifdef CONFIG_SUN4
	struct resource res;
#endif
	int linebytes;

	all = kmalloc(sizeof(*all), GFP_KERNEL);
	if (!all) {
		printk(KERN_ERR "bw2: Cannot allocate memory.\n");
		return;
	}
	memset(all, 0, sizeof(*all));

	INIT_LIST_HEAD(&all->list);

	spin_lock_init(&all->par.lock);
	all->par.sdev = sdev;

#ifdef CONFIG_SUN4
	if (!sdev) {
		all->par.physbase = sun4_bwtwo_physaddr;
		res.start = sun4_bwtwo_physaddr;
		res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
		res.flags = IORESOURCE_IO;
		resp = &res;
		all->info.var.xres = all->info.var.xres_virtual = 1152;
		all->info.var.yres = all->info.var.yres_virtual = 900;
		all->info.var.bits_per_pixel = 1;
		linebytes = 1152 / 8;
	} else
#else
	{
		if (!sdev)
			BUG();
		all->par.physbase = sdev->reg_addrs[0].phys_addr;
		resp = &sdev->resource[0];
		sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
		linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
					       all->info.var.xres);
	}
#endif
	all->info.var.red.length = all->info.var.green.length =
		all->info.var.blue.length = all->info.var.bits_per_pixel;
	all->info.var.red.offset = all->info.var.green.offset =
		all->info.var.blue.offset = 0;

	all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
			     sizeof(struct bw2_regs), "bw2 regs");

	if (sdev && !prom_getbool(sdev->prom_node, "width"))
		bw2_do_default_mode(&all->par, &all->info, &linebytes);

	all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);

	all->info.flags = FBINFO_DEFAULT;
	all->info.fbops = &bw2_ops;
#if defined(CONFIG_SPARC32)
	if (sdev)
		all->info.screen_base = (char __iomem *)
			prom_getintdefault(sdev->prom_node, "address", 0);
#endif
	if (!all->info.screen_base)
		all->info.screen_base =
			sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
	all->info.par = &all->par;

	bw2_blank(0, &all->info);

	bw2_init_fix(&all->info, linebytes);

	if (register_framebuffer(&all->info) < 0) {
		printk(KERN_ERR "bw2: Could not register framebuffer.\n");
		kfree(all);
		return;
	}

	list_add(&all->list, &bw2_list);

	printk("bw2: bwtwo at %lx:%lx\n",
	       (long) (sdev ? sdev->reg_addrs[0].which_io : 0),
	       (long) all->par.physbase);
}

int __init bw2_init(void)
{
	struct sbus_bus *sbus;
	struct sbus_dev *sdev;

	if (fb_get_options("bw2fb", NULL))
		return -ENODEV;

#ifdef CONFIG_SUN4
	bw2_init_one(NULL);
#endif
	for_all_sbusdev(sdev, sbus) {
		if (!strcmp(sdev->prom_name, "bwtwo"))
			bw2_init_one(sdev);
	}

	return 0;
}

void __exit bw2_exit(void)
{
	struct list_head *pos, *tmp;

	list_for_each_safe(pos, tmp, &bw2_list) {
		struct all_info *all = list_entry(pos, typeof(*all), list);

		unregister_framebuffer(&all->info);
		kfree(all);
	}
}

int __init
bw2_setup(char *arg)
{
	/* No cmdline options yet... */
	return 0;
}

module_init(bw2_init);

#ifdef MODULE
module_exit(bw2_exit);
#endif

MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/* bw2.c: BWTWO frame buffer driver
	2	*
	3	* Copyright (C) 2003 David S. Miller (davem@redhat.com)
	4	* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
	5	* Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
	6	* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
	7	*
	8	* Driver layout based loosely on tgafb.c, see that file for credits.
	9	*/
	10
	11	#include <linux/module.h>
	12	#include <linux/kernel.h>
	13	#include <linux/errno.h>
	14	#include <linux/string.h>
	15	#include <linux/slab.h>
	16	#include <linux/delay.h>
	17	#include <linux/init.h>
	18	#include <linux/fb.h>
	19	#include <linux/mm.h>
	20
	21	#include <asm/io.h>
	22	#include <asm/sbus.h>
	23	#include <asm/oplib.h>
	24	#include <asm/fbio.h>
	25
	26	#ifdef CONFIG_SPARC32
	27	#include <asm/sun4paddr.h>
	28	#endif
	29
	30	#include "sbuslib.h"
	31
	32	/*
	33	* Local functions.
	34	*/
	35
	36	static int bw2_blank(int, struct fb_info *);
	37
	38	static int bw2_mmap(struct fb_info , struct file , struct vm_area_struct *);
	39	static int bw2_ioctl(struct inode , struct file , unsigned int,
	40	unsigned long, struct fb_info *);
	41
	42	/*
	43	* Frame buffer operations
	44	*/
	45
	46	static struct fb_ops bw2_ops = {
	47	.owner = THIS_MODULE,
	48	.fb_blank = bw2_blank,
	49	.fb_fillrect = cfb_fillrect,
	50	.fb_copyarea = cfb_copyarea,
	51	.fb_imageblit = cfb_imageblit,
	52	.fb_mmap = bw2_mmap,
	53	.fb_ioctl = bw2_ioctl,
9ffb83bc CH	54	#ifdef CONFIG_COMPAT
	55	.fb_compat_ioctl = sbusfb_compat_ioctl,
	56	#endif
1da177e4 LT	57	};
	58
	59	/* OBio addresses for the bwtwo registers */
	60	#define BWTWO_REGISTER_OFFSET 0x400000
	61
	62	struct bt_regs {
	63	volatile u32 addr;
	64	volatile u32 color_map;
	65	volatile u32 control;
	66	volatile u32 cursor;
	67	};
	68
	69	struct bw2_regs {
	70	struct bt_regs cmap;
	71	volatile u8 control;
	72	volatile u8 status;
	73	volatile u8 cursor_start;
	74	volatile u8 cursor_end;
	75	volatile u8 h_blank_start;
	76	volatile u8 h_blank_end;
	77	volatile u8 h_sync_start;
	78	volatile u8 h_sync_end;
	79	volatile u8 comp_sync_end;
	80	volatile u8 v_blank_start_high;
	81	volatile u8 v_blank_start_low;
	82	volatile u8 v_blank_end;
	83	volatile u8 v_sync_start;
	84	volatile u8 v_sync_end;
	85	volatile u8 xfer_holdoff_start;
	86	volatile u8 xfer_holdoff_end;
	87	};
	88
	89	/* Status Register Constants */
	90	#define BWTWO_SR_RES_MASK 0x70
	91	#define BWTWO_SR_1600_1280 0x50
	92	#define BWTWO_SR_1152_900_76_A 0x40
	93	#define BWTWO_SR_1152_900_76_B 0x60
	94	#define BWTWO_SR_ID_MASK 0x0f
	95	#define BWTWO_SR_ID_MONO 0x02
	96	#define BWTWO_SR_ID_MONO_ECL 0x03
	97	#define BWTWO_SR_ID_MSYNC 0x04
	98	#define BWTWO_SR_ID_NOCONN 0x0a
	99
	100	/* Control Register Constants */
	101	#define BWTWO_CTL_ENABLE_INTS 0x80
	102	#define BWTWO_CTL_ENABLE_VIDEO 0x40
	103	#define BWTWO_CTL_ENABLE_TIMING 0x20
	104	#define BWTWO_CTL_ENABLE_CURCMP 0x10
	105	#define BWTWO_CTL_XTAL_MASK 0x0C
	106	#define BWTWO_CTL_DIVISOR_MASK 0x03
	107
	108	/* Status Register Constants */
	109	#define BWTWO_STAT_PENDING_INT 0x80
	110	#define BWTWO_STAT_MSENSE_MASK 0x70
	111	#define BWTWO_STAT_ID_MASK 0x0f
	112
	113	struct bw2_par {
	114	spinlock_t lock;
	115	struct bw2_regs __iomem *regs;
	116
	117	u32 flags;
	118	#define BW2_FLAG_BLANKED 0x00000001
	119
	120	unsigned long physbase;
121	unsigned long fbsize;
122
123	struct sbus_dev *sdev;
1da177e4 LT	124	};
	125
	126	/**
	127	* bw2_blank - Optional function. Blanks the display.
	128	* @blank_mode: the blank mode we want.
	129	* @info: frame buffer structure that represents a single frame buffer
	130	*/
	131	static int
	132	bw2_blank(int blank, struct fb_info *info)
	133	{
	134	struct bw2_par par = (struct bw2_par ) info->par;
	135	struct bw2_regs __iomem *regs = par->regs;
	136	unsigned long flags;
	137	u8 val;
	138
	139	spin_lock_irqsave(&par->lock, flags);
	140
	141	switch (blank) {
	142	case FB_BLANK_UNBLANK: /* Unblanking */
	143	val = sbus_readb(&regs->control);
	144	val \|= BWTWO_CTL_ENABLE_VIDEO;
	145	sbus_writeb(val, &regs->control);
	146	par->flags &= ~BW2_FLAG_BLANKED;
	147	break;
	148
	149	case FB_BLANK_NORMAL: /* Normal blanking */
	150	case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
	151	case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
	152	case FB_BLANK_POWERDOWN: /* Poweroff */
	153	val = sbus_readb(&regs->control);
	154	val &= ~BWTWO_CTL_ENABLE_VIDEO;
	155	sbus_writeb(val, &regs->control);
	156	par->flags \|= BW2_FLAG_BLANKED;
	157	break;
	158	}
	159
	160	spin_unlock_irqrestore(&par->lock, flags);
	161
	162	return 0;
	163	}
	164
	165	static struct sbus_mmap_map bw2_mmap_map[] = {
	166	{
	167	.size = SBUS_MMAP_FBSIZE(1)
	168	},
	169	{ .size = 0 }
	170	};
	171
	172	static int bw2_mmap(struct fb_info info, struct file file, struct vm_area_struct *vma)
	173	{
	174	struct bw2_par par = (struct bw2_par )info->par;
	175
	176	return sbusfb_mmap_helper(bw2_mmap_map,
	177	par->physbase, par->fbsize,
	178	(par->sdev ?
	179	par->sdev->reg_addrs[0].which_io :
	180	0),
	181	vma);
	182	}
	183
	184	static int bw2_ioctl(struct inode inode, struct file file, unsigned int cmd,
	185	unsigned long arg, struct fb_info *info)
	186	{
	187	struct bw2_par par = (struct bw2_par ) info->par;
188
189	return sbusfb_ioctl_helper(cmd, arg, info,
190	FBTYPE_SUN2BW, 1, par->fbsize);
191	}
192
193	/*
194	* Initialisation
195	*/
196
197	static void
198	bw2_init_fix(struct fb_info *info, int linebytes)
199	{
200	strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id));
201
202	info->fix.type = FB_TYPE_PACKED_PIXELS;
203	info->fix.visual = FB_VISUAL_MONO01;
204
205	info->fix.line_length = linebytes;
206
207	info->fix.accel = FB_ACCEL_SUN_BWTWO;
208	}
209
210	static u8 bw2regs_1600[] __initdata = {
211	0x14, 0x8b, 0x15, 0x28, 0x16, 0x03, 0x17, 0x13,
212	0x18, 0x7b, 0x19, 0x05, 0x1a, 0x34, 0x1b, 0x2e,
213	0x1c, 0x00, 0x1d, 0x0a, 0x1e, 0xff, 0x1f, 0x01,
214	0x10, 0x21, 0
215	};
216
217	static u8 bw2regs_ecl[] __initdata = {
218	0x14, 0x65, 0x15, 0x1e, 0x16, 0x04, 0x17, 0x0c,
219	0x18, 0x5e, 0x19, 0x03, 0x1a, 0xa7, 0x1b, 0x23,
220	0x1c, 0x00, 0x1d, 0x08, 0x1e, 0xff, 0x1f, 0x01,
221	0x10, 0x20, 0
222	};
223
224	static u8 bw2regs_analog[] __initdata = {
225	0x14, 0xbb, 0x15, 0x2b, 0x16, 0x03, 0x17, 0x13,
226	0x18, 0xb0, 0x19, 0x03, 0x1a, 0xa6, 0x1b, 0x22,
227	0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
228	0x10, 0x20, 0
229	};
230
231	static u8 bw2regs_76hz[] __initdata = {
232	0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f,
233	0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a,
234	0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01,
235	0x10, 0x24, 0
236	};
237
238	static u8 bw2regs_66hz[] __initdata = {
239	0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14,
240	0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24,
241	0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
242	0x10, 0x20, 0
243	};
244
245	static void bw2_do_default_mode(struct bw2_par par, struct fb_info info,
246	int *linebytes)
247	{
248	u8 status, mon;
249	u8 *p;
250
251	status = sbus_readb(&par->regs->status);
252	mon = status & BWTWO_SR_RES_MASK;
253	switch (status & BWTWO_SR_ID_MASK) {
254	case BWTWO_SR_ID_MONO_ECL:
255	if (mon == BWTWO_SR_1600_1280) {
256	p = bw2regs_1600;
257	info->var.xres = info->var.xres_virtual = 1600;
258	info->var.yres = info->var.yres_virtual = 1280;
259	*linebytes = 1600 / 8;
260	} else
261	p = bw2regs_ecl;
262	break;
263
264	case BWTWO_SR_ID_MONO:
265	p = bw2regs_analog;
266	break;
267
268	case BWTWO_SR_ID_MSYNC:
269	if (mon == BWTWO_SR_1152_900_76_A \|\|
270	mon == BWTWO_SR_1152_900_76_B)
271	p = bw2regs_76hz;
272	else
273	p = bw2regs_66hz;
274	break;
275
276	case BWTWO_SR_ID_NOCONN:
277	return;
278
279	default:
280	prom_printf("bw2: can't handle SR %02x\n",
281	status);
282	prom_halt();
283	}
284	for ( ; *p; p += 2) {
285	u8 __iomem regp = &((u8 __iomem )par->regs)[p[0]];
286	sbus_writeb(p[1], regp);
287	}
288	}
289
290	struct all_info {
291	struct fb_info info;
292	struct bw2_par par;
293	struct list_head list;
294	};
295	static LIST_HEAD(bw2_list);
296
297	static void bw2_init_one(struct sbus_dev *sdev)
298	{
299	struct all_info *all;
300	struct resource *resp;
301	#ifdef CONFIG_SUN4
302	struct resource res;
303	#endif
304	int linebytes;
305
306	all = kmalloc(sizeof(*all), GFP_KERNEL);
307	if (!all) {
308	printk(KERN_ERR "bw2: Cannot allocate memory.\n");
309	return;
310	}
311	memset(all, 0, sizeof(*all));
312
313	INIT_LIST_HEAD(&all->list);
314
315	spin_lock_init(&all->par.lock);
316	all->par.sdev = sdev;
317
318	#ifdef CONFIG_SUN4
319	if (!sdev) {
320	all->par.physbase = sun4_bwtwo_physaddr;
321	res.start = sun4_bwtwo_physaddr;
322	res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
323	res.flags = IORESOURCE_IO;
324	resp = &res;
325	all->info.var.xres = all->info.var.xres_virtual = 1152;
326	all->info.var.yres = all->info.var.yres_virtual = 900;
327	all->info.var.bits_per_pixel = 1;
328	linebytes = 1152 / 8;
329	} else
330	#else
331	{
332	if (!sdev)
333	BUG();
334	all->par.physbase = sdev->reg_addrs[0].phys_addr;
335	resp = &sdev->resource[0];
336	sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
337	linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
338	all->info.var.xres);
339	}
340	#endif
341	all->info.var.red.length = all->info.var.green.length =
342	all->info.var.blue.length = all->info.var.bits_per_pixel;
343	all->info.var.red.offset = all->info.var.green.offset =
344	all->info.var.blue.offset = 0;
345
346	all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
347	sizeof(struct bw2_regs), "bw2 regs");
348
349	if (sdev && !prom_getbool(sdev->prom_node, "width"))
350	bw2_do_default_mode(&all->par, &all->info, &linebytes);
351
352	all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
353
354	all->info.flags = FBINFO_DEFAULT;
355	all->info.fbops = &bw2_ops;
356	#if defined(CONFIG_SPARC32)
357	if (sdev)
358	all->info.screen_base = (char __iomem *)
359	prom_getintdefault(sdev->prom_node, "address", 0);
360	#endif
361	if (!all->info.screen_base)
362	all->info.screen_base =
363	sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
364	all->info.par = &all->par;
365
366	bw2_blank(0, &all->info);
367
368	bw2_init_fix(&all->info, linebytes);
369
370	if (register_framebuffer(&all->info) < 0) {
371	printk(KERN_ERR "bw2: Could not register framebuffer.\n");
372	kfree(all);
373	return;
374	}
375
376	list_add(&all->list, &bw2_list);
377
378	printk("bw2: bwtwo at %lx:%lx\n",
379	(long) (sdev ? sdev->reg_addrs[0].which_io : 0),
380	(long) all->par.physbase);
381	}
382
383	int __init bw2_init(void)
384	{
385	struct sbus_bus *sbus;
386	struct sbus_dev *sdev;
387
388	if (fb_get_options("bw2fb", NULL))
389	return -ENODEV;
390
391	#ifdef CONFIG_SUN4
392	bw2_init_one(NULL);
393	#endif
394	for_all_sbusdev(sdev, sbus) {
395	if (!strcmp(sdev->prom_name, "bwtwo"))
396	bw2_init_one(sdev);
397	}
398
399	return 0;
400	}
401
402	void __exit bw2_exit(void)
403	{
404	struct list_head pos, tmp;
405
406	list_for_each_safe(pos, tmp, &bw2_list) {
407	struct all_info all = list_entry(pos, typeof(all), list);
408
409	unregister_framebuffer(&all->info);
410	kfree(all);
411	}
412	}
413
414	int __init
415	bw2_setup(char *arg)
416	{
417	/* No cmdline options yet... */
418	return 0;
419	}
420
421	module_init(bw2_init);
422
423	#ifdef MODULE
424	module_exit(bw2_exit);
425	#endif
426
427	MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
428	MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
429	MODULE_LICENSE("GPL");