Commit | Line | Data |
---|---|---|
7c2f891c | 1 | /* |
7c2f891c SH |
2 | * Freescale i.MX Frame Buffer device driver |
3 | * | |
4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | |
5 | * Based on acornfb.c Copyright (C) Russell King. | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | * | |
11 | * Please direct your questions and comments on this driver to the following | |
12 | * email address: | |
13 | * | |
14 | * linux-arm-kernel@lists.arm.linux.org.uk | |
15 | */ | |
16 | ||
7c2f891c SH |
17 | #include <linux/module.h> |
18 | #include <linux/kernel.h> | |
7c2f891c SH |
19 | #include <linux/errno.h> |
20 | #include <linux/string.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/slab.h> | |
27ac792c | 23 | #include <linux/mm.h> |
7c2f891c SH |
24 | #include <linux/fb.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/cpufreq.h> | |
f909ef64 | 29 | #include <linux/clk.h> |
d052d1be | 30 | #include <linux/platform_device.h> |
7c2f891c | 31 | #include <linux/dma-mapping.h> |
72330b0e | 32 | #include <linux/io.h> |
f909ef64 | 33 | #include <linux/math64.h> |
7c2f891c | 34 | |
a09e64fb | 35 | #include <mach/imxfb.h> |
f497d015 | 36 | #include <mach/hardware.h> |
7c2f891c SH |
37 | |
38 | /* | |
39 | * Complain if VAR is out of range. | |
40 | */ | |
41 | #define DEBUG_VAR 1 | |
42 | ||
81ef8061 EB |
43 | #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || \ |
44 | (defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) && \ | |
45 | defined(CONFIG_FB_IMX_MODULE)) | |
46 | #define PWMR_BACKLIGHT_AVAILABLE | |
47 | #endif | |
48 | ||
72330b0e JB |
49 | #define DRIVER_NAME "imx-fb" |
50 | ||
51 | #define LCDC_SSA 0x00 | |
52 | ||
53 | #define LCDC_SIZE 0x04 | |
54 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | |
1d0f9870 | 55 | |
60328917 FE |
56 | #define YMAX_MASK (cpu_is_mx1() ? 0x1ff : 0x3ff) |
57 | #define SIZE_YMAX(y) ((y) & YMAX_MASK) | |
72330b0e JB |
58 | |
59 | #define LCDC_VPW 0x08 | |
60 | #define VPW_VPW(x) ((x) & 0x3ff) | |
61 | ||
62 | #define LCDC_CPOS 0x0C | |
63 | #define CPOS_CC1 (1<<31) | |
64 | #define CPOS_CC0 (1<<30) | |
65 | #define CPOS_OP (1<<28) | |
66 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | |
1d0f9870 | 67 | |
72330b0e JB |
68 | #define LCDC_LCWHB 0x10 |
69 | #define LCWHB_BK_EN (1<<31) | |
70 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | |
71 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | |
72 | #define LCWHB_BD(x) ((x) & 0xff) | |
73 | ||
74 | #define LCDC_LCHCC 0x14 | |
1d0f9870 | 75 | |
72330b0e JB |
76 | #define LCDC_PCR 0x18 |
77 | ||
78 | #define LCDC_HCR 0x1C | |
79 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | |
80 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | |
81 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | |
82 | ||
83 | #define LCDC_VCR 0x20 | |
84 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | |
85 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | |
86 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | |
87 | ||
88 | #define LCDC_POS 0x24 | |
89 | #define POS_POS(x) ((x) & 1f) | |
90 | ||
91 | #define LCDC_LSCR1 0x28 | |
92 | /* bit fields in imxfb.h */ | |
93 | ||
94 | #define LCDC_PWMR 0x2C | |
95 | /* bit fields in imxfb.h */ | |
96 | ||
97 | #define LCDC_DMACR 0x30 | |
98 | /* bit fields in imxfb.h */ | |
99 | ||
100 | #define LCDC_RMCR 0x34 | |
1d0f9870 | 101 | |
f142b619 | 102 | #define RMCR_LCDC_EN_MX1 (1<<1) |
1d0f9870 | 103 | |
72330b0e JB |
104 | #define RMCR_SELF_REF (1<<0) |
105 | ||
106 | #define LCDC_LCDICR 0x38 | |
107 | #define LCDICR_INT_SYN (1<<2) | |
108 | #define LCDICR_INT_CON (1) | |
109 | ||
110 | #define LCDC_LCDISR 0x40 | |
111 | #define LCDISR_UDR_ERR (1<<3) | |
112 | #define LCDISR_ERR_RES (1<<2) | |
113 | #define LCDISR_EOF (1<<1) | |
114 | #define LCDISR_BOF (1<<0) | |
115 | ||
343684ff SH |
116 | /* Used fb-mode. Can be set on kernel command line, therefore file-static. */ |
117 | static const char *fb_mode; | |
118 | ||
119 | ||
24b9baf7 SH |
120 | /* |
121 | * These are the bitfields for each | |
122 | * display depth that we support. | |
123 | */ | |
124 | struct imxfb_rgb { | |
125 | struct fb_bitfield red; | |
126 | struct fb_bitfield green; | |
127 | struct fb_bitfield blue; | |
128 | struct fb_bitfield transp; | |
129 | }; | |
130 | ||
24b9baf7 SH |
131 | struct imxfb_info { |
132 | struct platform_device *pdev; | |
133 | void __iomem *regs; | |
f909ef64 | 134 | struct clk *clk; |
24b9baf7 | 135 | |
24b9baf7 SH |
136 | /* |
137 | * These are the addresses we mapped | |
138 | * the framebuffer memory region to. | |
139 | */ | |
140 | dma_addr_t map_dma; | |
141 | u_char *map_cpu; | |
142 | u_int map_size; | |
143 | ||
144 | u_char *screen_cpu; | |
145 | dma_addr_t screen_dma; | |
146 | u_int palette_size; | |
147 | ||
148 | dma_addr_t dbar1; | |
149 | dma_addr_t dbar2; | |
150 | ||
151 | u_int pcr; | |
152 | u_int pwmr; | |
153 | u_int lscr1; | |
154 | u_int dmacr; | |
155 | u_int cmap_inverse:1, | |
156 | cmap_static:1, | |
157 | unused:30; | |
158 | ||
343684ff SH |
159 | struct imx_fb_videomode *mode; |
160 | int num_modes; | |
81ef8061 | 161 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 162 | struct backlight_device *bl; |
81ef8061 | 163 | #endif |
343684ff | 164 | |
24b9baf7 SH |
165 | void (*lcd_power)(int); |
166 | void (*backlight_power)(int); | |
167 | }; | |
168 | ||
169 | #define IMX_NAME "IMX" | |
170 | ||
171 | /* | |
172 | * Minimum X and Y resolutions | |
173 | */ | |
174 | #define MIN_XRES 64 | |
175 | #define MIN_YRES 64 | |
176 | ||
1512222b SH |
177 | /* Actually this really is 18bit support, the lowest 2 bits of each colour |
178 | * are unused in hardware. We claim to have 24bit support to make software | |
179 | * like X work, which does not support 18bit. | |
180 | */ | |
181 | static struct imxfb_rgb def_rgb_18 = { | |
182 | .red = {.offset = 16, .length = 8,}, | |
183 | .green = {.offset = 8, .length = 8,}, | |
184 | .blue = {.offset = 0, .length = 8,}, | |
185 | .transp = {.offset = 0, .length = 0,}, | |
186 | }; | |
187 | ||
80eee6bc SH |
188 | static struct imxfb_rgb def_rgb_16_tft = { |
189 | .red = {.offset = 11, .length = 5,}, | |
190 | .green = {.offset = 5, .length = 6,}, | |
191 | .blue = {.offset = 0, .length = 5,}, | |
192 | .transp = {.offset = 0, .length = 0,}, | |
193 | }; | |
194 | ||
195 | static struct imxfb_rgb def_rgb_16_stn = { | |
66c8719b SH |
196 | .red = {.offset = 8, .length = 4,}, |
197 | .green = {.offset = 4, .length = 4,}, | |
198 | .blue = {.offset = 0, .length = 4,}, | |
199 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
200 | }; |
201 | ||
202 | static struct imxfb_rgb def_rgb_8 = { | |
66c8719b SH |
203 | .red = {.offset = 0, .length = 8,}, |
204 | .green = {.offset = 0, .length = 8,}, | |
205 | .blue = {.offset = 0, .length = 8,}, | |
206 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
207 | }; |
208 | ||
66c8719b SH |
209 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
210 | struct fb_info *info); | |
7c2f891c SH |
211 | |
212 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |
213 | { | |
214 | chan &= 0xffff; | |
215 | chan >>= 16 - bf->length; | |
216 | return chan << bf->offset; | |
217 | } | |
218 | ||
66c8719b SH |
219 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
220 | u_int trans, struct fb_info *info) | |
7c2f891c SH |
221 | { |
222 | struct imxfb_info *fbi = info->par; | |
223 | u_int val, ret = 1; | |
224 | ||
225 | #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) | |
226 | if (regno < fbi->palette_size) { | |
227 | val = (CNVT_TOHW(red, 4) << 8) | | |
228 | (CNVT_TOHW(green,4) << 4) | | |
229 | CNVT_TOHW(blue, 4); | |
230 | ||
72330b0e | 231 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
7c2f891c SH |
232 | ret = 0; |
233 | } | |
234 | return ret; | |
235 | } | |
236 | ||
66c8719b | 237 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
7c2f891c SH |
238 | u_int trans, struct fb_info *info) |
239 | { | |
240 | struct imxfb_info *fbi = info->par; | |
241 | unsigned int val; | |
242 | int ret = 1; | |
243 | ||
244 | /* | |
245 | * If inverse mode was selected, invert all the colours | |
246 | * rather than the register number. The register number | |
247 | * is what you poke into the framebuffer to produce the | |
248 | * colour you requested. | |
249 | */ | |
250 | if (fbi->cmap_inverse) { | |
251 | red = 0xffff - red; | |
252 | green = 0xffff - green; | |
253 | blue = 0xffff - blue; | |
254 | } | |
255 | ||
256 | /* | |
257 | * If greyscale is true, then we convert the RGB value | |
258 | * to greyscale no mater what visual we are using. | |
259 | */ | |
260 | if (info->var.grayscale) | |
261 | red = green = blue = (19595 * red + 38470 * green + | |
262 | 7471 * blue) >> 16; | |
263 | ||
264 | switch (info->fix.visual) { | |
265 | case FB_VISUAL_TRUECOLOR: | |
266 | /* | |
267 | * 12 or 16-bit True Colour. We encode the RGB value | |
268 | * according to the RGB bitfield information. | |
269 | */ | |
270 | if (regno < 16) { | |
271 | u32 *pal = info->pseudo_palette; | |
272 | ||
273 | val = chan_to_field(red, &info->var.red); | |
274 | val |= chan_to_field(green, &info->var.green); | |
275 | val |= chan_to_field(blue, &info->var.blue); | |
276 | ||
277 | pal[regno] = val; | |
278 | ret = 0; | |
279 | } | |
280 | break; | |
281 | ||
282 | case FB_VISUAL_STATIC_PSEUDOCOLOR: | |
283 | case FB_VISUAL_PSEUDOCOLOR: | |
284 | ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); | |
285 | break; | |
286 | } | |
287 | ||
288 | return ret; | |
289 | } | |
290 | ||
343684ff SH |
291 | static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi) |
292 | { | |
293 | struct imx_fb_videomode *m; | |
294 | int i; | |
295 | ||
296 | for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) { | |
297 | if (!strcmp(m->mode.name, fb_mode)) | |
298 | return m; | |
299 | } | |
300 | return NULL; | |
301 | } | |
302 | ||
7c2f891c SH |
303 | /* |
304 | * imxfb_check_var(): | |
305 | * Round up in the following order: bits_per_pixel, xres, | |
306 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | |
307 | * bitfields, horizontal timing, vertical timing. | |
308 | */ | |
66c8719b | 309 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
7c2f891c SH |
310 | { |
311 | struct imxfb_info *fbi = info->par; | |
80eee6bc | 312 | struct imxfb_rgb *rgb; |
343684ff SH |
313 | const struct imx_fb_videomode *imxfb_mode; |
314 | unsigned long lcd_clk; | |
315 | unsigned long long tmp; | |
316 | u32 pcr = 0; | |
7c2f891c SH |
317 | |
318 | if (var->xres < MIN_XRES) | |
319 | var->xres = MIN_XRES; | |
320 | if (var->yres < MIN_YRES) | |
321 | var->yres = MIN_YRES; | |
343684ff SH |
322 | |
323 | imxfb_mode = imxfb_find_mode(fbi); | |
324 | if (!imxfb_mode) | |
325 | return -EINVAL; | |
326 | ||
327 | var->xres = imxfb_mode->mode.xres; | |
328 | var->yres = imxfb_mode->mode.yres; | |
329 | var->bits_per_pixel = imxfb_mode->bpp; | |
330 | var->pixclock = imxfb_mode->mode.pixclock; | |
331 | var->hsync_len = imxfb_mode->mode.hsync_len; | |
332 | var->left_margin = imxfb_mode->mode.left_margin; | |
333 | var->right_margin = imxfb_mode->mode.right_margin; | |
334 | var->vsync_len = imxfb_mode->mode.vsync_len; | |
335 | var->upper_margin = imxfb_mode->mode.upper_margin; | |
336 | var->lower_margin = imxfb_mode->mode.lower_margin; | |
337 | var->sync = imxfb_mode->mode.sync; | |
338 | var->xres_virtual = max(var->xres_virtual, var->xres); | |
339 | var->yres_virtual = max(var->yres_virtual, var->yres); | |
7c2f891c SH |
340 | |
341 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | |
343684ff SH |
342 | |
343 | lcd_clk = clk_get_rate(fbi->clk); | |
344 | ||
345 | tmp = var->pixclock * (unsigned long long)lcd_clk; | |
346 | ||
347 | do_div(tmp, 1000000); | |
348 | ||
349 | if (do_div(tmp, 1000000) > 500000) | |
350 | tmp++; | |
351 | ||
352 | pcr = (unsigned int)tmp; | |
353 | ||
354 | if (--pcr > 0x3F) { | |
355 | pcr = 0x3F; | |
356 | printk(KERN_WARNING "Must limit pixel clock to %luHz\n", | |
357 | lcd_clk / pcr); | |
358 | } | |
359 | ||
7c2f891c | 360 | switch (var->bits_per_pixel) { |
1512222b | 361 | case 32: |
343684ff | 362 | pcr |= PCR_BPIX_18; |
1512222b SH |
363 | rgb = &def_rgb_18; |
364 | break; | |
7c2f891c | 365 | case 16: |
80eee6bc | 366 | default: |
343684ff SH |
367 | if (cpu_is_mx1()) |
368 | pcr |= PCR_BPIX_12; | |
369 | else | |
370 | pcr |= PCR_BPIX_16; | |
371 | ||
372 | if (imxfb_mode->pcr & PCR_TFT) | |
80eee6bc SH |
373 | rgb = &def_rgb_16_tft; |
374 | else | |
375 | rgb = &def_rgb_16_stn; | |
7c2f891c SH |
376 | break; |
377 | case 8: | |
343684ff | 378 | pcr |= PCR_BPIX_8; |
80eee6bc | 379 | rgb = &def_rgb_8; |
7c2f891c | 380 | break; |
7c2f891c SH |
381 | } |
382 | ||
343684ff SH |
383 | /* add sync polarities */ |
384 | pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25)); | |
385 | ||
386 | fbi->pcr = pcr; | |
387 | ||
7c2f891c SH |
388 | /* |
389 | * Copy the RGB parameters for this display | |
390 | * from the machine specific parameters. | |
391 | */ | |
80eee6bc SH |
392 | var->red = rgb->red; |
393 | var->green = rgb->green; | |
394 | var->blue = rgb->blue; | |
395 | var->transp = rgb->transp; | |
7c2f891c SH |
396 | |
397 | pr_debug("RGBT length = %d:%d:%d:%d\n", | |
398 | var->red.length, var->green.length, var->blue.length, | |
399 | var->transp.length); | |
400 | ||
401 | pr_debug("RGBT offset = %d:%d:%d:%d\n", | |
402 | var->red.offset, var->green.offset, var->blue.offset, | |
403 | var->transp.offset); | |
404 | ||
405 | return 0; | |
406 | } | |
407 | ||
408 | /* | |
409 | * imxfb_set_par(): | |
410 | * Set the user defined part of the display for the specified console | |
411 | */ | |
412 | static int imxfb_set_par(struct fb_info *info) | |
413 | { | |
414 | struct imxfb_info *fbi = info->par; | |
415 | struct fb_var_screeninfo *var = &info->var; | |
416 | ||
1512222b | 417 | if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) |
7c2f891c SH |
418 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
419 | else if (!fbi->cmap_static) | |
420 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
421 | else { | |
422 | /* | |
423 | * Some people have weird ideas about wanting static | |
424 | * pseudocolor maps. I suspect their user space | |
425 | * applications are broken. | |
426 | */ | |
427 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | |
428 | } | |
429 | ||
66c8719b | 430 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
7c2f891c SH |
431 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
432 | ||
433 | imxfb_activate_var(var, info); | |
434 | ||
435 | return 0; | |
436 | } | |
437 | ||
81ef8061 | 438 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c EB |
439 | static int imxfb_bl_get_brightness(struct backlight_device *bl) |
440 | { | |
441 | struct imxfb_info *fbi = bl_get_data(bl); | |
442 | ||
443 | return readl(fbi->regs + LCDC_PWMR) & 0xFF; | |
444 | } | |
445 | ||
446 | static int imxfb_bl_update_status(struct backlight_device *bl) | |
447 | { | |
448 | struct imxfb_info *fbi = bl_get_data(bl); | |
449 | int brightness = bl->props.brightness; | |
450 | ||
451 | if (bl->props.power != FB_BLANK_UNBLANK) | |
452 | brightness = 0; | |
453 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
454 | brightness = 0; | |
455 | ||
456 | fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness; | |
457 | ||
458 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
459 | clk_enable(fbi->clk); | |
460 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
461 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
462 | clk_disable(fbi->clk); | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
467 | static const struct backlight_ops imxfb_lcdc_bl_ops = { | |
468 | .update_status = imxfb_bl_update_status, | |
469 | .get_brightness = imxfb_bl_get_brightness, | |
470 | }; | |
471 | ||
472 | static void imxfb_init_backlight(struct imxfb_info *fbi) | |
473 | { | |
474 | struct backlight_properties props; | |
475 | struct backlight_device *bl; | |
476 | ||
477 | if (fbi->bl) | |
478 | return; | |
479 | ||
480 | memset(&props, 0, sizeof(struct backlight_properties)); | |
481 | props.max_brightness = 0xff; | |
bb7ca747 | 482 | props.type = BACKLIGHT_RAW; |
7a2bb23c EB |
483 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
484 | ||
485 | bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi, | |
486 | &imxfb_lcdc_bl_ops, &props); | |
487 | if (IS_ERR(bl)) { | |
488 | dev_err(&fbi->pdev->dev, "error %ld on backlight register\n", | |
489 | PTR_ERR(bl)); | |
490 | return; | |
491 | } | |
492 | ||
493 | fbi->bl = bl; | |
494 | bl->props.power = FB_BLANK_UNBLANK; | |
495 | bl->props.fb_blank = FB_BLANK_UNBLANK; | |
496 | bl->props.brightness = imxfb_bl_get_brightness(bl); | |
497 | } | |
498 | ||
499 | static void imxfb_exit_backlight(struct imxfb_info *fbi) | |
500 | { | |
501 | if (fbi->bl) | |
502 | backlight_device_unregister(fbi->bl); | |
503 | } | |
81ef8061 | 504 | #endif |
7a2bb23c | 505 | |
7c2f891c SH |
506 | static void imxfb_enable_controller(struct imxfb_info *fbi) |
507 | { | |
508 | pr_debug("Enabling LCD controller\n"); | |
509 | ||
72330b0e | 510 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); |
7c2f891c | 511 | |
72330b0e JB |
512 | /* panning offset 0 (0 pixel offset) */ |
513 | writel(0x00000000, fbi->regs + LCDC_POS); | |
7c2f891c SH |
514 | |
515 | /* disable hardware cursor */ | |
72330b0e JB |
516 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
517 | fbi->regs + LCDC_CPOS); | |
7c2f891c | 518 | |
f142b619 SH |
519 | /* |
520 | * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt | |
521 | * on other SoCs | |
522 | */ | |
523 | writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR); | |
7c2f891c | 524 | |
f909ef64 SH |
525 | clk_enable(fbi->clk); |
526 | ||
66c8719b | 527 | if (fbi->backlight_power) |
7c2f891c | 528 | fbi->backlight_power(1); |
66c8719b | 529 | if (fbi->lcd_power) |
7c2f891c SH |
530 | fbi->lcd_power(1); |
531 | } | |
532 | ||
533 | static void imxfb_disable_controller(struct imxfb_info *fbi) | |
534 | { | |
535 | pr_debug("Disabling LCD controller\n"); | |
536 | ||
66c8719b | 537 | if (fbi->backlight_power) |
7c2f891c | 538 | fbi->backlight_power(0); |
66c8719b | 539 | if (fbi->lcd_power) |
7c2f891c SH |
540 | fbi->lcd_power(0); |
541 | ||
f909ef64 SH |
542 | clk_disable(fbi->clk); |
543 | ||
72330b0e | 544 | writel(0, fbi->regs + LCDC_RMCR); |
7c2f891c SH |
545 | } |
546 | ||
547 | static int imxfb_blank(int blank, struct fb_info *info) | |
548 | { | |
549 | struct imxfb_info *fbi = info->par; | |
550 | ||
551 | pr_debug("imxfb_blank: blank=%d\n", blank); | |
552 | ||
553 | switch (blank) { | |
554 | case FB_BLANK_POWERDOWN: | |
555 | case FB_BLANK_VSYNC_SUSPEND: | |
556 | case FB_BLANK_HSYNC_SUSPEND: | |
557 | case FB_BLANK_NORMAL: | |
558 | imxfb_disable_controller(fbi); | |
559 | break; | |
560 | ||
561 | case FB_BLANK_UNBLANK: | |
562 | imxfb_enable_controller(fbi); | |
563 | break; | |
564 | } | |
565 | return 0; | |
566 | } | |
567 | ||
568 | static struct fb_ops imxfb_ops = { | |
569 | .owner = THIS_MODULE, | |
570 | .fb_check_var = imxfb_check_var, | |
571 | .fb_set_par = imxfb_set_par, | |
572 | .fb_setcolreg = imxfb_setcolreg, | |
573 | .fb_fillrect = cfb_fillrect, | |
574 | .fb_copyarea = cfb_copyarea, | |
575 | .fb_imageblit = cfb_imageblit, | |
576 | .fb_blank = imxfb_blank, | |
7c2f891c SH |
577 | }; |
578 | ||
579 | /* | |
580 | * imxfb_activate_var(): | |
581 | * Configures LCD Controller based on entries in var parameter. Settings are | |
582 | * only written to the controller if changes were made. | |
583 | */ | |
584 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
585 | { | |
586 | struct imxfb_info *fbi = info->par; | |
f909ef64 | 587 | |
7c2f891c SH |
588 | pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", |
589 | var->xres, var->hsync_len, | |
590 | var->left_margin, var->right_margin); | |
591 | pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", | |
592 | var->yres, var->vsync_len, | |
593 | var->upper_margin, var->lower_margin); | |
594 | ||
595 | #if DEBUG_VAR | |
596 | if (var->xres < 16 || var->xres > 1024) | |
597 | printk(KERN_ERR "%s: invalid xres %d\n", | |
598 | info->fix.id, var->xres); | |
599 | if (var->hsync_len < 1 || var->hsync_len > 64) | |
600 | printk(KERN_ERR "%s: invalid hsync_len %d\n", | |
601 | info->fix.id, var->hsync_len); | |
602 | if (var->left_margin > 255) | |
603 | printk(KERN_ERR "%s: invalid left_margin %d\n", | |
604 | info->fix.id, var->left_margin); | |
605 | if (var->right_margin > 255) | |
606 | printk(KERN_ERR "%s: invalid right_margin %d\n", | |
607 | info->fix.id, var->right_margin); | |
60328917 | 608 | if (var->yres < 1 || var->yres > YMAX_MASK) |
7c2f891c SH |
609 | printk(KERN_ERR "%s: invalid yres %d\n", |
610 | info->fix.id, var->yres); | |
611 | if (var->vsync_len > 100) | |
612 | printk(KERN_ERR "%s: invalid vsync_len %d\n", | |
613 | info->fix.id, var->vsync_len); | |
614 | if (var->upper_margin > 63) | |
615 | printk(KERN_ERR "%s: invalid upper_margin %d\n", | |
616 | info->fix.id, var->upper_margin); | |
617 | if (var->lower_margin > 255) | |
618 | printk(KERN_ERR "%s: invalid lower_margin %d\n", | |
619 | info->fix.id, var->lower_margin); | |
620 | #endif | |
621 | ||
343684ff SH |
622 | /* physical screen start address */ |
623 | writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4), | |
624 | fbi->regs + LCDC_VPW); | |
625 | ||
7e8549bc SH |
626 | writel(HCR_H_WIDTH(var->hsync_len - 1) | |
627 | HCR_H_WAIT_1(var->right_margin - 1) | | |
628 | HCR_H_WAIT_2(var->left_margin - 3), | |
72330b0e | 629 | fbi->regs + LCDC_HCR); |
7c2f891c | 630 | |
72330b0e | 631 | writel(VCR_V_WIDTH(var->vsync_len) | |
d6ed5755 SH |
632 | VCR_V_WAIT_1(var->lower_margin) | |
633 | VCR_V_WAIT_2(var->upper_margin), | |
72330b0e | 634 | fbi->regs + LCDC_VCR); |
7c2f891c | 635 | |
72330b0e JB |
636 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
637 | fbi->regs + LCDC_SIZE); | |
f909ef64 | 638 | |
343684ff | 639 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
81ef8061 EB |
640 | #ifndef PWMR_BACKLIGHT_AVAILABLE |
641 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
642 | #endif | |
72330b0e JB |
643 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
644 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | |
7c2f891c SH |
645 | |
646 | return 0; | |
647 | } | |
648 | ||
7c2f891c SH |
649 | #ifdef CONFIG_PM |
650 | /* | |
651 | * Power management hooks. Note that we won't be called from IRQ context, | |
652 | * unlike the blank functions above, so we may sleep. | |
653 | */ | |
3ae5eaec | 654 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
7c2f891c | 655 | { |
1ec56203 UKK |
656 | struct fb_info *info = platform_get_drvdata(dev); |
657 | struct imxfb_info *fbi = info->par; | |
66c8719b SH |
658 | |
659 | pr_debug("%s\n", __func__); | |
7c2f891c | 660 | |
9480e307 | 661 | imxfb_disable_controller(fbi); |
7c2f891c SH |
662 | return 0; |
663 | } | |
664 | ||
3ae5eaec | 665 | static int imxfb_resume(struct platform_device *dev) |
7c2f891c | 666 | { |
1ec56203 UKK |
667 | struct fb_info *info = platform_get_drvdata(dev); |
668 | struct imxfb_info *fbi = info->par; | |
66c8719b SH |
669 | |
670 | pr_debug("%s\n", __func__); | |
7c2f891c | 671 | |
9480e307 | 672 | imxfb_enable_controller(fbi); |
7c2f891c SH |
673 | return 0; |
674 | } | |
675 | #else | |
676 | #define imxfb_suspend NULL | |
677 | #define imxfb_resume NULL | |
678 | #endif | |
679 | ||
72330b0e | 680 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
7c2f891c | 681 | { |
27889273 | 682 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
72330b0e | 683 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
7c2f891c | 684 | struct imxfb_info *fbi = info->par; |
343684ff SH |
685 | struct imx_fb_videomode *m; |
686 | int i; | |
7c2f891c | 687 | |
5ae12170 | 688 | pr_debug("%s\n",__func__); |
7c2f891c | 689 | |
66c8719b | 690 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
7c2f891c SH |
691 | if (!info->pseudo_palette) |
692 | return -ENOMEM; | |
693 | ||
694 | memset(fbi, 0, sizeof(struct imxfb_info)); | |
7c2f891c SH |
695 | |
696 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | |
697 | ||
66c8719b | 698 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
7c2f891c SH |
699 | info->fix.type_aux = 0; |
700 | info->fix.xpanstep = 0; | |
701 | info->fix.ypanstep = 0; | |
702 | info->fix.ywrapstep = 0; | |
66c8719b | 703 | info->fix.accel = FB_ACCEL_NONE; |
7c2f891c SH |
704 | |
705 | info->var.nonstd = 0; | |
706 | info->var.activate = FB_ACTIVATE_NOW; | |
707 | info->var.height = -1; | |
708 | info->var.width = -1; | |
709 | info->var.accel_flags = 0; | |
66c8719b | 710 | info->var.vmode = FB_VMODE_NONINTERLACED; |
7c2f891c SH |
711 | |
712 | info->fbops = &imxfb_ops; | |
66c8719b SH |
713 | info->flags = FBINFO_FLAG_DEFAULT | |
714 | FBINFO_READS_FAST; | |
27889273 SH |
715 | info->var.grayscale = pdata->cmap_greyscale; |
716 | fbi->cmap_inverse = pdata->cmap_inverse; | |
717 | fbi->cmap_static = pdata->cmap_static; | |
27889273 SH |
718 | fbi->lscr1 = pdata->lscr1; |
719 | fbi->dmacr = pdata->dmacr; | |
720 | fbi->pwmr = pdata->pwmr; | |
721 | fbi->lcd_power = pdata->lcd_power; | |
722 | fbi->backlight_power = pdata->backlight_power; | |
343684ff SH |
723 | |
724 | for (i = 0, m = &pdata->mode[0]; i < pdata->num_modes; i++, m++) | |
725 | info->fix.smem_len = max_t(size_t, info->fix.smem_len, | |
726 | m->mode.xres * m->mode.yres * m->bpp / 8); | |
7c2f891c SH |
727 | |
728 | return 0; | |
729 | } | |
730 | ||
3ae5eaec | 731 | static int __init imxfb_probe(struct platform_device *pdev) |
7c2f891c | 732 | { |
7c2f891c SH |
733 | struct imxfb_info *fbi; |
734 | struct fb_info *info; | |
27889273 | 735 | struct imx_fb_platform_data *pdata; |
7c2f891c | 736 | struct resource *res; |
343684ff | 737 | int ret, i; |
7c2f891c | 738 | |
d6b51502 | 739 | dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); |
7c2f891c SH |
740 | |
741 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
66c8719b | 742 | if (!res) |
7c2f891c SH |
743 | return -ENODEV; |
744 | ||
27889273 SH |
745 | pdata = pdev->dev.platform_data; |
746 | if (!pdata) { | |
f99c8929 | 747 | dev_err(&pdev->dev,"No platform_data available\n"); |
7c2f891c SH |
748 | return -ENOMEM; |
749 | } | |
750 | ||
3ae5eaec | 751 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
66c8719b | 752 | if (!info) |
7c2f891c SH |
753 | return -ENOMEM; |
754 | ||
755 | fbi = info->par; | |
756 | ||
343684ff SH |
757 | if (!fb_mode) |
758 | fb_mode = pdata->mode[0].mode.name; | |
759 | ||
3ae5eaec | 760 | platform_set_drvdata(pdev, info); |
7c2f891c | 761 | |
72330b0e | 762 | ret = imxfb_init_fbinfo(pdev); |
66c8719b | 763 | if (ret < 0) |
7c2f891c SH |
764 | goto failed_init; |
765 | ||
72330b0e JB |
766 | res = request_mem_region(res->start, resource_size(res), |
767 | DRIVER_NAME); | |
7c2f891c SH |
768 | if (!res) { |
769 | ret = -EBUSY; | |
72330b0e JB |
770 | goto failed_req; |
771 | } | |
772 | ||
f909ef64 SH |
773 | fbi->clk = clk_get(&pdev->dev, NULL); |
774 | if (IS_ERR(fbi->clk)) { | |
a419aef8 | 775 | ret = PTR_ERR(fbi->clk); |
f909ef64 SH |
776 | dev_err(&pdev->dev, "unable to get clock: %d\n", ret); |
777 | goto failed_getclock; | |
778 | } | |
779 | ||
72330b0e JB |
780 | fbi->regs = ioremap(res->start, resource_size(res)); |
781 | if (fbi->regs == NULL) { | |
d6b51502 | 782 | dev_err(&pdev->dev, "Cannot map frame buffer registers\n"); |
72330b0e | 783 | goto failed_ioremap; |
7c2f891c SH |
784 | } |
785 | ||
27889273 | 786 | if (!pdata->fixed_screen_cpu) { |
72330b0e JB |
787 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
788 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, | |
789 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | |
790 | ||
791 | if (!fbi->map_cpu) { | |
f99c8929 | 792 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
7c2f891c SH |
793 | ret = -ENOMEM; |
794 | goto failed_map; | |
795 | } | |
72330b0e JB |
796 | |
797 | info->screen_base = fbi->map_cpu; | |
798 | fbi->screen_cpu = fbi->map_cpu; | |
799 | fbi->screen_dma = fbi->map_dma; | |
800 | info->fix.smem_start = fbi->screen_dma; | |
7c2f891c SH |
801 | } else { |
802 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | |
27889273 SH |
803 | fbi->map_cpu = pdata->fixed_screen_cpu; |
804 | fbi->map_dma = pdata->fixed_screen_dma; | |
7c2f891c SH |
805 | info->screen_base = fbi->map_cpu; |
806 | fbi->screen_cpu = fbi->map_cpu; | |
807 | fbi->screen_dma = fbi->map_dma; | |
808 | info->fix.smem_start = fbi->screen_dma; | |
809 | } | |
810 | ||
c0b90a31 SH |
811 | if (pdata->init) { |
812 | ret = pdata->init(fbi->pdev); | |
813 | if (ret) | |
814 | goto failed_platform_init; | |
815 | } | |
816 | ||
343684ff SH |
817 | fbi->mode = pdata->mode; |
818 | fbi->num_modes = pdata->num_modes; | |
819 | ||
820 | INIT_LIST_HEAD(&info->modelist); | |
821 | for (i = 0; i < pdata->num_modes; i++) | |
822 | fb_add_videomode(&pdata->mode[i].mode, &info->modelist); | |
823 | ||
7c2f891c SH |
824 | /* |
825 | * This makes sure that our colour bitfield | |
826 | * descriptors are correctly initialised. | |
827 | */ | |
828 | imxfb_check_var(&info->var, info); | |
829 | ||
66c8719b | 830 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
7c2f891c SH |
831 | if (ret < 0) |
832 | goto failed_cmap; | |
833 | ||
7c2f891c SH |
834 | imxfb_set_par(info); |
835 | ret = register_framebuffer(info); | |
836 | if (ret < 0) { | |
f99c8929 | 837 | dev_err(&pdev->dev, "failed to register framebuffer\n"); |
7c2f891c SH |
838 | goto failed_register; |
839 | } | |
840 | ||
841 | imxfb_enable_controller(fbi); | |
7a2bb23c | 842 | fbi->pdev = pdev; |
81ef8061 | 843 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 844 | imxfb_init_backlight(fbi); |
81ef8061 | 845 | #endif |
7c2f891c SH |
846 | |
847 | return 0; | |
848 | ||
849 | failed_register: | |
850 | fb_dealloc_cmap(&info->cmap); | |
851 | failed_cmap: | |
c0b90a31 SH |
852 | if (pdata->exit) |
853 | pdata->exit(fbi->pdev); | |
854 | failed_platform_init: | |
27889273 | 855 | if (!pdata->fixed_screen_cpu) |
3ae5eaec | 856 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
72330b0e | 857 | fbi->map_dma); |
7c2f891c | 858 | failed_map: |
72330b0e JB |
859 | iounmap(fbi->regs); |
860 | failed_ioremap: | |
609d3bbf JL |
861 | clk_put(fbi->clk); |
862 | failed_getclock: | |
d6b51502 | 863 | release_mem_region(res->start, resource_size(res)); |
72330b0e JB |
864 | failed_req: |
865 | kfree(info->pseudo_palette); | |
7c2f891c | 866 | failed_init: |
3ae5eaec | 867 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
868 | framebuffer_release(info); |
869 | return ret; | |
870 | } | |
871 | ||
72330b0e | 872 | static int __devexit imxfb_remove(struct platform_device *pdev) |
7c2f891c | 873 | { |
c0b90a31 | 874 | struct imx_fb_platform_data *pdata; |
3ae5eaec | 875 | struct fb_info *info = platform_get_drvdata(pdev); |
772a9e63 | 876 | struct imxfb_info *fbi = info->par; |
7c2f891c SH |
877 | struct resource *res; |
878 | ||
879 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
880 | ||
772a9e63 | 881 | imxfb_disable_controller(fbi); |
7c2f891c | 882 | |
81ef8061 | 883 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 884 | imxfb_exit_backlight(fbi); |
81ef8061 | 885 | #endif |
7c2f891c SH |
886 | unregister_framebuffer(info); |
887 | ||
c0b90a31 SH |
888 | pdata = pdev->dev.platform_data; |
889 | if (pdata->exit) | |
890 | pdata->exit(fbi->pdev); | |
891 | ||
7c2f891c SH |
892 | fb_dealloc_cmap(&info->cmap); |
893 | kfree(info->pseudo_palette); | |
894 | framebuffer_release(info); | |
895 | ||
72330b0e | 896 | iounmap(fbi->regs); |
d6b51502 | 897 | release_mem_region(res->start, resource_size(res)); |
f909ef64 SH |
898 | clk_disable(fbi->clk); |
899 | clk_put(fbi->clk); | |
900 | ||
3ae5eaec | 901 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
902 | |
903 | return 0; | |
904 | } | |
905 | ||
3ae5eaec | 906 | void imxfb_shutdown(struct platform_device * dev) |
7c2f891c | 907 | { |
3ae5eaec | 908 | struct fb_info *info = platform_get_drvdata(dev); |
772a9e63 SH |
909 | struct imxfb_info *fbi = info->par; |
910 | imxfb_disable_controller(fbi); | |
7c2f891c SH |
911 | } |
912 | ||
3ae5eaec | 913 | static struct platform_driver imxfb_driver = { |
7c2f891c SH |
914 | .suspend = imxfb_suspend, |
915 | .resume = imxfb_resume, | |
72330b0e | 916 | .remove = __devexit_p(imxfb_remove), |
7c2f891c | 917 | .shutdown = imxfb_shutdown, |
3ae5eaec | 918 | .driver = { |
72330b0e | 919 | .name = DRIVER_NAME, |
3ae5eaec | 920 | }, |
7c2f891c SH |
921 | }; |
922 | ||
343684ff SH |
923 | static int imxfb_setup(void) |
924 | { | |
925 | #ifndef MODULE | |
926 | char *opt, *options = NULL; | |
927 | ||
928 | if (fb_get_options("imxfb", &options)) | |
929 | return -ENODEV; | |
930 | ||
931 | if (!options || !*options) | |
932 | return 0; | |
933 | ||
934 | while ((opt = strsep(&options, ",")) != NULL) { | |
935 | if (!*opt) | |
936 | continue; | |
937 | else | |
938 | fb_mode = opt; | |
939 | } | |
940 | #endif | |
941 | return 0; | |
942 | } | |
943 | ||
7c2f891c SH |
944 | int __init imxfb_init(void) |
945 | { | |
343684ff SH |
946 | int ret = imxfb_setup(); |
947 | ||
948 | if (ret < 0) | |
949 | return ret; | |
950 | ||
72330b0e | 951 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
7c2f891c SH |
952 | } |
953 | ||
954 | static void __exit imxfb_cleanup(void) | |
955 | { | |
3ae5eaec | 956 | platform_driver_unregister(&imxfb_driver); |
7c2f891c SH |
957 | } |
958 | ||
959 | module_init(imxfb_init); | |
960 | module_exit(imxfb_cleanup); | |
961 | ||
e3d5fb71 | 962 | MODULE_DESCRIPTION("Freescale i.MX framebuffer driver"); |
7c2f891c SH |
963 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); |
964 | MODULE_LICENSE("GPL"); |