Commit | Line | Data |
---|---|---|
7c2f891c | 1 | /* |
7c2f891c SH |
2 | * Freescale i.MX Frame Buffer device driver |
3 | * | |
4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | |
5 | * Based on acornfb.c Copyright (C) Russell King. | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | * | |
11 | * Please direct your questions and comments on this driver to the following | |
12 | * email address: | |
13 | * | |
14 | * linux-arm-kernel@lists.arm.linux.org.uk | |
15 | */ | |
16 | ||
7c2f891c SH |
17 | #include <linux/module.h> |
18 | #include <linux/kernel.h> | |
7c2f891c SH |
19 | #include <linux/errno.h> |
20 | #include <linux/string.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/slab.h> | |
27ac792c | 23 | #include <linux/mm.h> |
7c2f891c SH |
24 | #include <linux/fb.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/cpufreq.h> | |
f909ef64 | 29 | #include <linux/clk.h> |
d052d1be | 30 | #include <linux/platform_device.h> |
7c2f891c | 31 | #include <linux/dma-mapping.h> |
72330b0e | 32 | #include <linux/io.h> |
f909ef64 | 33 | #include <linux/math64.h> |
7c2f891c | 34 | |
a09e64fb | 35 | #include <mach/imxfb.h> |
f497d015 | 36 | #include <mach/hardware.h> |
7c2f891c SH |
37 | |
38 | /* | |
39 | * Complain if VAR is out of range. | |
40 | */ | |
41 | #define DEBUG_VAR 1 | |
42 | ||
81ef8061 EB |
43 | #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || \ |
44 | (defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) && \ | |
45 | defined(CONFIG_FB_IMX_MODULE)) | |
46 | #define PWMR_BACKLIGHT_AVAILABLE | |
47 | #endif | |
48 | ||
72330b0e JB |
49 | #define DRIVER_NAME "imx-fb" |
50 | ||
51 | #define LCDC_SSA 0x00 | |
52 | ||
53 | #define LCDC_SIZE 0x04 | |
54 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | |
1d0f9870 SH |
55 | |
56 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 57 | #define SIZE_YMAX(y) ((y) & 0x1ff) |
1d0f9870 SH |
58 | #else |
59 | #define SIZE_YMAX(y) ((y) & 0x3ff) | |
60 | #endif | |
72330b0e JB |
61 | |
62 | #define LCDC_VPW 0x08 | |
63 | #define VPW_VPW(x) ((x) & 0x3ff) | |
64 | ||
65 | #define LCDC_CPOS 0x0C | |
66 | #define CPOS_CC1 (1<<31) | |
67 | #define CPOS_CC0 (1<<30) | |
68 | #define CPOS_OP (1<<28) | |
69 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | |
1d0f9870 SH |
70 | |
71 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 72 | #define CPOS_CYP(y) ((y) & 0x1ff) |
1d0f9870 SH |
73 | #else |
74 | #define CPOS_CYP(y) ((y) & 0x3ff) | |
75 | #endif | |
72330b0e JB |
76 | |
77 | #define LCDC_LCWHB 0x10 | |
78 | #define LCWHB_BK_EN (1<<31) | |
79 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | |
80 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | |
81 | #define LCWHB_BD(x) ((x) & 0xff) | |
82 | ||
83 | #define LCDC_LCHCC 0x14 | |
1d0f9870 SH |
84 | |
85 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e JB |
86 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) |
87 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | |
88 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | |
1d0f9870 SH |
89 | #else |
90 | #define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12) | |
91 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6) | |
92 | #define LCHCC_CUR_COL_B(b) ((b) & 0x3f) | |
93 | #endif | |
72330b0e JB |
94 | |
95 | #define LCDC_PCR 0x18 | |
96 | ||
97 | #define LCDC_HCR 0x1C | |
98 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | |
99 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | |
100 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | |
101 | ||
102 | #define LCDC_VCR 0x20 | |
103 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | |
104 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | |
105 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | |
106 | ||
107 | #define LCDC_POS 0x24 | |
108 | #define POS_POS(x) ((x) & 1f) | |
109 | ||
110 | #define LCDC_LSCR1 0x28 | |
111 | /* bit fields in imxfb.h */ | |
112 | ||
113 | #define LCDC_PWMR 0x2C | |
114 | /* bit fields in imxfb.h */ | |
115 | ||
116 | #define LCDC_DMACR 0x30 | |
117 | /* bit fields in imxfb.h */ | |
118 | ||
119 | #define LCDC_RMCR 0x34 | |
1d0f9870 SH |
120 | |
121 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 122 | #define RMCR_LCDC_EN (1<<1) |
1d0f9870 SH |
123 | #else |
124 | #define RMCR_LCDC_EN 0 | |
125 | #endif | |
126 | ||
72330b0e JB |
127 | #define RMCR_SELF_REF (1<<0) |
128 | ||
129 | #define LCDC_LCDICR 0x38 | |
130 | #define LCDICR_INT_SYN (1<<2) | |
131 | #define LCDICR_INT_CON (1) | |
132 | ||
133 | #define LCDC_LCDISR 0x40 | |
134 | #define LCDISR_UDR_ERR (1<<3) | |
135 | #define LCDISR_ERR_RES (1<<2) | |
136 | #define LCDISR_EOF (1<<1) | |
137 | #define LCDISR_BOF (1<<0) | |
138 | ||
343684ff SH |
139 | /* Used fb-mode. Can be set on kernel command line, therefore file-static. */ |
140 | static const char *fb_mode; | |
141 | ||
142 | ||
24b9baf7 SH |
143 | /* |
144 | * These are the bitfields for each | |
145 | * display depth that we support. | |
146 | */ | |
147 | struct imxfb_rgb { | |
148 | struct fb_bitfield red; | |
149 | struct fb_bitfield green; | |
150 | struct fb_bitfield blue; | |
151 | struct fb_bitfield transp; | |
152 | }; | |
153 | ||
24b9baf7 SH |
154 | struct imxfb_info { |
155 | struct platform_device *pdev; | |
156 | void __iomem *regs; | |
f909ef64 | 157 | struct clk *clk; |
24b9baf7 | 158 | |
24b9baf7 SH |
159 | /* |
160 | * These are the addresses we mapped | |
161 | * the framebuffer memory region to. | |
162 | */ | |
163 | dma_addr_t map_dma; | |
164 | u_char *map_cpu; | |
165 | u_int map_size; | |
166 | ||
167 | u_char *screen_cpu; | |
168 | dma_addr_t screen_dma; | |
169 | u_int palette_size; | |
170 | ||
171 | dma_addr_t dbar1; | |
172 | dma_addr_t dbar2; | |
173 | ||
174 | u_int pcr; | |
175 | u_int pwmr; | |
176 | u_int lscr1; | |
177 | u_int dmacr; | |
178 | u_int cmap_inverse:1, | |
179 | cmap_static:1, | |
180 | unused:30; | |
181 | ||
343684ff SH |
182 | struct imx_fb_videomode *mode; |
183 | int num_modes; | |
81ef8061 | 184 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 185 | struct backlight_device *bl; |
81ef8061 | 186 | #endif |
343684ff | 187 | |
24b9baf7 SH |
188 | void (*lcd_power)(int); |
189 | void (*backlight_power)(int); | |
190 | }; | |
191 | ||
192 | #define IMX_NAME "IMX" | |
193 | ||
194 | /* | |
195 | * Minimum X and Y resolutions | |
196 | */ | |
197 | #define MIN_XRES 64 | |
198 | #define MIN_YRES 64 | |
199 | ||
1512222b SH |
200 | /* Actually this really is 18bit support, the lowest 2 bits of each colour |
201 | * are unused in hardware. We claim to have 24bit support to make software | |
202 | * like X work, which does not support 18bit. | |
203 | */ | |
204 | static struct imxfb_rgb def_rgb_18 = { | |
205 | .red = {.offset = 16, .length = 8,}, | |
206 | .green = {.offset = 8, .length = 8,}, | |
207 | .blue = {.offset = 0, .length = 8,}, | |
208 | .transp = {.offset = 0, .length = 0,}, | |
209 | }; | |
210 | ||
80eee6bc SH |
211 | static struct imxfb_rgb def_rgb_16_tft = { |
212 | .red = {.offset = 11, .length = 5,}, | |
213 | .green = {.offset = 5, .length = 6,}, | |
214 | .blue = {.offset = 0, .length = 5,}, | |
215 | .transp = {.offset = 0, .length = 0,}, | |
216 | }; | |
217 | ||
218 | static struct imxfb_rgb def_rgb_16_stn = { | |
66c8719b SH |
219 | .red = {.offset = 8, .length = 4,}, |
220 | .green = {.offset = 4, .length = 4,}, | |
221 | .blue = {.offset = 0, .length = 4,}, | |
222 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
223 | }; |
224 | ||
225 | static struct imxfb_rgb def_rgb_8 = { | |
66c8719b SH |
226 | .red = {.offset = 0, .length = 8,}, |
227 | .green = {.offset = 0, .length = 8,}, | |
228 | .blue = {.offset = 0, .length = 8,}, | |
229 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
230 | }; |
231 | ||
66c8719b SH |
232 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
233 | struct fb_info *info); | |
7c2f891c SH |
234 | |
235 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |
236 | { | |
237 | chan &= 0xffff; | |
238 | chan >>= 16 - bf->length; | |
239 | return chan << bf->offset; | |
240 | } | |
241 | ||
66c8719b SH |
242 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
243 | u_int trans, struct fb_info *info) | |
7c2f891c SH |
244 | { |
245 | struct imxfb_info *fbi = info->par; | |
246 | u_int val, ret = 1; | |
247 | ||
248 | #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) | |
249 | if (regno < fbi->palette_size) { | |
250 | val = (CNVT_TOHW(red, 4) << 8) | | |
251 | (CNVT_TOHW(green,4) << 4) | | |
252 | CNVT_TOHW(blue, 4); | |
253 | ||
72330b0e | 254 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
7c2f891c SH |
255 | ret = 0; |
256 | } | |
257 | return ret; | |
258 | } | |
259 | ||
66c8719b | 260 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
7c2f891c SH |
261 | u_int trans, struct fb_info *info) |
262 | { | |
263 | struct imxfb_info *fbi = info->par; | |
264 | unsigned int val; | |
265 | int ret = 1; | |
266 | ||
267 | /* | |
268 | * If inverse mode was selected, invert all the colours | |
269 | * rather than the register number. The register number | |
270 | * is what you poke into the framebuffer to produce the | |
271 | * colour you requested. | |
272 | */ | |
273 | if (fbi->cmap_inverse) { | |
274 | red = 0xffff - red; | |
275 | green = 0xffff - green; | |
276 | blue = 0xffff - blue; | |
277 | } | |
278 | ||
279 | /* | |
280 | * If greyscale is true, then we convert the RGB value | |
281 | * to greyscale no mater what visual we are using. | |
282 | */ | |
283 | if (info->var.grayscale) | |
284 | red = green = blue = (19595 * red + 38470 * green + | |
285 | 7471 * blue) >> 16; | |
286 | ||
287 | switch (info->fix.visual) { | |
288 | case FB_VISUAL_TRUECOLOR: | |
289 | /* | |
290 | * 12 or 16-bit True Colour. We encode the RGB value | |
291 | * according to the RGB bitfield information. | |
292 | */ | |
293 | if (regno < 16) { | |
294 | u32 *pal = info->pseudo_palette; | |
295 | ||
296 | val = chan_to_field(red, &info->var.red); | |
297 | val |= chan_to_field(green, &info->var.green); | |
298 | val |= chan_to_field(blue, &info->var.blue); | |
299 | ||
300 | pal[regno] = val; | |
301 | ret = 0; | |
302 | } | |
303 | break; | |
304 | ||
305 | case FB_VISUAL_STATIC_PSEUDOCOLOR: | |
306 | case FB_VISUAL_PSEUDOCOLOR: | |
307 | ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); | |
308 | break; | |
309 | } | |
310 | ||
311 | return ret; | |
312 | } | |
313 | ||
343684ff SH |
314 | static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi) |
315 | { | |
316 | struct imx_fb_videomode *m; | |
317 | int i; | |
318 | ||
319 | for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) { | |
320 | if (!strcmp(m->mode.name, fb_mode)) | |
321 | return m; | |
322 | } | |
323 | return NULL; | |
324 | } | |
325 | ||
7c2f891c SH |
326 | /* |
327 | * imxfb_check_var(): | |
328 | * Round up in the following order: bits_per_pixel, xres, | |
329 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | |
330 | * bitfields, horizontal timing, vertical timing. | |
331 | */ | |
66c8719b | 332 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
7c2f891c SH |
333 | { |
334 | struct imxfb_info *fbi = info->par; | |
80eee6bc | 335 | struct imxfb_rgb *rgb; |
343684ff SH |
336 | const struct imx_fb_videomode *imxfb_mode; |
337 | unsigned long lcd_clk; | |
338 | unsigned long long tmp; | |
339 | u32 pcr = 0; | |
7c2f891c SH |
340 | |
341 | if (var->xres < MIN_XRES) | |
342 | var->xres = MIN_XRES; | |
343 | if (var->yres < MIN_YRES) | |
344 | var->yres = MIN_YRES; | |
343684ff SH |
345 | |
346 | imxfb_mode = imxfb_find_mode(fbi); | |
347 | if (!imxfb_mode) | |
348 | return -EINVAL; | |
349 | ||
350 | var->xres = imxfb_mode->mode.xres; | |
351 | var->yres = imxfb_mode->mode.yres; | |
352 | var->bits_per_pixel = imxfb_mode->bpp; | |
353 | var->pixclock = imxfb_mode->mode.pixclock; | |
354 | var->hsync_len = imxfb_mode->mode.hsync_len; | |
355 | var->left_margin = imxfb_mode->mode.left_margin; | |
356 | var->right_margin = imxfb_mode->mode.right_margin; | |
357 | var->vsync_len = imxfb_mode->mode.vsync_len; | |
358 | var->upper_margin = imxfb_mode->mode.upper_margin; | |
359 | var->lower_margin = imxfb_mode->mode.lower_margin; | |
360 | var->sync = imxfb_mode->mode.sync; | |
361 | var->xres_virtual = max(var->xres_virtual, var->xres); | |
362 | var->yres_virtual = max(var->yres_virtual, var->yres); | |
7c2f891c SH |
363 | |
364 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | |
343684ff SH |
365 | |
366 | lcd_clk = clk_get_rate(fbi->clk); | |
367 | ||
368 | tmp = var->pixclock * (unsigned long long)lcd_clk; | |
369 | ||
370 | do_div(tmp, 1000000); | |
371 | ||
372 | if (do_div(tmp, 1000000) > 500000) | |
373 | tmp++; | |
374 | ||
375 | pcr = (unsigned int)tmp; | |
376 | ||
377 | if (--pcr > 0x3F) { | |
378 | pcr = 0x3F; | |
379 | printk(KERN_WARNING "Must limit pixel clock to %luHz\n", | |
380 | lcd_clk / pcr); | |
381 | } | |
382 | ||
7c2f891c | 383 | switch (var->bits_per_pixel) { |
1512222b | 384 | case 32: |
343684ff | 385 | pcr |= PCR_BPIX_18; |
1512222b SH |
386 | rgb = &def_rgb_18; |
387 | break; | |
7c2f891c | 388 | case 16: |
80eee6bc | 389 | default: |
343684ff SH |
390 | if (cpu_is_mx1()) |
391 | pcr |= PCR_BPIX_12; | |
392 | else | |
393 | pcr |= PCR_BPIX_16; | |
394 | ||
395 | if (imxfb_mode->pcr & PCR_TFT) | |
80eee6bc SH |
396 | rgb = &def_rgb_16_tft; |
397 | else | |
398 | rgb = &def_rgb_16_stn; | |
7c2f891c SH |
399 | break; |
400 | case 8: | |
343684ff | 401 | pcr |= PCR_BPIX_8; |
80eee6bc | 402 | rgb = &def_rgb_8; |
7c2f891c | 403 | break; |
7c2f891c SH |
404 | } |
405 | ||
343684ff SH |
406 | /* add sync polarities */ |
407 | pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25)); | |
408 | ||
409 | fbi->pcr = pcr; | |
410 | ||
7c2f891c SH |
411 | /* |
412 | * Copy the RGB parameters for this display | |
413 | * from the machine specific parameters. | |
414 | */ | |
80eee6bc SH |
415 | var->red = rgb->red; |
416 | var->green = rgb->green; | |
417 | var->blue = rgb->blue; | |
418 | var->transp = rgb->transp; | |
7c2f891c SH |
419 | |
420 | pr_debug("RGBT length = %d:%d:%d:%d\n", | |
421 | var->red.length, var->green.length, var->blue.length, | |
422 | var->transp.length); | |
423 | ||
424 | pr_debug("RGBT offset = %d:%d:%d:%d\n", | |
425 | var->red.offset, var->green.offset, var->blue.offset, | |
426 | var->transp.offset); | |
427 | ||
428 | return 0; | |
429 | } | |
430 | ||
431 | /* | |
432 | * imxfb_set_par(): | |
433 | * Set the user defined part of the display for the specified console | |
434 | */ | |
435 | static int imxfb_set_par(struct fb_info *info) | |
436 | { | |
437 | struct imxfb_info *fbi = info->par; | |
438 | struct fb_var_screeninfo *var = &info->var; | |
439 | ||
1512222b | 440 | if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) |
7c2f891c SH |
441 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
442 | else if (!fbi->cmap_static) | |
443 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
444 | else { | |
445 | /* | |
446 | * Some people have weird ideas about wanting static | |
447 | * pseudocolor maps. I suspect their user space | |
448 | * applications are broken. | |
449 | */ | |
450 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | |
451 | } | |
452 | ||
66c8719b | 453 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
7c2f891c SH |
454 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
455 | ||
456 | imxfb_activate_var(var, info); | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
81ef8061 | 461 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c EB |
462 | static int imxfb_bl_get_brightness(struct backlight_device *bl) |
463 | { | |
464 | struct imxfb_info *fbi = bl_get_data(bl); | |
465 | ||
466 | return readl(fbi->regs + LCDC_PWMR) & 0xFF; | |
467 | } | |
468 | ||
469 | static int imxfb_bl_update_status(struct backlight_device *bl) | |
470 | { | |
471 | struct imxfb_info *fbi = bl_get_data(bl); | |
472 | int brightness = bl->props.brightness; | |
473 | ||
474 | if (bl->props.power != FB_BLANK_UNBLANK) | |
475 | brightness = 0; | |
476 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
477 | brightness = 0; | |
478 | ||
479 | fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness; | |
480 | ||
481 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
482 | clk_enable(fbi->clk); | |
483 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
484 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | |
485 | clk_disable(fbi->clk); | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
490 | static const struct backlight_ops imxfb_lcdc_bl_ops = { | |
491 | .update_status = imxfb_bl_update_status, | |
492 | .get_brightness = imxfb_bl_get_brightness, | |
493 | }; | |
494 | ||
495 | static void imxfb_init_backlight(struct imxfb_info *fbi) | |
496 | { | |
497 | struct backlight_properties props; | |
498 | struct backlight_device *bl; | |
499 | ||
500 | if (fbi->bl) | |
501 | return; | |
502 | ||
503 | memset(&props, 0, sizeof(struct backlight_properties)); | |
504 | props.max_brightness = 0xff; | |
505 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
506 | ||
507 | bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi, | |
508 | &imxfb_lcdc_bl_ops, &props); | |
509 | if (IS_ERR(bl)) { | |
510 | dev_err(&fbi->pdev->dev, "error %ld on backlight register\n", | |
511 | PTR_ERR(bl)); | |
512 | return; | |
513 | } | |
514 | ||
515 | fbi->bl = bl; | |
516 | bl->props.power = FB_BLANK_UNBLANK; | |
517 | bl->props.fb_blank = FB_BLANK_UNBLANK; | |
518 | bl->props.brightness = imxfb_bl_get_brightness(bl); | |
519 | } | |
520 | ||
521 | static void imxfb_exit_backlight(struct imxfb_info *fbi) | |
522 | { | |
523 | if (fbi->bl) | |
524 | backlight_device_unregister(fbi->bl); | |
525 | } | |
81ef8061 | 526 | #endif |
7a2bb23c | 527 | |
7c2f891c SH |
528 | static void imxfb_enable_controller(struct imxfb_info *fbi) |
529 | { | |
530 | pr_debug("Enabling LCD controller\n"); | |
531 | ||
72330b0e | 532 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); |
7c2f891c | 533 | |
72330b0e JB |
534 | /* panning offset 0 (0 pixel offset) */ |
535 | writel(0x00000000, fbi->regs + LCDC_POS); | |
7c2f891c SH |
536 | |
537 | /* disable hardware cursor */ | |
72330b0e JB |
538 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
539 | fbi->regs + LCDC_CPOS); | |
7c2f891c | 540 | |
72330b0e | 541 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
7c2f891c | 542 | |
f909ef64 SH |
543 | clk_enable(fbi->clk); |
544 | ||
66c8719b | 545 | if (fbi->backlight_power) |
7c2f891c | 546 | fbi->backlight_power(1); |
66c8719b | 547 | if (fbi->lcd_power) |
7c2f891c SH |
548 | fbi->lcd_power(1); |
549 | } | |
550 | ||
551 | static void imxfb_disable_controller(struct imxfb_info *fbi) | |
552 | { | |
553 | pr_debug("Disabling LCD controller\n"); | |
554 | ||
66c8719b | 555 | if (fbi->backlight_power) |
7c2f891c | 556 | fbi->backlight_power(0); |
66c8719b | 557 | if (fbi->lcd_power) |
7c2f891c SH |
558 | fbi->lcd_power(0); |
559 | ||
f909ef64 SH |
560 | clk_disable(fbi->clk); |
561 | ||
72330b0e | 562 | writel(0, fbi->regs + LCDC_RMCR); |
7c2f891c SH |
563 | } |
564 | ||
565 | static int imxfb_blank(int blank, struct fb_info *info) | |
566 | { | |
567 | struct imxfb_info *fbi = info->par; | |
568 | ||
569 | pr_debug("imxfb_blank: blank=%d\n", blank); | |
570 | ||
571 | switch (blank) { | |
572 | case FB_BLANK_POWERDOWN: | |
573 | case FB_BLANK_VSYNC_SUSPEND: | |
574 | case FB_BLANK_HSYNC_SUSPEND: | |
575 | case FB_BLANK_NORMAL: | |
576 | imxfb_disable_controller(fbi); | |
577 | break; | |
578 | ||
579 | case FB_BLANK_UNBLANK: | |
580 | imxfb_enable_controller(fbi); | |
581 | break; | |
582 | } | |
583 | return 0; | |
584 | } | |
585 | ||
586 | static struct fb_ops imxfb_ops = { | |
587 | .owner = THIS_MODULE, | |
588 | .fb_check_var = imxfb_check_var, | |
589 | .fb_set_par = imxfb_set_par, | |
590 | .fb_setcolreg = imxfb_setcolreg, | |
591 | .fb_fillrect = cfb_fillrect, | |
592 | .fb_copyarea = cfb_copyarea, | |
593 | .fb_imageblit = cfb_imageblit, | |
594 | .fb_blank = imxfb_blank, | |
7c2f891c SH |
595 | }; |
596 | ||
597 | /* | |
598 | * imxfb_activate_var(): | |
599 | * Configures LCD Controller based on entries in var parameter. Settings are | |
600 | * only written to the controller if changes were made. | |
601 | */ | |
602 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
603 | { | |
604 | struct imxfb_info *fbi = info->par; | |
f909ef64 | 605 | |
7c2f891c SH |
606 | pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", |
607 | var->xres, var->hsync_len, | |
608 | var->left_margin, var->right_margin); | |
609 | pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", | |
610 | var->yres, var->vsync_len, | |
611 | var->upper_margin, var->lower_margin); | |
612 | ||
613 | #if DEBUG_VAR | |
614 | if (var->xres < 16 || var->xres > 1024) | |
615 | printk(KERN_ERR "%s: invalid xres %d\n", | |
616 | info->fix.id, var->xres); | |
617 | if (var->hsync_len < 1 || var->hsync_len > 64) | |
618 | printk(KERN_ERR "%s: invalid hsync_len %d\n", | |
619 | info->fix.id, var->hsync_len); | |
620 | if (var->left_margin > 255) | |
621 | printk(KERN_ERR "%s: invalid left_margin %d\n", | |
622 | info->fix.id, var->left_margin); | |
623 | if (var->right_margin > 255) | |
624 | printk(KERN_ERR "%s: invalid right_margin %d\n", | |
625 | info->fix.id, var->right_margin); | |
626 | if (var->yres < 1 || var->yres > 511) | |
627 | printk(KERN_ERR "%s: invalid yres %d\n", | |
628 | info->fix.id, var->yres); | |
629 | if (var->vsync_len > 100) | |
630 | printk(KERN_ERR "%s: invalid vsync_len %d\n", | |
631 | info->fix.id, var->vsync_len); | |
632 | if (var->upper_margin > 63) | |
633 | printk(KERN_ERR "%s: invalid upper_margin %d\n", | |
634 | info->fix.id, var->upper_margin); | |
635 | if (var->lower_margin > 255) | |
636 | printk(KERN_ERR "%s: invalid lower_margin %d\n", | |
637 | info->fix.id, var->lower_margin); | |
638 | #endif | |
639 | ||
343684ff SH |
640 | /* physical screen start address */ |
641 | writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4), | |
642 | fbi->regs + LCDC_VPW); | |
643 | ||
7e8549bc SH |
644 | writel(HCR_H_WIDTH(var->hsync_len - 1) | |
645 | HCR_H_WAIT_1(var->right_margin - 1) | | |
646 | HCR_H_WAIT_2(var->left_margin - 3), | |
72330b0e | 647 | fbi->regs + LCDC_HCR); |
7c2f891c | 648 | |
72330b0e | 649 | writel(VCR_V_WIDTH(var->vsync_len) | |
d6ed5755 SH |
650 | VCR_V_WAIT_1(var->lower_margin) | |
651 | VCR_V_WAIT_2(var->upper_margin), | |
72330b0e | 652 | fbi->regs + LCDC_VCR); |
7c2f891c | 653 | |
72330b0e JB |
654 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
655 | fbi->regs + LCDC_SIZE); | |
f909ef64 | 656 | |
343684ff | 657 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
81ef8061 EB |
658 | #ifndef PWMR_BACKLIGHT_AVAILABLE |
659 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
660 | #endif | |
72330b0e JB |
661 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
662 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | |
7c2f891c SH |
663 | |
664 | return 0; | |
665 | } | |
666 | ||
7c2f891c SH |
667 | #ifdef CONFIG_PM |
668 | /* | |
669 | * Power management hooks. Note that we won't be called from IRQ context, | |
670 | * unlike the blank functions above, so we may sleep. | |
671 | */ | |
3ae5eaec | 672 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
7c2f891c | 673 | { |
1ec56203 UKK |
674 | struct fb_info *info = platform_get_drvdata(dev); |
675 | struct imxfb_info *fbi = info->par; | |
66c8719b SH |
676 | |
677 | pr_debug("%s\n", __func__); | |
7c2f891c | 678 | |
9480e307 | 679 | imxfb_disable_controller(fbi); |
7c2f891c SH |
680 | return 0; |
681 | } | |
682 | ||
3ae5eaec | 683 | static int imxfb_resume(struct platform_device *dev) |
7c2f891c | 684 | { |
1ec56203 UKK |
685 | struct fb_info *info = platform_get_drvdata(dev); |
686 | struct imxfb_info *fbi = info->par; | |
66c8719b SH |
687 | |
688 | pr_debug("%s\n", __func__); | |
7c2f891c | 689 | |
9480e307 | 690 | imxfb_enable_controller(fbi); |
7c2f891c SH |
691 | return 0; |
692 | } | |
693 | #else | |
694 | #define imxfb_suspend NULL | |
695 | #define imxfb_resume NULL | |
696 | #endif | |
697 | ||
72330b0e | 698 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
7c2f891c | 699 | { |
27889273 | 700 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
72330b0e | 701 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
7c2f891c | 702 | struct imxfb_info *fbi = info->par; |
343684ff SH |
703 | struct imx_fb_videomode *m; |
704 | int i; | |
7c2f891c | 705 | |
5ae12170 | 706 | pr_debug("%s\n",__func__); |
7c2f891c | 707 | |
66c8719b | 708 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
7c2f891c SH |
709 | if (!info->pseudo_palette) |
710 | return -ENOMEM; | |
711 | ||
712 | memset(fbi, 0, sizeof(struct imxfb_info)); | |
7c2f891c SH |
713 | |
714 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | |
715 | ||
66c8719b | 716 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
7c2f891c SH |
717 | info->fix.type_aux = 0; |
718 | info->fix.xpanstep = 0; | |
719 | info->fix.ypanstep = 0; | |
720 | info->fix.ywrapstep = 0; | |
66c8719b | 721 | info->fix.accel = FB_ACCEL_NONE; |
7c2f891c SH |
722 | |
723 | info->var.nonstd = 0; | |
724 | info->var.activate = FB_ACTIVATE_NOW; | |
725 | info->var.height = -1; | |
726 | info->var.width = -1; | |
727 | info->var.accel_flags = 0; | |
66c8719b | 728 | info->var.vmode = FB_VMODE_NONINTERLACED; |
7c2f891c SH |
729 | |
730 | info->fbops = &imxfb_ops; | |
66c8719b SH |
731 | info->flags = FBINFO_FLAG_DEFAULT | |
732 | FBINFO_READS_FAST; | |
27889273 SH |
733 | info->var.grayscale = pdata->cmap_greyscale; |
734 | fbi->cmap_inverse = pdata->cmap_inverse; | |
735 | fbi->cmap_static = pdata->cmap_static; | |
27889273 SH |
736 | fbi->lscr1 = pdata->lscr1; |
737 | fbi->dmacr = pdata->dmacr; | |
738 | fbi->pwmr = pdata->pwmr; | |
739 | fbi->lcd_power = pdata->lcd_power; | |
740 | fbi->backlight_power = pdata->backlight_power; | |
343684ff SH |
741 | |
742 | for (i = 0, m = &pdata->mode[0]; i < pdata->num_modes; i++, m++) | |
743 | info->fix.smem_len = max_t(size_t, info->fix.smem_len, | |
744 | m->mode.xres * m->mode.yres * m->bpp / 8); | |
7c2f891c SH |
745 | |
746 | return 0; | |
747 | } | |
748 | ||
3ae5eaec | 749 | static int __init imxfb_probe(struct platform_device *pdev) |
7c2f891c | 750 | { |
7c2f891c SH |
751 | struct imxfb_info *fbi; |
752 | struct fb_info *info; | |
27889273 | 753 | struct imx_fb_platform_data *pdata; |
7c2f891c | 754 | struct resource *res; |
343684ff | 755 | int ret, i; |
7c2f891c | 756 | |
d6b51502 | 757 | dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); |
7c2f891c SH |
758 | |
759 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
66c8719b | 760 | if (!res) |
7c2f891c SH |
761 | return -ENODEV; |
762 | ||
27889273 SH |
763 | pdata = pdev->dev.platform_data; |
764 | if (!pdata) { | |
f99c8929 | 765 | dev_err(&pdev->dev,"No platform_data available\n"); |
7c2f891c SH |
766 | return -ENOMEM; |
767 | } | |
768 | ||
3ae5eaec | 769 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
66c8719b | 770 | if (!info) |
7c2f891c SH |
771 | return -ENOMEM; |
772 | ||
773 | fbi = info->par; | |
774 | ||
343684ff SH |
775 | if (!fb_mode) |
776 | fb_mode = pdata->mode[0].mode.name; | |
777 | ||
3ae5eaec | 778 | platform_set_drvdata(pdev, info); |
7c2f891c | 779 | |
72330b0e | 780 | ret = imxfb_init_fbinfo(pdev); |
66c8719b | 781 | if (ret < 0) |
7c2f891c SH |
782 | goto failed_init; |
783 | ||
72330b0e JB |
784 | res = request_mem_region(res->start, resource_size(res), |
785 | DRIVER_NAME); | |
7c2f891c SH |
786 | if (!res) { |
787 | ret = -EBUSY; | |
72330b0e JB |
788 | goto failed_req; |
789 | } | |
790 | ||
f909ef64 SH |
791 | fbi->clk = clk_get(&pdev->dev, NULL); |
792 | if (IS_ERR(fbi->clk)) { | |
a419aef8 | 793 | ret = PTR_ERR(fbi->clk); |
f909ef64 SH |
794 | dev_err(&pdev->dev, "unable to get clock: %d\n", ret); |
795 | goto failed_getclock; | |
796 | } | |
797 | ||
72330b0e JB |
798 | fbi->regs = ioremap(res->start, resource_size(res)); |
799 | if (fbi->regs == NULL) { | |
d6b51502 | 800 | dev_err(&pdev->dev, "Cannot map frame buffer registers\n"); |
72330b0e | 801 | goto failed_ioremap; |
7c2f891c SH |
802 | } |
803 | ||
27889273 | 804 | if (!pdata->fixed_screen_cpu) { |
72330b0e JB |
805 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
806 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, | |
807 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | |
808 | ||
809 | if (!fbi->map_cpu) { | |
f99c8929 | 810 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
7c2f891c SH |
811 | ret = -ENOMEM; |
812 | goto failed_map; | |
813 | } | |
72330b0e JB |
814 | |
815 | info->screen_base = fbi->map_cpu; | |
816 | fbi->screen_cpu = fbi->map_cpu; | |
817 | fbi->screen_dma = fbi->map_dma; | |
818 | info->fix.smem_start = fbi->screen_dma; | |
7c2f891c SH |
819 | } else { |
820 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | |
27889273 SH |
821 | fbi->map_cpu = pdata->fixed_screen_cpu; |
822 | fbi->map_dma = pdata->fixed_screen_dma; | |
7c2f891c SH |
823 | info->screen_base = fbi->map_cpu; |
824 | fbi->screen_cpu = fbi->map_cpu; | |
825 | fbi->screen_dma = fbi->map_dma; | |
826 | info->fix.smem_start = fbi->screen_dma; | |
827 | } | |
828 | ||
c0b90a31 SH |
829 | if (pdata->init) { |
830 | ret = pdata->init(fbi->pdev); | |
831 | if (ret) | |
832 | goto failed_platform_init; | |
833 | } | |
834 | ||
343684ff SH |
835 | fbi->mode = pdata->mode; |
836 | fbi->num_modes = pdata->num_modes; | |
837 | ||
838 | INIT_LIST_HEAD(&info->modelist); | |
839 | for (i = 0; i < pdata->num_modes; i++) | |
840 | fb_add_videomode(&pdata->mode[i].mode, &info->modelist); | |
841 | ||
7c2f891c SH |
842 | /* |
843 | * This makes sure that our colour bitfield | |
844 | * descriptors are correctly initialised. | |
845 | */ | |
846 | imxfb_check_var(&info->var, info); | |
847 | ||
66c8719b | 848 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
7c2f891c SH |
849 | if (ret < 0) |
850 | goto failed_cmap; | |
851 | ||
7c2f891c SH |
852 | imxfb_set_par(info); |
853 | ret = register_framebuffer(info); | |
854 | if (ret < 0) { | |
f99c8929 | 855 | dev_err(&pdev->dev, "failed to register framebuffer\n"); |
7c2f891c SH |
856 | goto failed_register; |
857 | } | |
858 | ||
859 | imxfb_enable_controller(fbi); | |
7a2bb23c | 860 | fbi->pdev = pdev; |
81ef8061 | 861 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 862 | imxfb_init_backlight(fbi); |
81ef8061 | 863 | #endif |
7c2f891c SH |
864 | |
865 | return 0; | |
866 | ||
867 | failed_register: | |
868 | fb_dealloc_cmap(&info->cmap); | |
869 | failed_cmap: | |
c0b90a31 SH |
870 | if (pdata->exit) |
871 | pdata->exit(fbi->pdev); | |
872 | failed_platform_init: | |
27889273 | 873 | if (!pdata->fixed_screen_cpu) |
3ae5eaec | 874 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
72330b0e | 875 | fbi->map_dma); |
7c2f891c | 876 | failed_map: |
f909ef64 SH |
877 | clk_put(fbi->clk); |
878 | failed_getclock: | |
72330b0e JB |
879 | iounmap(fbi->regs); |
880 | failed_ioremap: | |
d6b51502 | 881 | release_mem_region(res->start, resource_size(res)); |
72330b0e JB |
882 | failed_req: |
883 | kfree(info->pseudo_palette); | |
7c2f891c | 884 | failed_init: |
3ae5eaec | 885 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
886 | framebuffer_release(info); |
887 | return ret; | |
888 | } | |
889 | ||
72330b0e | 890 | static int __devexit imxfb_remove(struct platform_device *pdev) |
7c2f891c | 891 | { |
c0b90a31 | 892 | struct imx_fb_platform_data *pdata; |
3ae5eaec | 893 | struct fb_info *info = platform_get_drvdata(pdev); |
772a9e63 | 894 | struct imxfb_info *fbi = info->par; |
7c2f891c SH |
895 | struct resource *res; |
896 | ||
897 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
898 | ||
772a9e63 | 899 | imxfb_disable_controller(fbi); |
7c2f891c | 900 | |
81ef8061 | 901 | #ifdef PWMR_BACKLIGHT_AVAILABLE |
7a2bb23c | 902 | imxfb_exit_backlight(fbi); |
81ef8061 | 903 | #endif |
7c2f891c SH |
904 | unregister_framebuffer(info); |
905 | ||
c0b90a31 SH |
906 | pdata = pdev->dev.platform_data; |
907 | if (pdata->exit) | |
908 | pdata->exit(fbi->pdev); | |
909 | ||
7c2f891c SH |
910 | fb_dealloc_cmap(&info->cmap); |
911 | kfree(info->pseudo_palette); | |
912 | framebuffer_release(info); | |
913 | ||
72330b0e | 914 | iounmap(fbi->regs); |
d6b51502 | 915 | release_mem_region(res->start, resource_size(res)); |
f909ef64 SH |
916 | clk_disable(fbi->clk); |
917 | clk_put(fbi->clk); | |
918 | ||
3ae5eaec | 919 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
920 | |
921 | return 0; | |
922 | } | |
923 | ||
3ae5eaec | 924 | void imxfb_shutdown(struct platform_device * dev) |
7c2f891c | 925 | { |
3ae5eaec | 926 | struct fb_info *info = platform_get_drvdata(dev); |
772a9e63 SH |
927 | struct imxfb_info *fbi = info->par; |
928 | imxfb_disable_controller(fbi); | |
7c2f891c SH |
929 | } |
930 | ||
3ae5eaec | 931 | static struct platform_driver imxfb_driver = { |
7c2f891c SH |
932 | .suspend = imxfb_suspend, |
933 | .resume = imxfb_resume, | |
72330b0e | 934 | .remove = __devexit_p(imxfb_remove), |
7c2f891c | 935 | .shutdown = imxfb_shutdown, |
3ae5eaec | 936 | .driver = { |
72330b0e | 937 | .name = DRIVER_NAME, |
3ae5eaec | 938 | }, |
7c2f891c SH |
939 | }; |
940 | ||
343684ff SH |
941 | static int imxfb_setup(void) |
942 | { | |
943 | #ifndef MODULE | |
944 | char *opt, *options = NULL; | |
945 | ||
946 | if (fb_get_options("imxfb", &options)) | |
947 | return -ENODEV; | |
948 | ||
949 | if (!options || !*options) | |
950 | return 0; | |
951 | ||
952 | while ((opt = strsep(&options, ",")) != NULL) { | |
953 | if (!*opt) | |
954 | continue; | |
955 | else | |
956 | fb_mode = opt; | |
957 | } | |
958 | #endif | |
959 | return 0; | |
960 | } | |
961 | ||
7c2f891c SH |
962 | int __init imxfb_init(void) |
963 | { | |
343684ff SH |
964 | int ret = imxfb_setup(); |
965 | ||
966 | if (ret < 0) | |
967 | return ret; | |
968 | ||
72330b0e | 969 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
7c2f891c SH |
970 | } |
971 | ||
972 | static void __exit imxfb_cleanup(void) | |
973 | { | |
3ae5eaec | 974 | platform_driver_unregister(&imxfb_driver); |
7c2f891c SH |
975 | } |
976 | ||
977 | module_init(imxfb_init); | |
978 | module_exit(imxfb_cleanup); | |
979 | ||
980 | MODULE_DESCRIPTION("Motorola i.MX framebuffer driver"); | |
981 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | |
982 | MODULE_LICENSE("GPL"); |