blacklight: remove redundant spi driver bus initialization
[deliverable/linux.git] / drivers / video / matrox / matroxfb_base.c
CommitLineData
1da177e4
LT
1/*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
beb7dd86 96 * were used when writing this driver)
1da177e4
LT
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
1da177e4
LT
102#include <linux/version.h>
103
104#include "matroxfb_base.h"
105#include "matroxfb_misc.h"
106#include "matroxfb_accel.h"
107#include "matroxfb_DAC1064.h"
108#include "matroxfb_Ti3026.h"
109#include "matroxfb_maven.h"
110#include "matroxfb_crtc2.h"
111#include "matroxfb_g450.h"
112#include <linux/matroxfb.h>
113#include <linux/interrupt.h>
5a0e3ad6 114#include <linux/slab.h>
84902b7a 115#include <linux/uaccess.h>
1da177e4
LT
116
117#ifdef CONFIG_PPC_PMAC
e8222502 118#include <asm/machdep.h>
1da177e4
LT
119unsigned char nvram_read_byte(int);
120static int default_vmode = VMODE_NVRAM;
121static int default_cmode = CMODE_NVRAM;
122#endif
123
124static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
125
126/* --------------------------------------------------------------------- */
127
128/*
129 * card parameters
130 */
131
132/* --------------------------------------------------------------------- */
133
134static struct fb_var_screeninfo vesafb_defined = {
135 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
136 0,0, /* virtual -> visible no offset */
137 8, /* depth -> load bits_per_pixel */
138 0, /* greyscale ? */
139 {0,0,0}, /* R */
140 {0,0,0}, /* G */
141 {0,0,0}, /* B */
142 {0,0,0}, /* transparency */
143 0, /* standard pixel format */
144 FB_ACTIVATE_NOW,
145 -1,-1,
146 FB_ACCELF_TEXT, /* accel flags */
147 39721L,48L,16L,33L,10L,
148 96L,2L,~0, /* No sync info */
149 FB_VMODE_NONINTERLACED,
1da177e4
LT
150};
151
152
153
154/* --------------------------------------------------------------------- */
316b4d64
JD
155static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
156{
fc2d10dd 157 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
1da177e4
LT
158
159 /* Make sure that displays are compatible */
fc2d10dd
JD
160 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
161 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
162 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
a50d913f 163 ) {
fc2d10dd 164 switch (minfo->fbcon.var.bits_per_pixel) {
1da177e4
LT
165 case 16:
166 case 32:
167 pos = pos * 8;
168 if (info->interlaced) {
169 mga_outl(0x3C2C, pos);
fc2d10dd 170 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
1da177e4
LT
171 } else {
172 mga_outl(0x3C28, pos);
173 }
174 break;
175 }
176 }
177}
178
316b4d64
JD
179static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
180{
fc2d10dd 181 if (minfo->crtc1.panpos >= 0) {
1da177e4
LT
182 unsigned long flags;
183 int panpos;
184
185 matroxfb_DAC_lock_irqsave(flags);
fc2d10dd 186 panpos = minfo->crtc1.panpos;
1da177e4
LT
187 if (panpos >= 0) {
188 unsigned int extvga_reg;
189
fc2d10dd 190 minfo->crtc1.panpos = -1; /* No update pending anymore */
1da177e4
LT
191 extvga_reg = mga_inb(M_EXTVGA_INDEX);
192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
193 if (extvga_reg != 0x00) {
194 mga_outb(M_EXTVGA_INDEX, extvga_reg);
195 }
196 }
197 matroxfb_DAC_unlock_irqrestore(flags);
198 }
199}
200
7d12e780 201static irqreturn_t matrox_irq(int irq, void *dev_id)
1da177e4
LT
202{
203 u_int32_t status;
204 int handled = 0;
ee5a2749 205 struct matrox_fb_info *minfo = dev_id;
1da177e4
LT
206
207 status = mga_inl(M_STATUS);
208
209 if (status & 0x20) {
210 mga_outl(M_ICLEAR, 0x20);
fc2d10dd 211 minfo->crtc1.vsync.cnt++;
316b4d64 212 matroxfb_crtc1_panpos(minfo);
fc2d10dd 213 wake_up_interruptible(&minfo->crtc1.vsync.wait);
1da177e4
LT
214 handled = 1;
215 }
216 if (status & 0x200) {
217 mga_outl(M_ICLEAR, 0x200);
fc2d10dd
JD
218 minfo->crtc2.vsync.cnt++;
219 wake_up_interruptible(&minfo->crtc2.vsync.wait);
1da177e4
LT
220 handled = 1;
221 }
222 return IRQ_RETVAL(handled);
223}
224
316b4d64
JD
225int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
226{
1da177e4 227 u_int32_t bm;
a50d913f 228
fc2d10dd 229 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
1da177e4
LT
230 bm = 0x220;
231 else
232 bm = 0x020;
233
fc2d10dd
JD
234 if (!test_and_set_bit(0, &minfo->irq_flags)) {
235 if (request_irq(minfo->pcidev->irq, matrox_irq,
236 IRQF_SHARED, "matroxfb", minfo)) {
237 clear_bit(0, &minfo->irq_flags);
1da177e4
LT
238 return -EINVAL;
239 }
240 /* Clear any pending field interrupts */
241 mga_outl(M_ICLEAR, bm);
242 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
243 } else if (reenable) {
244 u_int32_t ien;
a50d913f 245
1da177e4
LT
246 ien = mga_inl(M_IEN);
247 if ((ien & bm) != bm) {
248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
249 mga_outl(M_IEN, ien | bm);
250 }
251 }
252 return 0;
253}
254
316b4d64
JD
255static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
256{
fc2d10dd 257 if (test_and_clear_bit(0, &minfo->irq_flags)) {
1da177e4 258 /* Flush pending pan-at-vbl request... */
316b4d64 259 matroxfb_crtc1_panpos(minfo);
fc2d10dd 260 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
1da177e4
LT
261 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
262 else
263 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
fc2d10dd 264 free_irq(minfo->pcidev->irq, minfo);
1da177e4
LT
265 }
266}
267
316b4d64
JD
268int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
269{
1da177e4
LT
270 struct matrox_vsync *vs;
271 unsigned int cnt;
272 int ret;
273
274 switch (crtc) {
275 case 0:
fc2d10dd 276 vs = &minfo->crtc1.vsync;
1da177e4
LT
277 break;
278 case 1:
fc2d10dd 279 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
1da177e4
LT
280 return -ENODEV;
281 }
fc2d10dd 282 vs = &minfo->crtc2.vsync;
1da177e4
LT
283 break;
284 default:
285 return -ENODEV;
286 }
316b4d64 287 ret = matroxfb_enable_irq(minfo, 0);
1da177e4
LT
288 if (ret) {
289 return ret;
290 }
1da177e4
LT
291
292 cnt = vs->cnt;
293 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
294 if (ret < 0) {
295 return ret;
296 }
297 if (ret == 0) {
316b4d64 298 matroxfb_enable_irq(minfo, 1);
1da177e4
LT
299 return -ETIMEDOUT;
300 }
301 return 0;
302}
303
304/* --------------------------------------------------------------------- */
305
316b4d64
JD
306static void matrox_pan_var(struct matrox_fb_info *minfo,
307 struct fb_var_screeninfo *var)
308{
1da177e4
LT
309 unsigned int pos;
310 unsigned short p0, p1, p2;
1da177e4 311 unsigned int p3;
1da177e4
LT
312 int vbl;
313 unsigned long flags;
314
315 CRITFLAGS
316
5ae12170 317 DBG(__func__)
1da177e4 318
fc2d10dd 319 if (minfo->dead)
1da177e4
LT
320 return;
321
fc2d10dd
JD
322 minfo->fbcon.var.xoffset = var->xoffset;
323 minfo->fbcon.var.yoffset = var->yoffset;
324 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
325 pos += minfo->curr.ydstorg.chunks;
326 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
327 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
328 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
fc2d10dd 329 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
1da177e4
LT
330
331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
316b4d64 332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
1da177e4
LT
333
334 CRITBEGIN
335
336 matroxfb_DAC_lock_irqsave(flags);
337 mga_setr(M_CRTC_INDEX, 0x0D, p0);
338 mga_setr(M_CRTC_INDEX, 0x0C, p1);
fc2d10dd 339 if (minfo->devflags.support32MB)
1da177e4 340 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
1da177e4 341 if (vbl) {
fc2d10dd 342 minfo->crtc1.panpos = p2;
1da177e4
LT
343 } else {
344 /* Abort any pending change */
fc2d10dd 345 minfo->crtc1.panpos = -1;
1da177e4
LT
346 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
347 }
348 matroxfb_DAC_unlock_irqrestore(flags);
a50d913f 349
316b4d64 350 update_crtc2(minfo, pos);
1da177e4
LT
351
352 CRITEND
353}
354
316b4d64
JD
355static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
356{
1da177e4
LT
357 /* Currently we are holding big kernel lock on all dead & usecount updates.
358 * Destroy everything after all users release it. Especially do not unregister
359 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
360 * for device unplugged when in use.
361 * In future we should point mmio.vbase & video.vbase somewhere where we can
362 * write data without causing too much damage...
363 */
364
fc2d10dd
JD
365 minfo->dead = 1;
366 if (minfo->usecount) {
1da177e4
LT
367 /* destroy it later */
368 return;
369 }
fc2d10dd
JD
370 matroxfb_unregister_device(minfo);
371 unregister_framebuffer(&minfo->fbcon);
316b4d64 372 matroxfb_g450_shutdown(minfo);
1da177e4 373#ifdef CONFIG_MTRR
fc2d10dd
JD
374 if (minfo->mtrr.vram_valid)
375 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
1da177e4 376#endif
fc2d10dd
JD
377 mga_iounmap(minfo->mmio.vbase);
378 mga_iounmap(minfo->video.vbase);
379 release_mem_region(minfo->video.base, minfo->video.len_maximum);
380 release_mem_region(minfo->mmio.base, 16384);
1da177e4 381 kfree(minfo);
1da177e4
LT
382}
383
384 /*
385 * Open/Release the frame buffer device
386 */
387
388static int matroxfb_open(struct fb_info *info, int user)
389{
ee5a2749 390 struct matrox_fb_info *minfo = info2minfo(info);
a50d913f 391
5ae12170 392 DBG_LOOP(__func__)
1da177e4 393
fc2d10dd 394 if (minfo->dead) {
1da177e4
LT
395 return -ENXIO;
396 }
fc2d10dd 397 minfo->usecount++;
1da177e4 398 if (user) {
fc2d10dd 399 minfo->userusecount++;
1da177e4
LT
400 }
401 return(0);
402}
403
404static int matroxfb_release(struct fb_info *info, int user)
405{
ee5a2749 406 struct matrox_fb_info *minfo = info2minfo(info);
a50d913f 407
5ae12170 408 DBG_LOOP(__func__)
1da177e4
LT
409
410 if (user) {
fc2d10dd 411 if (0 == --minfo->userusecount) {
316b4d64 412 matroxfb_disable_irq(minfo);
1da177e4
LT
413 }
414 }
fc2d10dd 415 if (!(--minfo->usecount) && minfo->dead) {
316b4d64 416 matroxfb_remove(minfo, 0);
1da177e4
LT
417 }
418 return(0);
419}
420
421static int matroxfb_pan_display(struct fb_var_screeninfo *var,
422 struct fb_info* info) {
ee5a2749 423 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 424
5ae12170 425 DBG(__func__)
1da177e4 426
316b4d64 427 matrox_pan_var(minfo, var);
1da177e4
LT
428 return 0;
429}
430
316b4d64
JD
431static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
432 int bpp)
433{
1da177e4
LT
434 int bppshft2;
435
5ae12170 436 DBG(__func__)
1da177e4
LT
437
438 bppshft2 = bpp;
439 if (!bppshft2) {
440 return 8;
441 }
fc2d10dd 442 if (isInterleave(minfo))
1da177e4 443 bppshft2 >>= 1;
fc2d10dd 444 if (minfo->devflags.video64bits)
1da177e4
LT
445 bppshft2 >>= 1;
446 return bppshft2;
447}
448
316b4d64
JD
449static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
450 int xres, int bpp)
451{
1da177e4
LT
452 int over;
453 int rounding;
454
5ae12170 455 DBG(__func__)
1da177e4
LT
456
457 switch (bpp) {
458 case 0: return xres;
459 case 4: rounding = 128;
460 break;
461 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
462 break;
463 case 16: rounding = 32;
464 break;
465 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
466 break;
467 default: rounding = 16;
468 /* on G400, 16 really does not work */
fc2d10dd 469 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
1da177e4
LT
470 rounding = 32;
471 break;
472 }
fc2d10dd 473 if (isInterleave(minfo)) {
1da177e4
LT
474 rounding *= 2;
475 }
476 over = xres % rounding;
477 if (over)
478 xres += rounding-over;
479 return xres;
480}
481
316b4d64
JD
482static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
483 int bpp)
484{
1da177e4
LT
485 const int* width;
486 int xres_new;
487
5ae12170 488 DBG(__func__)
1da177e4
LT
489
490 if (!bpp) return xres;
491
fc2d10dd 492 width = minfo->capable.vxres;
1da177e4 493
fc2d10dd 494 if (minfo->devflags.precise_width) {
1da177e4 495 while (*width) {
316b4d64 496 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
1da177e4
LT
497 break;
498 }
499 width++;
500 }
501 xres_new = *width;
502 } else {
316b4d64 503 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
1da177e4 504 }
1da177e4
LT
505 return xres_new;
506}
507
508static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
509
5ae12170 510 DBG(__func__)
1da177e4
LT
511
512 switch (var->bits_per_pixel) {
513 case 4:
514 return 16; /* pseudocolor... 16 entries HW palette */
515 case 8:
516 return 256; /* pseudocolor... 256 entries HW palette */
517 case 16:
518 return 16; /* directcolor... 16 entries SW palette */
519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
520 case 24:
521 return 16; /* directcolor... 16 entries SW palette */
522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 case 32:
524 return 16; /* directcolor... 16 entries SW palette */
525 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
526 }
527 return 16; /* return something reasonable... or panic()? */
528}
529
316b4d64
JD
530static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
531 struct fb_var_screeninfo *var, int *visual,
532 int *video_cmap_len, unsigned int* ydstorg)
533{
1da177e4
LT
534 struct RGBT {
535 unsigned char bpp;
536 struct {
537 unsigned char offset,
538 length;
539 } red,
540 green,
541 blue,
542 transp;
543 signed char visual;
544 };
545 static const struct RGBT table[]= {
546 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
547 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
548 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
549 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
550 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
551 };
552 struct RGBT const *rgbt;
553 unsigned int bpp = var->bits_per_pixel;
554 unsigned int vramlen;
555 unsigned int memlen;
556
5ae12170 557 DBG(__func__)
1da177e4
LT
558
559 switch (bpp) {
fc2d10dd 560 case 4: if (!minfo->capable.cfb4) return -EINVAL;
1da177e4
LT
561 break;
562 case 8: break;
563 case 16: break;
564 case 24: break;
565 case 32: break;
566 default: return -EINVAL;
567 }
568 *ydstorg = 0;
fc2d10dd 569 vramlen = minfo->video.len_usable;
1da177e4
LT
570 if (var->yres_virtual < var->yres)
571 var->yres_virtual = var->yres;
572 if (var->xres_virtual < var->xres)
573 var->xres_virtual = var->xres;
574
316b4d64 575 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
1da177e4
LT
576 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
577 if (memlen > vramlen) {
578 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
579 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
580 }
581 /* There is hardware bug that no line can cross 4MB boundary */
582 /* give up for CFB24, it is impossible to easy workaround it */
583 /* for other try to do something */
fc2d10dd 584 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
1da177e4
LT
585 if (bpp == 24) {
586 /* sorry */
587 } else {
588 unsigned int linelen;
589 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
590 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
591 unsigned int max_yres;
592
593 while (m1) {
594 int t;
595
596 while (m2 >= m1) m2 -= m1;
597 t = m1;
598 m1 = m2;
599 m2 = t;
600 }
601 m2 = linelen * PAGE_SIZE / m2;
602 *ydstorg = m2 = 0x400000 % m2;
603 max_yres = (vramlen - m2) / linelen;
604 if (var->yres_virtual > max_yres)
605 var->yres_virtual = max_yres;
606 }
607 }
608 /* YDSTLEN contains only signed 16bit value */
609 if (var->yres_virtual > 32767)
610 var->yres_virtual = 32767;
611 /* we must round yres/xres down, we already rounded y/xres_virtual up
612 if it was possible. We should return -EINVAL, but I disagree */
613 if (var->yres_virtual < var->yres)
614 var->yres = var->yres_virtual;
615 if (var->xres_virtual < var->xres)
616 var->xres = var->xres_virtual;
617 if (var->xoffset + var->xres > var->xres_virtual)
618 var->xoffset = var->xres_virtual - var->xres;
619 if (var->yoffset + var->yres > var->yres_virtual)
620 var->yoffset = var->yres_virtual - var->yres;
621
622 if (bpp == 16 && var->green.length == 5) {
25985edc 623 bpp--; /* an artificial value - 15 */
1da177e4
LT
624 }
625
626 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
627#define SETCLR(clr)\
628 var->clr.offset = rgbt->clr.offset;\
629 var->clr.length = rgbt->clr.length
630 SETCLR(red);
631 SETCLR(green);
632 SETCLR(blue);
633 SETCLR(transp);
634#undef SETCLR
635 *visual = rgbt->visual;
636
637 if (bpp > 8)
638 dprintk("matroxfb: truecolor: "
639 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
640 var->transp.length, var->red.length, var->green.length, var->blue.length,
641 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
642
643 *video_cmap_len = matroxfb_get_cmap_len(var);
644 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
645 var->xres_virtual, var->yres_virtual);
646 return 0;
647}
648
649static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
650 unsigned blue, unsigned transp,
651 struct fb_info *fb_info)
652{
1da177e4 653 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
1da177e4 654
5ae12170 655 DBG(__func__)
1da177e4
LT
656
657 /*
658 * Set a single color register. The values supplied are
659 * already rounded down to the hardware's capabilities
660 * (according to the entries in the `var' structure). Return
661 * != 0 for invalid regno.
662 */
663
fc2d10dd 664 if (regno >= minfo->curr.cmap_len)
1da177e4
LT
665 return 1;
666
fc2d10dd 667 if (minfo->fbcon.var.grayscale) {
1da177e4
LT
668 /* gray = 0.30*R + 0.59*G + 0.11*B */
669 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
670 }
671
fc2d10dd
JD
672 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
673 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
674 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
675 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
1da177e4 676
fc2d10dd 677 switch (minfo->fbcon.var.bits_per_pixel) {
1da177e4
LT
678 case 4:
679 case 8:
680 mga_outb(M_DAC_REG, regno);
681 mga_outb(M_DAC_VAL, red);
682 mga_outb(M_DAC_VAL, green);
683 mga_outb(M_DAC_VAL, blue);
684 break;
685 case 16:
08a498de
AD
686 if (regno >= 16)
687 break;
1da177e4
LT
688 {
689 u_int16_t col =
fc2d10dd
JD
690 (red << minfo->fbcon.var.red.offset) |
691 (green << minfo->fbcon.var.green.offset) |
692 (blue << minfo->fbcon.var.blue.offset) |
693 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
694 minfo->cmap[regno] = col | (col << 16);
1da177e4
LT
695 }
696 break;
697 case 24:
698 case 32:
08a498de
AD
699 if (regno >= 16)
700 break;
fc2d10dd
JD
701 minfo->cmap[regno] =
702 (red << minfo->fbcon.var.red.offset) |
703 (green << minfo->fbcon.var.green.offset) |
704 (blue << minfo->fbcon.var.blue.offset) |
705 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
1da177e4
LT
706 break;
707 }
708 return 0;
709}
710
316b4d64 711static void matroxfb_init_fix(struct matrox_fb_info *minfo)
1da177e4 712{
fc2d10dd 713 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
5ae12170 714 DBG(__func__)
1da177e4
LT
715
716 strcpy(fix->id,"MATROX");
717
718 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
719 fix->ypanstep = 1;
720 fix->ywrapstep = 0;
fc2d10dd
JD
721 fix->mmio_start = minfo->mmio.base;
722 fix->mmio_len = minfo->mmio.len;
723 fix->accel = minfo->devflags.accelerator;
1da177e4
LT
724}
725
316b4d64 726static void matroxfb_update_fix(struct matrox_fb_info *minfo)
1da177e4 727{
fc2d10dd 728 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
5ae12170 729 DBG(__func__)
1da177e4 730
fc2d10dd
JD
731 mutex_lock(&minfo->fbcon.mm_lock);
732 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
733 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
734 mutex_unlock(&minfo->fbcon.mm_lock);
1da177e4
LT
735}
736
737static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
738{
739 int err;
740 int visual;
741 int cmap_len;
742 unsigned int ydstorg;
ee5a2749 743 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 744
fc2d10dd 745 if (minfo->dead) {
1da177e4
LT
746 return -ENXIO;
747 }
316b4d64 748 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
1da177e4
LT
749 return err;
750 return 0;
751}
752
753static int matroxfb_set_par(struct fb_info *info)
754{
755 int err;
756 int visual;
757 int cmap_len;
758 unsigned int ydstorg;
759 struct fb_var_screeninfo *var;
ee5a2749 760 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 761
5ae12170 762 DBG(__func__)
1da177e4 763
fc2d10dd 764 if (minfo->dead) {
1da177e4
LT
765 return -ENXIO;
766 }
767
768 var = &info->var;
316b4d64 769 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
1da177e4 770 return err;
fc2d10dd 771 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
316b4d64 772 matroxfb_update_fix(minfo);
fc2d10dd
JD
773 minfo->fbcon.fix.visual = visual;
774 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
775 minfo->fbcon.fix.type_aux = 0;
776 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
1da177e4
LT
777 {
778 unsigned int pos;
779
fc2d10dd
JD
780 minfo->curr.cmap_len = cmap_len;
781 ydstorg += minfo->devflags.ydstorg;
782 minfo->curr.ydstorg.bytes = ydstorg;
783 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
1da177e4 784 if (var->bits_per_pixel == 4)
fc2d10dd 785 minfo->curr.ydstorg.pixels = ydstorg;
1da177e4 786 else
fc2d10dd 787 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
316b4d64 788 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
1da177e4
LT
789 { struct my_timming mt;
790 struct matrox_hw_state* hw;
791 int out;
792
793 matroxfb_var2my(var, &mt);
794 mt.crtc = MATROXFB_SRC_CRTC1;
795 /* CRTC1 delays */
796 switch (var->bits_per_pixel) {
797 case 0: mt.delay = 31 + 0; break;
798 case 16: mt.delay = 21 + 8; break;
799 case 24: mt.delay = 17 + 8; break;
800 case 32: mt.delay = 16 + 8; break;
801 default: mt.delay = 31 + 8; break;
802 }
803
fc2d10dd 804 hw = &minfo->hw;
1da177e4 805
fc2d10dd 806 down_read(&minfo->altout.lock);
1da177e4 807 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
fc2d10dd
JD
808 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
809 minfo->outputs[out].output->compute) {
810 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
1da177e4
LT
811 }
812 }
fc2d10dd
JD
813 up_read(&minfo->altout.lock);
814 minfo->crtc1.pixclock = mt.pixclock;
815 minfo->crtc1.mnp = mt.mnp;
316b4d64 816 minfo->hw_switch->init(minfo, &mt);
fc2d10dd
JD
817 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
818 pos += minfo->curr.ydstorg.chunks;
1da177e4
LT
819
820 hw->CRTC[0x0D] = pos & 0xFF;
821 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
822 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
823 hw->CRTCEXT[8] = pos >> 21;
316b4d64
JD
824 minfo->hw_switch->restore(minfo);
825 update_crtc2(minfo, pos);
fc2d10dd 826 down_read(&minfo->altout.lock);
1da177e4 827 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
fc2d10dd
JD
828 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
829 minfo->outputs[out].output->program) {
830 minfo->outputs[out].output->program(minfo->outputs[out].data);
1da177e4
LT
831 }
832 }
833 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
fc2d10dd
JD
834 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
835 minfo->outputs[out].output->start) {
836 minfo->outputs[out].output->start(minfo->outputs[out].data);
1da177e4
LT
837 }
838 }
fc2d10dd 839 up_read(&minfo->altout.lock);
316b4d64 840 matrox_cfbX_init(minfo);
1da177e4
LT
841 }
842 }
fc2d10dd 843 minfo->initialized = 1;
1da177e4
LT
844 return 0;
845}
846
316b4d64
JD
847static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
848 struct fb_vblank *vblank)
1da177e4
LT
849{
850 unsigned int sts1;
851
316b4d64 852 matroxfb_enable_irq(minfo, 0);
1da177e4
LT
853 memset(vblank, 0, sizeof(*vblank));
854 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
855 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
856 sts1 = mga_inb(M_INSTS1);
857 vblank->vcount = mga_inl(M_VCOUNT);
858 /* BTW, on my PIII/450 with G400, reading M_INSTS1
859 byte makes this call about 12% slower (1.70 vs. 2.05 us
860 per ioctl()) */
861 if (sts1 & 1)
862 vblank->flags |= FB_VBLANK_HBLANKING;
863 if (sts1 & 8)
864 vblank->flags |= FB_VBLANK_VSYNCING;
fc2d10dd 865 if (vblank->vcount >= minfo->fbcon.var.yres)
1da177e4 866 vblank->flags |= FB_VBLANK_VBLANKING;
fc2d10dd 867 if (test_bit(0, &minfo->irq_flags)) {
1da177e4 868 vblank->flags |= FB_VBLANK_HAVE_COUNT;
a50d913f 869 /* Only one writer, aligned int value...
1da177e4 870 it should work without lock and without atomic_t */
fc2d10dd 871 vblank->count = minfo->crtc1.vsync.cnt;
1da177e4
LT
872 }
873 return 0;
874}
875
876static struct matrox_altout panellink_output = {
877 .name = "Panellink output",
878};
879
67a6680d
CH
880static int matroxfb_ioctl(struct fb_info *info,
881 unsigned int cmd, unsigned long arg)
1da177e4
LT
882{
883 void __user *argp = (void __user *)arg;
ee5a2749 884 struct matrox_fb_info *minfo = info2minfo(info);
a50d913f 885
5ae12170 886 DBG(__func__)
1da177e4 887
fc2d10dd 888 if (minfo->dead) {
1da177e4
LT
889 return -ENXIO;
890 }
891
892 switch (cmd) {
893 case FBIOGET_VBLANK:
894 {
895 struct fb_vblank vblank;
896 int err;
897
316b4d64 898 err = matroxfb_get_vblank(minfo, &vblank);
1da177e4
LT
899 if (err)
900 return err;
901 if (copy_to_user(argp, &vblank, sizeof(vblank)))
902 return -EFAULT;
903 return 0;
904 }
905 case FBIO_WAITFORVSYNC:
906 {
907 u_int32_t crt;
908
909 if (get_user(crt, (u_int32_t __user *)arg))
910 return -EFAULT;
911
316b4d64 912 return matroxfb_wait_for_sync(minfo, crt);
1da177e4
LT
913 }
914 case MATROXFB_SET_OUTPUT_MODE:
915 {
916 struct matroxioc_output_mode mom;
917 struct matrox_altout *oproc;
918 int val;
919
920 if (copy_from_user(&mom, argp, sizeof(mom)))
921 return -EFAULT;
922 if (mom.output >= MATROXFB_MAX_OUTPUTS)
923 return -ENXIO;
fc2d10dd
JD
924 down_read(&minfo->altout.lock);
925 oproc = minfo->outputs[mom.output].output;
1da177e4
LT
926 if (!oproc) {
927 val = -ENXIO;
928 } else if (!oproc->verifymode) {
929 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
930 val = 0;
931 } else {
932 val = -EINVAL;
933 }
934 } else {
fc2d10dd 935 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
1da177e4
LT
936 }
937 if (!val) {
fc2d10dd
JD
938 if (minfo->outputs[mom.output].mode != mom.mode) {
939 minfo->outputs[mom.output].mode = mom.mode;
1da177e4
LT
940 val = 1;
941 }
942 }
fc2d10dd 943 up_read(&minfo->altout.lock);
1da177e4
LT
944 if (val != 1)
945 return val;
fc2d10dd 946 switch (minfo->outputs[mom.output].src) {
1da177e4
LT
947 case MATROXFB_SRC_CRTC1:
948 matroxfb_set_par(info);
949 break;
950 case MATROXFB_SRC_CRTC2:
951 {
952 struct matroxfb_dh_fb_info* crtc2;
953
fc2d10dd
JD
954 down_read(&minfo->crtc2.lock);
955 crtc2 = minfo->crtc2.info;
1da177e4
LT
956 if (crtc2)
957 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
fc2d10dd 958 up_read(&minfo->crtc2.lock);
1da177e4
LT
959 }
960 break;
961 }
962 return 0;
963 }
964 case MATROXFB_GET_OUTPUT_MODE:
965 {
966 struct matroxioc_output_mode mom;
967 struct matrox_altout *oproc;
968 int val;
969
970 if (copy_from_user(&mom, argp, sizeof(mom)))
971 return -EFAULT;
972 if (mom.output >= MATROXFB_MAX_OUTPUTS)
973 return -ENXIO;
fc2d10dd
JD
974 down_read(&minfo->altout.lock);
975 oproc = minfo->outputs[mom.output].output;
1da177e4
LT
976 if (!oproc) {
977 val = -ENXIO;
978 } else {
fc2d10dd 979 mom.mode = minfo->outputs[mom.output].mode;
1da177e4
LT
980 val = 0;
981 }
fc2d10dd 982 up_read(&minfo->altout.lock);
1da177e4
LT
983 if (val)
984 return val;
985 if (copy_to_user(argp, &mom, sizeof(mom)))
986 return -EFAULT;
987 return 0;
988 }
989 case MATROXFB_SET_OUTPUT_CONNECTION:
990 {
991 u_int32_t tmp;
992 int i;
993 int changes;
994
995 if (copy_from_user(&tmp, argp, sizeof(tmp)))
996 return -EFAULT;
997 for (i = 0; i < 32; i++) {
998 if (tmp & (1 << i)) {
999 if (i >= MATROXFB_MAX_OUTPUTS)
1000 return -ENXIO;
fc2d10dd 1001 if (!minfo->outputs[i].output)
1da177e4 1002 return -ENXIO;
fc2d10dd 1003 switch (minfo->outputs[i].src) {
1da177e4
LT
1004 case MATROXFB_SRC_NONE:
1005 case MATROXFB_SRC_CRTC1:
1006 break;
1007 default:
1008 return -EBUSY;
1009 }
1010 }
1011 }
fc2d10dd 1012 if (minfo->devflags.panellink) {
1da177e4
LT
1013 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1014 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1015 return -EINVAL;
1016 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd 1017 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1da177e4
LT
1018 return -EBUSY;
1019 }
1020 }
1021 }
1022 }
1023 changes = 0;
1024 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1025 if (tmp & (1 << i)) {
fc2d10dd 1026 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1da177e4 1027 changes = 1;
fc2d10dd 1028 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1da177e4 1029 }
fc2d10dd 1030 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1da177e4 1031 changes = 1;
fc2d10dd 1032 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1da177e4
LT
1033 }
1034 }
1035 if (!changes)
1036 return 0;
1037 matroxfb_set_par(info);
1038 return 0;
1039 }
1040 case MATROXFB_GET_OUTPUT_CONNECTION:
1041 {
1042 u_int32_t conn = 0;
1043 int i;
1044
1045 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd 1046 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1da177e4
LT
1047 conn |= 1 << i;
1048 }
1049 }
1050 if (put_user(conn, (u_int32_t __user *)arg))
1051 return -EFAULT;
1052 return 0;
1053 }
1054 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1055 {
1056 u_int32_t conn = 0;
1057 int i;
1058
1059 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd
JD
1060 if (minfo->outputs[i].output) {
1061 switch (minfo->outputs[i].src) {
1da177e4
LT
1062 case MATROXFB_SRC_NONE:
1063 case MATROXFB_SRC_CRTC1:
1064 conn |= 1 << i;
1065 break;
1066 }
1067 }
1068 }
fc2d10dd 1069 if (minfo->devflags.panellink) {
1da177e4
LT
1070 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1071 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1072 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1073 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1074 }
1075 if (put_user(conn, (u_int32_t __user *)arg))
1076 return -EFAULT;
1077 return 0;
1078 }
1079 case MATROXFB_GET_ALL_OUTPUTS:
1080 {
1081 u_int32_t conn = 0;
1082 int i;
1083
1084 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd 1085 if (minfo->outputs[i].output) {
1da177e4
LT
1086 conn |= 1 << i;
1087 }
1088 }
1089 if (put_user(conn, (u_int32_t __user *)arg))
1090 return -EFAULT;
1091 return 0;
1092 }
1093 case VIDIOC_QUERYCAP:
1094 {
1095 struct v4l2_capability r;
a50d913f 1096
1da177e4
LT
1097 memset(&r, 0, sizeof(r));
1098 strcpy(r.driver, "matroxfb");
1099 strcpy(r.card, "Matrox");
fc2d10dd 1100 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1da177e4
LT
1101 r.version = KERNEL_VERSION(1,0,0);
1102 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1103 if (copy_to_user(argp, &r, sizeof(r)))
1104 return -EFAULT;
1105 return 0;
a50d913f 1106
1da177e4
LT
1107 }
1108 case VIDIOC_QUERYCTRL:
1109 {
1110 struct v4l2_queryctrl qctrl;
1111 int err;
1112
1113 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1114 return -EFAULT;
1115
fc2d10dd
JD
1116 down_read(&minfo->altout.lock);
1117 if (!minfo->outputs[1].output) {
1da177e4 1118 err = -ENXIO;
fc2d10dd
JD
1119 } else if (minfo->outputs[1].output->getqueryctrl) {
1120 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1da177e4
LT
1121 } else {
1122 err = -EINVAL;
1123 }
fc2d10dd 1124 up_read(&minfo->altout.lock);
1da177e4
LT
1125 if (err >= 0 &&
1126 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1127 return -EFAULT;
1128 return err;
1129 }
1130 case VIDIOC_G_CTRL:
1131 {
1132 struct v4l2_control ctrl;
1133 int err;
1134
1135 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1136 return -EFAULT;
1137
fc2d10dd
JD
1138 down_read(&minfo->altout.lock);
1139 if (!minfo->outputs[1].output) {
1da177e4 1140 err = -ENXIO;
fc2d10dd
JD
1141 } else if (minfo->outputs[1].output->getctrl) {
1142 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1da177e4
LT
1143 } else {
1144 err = -EINVAL;
1145 }
fc2d10dd 1146 up_read(&minfo->altout.lock);
1da177e4
LT
1147 if (err >= 0 &&
1148 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1149 return -EFAULT;
1150 return err;
1151 }
1da177e4
LT
1152 case VIDIOC_S_CTRL:
1153 {
1154 struct v4l2_control ctrl;
1155 int err;
1156
1157 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1158 return -EFAULT;
1159
fc2d10dd
JD
1160 down_read(&minfo->altout.lock);
1161 if (!minfo->outputs[1].output) {
1da177e4 1162 err = -ENXIO;
fc2d10dd
JD
1163 } else if (minfo->outputs[1].output->setctrl) {
1164 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1da177e4
LT
1165 } else {
1166 err = -EINVAL;
1167 }
fc2d10dd 1168 up_read(&minfo->altout.lock);
1da177e4
LT
1169 return err;
1170 }
1171 }
1172 return -ENOTTY;
1173}
1174
1175/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1176
1177static int matroxfb_blank(int blank, struct fb_info *info)
1178{
1179 int seq;
1180 int crtc;
1181 CRITFLAGS
ee5a2749 1182 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 1183
5ae12170 1184 DBG(__func__)
1da177e4 1185
fc2d10dd 1186 if (minfo->dead)
1da177e4
LT
1187 return 1;
1188
1189 switch (blank) {
1190 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1191 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1192 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1193 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1194 default: seq = 0x00; crtc = 0x00; break;
1195 }
1196
1197 CRITBEGIN
1198
1199 mga_outb(M_SEQ_INDEX, 1);
1200 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1201 mga_outb(M_EXTVGA_INDEX, 1);
1202 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1203
1204 CRITEND
1205 return 0;
1206}
1207
1208static struct fb_ops matroxfb_ops = {
1209 .owner = THIS_MODULE,
1210 .fb_open = matroxfb_open,
1211 .fb_release = matroxfb_release,
1212 .fb_check_var = matroxfb_check_var,
1213 .fb_set_par = matroxfb_set_par,
1214 .fb_setcolreg = matroxfb_setcolreg,
1215 .fb_pan_display =matroxfb_pan_display,
1216 .fb_blank = matroxfb_blank,
1217 .fb_ioctl = matroxfb_ioctl,
1218/* .fb_fillrect = <set by matrox_cfbX_init>, */
1219/* .fb_copyarea = <set by matrox_cfbX_init>, */
1220/* .fb_imageblit = <set by matrox_cfbX_init>, */
1221/* .fb_cursor = <set by matrox_cfbX_init>, */
1222};
1223
1224#define RSDepth(X) (((X) >> 8) & 0x0F)
1225#define RS8bpp 0x1
1226#define RS15bpp 0x2
1227#define RS16bpp 0x3
1228#define RS32bpp 0x4
1229#define RS4bpp 0x5
1230#define RS24bpp 0x6
1231#define RSText 0x7
1232#define RSText8 0x8
1233/* 9-F */
1234static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1235 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1236 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1237 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1238 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1239 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1240 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1241 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1242 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1243};
1244
1245/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
90a48151 1246static unsigned int mem; /* "matroxfb:mem:xxxxxM" */
1da177e4 1247static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
90a48151
VJ
1248static int inv24; /* "matroxfb:inv24" */
1249static int cross4MB = -1; /* "matroxfb:cross4MB" */
1250static int disabled; /* "matroxfb:disabled" */
1251static int noaccel; /* "matroxfb:noaccel" */
1252static int nopan; /* "matroxfb:nopan" */
1253static int no_pci_retry; /* "matroxfb:nopciretry" */
1254static int novga; /* "matroxfb:novga" */
1255static int nobios; /* "matroxfb:nobios" */
1256static int noinit = 1; /* "matroxfb:init" */
1257static int inverse; /* "matroxfb:inverse" */
1258static int sgram; /* "matroxfb:sgram" */
1da177e4 1259#ifdef CONFIG_MTRR
90a48151 1260static int mtrr = 1; /* "matroxfb:nomtrr" */
1da177e4 1261#endif
90a48151
VJ
1262static int grayscale; /* "matroxfb:grayscale" */
1263static int dev = -1; /* "matroxfb:dev:xxxxx" */
1264static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */
1265static int depth = -1; /* "matroxfb:depth:xxxxx" */
1266static unsigned int xres; /* "matroxfb:xres:xxxxx" */
1267static unsigned int yres; /* "matroxfb:yres:xxxxx" */
1268static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */
1269static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */
1270static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */
1271static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */
1272static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */
1273static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */
1274static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */
1275static int sync = -1; /* "matroxfb:sync:xxxxx" */
1276static unsigned int fv; /* "matroxfb:fv:xxxxx" */
1277static unsigned int fh; /* "matroxfb:fh:xxxxxk" */
1278static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */
1279static int dfp; /* "matroxfb:dfp */
1280static int dfp_type = -1; /* "matroxfb:dfp:xxx */
1281static int memtype = -1; /* "matroxfb:memtype:xxx" */
1282static char outputs[8]; /* "matroxfb:outputs:xxx" */
1da177e4
LT
1283
1284#ifndef MODULE
90a48151 1285static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */
1da177e4
LT
1286#endif
1287
316b4d64
JD
1288static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1289 unsigned int maxSize, unsigned int *realSize)
1290{
1da177e4
LT
1291 vaddr_t vm;
1292 unsigned int offs;
1293 unsigned int offs2;