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d480ace0 PM |
1 | /* |
2 | * MSM MDDI Transport | |
3 | * | |
4 | * Copyright (C) 2007 Google Incorporated | |
5 | * Copyright (C) 2007 QUALCOMM Incorporated | |
6 | * | |
7 | * This software is licensed under the terms of the GNU General Public | |
8 | * License version 2, as published by the Free Software Foundation, and | |
9 | * may be copied, distributed, and modified under those terms. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/dma-mapping.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/delay.h> | |
5a0e3ad6 | 24 | #include <linux/gfp.h> |
d480ace0 PM |
25 | #include <linux/spinlock.h> |
26 | #include <linux/clk.h> | |
27 | #include <linux/io.h> | |
69fd8d24 | 28 | #include <linux/sched.h> |
d480ace0 PM |
29 | #include <mach/msm_iomap.h> |
30 | #include <mach/irqs.h> | |
31 | #include <mach/board.h> | |
d480ace0 PM |
32 | #include <mach/msm_fb.h> |
33 | #include "mddi_hw.h" | |
34 | ||
35 | #define FLAG_DISABLE_HIBERNATION 0x0001 | |
36 | #define FLAG_HAVE_CAPS 0x0002 | |
37 | #define FLAG_HAS_VSYNC_IRQ 0x0004 | |
38 | #define FLAG_HAVE_STATUS 0x0008 | |
39 | ||
40 | #define CMD_GET_CLIENT_CAP 0x0601 | |
41 | #define CMD_GET_CLIENT_STATUS 0x0602 | |
42 | ||
43 | union mddi_rev { | |
44 | unsigned char raw[MDDI_REV_BUFFER_SIZE]; | |
45 | struct mddi_rev_packet hdr; | |
46 | struct mddi_client_status status; | |
47 | struct mddi_client_caps caps; | |
48 | struct mddi_register_access reg; | |
49 | }; | |
50 | ||
51 | struct reg_read_info { | |
52 | struct completion done; | |
53 | uint32_t reg; | |
54 | uint32_t status; | |
55 | uint32_t result; | |
56 | }; | |
57 | ||
58 | struct mddi_info { | |
59 | uint16_t flags; | |
60 | uint16_t version; | |
61 | char __iomem *base; | |
62 | int irq; | |
63 | struct clk *clk; | |
64 | struct msm_mddi_client_data client_data; | |
65 | ||
66 | /* buffer for rev encap packets */ | |
67 | void *rev_data; | |
68 | dma_addr_t rev_addr; | |
69 | struct mddi_llentry *reg_write_data; | |
70 | dma_addr_t reg_write_addr; | |
71 | struct mddi_llentry *reg_read_data; | |
72 | dma_addr_t reg_read_addr; | |
73 | size_t rev_data_curr; | |
74 | ||
75 | spinlock_t int_lock; | |
76 | uint32_t int_enable; | |
77 | uint32_t got_int; | |
78 | wait_queue_head_t int_wait; | |
79 | ||
80 | struct mutex reg_write_lock; | |
81 | struct mutex reg_read_lock; | |
82 | struct reg_read_info *reg_read; | |
83 | ||
84 | struct mddi_client_caps caps; | |
85 | struct mddi_client_status status; | |
86 | ||
87 | void (*power_client)(struct msm_mddi_client_data *, int); | |
88 | ||
89 | /* client device published to bind us to the | |
90 | * appropriate mddi_client driver | |
91 | */ | |
92 | char client_name[20]; | |
93 | ||
94 | struct platform_device client_pdev; | |
95 | }; | |
96 | ||
97 | static void mddi_init_rev_encap(struct mddi_info *mddi); | |
98 | ||
99 | #define mddi_readl(r) readl(mddi->base + (MDDI_##r)) | |
100 | #define mddi_writel(v, r) writel((v), mddi->base + (MDDI_##r)) | |
101 | ||
102 | void mddi_activate_link(struct msm_mddi_client_data *cdata) | |
103 | { | |
104 | struct mddi_info *mddi = container_of(cdata, struct mddi_info, | |
105 | client_data); | |
106 | ||
107 | mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD); | |
108 | } | |
109 | ||
110 | static void mddi_handle_link_list_done(struct mddi_info *mddi) | |
111 | { | |
112 | } | |
113 | ||
114 | static void mddi_reset_rev_encap_ptr(struct mddi_info *mddi) | |
115 | { | |
116 | printk(KERN_INFO "mddi: resetting rev ptr\n"); | |
117 | mddi->rev_data_curr = 0; | |
118 | mddi_writel(mddi->rev_addr, REV_PTR); | |
119 | mddi_writel(mddi->rev_addr, REV_PTR); | |
120 | mddi_writel(MDDI_CMD_FORCE_NEW_REV_PTR, CMD); | |
121 | } | |
122 | ||
123 | static void mddi_handle_rev_data(struct mddi_info *mddi, union mddi_rev *rev) | |
124 | { | |
125 | int i; | |
126 | struct reg_read_info *ri; | |
127 | ||
128 | if ((rev->hdr.length <= MDDI_REV_BUFFER_SIZE - 2) && | |
129 | (rev->hdr.length >= sizeof(struct mddi_rev_packet) - 2)) { | |
130 | ||
131 | switch (rev->hdr.type) { | |
132 | case TYPE_CLIENT_CAPS: | |
133 | memcpy(&mddi->caps, &rev->caps, | |
134 | sizeof(struct mddi_client_caps)); | |
135 | mddi->flags |= FLAG_HAVE_CAPS; | |
136 | wake_up(&mddi->int_wait); | |
137 | break; | |
138 | case TYPE_CLIENT_STATUS: | |
139 | memcpy(&mddi->status, &rev->status, | |
140 | sizeof(struct mddi_client_status)); | |
141 | mddi->flags |= FLAG_HAVE_STATUS; | |
142 | wake_up(&mddi->int_wait); | |
143 | break; | |
144 | case TYPE_REGISTER_ACCESS: | |
145 | ri = mddi->reg_read; | |
146 | if (ri == 0) { | |
147 | printk(KERN_INFO "rev: got reg %x = %x without " | |
148 | " pending read\n", | |
149 | rev->reg.register_address, | |
150 | rev->reg.register_data_list); | |
151 | break; | |
152 | } | |
153 | if (ri->reg != rev->reg.register_address) { | |
154 | printk(KERN_INFO "rev: got reg %x = %x for " | |
155 | "wrong register, expected " | |
156 | "%x\n", | |
157 | rev->reg.register_address, | |
158 | rev->reg.register_data_list, ri->reg); | |
159 | break; | |
160 | } | |
161 | mddi->reg_read = NULL; | |
162 | ri->status = 0; | |
163 | ri->result = rev->reg.register_data_list; | |
164 | complete(&ri->done); | |
165 | break; | |
166 | default: | |
167 | printk(KERN_INFO "rev: unknown reverse packet: " | |
168 | "len=%04x type=%04x CURR_REV_PTR=%x\n", | |
169 | rev->hdr.length, rev->hdr.type, | |
170 | mddi_readl(CURR_REV_PTR)); | |
171 | for (i = 0; i < rev->hdr.length + 2; i++) { | |
172 | if ((i % 16) == 0) | |
173 | printk(KERN_INFO "\n"); | |
174 | printk(KERN_INFO " %02x", rev->raw[i]); | |
175 | } | |
176 | printk(KERN_INFO "\n"); | |
177 | mddi_reset_rev_encap_ptr(mddi); | |
178 | } | |
179 | } else { | |
180 | printk(KERN_INFO "bad rev length, %d, CURR_REV_PTR %x\n", | |
181 | rev->hdr.length, mddi_readl(CURR_REV_PTR)); | |
182 | mddi_reset_rev_encap_ptr(mddi); | |
183 | } | |
184 | } | |
185 | ||
186 | static void mddi_wait_interrupt(struct mddi_info *mddi, uint32_t intmask); | |
187 | ||
188 | static void mddi_handle_rev_data_avail(struct mddi_info *mddi) | |
189 | { | |
d480ace0 PM |
190 | uint32_t rev_data_count; |
191 | uint32_t rev_crc_err_count; | |
d480ace0 PM |
192 | struct reg_read_info *ri; |
193 | size_t prev_offset; | |
194 | uint16_t length; | |
195 | ||
196 | union mddi_rev *crev = mddi->rev_data + mddi->rev_data_curr; | |
197 | ||
198 | /* clear the interrupt */ | |
199 | mddi_writel(MDDI_INT_REV_DATA_AVAIL, INT); | |
200 | rev_data_count = mddi_readl(REV_PKT_CNT); | |
201 | rev_crc_err_count = mddi_readl(REV_CRC_ERR); | |
202 | if (rev_data_count > 1) | |
203 | printk(KERN_INFO "rev_data_count %d\n", rev_data_count); | |
204 | ||
205 | if (rev_crc_err_count) { | |
206 | printk(KERN_INFO "rev_crc_err_count %d, INT %x\n", | |
207 | rev_crc_err_count, mddi_readl(INT)); | |
208 | ri = mddi->reg_read; | |
209 | if (ri == 0) { | |
210 | printk(KERN_INFO "rev: got crc error without pending " | |
211 | "read\n"); | |
212 | } else { | |
213 | mddi->reg_read = NULL; | |
214 | ri->status = -EIO; | |
215 | ri->result = -1; | |
216 | complete(&ri->done); | |
217 | } | |
218 | } | |
219 | ||
220 | if (rev_data_count == 0) | |
221 | return; | |
222 | ||
223 | prev_offset = mddi->rev_data_curr; | |
224 | ||
225 | length = *((uint8_t *)mddi->rev_data + mddi->rev_data_curr); | |
226 | mddi->rev_data_curr++; | |
227 | if (mddi->rev_data_curr == MDDI_REV_BUFFER_SIZE) | |
228 | mddi->rev_data_curr = 0; | |
229 | length += *((uint8_t *)mddi->rev_data + mddi->rev_data_curr) << 8; | |
230 | mddi->rev_data_curr += 1 + length; | |
231 | if (mddi->rev_data_curr >= MDDI_REV_BUFFER_SIZE) | |
232 | mddi->rev_data_curr = | |
233 | mddi->rev_data_curr % MDDI_REV_BUFFER_SIZE; | |
234 | ||
235 | if (length > MDDI_REV_BUFFER_SIZE - 2) { | |
236 | printk(KERN_INFO "mddi: rev data length greater than buffer" | |
237 | "size\n"); | |
238 | mddi_reset_rev_encap_ptr(mddi); | |
239 | return; | |
240 | } | |
241 | ||
242 | if (prev_offset + 2 + length >= MDDI_REV_BUFFER_SIZE) { | |
243 | union mddi_rev tmprev; | |
244 | size_t rem = MDDI_REV_BUFFER_SIZE - prev_offset; | |
245 | memcpy(&tmprev.raw[0], mddi->rev_data + prev_offset, rem); | |
246 | memcpy(&tmprev.raw[rem], mddi->rev_data, 2 + length - rem); | |
247 | mddi_handle_rev_data(mddi, &tmprev); | |
248 | } else { | |
249 | mddi_handle_rev_data(mddi, crev); | |
250 | } | |
251 | ||
252 | if (prev_offset < MDDI_REV_BUFFER_SIZE / 2 && | |
253 | mddi->rev_data_curr >= MDDI_REV_BUFFER_SIZE / 2) { | |
254 | mddi_writel(mddi->rev_addr, REV_PTR); | |
255 | } | |
256 | } | |
257 | ||
258 | static irqreturn_t mddi_isr(int irq, void *data) | |
259 | { | |
260 | struct msm_mddi_client_data *cdata = data; | |
261 | struct mddi_info *mddi = container_of(cdata, struct mddi_info, | |
262 | client_data); | |
263 | uint32_t active, status; | |
264 | ||
265 | spin_lock(&mddi->int_lock); | |
266 | ||
267 | active = mddi_readl(INT); | |
268 | status = mddi_readl(STAT); | |
269 | ||
270 | mddi_writel(active, INT); | |
271 | ||
272 | /* ignore any interrupts we have disabled */ | |
273 | active &= mddi->int_enable; | |
274 | ||
275 | mddi->got_int |= active; | |
276 | wake_up(&mddi->int_wait); | |
277 | ||
278 | if (active & MDDI_INT_PRI_LINK_LIST_DONE) { | |
279 | mddi->int_enable &= (~MDDI_INT_PRI_LINK_LIST_DONE); | |
280 | mddi_handle_link_list_done(mddi); | |
281 | } | |
282 | if (active & MDDI_INT_REV_DATA_AVAIL) | |
283 | mddi_handle_rev_data_avail(mddi); | |
284 | ||
285 | if (active & ~MDDI_INT_NEED_CLEAR) | |
286 | mddi->int_enable &= ~(active & ~MDDI_INT_NEED_CLEAR); | |
287 | ||
288 | if (active & MDDI_INT_LINK_ACTIVE) { | |
289 | mddi->int_enable &= (~MDDI_INT_LINK_ACTIVE); | |
290 | mddi->int_enable |= MDDI_INT_IN_HIBERNATION; | |
291 | } | |
292 | ||
293 | if (active & MDDI_INT_IN_HIBERNATION) { | |
294 | mddi->int_enable &= (~MDDI_INT_IN_HIBERNATION); | |
295 | mddi->int_enable |= MDDI_INT_LINK_ACTIVE; | |
296 | } | |
297 | ||
298 | mddi_writel(mddi->int_enable, INTEN); | |
299 | spin_unlock(&mddi->int_lock); | |
300 | ||
301 | return IRQ_HANDLED; | |
302 | } | |
303 | ||
304 | static long mddi_wait_interrupt_timeout(struct mddi_info *mddi, | |
305 | uint32_t intmask, int timeout) | |
306 | { | |
307 | unsigned long irq_flags; | |
308 | ||
309 | spin_lock_irqsave(&mddi->int_lock, irq_flags); | |
310 | mddi->got_int &= ~intmask; | |
311 | mddi->int_enable |= intmask; | |
312 | mddi_writel(mddi->int_enable, INTEN); | |
313 | spin_unlock_irqrestore(&mddi->int_lock, irq_flags); | |
314 | return wait_event_timeout(mddi->int_wait, mddi->got_int & intmask, | |
315 | timeout); | |
316 | } | |
317 | ||
318 | static void mddi_wait_interrupt(struct mddi_info *mddi, uint32_t intmask) | |
319 | { | |
320 | if (mddi_wait_interrupt_timeout(mddi, intmask, HZ/10) == 0) | |
17f52ed7 | 321 | printk(KERN_INFO "mddi_wait_interrupt %d, timeout " |
d480ace0 PM |
322 | "waiting for %x, INT = %x, STAT = %x gotint = %x\n", |
323 | current->pid, intmask, mddi_readl(INT), mddi_readl(STAT), | |
324 | mddi->got_int); | |
325 | } | |
326 | ||
327 | static void mddi_init_rev_encap(struct mddi_info *mddi) | |
328 | { | |
329 | memset(mddi->rev_data, 0xee, MDDI_REV_BUFFER_SIZE); | |
330 | mddi_writel(mddi->rev_addr, REV_PTR); | |
331 | mddi_writel(MDDI_CMD_FORCE_NEW_REV_PTR, CMD); | |
332 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
333 | } | |
334 | ||
335 | void mddi_set_auto_hibernate(struct msm_mddi_client_data *cdata, int on) | |
336 | { | |
337 | struct mddi_info *mddi = container_of(cdata, struct mddi_info, | |
338 | client_data); | |
339 | mddi_writel(MDDI_CMD_POWERDOWN, CMD); | |
340 | mddi_wait_interrupt(mddi, MDDI_INT_IN_HIBERNATION); | |
341 | mddi_writel(MDDI_CMD_HIBERNATE | !!on, CMD); | |
342 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
343 | } | |
344 | ||
345 | ||
346 | static uint16_t mddi_init_registers(struct mddi_info *mddi) | |
347 | { | |
348 | mddi_writel(0x0001, VERSION); | |
349 | mddi_writel(MDDI_HOST_BYTES_PER_SUBFRAME, BPS); | |
350 | mddi_writel(0x0003, SPM); /* subframes per media */ | |
351 | mddi_writel(0x0005, TA1_LEN); | |
352 | mddi_writel(MDDI_HOST_TA2_LEN, TA2_LEN); | |
353 | mddi_writel(0x0096, DRIVE_HI); | |
354 | /* 0x32 normal, 0x50 for Toshiba display */ | |
355 | mddi_writel(0x0050, DRIVE_LO); | |
356 | mddi_writel(0x003C, DISP_WAKE); /* wakeup counter */ | |
357 | mddi_writel(MDDI_HOST_REV_RATE_DIV, REV_RATE_DIV); | |
358 | ||
359 | mddi_writel(MDDI_REV_BUFFER_SIZE, REV_SIZE); | |
360 | mddi_writel(MDDI_MAX_REV_PKT_SIZE, REV_ENCAP_SZ); | |
361 | ||
362 | /* disable periodic rev encap */ | |
363 | mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP, CMD); | |
364 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
365 | ||
366 | if (mddi_readl(PAD_CTL) == 0) { | |
367 | /* If we are turning on band gap, need to wait 5us before | |
368 | * turning on the rest of the PAD */ | |
369 | mddi_writel(0x08000, PAD_CTL); | |
370 | udelay(5); | |
371 | } | |
372 | ||
373 | /* Recommendation from PAD hw team */ | |
374 | mddi_writel(0xa850f, PAD_CTL); | |
375 | ||
376 | ||
377 | /* Need an even number for counts */ | |
378 | mddi_writel(0x60006, DRIVER_START_CNT); | |
379 | ||
380 | mddi_set_auto_hibernate(&mddi->client_data, 0); | |
381 | ||
382 | mddi_writel(MDDI_CMD_DISP_IGNORE, CMD); | |
383 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
384 | ||
385 | mddi_init_rev_encap(mddi); | |
386 | return mddi_readl(CORE_VER) & 0xffff; | |
387 | } | |
388 | ||
389 | static void mddi_suspend(struct msm_mddi_client_data *cdata) | |
390 | { | |
391 | struct mddi_info *mddi = container_of(cdata, struct mddi_info, | |
392 | client_data); | |
393 | /* turn off the client */ | |
394 | if (mddi->power_client) | |
395 | mddi->power_client(&mddi->client_data, 0); | |
396 | /* turn off the link */ | |
397 | mddi_writel(MDDI_CMD_RESET, CMD); | |
398 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
399 | /* turn off the clock */ | |
400 | clk_disable(mddi->clk); | |
401 | } | |
402 | ||
403 | static void mddi_resume(struct msm_mddi_client_data *cdata) | |
404 | { | |
405 | struct mddi_info *mddi = container_of(cdata, struct mddi_info, | |
406 | client_data); | |
407 | mddi_set_auto_hibernate(&mddi->client_data, 0); | |
408 | /* turn on the client */ | |
409 | if (mddi->power_client) | |
410 | mddi->power_client(&mddi->client_data, 1); | |
411 | /* turn on the clock */ | |
412 | clk_enable(mddi->clk); | |
413 | /* set up the local registers */ | |
414 | mddi->rev_data_curr = 0; | |
415 | mddi_init_registers(mddi); | |
416 | mddi_writel(mddi->int_enable, INTEN); | |
417 | mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD); | |
418 | mddi_writel(MDDI_CMD_SEND_RTD, CMD); | |
419 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
420 | mddi_set_auto_hibernate(&mddi->client_data, 1); | |
421 | } | |
422 | ||
e89c0e43 | 423 | static int __devinit mddi_get_client_caps(struct mddi_info *mddi) |
d480ace0 PM |
424 | { |
425 | int i, j; | |
426 | ||
427 | /* clear any stale interrupts */ | |
428 | mddi_writel(0xffffffff, INT); | |
429 | ||
430 | mddi->int_enable = MDDI_INT_LINK_ACTIVE | | |
431 | MDDI_INT_IN_HIBERNATION | | |
432 | MDDI_INT_PRI_LINK_LIST_DONE | | |
433 | MDDI_INT_REV_DATA_AVAIL | | |
434 | MDDI_INT_REV_OVERFLOW | | |
435 | MDDI_INT_REV_OVERWRITE | | |
436 | MDDI_INT_RTD_FAILURE; | |
437 | mddi_writel(mddi->int_enable, INTEN); | |
438 | ||
439 | mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD); | |
440 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
441 | ||
442 | for (j = 0; j < 3; j++) { | |
443 | /* the toshiba vga panel does not respond to get | |
444 | * caps unless you SEND_RTD, but the first SEND_RTD | |
445 | * will fail... | |
446 | */ | |
447 | for (i = 0; i < 4; i++) { | |
448 | uint32_t stat; | |
449 | ||
450 | mddi_writel(MDDI_CMD_SEND_RTD, CMD); | |
451 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
452 | stat = mddi_readl(STAT); | |
453 | printk(KERN_INFO "mddi cmd send rtd: int %x, stat %x, " | |
454 | "rtd val %x\n", mddi_readl(INT), stat, | |
455 | mddi_readl(RTD_VAL)); | |
456 | if ((stat & MDDI_STAT_RTD_MEAS_FAIL) == 0) | |
457 | break; | |
458 | msleep(1); | |
459 | } | |
460 | ||
461 | mddi_writel(CMD_GET_CLIENT_CAP, CMD); | |
462 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
463 | wait_event_timeout(mddi->int_wait, mddi->flags & FLAG_HAVE_CAPS, | |
464 | HZ / 100); | |
465 | ||
466 | if (mddi->flags & FLAG_HAVE_CAPS) | |
467 | break; | |
17f52ed7 | 468 | printk(KERN_INFO "mddi_init, timeout waiting for caps\n"); |
d480ace0 PM |
469 | } |
470 | return mddi->flags & FLAG_HAVE_CAPS; | |
471 | } | |
472 | ||
473 | /* link must be active when this is called */ | |
474 | int mddi_check_status(struct mddi_info *mddi) | |
475 | { | |
476 | int ret = -1, retry = 3; | |
477 | mutex_lock(&mddi->reg_read_lock); | |
478 | mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 1, CMD); | |
479 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
480 | ||
481 | do { | |
482 | mddi->flags &= ~FLAG_HAVE_STATUS; | |
483 | mddi_writel(CMD_GET_CLIENT_STATUS, CMD); | |
484 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
485 | wait_event_timeout(mddi->int_wait, | |
486 | mddi->flags & FLAG_HAVE_STATUS, | |
487 | HZ / 100); | |
488 | ||
489 | if (mddi->flags & FLAG_HAVE_STATUS) { | |
490 | if (mddi->status.crc_error_count) | |
491 | printk(KERN_INFO "mddi status: crc_error " | |
492 | "count: %d\n", | |
493 | mddi->status.crc_error_count); | |
494 | else | |
495 | ret = 0; | |
496 | break; | |
497 | } else | |
498 | printk(KERN_INFO "mddi status: failed to get client " | |
499 | "status\n"); | |
500 | mddi_writel(MDDI_CMD_SEND_RTD, CMD); | |
501 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
502 | } while (--retry); | |
503 | ||
504 | mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 0, CMD); | |
505 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
506 | mutex_unlock(&mddi->reg_read_lock); | |
507 | return ret; | |
508 | } | |
509 | ||
510 | ||
511 | void mddi_remote_write(struct msm_mddi_client_data *cdata, uint32_t val, | |
512 | uint32_t reg) | |
513 | { | |
514 | struct mddi_info *mddi = container_of(cdata, struct mddi_info, | |
515 | client_data); | |
516 | struct mddi_llentry *ll; | |
517 | struct mddi_register_access *ra; | |
518 | ||
519 | mutex_lock(&mddi->reg_write_lock); | |
520 | ||
521 | ll = mddi->reg_write_data; | |
522 | ||
523 | ra = &(ll->u.r); | |
524 | ra->length = 14 + 4; | |
525 | ra->type = TYPE_REGISTER_ACCESS; | |
526 | ra->client_id = 0; | |
527 | ra->read_write_info = MDDI_WRITE | 1; | |
528 | ra->crc16 = 0; | |
529 | ||
530 | ra->register_address = reg; | |
531 | ra->register_data_list = val; | |
532 | ||
533 | ll->flags = 1; | |
534 | ll->header_count = 14; | |
535 | ll->data_count = 4; | |
536 | ll->data = mddi->reg_write_addr + offsetof(struct mddi_llentry, | |
537 | u.r.register_data_list); | |
538 | ll->next = 0; | |
539 | ll->reserved = 0; | |
540 | ||
541 | mddi_writel(mddi->reg_write_addr, PRI_PTR); | |
542 | ||
543 | mddi_wait_interrupt(mddi, MDDI_INT_PRI_LINK_LIST_DONE); | |
544 | mutex_unlock(&mddi->reg_write_lock); | |
545 | } | |
546 | ||
547 | uint32_t mddi_remote_read(struct msm_mddi_client_data *cdata, uint32_t reg) | |
548 | { | |
549 | struct mddi_info *mddi = container_of(cdata, struct mddi_info, | |
550 | client_data); | |
551 | struct mddi_llentry *ll; | |
552 | struct mddi_register_access *ra; | |
553 | struct reg_read_info ri; | |
554 | unsigned s; | |
555 | int retry_count = 2; | |
556 | unsigned long irq_flags; | |
557 | ||
558 | mutex_lock(&mddi->reg_read_lock); | |
559 | ||
560 | ll = mddi->reg_read_data; | |
561 | ||
562 | ra = &(ll->u.r); | |
563 | ra->length = 14; | |
564 | ra->type = TYPE_REGISTER_ACCESS; | |
565 | ra->client_id = 0; | |
566 | ra->read_write_info = MDDI_READ | 1; | |
567 | ra->crc16 = 0; | |
568 | ||
569 | ra->register_address = reg; | |
570 | ||
571 | ll->flags = 0x11; | |
572 | ll->header_count = 14; | |
573 | ll->data_count = 0; | |
574 | ll->data = 0; | |
575 | ll->next = 0; | |
576 | ll->reserved = 0; | |
577 | ||
578 | s = mddi_readl(STAT); | |
579 | ||
580 | ri.reg = reg; | |
581 | ri.status = -1; | |
582 | ||
583 | do { | |
584 | init_completion(&ri.done); | |
585 | mddi->reg_read = &ri; | |
586 | mddi_writel(mddi->reg_read_addr, PRI_PTR); | |
587 | ||
588 | mddi_wait_interrupt(mddi, MDDI_INT_PRI_LINK_LIST_DONE); | |
589 | ||
590 | /* Enable Periodic Reverse Encapsulation. */ | |
591 | mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 1, CMD); | |
592 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
593 | if (wait_for_completion_timeout(&ri.done, HZ/10) == 0 && | |
594 | !ri.done.done) { | |
595 | printk(KERN_INFO "mddi_remote_read(%x) timeout " | |
596 | "(%d %d %d)\n", | |
597 | reg, ri.status, ri.result, ri.done.done); | |
598 | spin_lock_irqsave(&mddi->int_lock, irq_flags); | |
599 | mddi->reg_read = NULL; | |
600 | spin_unlock_irqrestore(&mddi->int_lock, irq_flags); | |
601 | ri.status = -1; | |
602 | ri.result = -1; | |
603 | } | |
604 | if (ri.status == 0) | |
605 | break; | |
606 | ||
607 | mddi_writel(MDDI_CMD_SEND_RTD, CMD); | |
608 | mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD); | |
609 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
610 | printk(KERN_INFO "mddi_remote_read: failed, sent " | |
611 | "MDDI_CMD_SEND_RTD: int %x, stat %x, rtd val %x " | |
612 | "curr_rev_ptr %x\n", mddi_readl(INT), mddi_readl(STAT), | |
613 | mddi_readl(RTD_VAL), mddi_readl(CURR_REV_PTR)); | |
614 | } while (retry_count-- > 0); | |
615 | /* Disable Periodic Reverse Encapsulation. */ | |
616 | mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 0, CMD); | |
617 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
618 | mddi->reg_read = NULL; | |
619 | mutex_unlock(&mddi->reg_read_lock); | |
620 | return ri.result; | |
621 | } | |
622 | ||
623 | static struct mddi_info mddi_info[2]; | |
624 | ||
e89c0e43 DB |
625 | static int __devinit mddi_clk_setup(struct platform_device *pdev, |
626 | struct mddi_info *mddi, | |
627 | unsigned long clk_rate) | |
d480ace0 PM |
628 | { |
629 | int ret; | |
630 | ||
631 | /* set up the clocks */ | |
632 | mddi->clk = clk_get(&pdev->dev, "mddi_clk"); | |
633 | if (IS_ERR(mddi->clk)) { | |
634 | printk(KERN_INFO "mddi: failed to get clock\n"); | |
635 | return PTR_ERR(mddi->clk); | |
636 | } | |
637 | ret = clk_enable(mddi->clk); | |
638 | if (ret) | |
639 | goto fail; | |
640 | ret = clk_set_rate(mddi->clk, clk_rate); | |
641 | if (ret) | |
642 | goto fail; | |
643 | return 0; | |
644 | ||
645 | fail: | |
646 | clk_put(mddi->clk); | |
647 | return ret; | |
648 | } | |
649 | ||
650 | static int __init mddi_rev_data_setup(struct mddi_info *mddi) | |
651 | { | |
652 | void *dma; | |
653 | dma_addr_t dma_addr; | |
654 | ||
655 | /* set up dma buffer */ | |
656 | dma = dma_alloc_coherent(NULL, 0x1000, &dma_addr, GFP_KERNEL); | |
657 | if (dma == 0) | |
658 | return -ENOMEM; | |
659 | mddi->rev_data = dma; | |
660 | mddi->rev_data_curr = 0; | |
661 | mddi->rev_addr = dma_addr; | |
662 | mddi->reg_write_data = dma + MDDI_REV_BUFFER_SIZE; | |
663 | mddi->reg_write_addr = dma_addr + MDDI_REV_BUFFER_SIZE; | |
664 | mddi->reg_read_data = mddi->reg_write_data + 1; | |
665 | mddi->reg_read_addr = mddi->reg_write_addr + | |
666 | sizeof(*mddi->reg_write_data); | |
667 | return 0; | |
668 | } | |
669 | ||
461cbe77 | 670 | static int __devinit mddi_probe(struct platform_device *pdev) |
d480ace0 PM |
671 | { |
672 | struct msm_mddi_platform_data *pdata = pdev->dev.platform_data; | |
673 | struct mddi_info *mddi = &mddi_info[pdev->id]; | |
674 | struct resource *resource; | |
675 | int ret, i; | |
676 | ||
677 | resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
678 | if (!resource) { | |
679 | printk(KERN_ERR "mddi: no associated mem resource!\n"); | |
680 | return -ENOMEM; | |
681 | } | |
06794eae | 682 | mddi->base = ioremap(resource->start, resource_size(resource)); |
d480ace0 PM |
683 | if (!mddi->base) { |
684 | printk(KERN_ERR "mddi: failed to remap base!\n"); | |
685 | ret = -EINVAL; | |
686 | goto error_ioremap; | |
687 | } | |
688 | resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
689 | if (!resource) { | |
690 | printk(KERN_ERR "mddi: no associated irq resource!\n"); | |
691 | ret = -EINVAL; | |
692 | goto error_get_irq_resource; | |
693 | } | |
694 | mddi->irq = resource->start; | |
695 | printk(KERN_INFO "mddi: init() base=0x%p irq=%d\n", mddi->base, | |
696 | mddi->irq); | |
697 | mddi->power_client = pdata->power_client; | |
698 | ||
699 | mutex_init(&mddi->reg_write_lock); | |
700 | mutex_init(&mddi->reg_read_lock); | |
701 | spin_lock_init(&mddi->int_lock); | |
702 | init_waitqueue_head(&mddi->int_wait); | |
703 | ||
704 | ret = mddi_clk_setup(pdev, mddi, pdata->clk_rate); | |
705 | if (ret) { | |
706 | printk(KERN_ERR "mddi: failed to setup clock!\n"); | |
707 | goto error_clk_setup; | |
708 | } | |
709 | ||
710 | ret = mddi_rev_data_setup(mddi); | |
711 | if (ret) { | |
712 | printk(KERN_ERR "mddi: failed to setup rev data!\n"); | |
713 | goto error_rev_data; | |
714 | } | |
715 | ||
716 | mddi->int_enable = 0; | |
717 | mddi_writel(mddi->int_enable, INTEN); | |
f8798ccb | 718 | ret = request_irq(mddi->irq, mddi_isr, 0, "mddi", |
d480ace0 PM |
719 | &mddi->client_data); |
720 | if (ret) { | |
721 | printk(KERN_ERR "mddi: failed to request enable irq!\n"); | |
722 | goto error_request_irq; | |
723 | } | |
724 | ||
725 | /* turn on the mddi client bridge chip */ | |
726 | if (mddi->power_client) | |
727 | mddi->power_client(&mddi->client_data, 1); | |
728 | ||
729 | /* initialize the mddi registers */ | |
730 | mddi_set_auto_hibernate(&mddi->client_data, 0); | |
731 | mddi_writel(MDDI_CMD_RESET, CMD); | |
732 | mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND); | |
733 | mddi->version = mddi_init_registers(mddi); | |
734 | if (mddi->version < 0x20) { | |
735 | printk(KERN_ERR "mddi: unsupported version 0x%x\n", | |
736 | mddi->version); | |
737 | ret = -ENODEV; | |
738 | goto error_mddi_version; | |
739 | } | |
740 | ||
741 | /* read the capabilities off the client */ | |
742 | if (!mddi_get_client_caps(mddi)) { | |
743 | printk(KERN_INFO "mddi: no client found\n"); | |
744 | /* power down the panel */ | |
745 | mddi_writel(MDDI_CMD_POWERDOWN, CMD); | |
746 | printk(KERN_INFO "mddi powerdown: stat %x\n", mddi_readl(STAT)); | |
747 | msleep(100); | |
748 | printk(KERN_INFO "mddi powerdown: stat %x\n", mddi_readl(STAT)); | |
749 | return 0; | |
750 | } | |
751 | mddi_set_auto_hibernate(&mddi->client_data, 1); | |
752 | ||
753 | if (mddi->caps.Mfr_Name == 0 && mddi->caps.Product_Code == 0) | |
754 | pdata->fixup(&mddi->caps.Mfr_Name, &mddi->caps.Product_Code); | |
755 | ||
756 | mddi->client_pdev.id = 0; | |
757 | for (i = 0; i < pdata->num_clients; i++) { | |
758 | if (pdata->client_platform_data[i].product_id == | |
759 | (mddi->caps.Mfr_Name << 16 | mddi->caps.Product_Code)) { | |
760 | mddi->client_data.private_client_data = | |
761 | pdata->client_platform_data[i].client_data; | |
762 | mddi->client_pdev.name = | |
763 | pdata->client_platform_data[i].name; | |
764 | mddi->client_pdev.id = | |
765 | pdata->client_platform_data[i].id; | |
766 | /* XXX: possibly set clock */ | |
767 | break; | |
768 | } | |
769 | } | |
770 | ||
771 | if (i >= pdata->num_clients) | |
772 | mddi->client_pdev.name = "mddi_c_dummy"; | |
773 | printk(KERN_INFO "mddi: registering panel %s\n", | |
774 | mddi->client_pdev.name); | |
775 | ||
776 | mddi->client_data.suspend = mddi_suspend; | |
777 | mddi->client_data.resume = mddi_resume; | |
778 | mddi->client_data.activate_link = mddi_activate_link; | |
779 | mddi->client_data.remote_write = mddi_remote_write; | |
780 | mddi->client_data.remote_read = mddi_remote_read; | |
781 | mddi->client_data.auto_hibernate = mddi_set_auto_hibernate; | |
782 | mddi->client_data.fb_resource = pdata->fb_resource; | |
783 | if (pdev->id == 0) | |
784 | mddi->client_data.interface_type = MSM_MDDI_PMDH_INTERFACE; | |
785 | else if (pdev->id == 1) | |
786 | mddi->client_data.interface_type = MSM_MDDI_EMDH_INTERFACE; | |
787 | else { | |
788 | printk(KERN_ERR "mddi: can not determine interface %d!\n", | |
789 | pdev->id); | |
790 | ret = -EINVAL; | |
791 | goto error_mddi_interface; | |
792 | } | |
793 | ||
794 | mddi->client_pdev.dev.platform_data = &mddi->client_data; | |
795 | printk(KERN_INFO "mddi: publish: %s\n", mddi->client_name); | |
796 | platform_device_register(&mddi->client_pdev); | |
797 | return 0; | |
798 | ||
799 | error_mddi_interface: | |
800 | error_mddi_version: | |
801 | free_irq(mddi->irq, 0); | |
802 | error_request_irq: | |
803 | dma_free_coherent(NULL, 0x1000, mddi->rev_data, mddi->rev_addr); | |
804 | error_rev_data: | |
805 | error_clk_setup: | |
806 | error_get_irq_resource: | |
807 | iounmap(mddi->base); | |
808 | error_ioremap: | |
809 | ||
810 | printk(KERN_INFO "mddi: mddi_init() failed (%d)\n", ret); | |
811 | return ret; | |
812 | } | |
813 | ||
814 | ||
815 | static struct platform_driver mddi_driver = { | |
816 | .probe = mddi_probe, | |
817 | .driver = { .name = "msm_mddi" }, | |
818 | }; | |
819 | ||
820 | static int __init _mddi_init(void) | |
821 | { | |
822 | return platform_driver_register(&mddi_driver); | |
823 | } | |
824 | ||
825 | module_init(_mddi_init); |