OMAP: DSS2: check for manager when enabling display
[deliverable/linux.git] / drivers / video / omap2 / dss / sdi.c
CommitLineData
23c0a7a6
TV
1/*
2 * linux/drivers/video/omap2/dss/sdi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#define DSS_SUBSYS_NAME "SDI"
21
22#include <linux/kernel.h>
23c0a7a6
TV
23#include <linux/delay.h>
24#include <linux/err.h>
508886cf 25#include <linux/regulator/consumer.h>
23c0a7a6 26
a0b38cc4 27#include <video/omapdss.h>
23c0a7a6
TV
28#include "dss.h"
29
30static struct {
23c0a7a6 31 bool update_enabled;
508886cf 32 struct regulator *vdds_sdi_reg;
23c0a7a6
TV
33} sdi;
34
64ba4f74
SS
35static void sdi_basic_init(struct omap_dss_device *dssdev)
36
23c0a7a6 37{
64ba4f74
SS
38 dispc_set_parallel_interface_mode(dssdev->manager->id,
39 OMAP_DSS_PARALLELMODE_BYPASS);
40
41 dispc_set_lcd_display_type(dssdev->manager->id,
42 OMAP_DSS_LCD_DISPLAY_TFT);
23c0a7a6 43
64ba4f74 44 dispc_set_tft_data_lines(dssdev->manager->id, 24);
23c0a7a6
TV
45 dispc_lcd_enable_signal_polarity(1);
46}
47
37ac60e4 48int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
23c0a7a6
TV
49{
50 struct omap_video_timings *t = &dssdev->panel.timings;
51 struct dss_clock_info dss_cinfo;
52 struct dispc_clock_info dispc_cinfo;
53 u16 lck_div, pck_div;
54 unsigned long fck;
55 unsigned long pck;
56 int r;
57
05e1d606
TV
58 if (dssdev->manager == NULL) {
59 DSSERR("failed to enable display: no manager\n");
60 return -ENODEV;
61 }
62
23c0a7a6
TV
63 r = omap_dss_start_device(dssdev);
64 if (r) {
65 DSSERR("failed to start device\n");
4fbafaf3 66 goto err_start_dev;
23c0a7a6
TV
67 }
68
508886cf
RQ
69 r = regulator_enable(sdi.vdds_sdi_reg);
70 if (r)
4fbafaf3 71 goto err_reg_enable;
508886cf 72
4fbafaf3
TV
73 r = dss_runtime_get();
74 if (r)
75 goto err_get_dss;
76
77 r = dispc_runtime_get();
78 if (r)
79 goto err_get_dispc;
23c0a7a6 80
64ba4f74 81 sdi_basic_init(dssdev);
23c0a7a6
TV
82
83 /* 15.5.9.1.2 */
84 dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF;
85
ff1b2cde
SS
86 dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
87 dssdev->panel.acbi, dssdev->panel.acb);
23c0a7a6 88
42c9dee8
TV
89 r = dss_calc_clock_div(1, t->pixel_clock * 1000,
90 &dss_cinfo, &dispc_cinfo);
23c0a7a6 91 if (r)
4fbafaf3 92 goto err_calc_clock_div;
23c0a7a6
TV
93
94 fck = dss_cinfo.fck;
95 lck_div = dispc_cinfo.lck_div;
96 pck_div = dispc_cinfo.pck_div;
97
98 pck = fck / lck_div / pck_div / 1000;
99
100 if (pck != t->pixel_clock) {
101 DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
102 "got %lu kHz\n",
103 t->pixel_clock, pck);
104
105 t->pixel_clock = pck;
106 }
107
108
64ba4f74 109 dispc_set_lcd_timings(dssdev->manager->id, t);
23c0a7a6
TV
110
111 r = dss_set_clock_div(&dss_cinfo);
112 if (r)
4fbafaf3 113 goto err_set_dss_clock_div;
23c0a7a6 114
ff1b2cde 115 r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
23c0a7a6 116 if (r)
4fbafaf3 117 goto err_set_dispc_clock_div;
23c0a7a6 118
42c9dee8
TV
119 dss_sdi_init(dssdev->phy.sdi.datapairs);
120 r = dss_sdi_enable();
121 if (r)
4fbafaf3 122 goto err_sdi_enable;
42c9dee8 123 mdelay(2);
23c0a7a6 124
a2faee84 125 dssdev->manager->enable(dssdev->manager);
23c0a7a6 126
23c0a7a6 127 return 0;
4fbafaf3
TV
128
129err_sdi_enable:
130err_set_dispc_clock_div:
131err_set_dss_clock_div:
132err_calc_clock_div:
133 dispc_runtime_put();
134err_get_dispc:
135 dss_runtime_put();
136err_get_dss:
508886cf 137 regulator_disable(sdi.vdds_sdi_reg);
4fbafaf3 138err_reg_enable:
23c0a7a6 139 omap_dss_stop_device(dssdev);
4fbafaf3 140err_start_dev:
23c0a7a6
TV
141 return r;
142}
37ac60e4 143EXPORT_SYMBOL(omapdss_sdi_display_enable);
23c0a7a6 144
37ac60e4 145void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
23c0a7a6 146{
a2faee84 147 dssdev->manager->disable(dssdev->manager);
23c0a7a6
TV
148
149 dss_sdi_disable();
150
4fbafaf3
TV
151 dispc_runtime_put();
152 dss_runtime_put();
23c0a7a6 153
508886cf
RQ
154 regulator_disable(sdi.vdds_sdi_reg);
155
23c0a7a6
TV
156 omap_dss_stop_device(dssdev);
157}
37ac60e4 158EXPORT_SYMBOL(omapdss_sdi_display_disable);
23c0a7a6 159
23c0a7a6
TV
160int sdi_init_display(struct omap_dss_device *dssdev)
161{
162 DSSDBG("SDI init\n");
163
5f42f2ce
TV
164 if (sdi.vdds_sdi_reg == NULL) {
165 struct regulator *vdds_sdi;
166
167 vdds_sdi = dss_get_vdds_sdi();
168
169 if (IS_ERR(vdds_sdi)) {
170 DSSERR("can't get VDDS_SDI regulator\n");
171 return PTR_ERR(vdds_sdi);
172 }
173
174 sdi.vdds_sdi_reg = vdds_sdi;
175 }
176
23c0a7a6
TV
177 return 0;
178}
179
42c9dee8 180int sdi_init(void)
23c0a7a6 181{
23c0a7a6
TV
182 return 0;
183}
184
185void sdi_exit(void)
186{
187}
This page took 0.140839 seconds and 5 git commands to generate.