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23c0a7a6 TV |
1 | /* |
2 | * linux/drivers/video/omap2/dss/sdi.c | |
3 | * | |
4 | * Copyright (C) 2009 Nokia Corporation | |
5 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #define DSS_SUBSYS_NAME "SDI" | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/err.h> | |
508886cf | 26 | #include <linux/regulator/consumer.h> |
23c0a7a6 | 27 | |
a0b38cc4 | 28 | #include <video/omapdss.h> |
508886cf | 29 | #include <plat/cpu.h> |
23c0a7a6 TV |
30 | #include "dss.h" |
31 | ||
32 | static struct { | |
23c0a7a6 | 33 | bool update_enabled; |
508886cf | 34 | struct regulator *vdds_sdi_reg; |
23c0a7a6 TV |
35 | } sdi; |
36 | ||
64ba4f74 SS |
37 | static void sdi_basic_init(struct omap_dss_device *dssdev) |
38 | ||
23c0a7a6 | 39 | { |
64ba4f74 SS |
40 | dispc_set_parallel_interface_mode(dssdev->manager->id, |
41 | OMAP_DSS_PARALLELMODE_BYPASS); | |
42 | ||
43 | dispc_set_lcd_display_type(dssdev->manager->id, | |
44 | OMAP_DSS_LCD_DISPLAY_TFT); | |
23c0a7a6 | 45 | |
64ba4f74 | 46 | dispc_set_tft_data_lines(dssdev->manager->id, 24); |
23c0a7a6 TV |
47 | dispc_lcd_enable_signal_polarity(1); |
48 | } | |
49 | ||
37ac60e4 | 50 | int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) |
23c0a7a6 TV |
51 | { |
52 | struct omap_video_timings *t = &dssdev->panel.timings; | |
53 | struct dss_clock_info dss_cinfo; | |
54 | struct dispc_clock_info dispc_cinfo; | |
55 | u16 lck_div, pck_div; | |
56 | unsigned long fck; | |
57 | unsigned long pck; | |
58 | int r; | |
59 | ||
60 | r = omap_dss_start_device(dssdev); | |
61 | if (r) { | |
62 | DSSERR("failed to start device\n"); | |
63 | goto err0; | |
64 | } | |
65 | ||
508886cf RQ |
66 | r = regulator_enable(sdi.vdds_sdi_reg); |
67 | if (r) | |
68 | goto err1; | |
69 | ||
42c9dee8 | 70 | dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); |
23c0a7a6 | 71 | |
64ba4f74 | 72 | sdi_basic_init(dssdev); |
23c0a7a6 TV |
73 | |
74 | /* 15.5.9.1.2 */ | |
75 | dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF; | |
76 | ||
ff1b2cde SS |
77 | dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config, |
78 | dssdev->panel.acbi, dssdev->panel.acb); | |
23c0a7a6 | 79 | |
42c9dee8 TV |
80 | r = dss_calc_clock_div(1, t->pixel_clock * 1000, |
81 | &dss_cinfo, &dispc_cinfo); | |
23c0a7a6 TV |
82 | if (r) |
83 | goto err2; | |
84 | ||
85 | fck = dss_cinfo.fck; | |
86 | lck_div = dispc_cinfo.lck_div; | |
87 | pck_div = dispc_cinfo.pck_div; | |
88 | ||
89 | pck = fck / lck_div / pck_div / 1000; | |
90 | ||
91 | if (pck != t->pixel_clock) { | |
92 | DSSWARN("Could not find exact pixel clock. Requested %d kHz, " | |
93 | "got %lu kHz\n", | |
94 | t->pixel_clock, pck); | |
95 | ||
96 | t->pixel_clock = pck; | |
97 | } | |
98 | ||
99 | ||
64ba4f74 | 100 | dispc_set_lcd_timings(dssdev->manager->id, t); |
23c0a7a6 TV |
101 | |
102 | r = dss_set_clock_div(&dss_cinfo); | |
103 | if (r) | |
104 | goto err2; | |
105 | ||
ff1b2cde | 106 | r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo); |
23c0a7a6 TV |
107 | if (r) |
108 | goto err2; | |
109 | ||
42c9dee8 TV |
110 | dss_sdi_init(dssdev->phy.sdi.datapairs); |
111 | r = dss_sdi_enable(); | |
112 | if (r) | |
113 | goto err1; | |
114 | mdelay(2); | |
23c0a7a6 | 115 | |
a2faee84 | 116 | dssdev->manager->enable(dssdev->manager); |
23c0a7a6 | 117 | |
23c0a7a6 | 118 | return 0; |
23c0a7a6 | 119 | err2: |
6af9cd14 | 120 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); |
508886cf | 121 | regulator_disable(sdi.vdds_sdi_reg); |
23c0a7a6 TV |
122 | err1: |
123 | omap_dss_stop_device(dssdev); | |
124 | err0: | |
125 | return r; | |
126 | } | |
37ac60e4 | 127 | EXPORT_SYMBOL(omapdss_sdi_display_enable); |
23c0a7a6 | 128 | |
37ac60e4 | 129 | void omapdss_sdi_display_disable(struct omap_dss_device *dssdev) |
23c0a7a6 | 130 | { |
a2faee84 | 131 | dssdev->manager->disable(dssdev->manager); |
23c0a7a6 TV |
132 | |
133 | dss_sdi_disable(); | |
134 | ||
6af9cd14 | 135 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); |
23c0a7a6 | 136 | |
508886cf RQ |
137 | regulator_disable(sdi.vdds_sdi_reg); |
138 | ||
23c0a7a6 TV |
139 | omap_dss_stop_device(dssdev); |
140 | } | |
37ac60e4 | 141 | EXPORT_SYMBOL(omapdss_sdi_display_disable); |
23c0a7a6 | 142 | |
23c0a7a6 TV |
143 | int sdi_init_display(struct omap_dss_device *dssdev) |
144 | { | |
145 | DSSDBG("SDI init\n"); | |
146 | ||
5f42f2ce TV |
147 | if (sdi.vdds_sdi_reg == NULL) { |
148 | struct regulator *vdds_sdi; | |
149 | ||
150 | vdds_sdi = dss_get_vdds_sdi(); | |
151 | ||
152 | if (IS_ERR(vdds_sdi)) { | |
153 | DSSERR("can't get VDDS_SDI regulator\n"); | |
154 | return PTR_ERR(vdds_sdi); | |
155 | } | |
156 | ||
157 | sdi.vdds_sdi_reg = vdds_sdi; | |
158 | } | |
159 | ||
23c0a7a6 TV |
160 | return 0; |
161 | } | |
162 | ||
42c9dee8 | 163 | int sdi_init(void) |
23c0a7a6 | 164 | { |
23c0a7a6 TV |
165 | return 0; |
166 | } | |
167 | ||
168 | void sdi_exit(void) | |
169 | { | |
170 | } |