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b39a982d TV |
1 | /* |
2 | * linux/drivers/video/omap2/omapfb-main.c | |
3 | * | |
4 | * Copyright (C) 2008 Nokia Corporation | |
5 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> | |
6 | * | |
7 | * Some code and ideas taken from drivers/video/omap/ driver | |
8 | * by Imre Deak. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License version 2 as published by | |
12 | * the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
15 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
16 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
17 | * more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License along with | |
20 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/delay.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
b39a982d TV |
26 | #include <linux/fb.h> |
27 | #include <linux/dma-mapping.h> | |
28 | #include <linux/vmalloc.h> | |
29 | #include <linux/device.h> | |
30 | #include <linux/platform_device.h> | |
31 | #include <linux/omapfb.h> | |
32 | ||
a0b38cc4 | 33 | #include <video/omapdss.h> |
b39a982d TV |
34 | #include <plat/vram.h> |
35 | #include <plat/vrfb.h> | |
36 | ||
37 | #include "omapfb.h" | |
38 | ||
39 | #define MODULE_NAME "omapfb" | |
40 | ||
41 | #define OMAPFB_PLANE_XRES_MIN 8 | |
42 | #define OMAPFB_PLANE_YRES_MIN 8 | |
43 | ||
44 | static char *def_mode; | |
45 | static char *def_vram; | |
90ab5ee9 | 46 | static bool def_vrfb; |
b39a982d | 47 | static int def_rotate; |
90ab5ee9 | 48 | static bool def_mirror; |
27cc213e TV |
49 | static bool auto_update; |
50 | static unsigned int auto_update_freq; | |
51 | module_param(auto_update, bool, 0); | |
52 | module_param(auto_update_freq, uint, 0644); | |
b39a982d TV |
53 | |
54 | #ifdef DEBUG | |
90ab5ee9 | 55 | bool omapfb_debug; |
b39a982d | 56 | module_param_named(debug, omapfb_debug, bool, 0644); |
90ab5ee9 | 57 | static bool omapfb_test_pattern; |
b39a982d TV |
58 | module_param_named(test, omapfb_test_pattern, bool, 0644); |
59 | #endif | |
60 | ||
61 | static int omapfb_fb_init(struct omapfb2_device *fbdev, struct fb_info *fbi); | |
a2699504 TV |
62 | static int omapfb_get_recommended_bpp(struct omapfb2_device *fbdev, |
63 | struct omap_dss_device *dssdev); | |
b39a982d TV |
64 | |
65 | #ifdef DEBUG | |
66 | static void draw_pixel(struct fb_info *fbi, int x, int y, unsigned color) | |
67 | { | |
68 | struct fb_var_screeninfo *var = &fbi->var; | |
69 | struct fb_fix_screeninfo *fix = &fbi->fix; | |
70 | void __iomem *addr = fbi->screen_base; | |
71 | const unsigned bytespp = var->bits_per_pixel >> 3; | |
72 | const unsigned line_len = fix->line_length / bytespp; | |
73 | ||
74 | int r = (color >> 16) & 0xff; | |
75 | int g = (color >> 8) & 0xff; | |
76 | int b = (color >> 0) & 0xff; | |
77 | ||
78 | if (var->bits_per_pixel == 16) { | |
79 | u16 __iomem *p = (u16 __iomem *)addr; | |
80 | p += y * line_len + x; | |
81 | ||
82 | r = r * 32 / 256; | |
83 | g = g * 64 / 256; | |
84 | b = b * 32 / 256; | |
85 | ||
86 | __raw_writew((r << 11) | (g << 5) | (b << 0), p); | |
87 | } else if (var->bits_per_pixel == 24) { | |
88 | u8 __iomem *p = (u8 __iomem *)addr; | |
89 | p += (y * line_len + x) * 3; | |
90 | ||
91 | __raw_writeb(b, p + 0); | |
92 | __raw_writeb(g, p + 1); | |
93 | __raw_writeb(r, p + 2); | |
94 | } else if (var->bits_per_pixel == 32) { | |
95 | u32 __iomem *p = (u32 __iomem *)addr; | |
96 | p += y * line_len + x; | |
97 | __raw_writel(color, p); | |
98 | } | |
99 | } | |
100 | ||
101 | static void fill_fb(struct fb_info *fbi) | |
102 | { | |
103 | struct fb_var_screeninfo *var = &fbi->var; | |
104 | const short w = var->xres_virtual; | |
105 | const short h = var->yres_virtual; | |
106 | void __iomem *addr = fbi->screen_base; | |
107 | int y, x; | |
108 | ||
109 | if (!addr) | |
110 | return; | |
111 | ||
112 | DBG("fill_fb %dx%d, line_len %d bytes\n", w, h, fbi->fix.line_length); | |
113 | ||
114 | for (y = 0; y < h; y++) { | |
115 | for (x = 0; x < w; x++) { | |
116 | if (x < 20 && y < 20) | |
117 | draw_pixel(fbi, x, y, 0xffffff); | |
118 | else if (x < 20 && (y > 20 && y < h - 20)) | |
119 | draw_pixel(fbi, x, y, 0xff); | |
120 | else if (y < 20 && (x > 20 && x < w - 20)) | |
121 | draw_pixel(fbi, x, y, 0xff00); | |
122 | else if (x > w - 20 && (y > 20 && y < h - 20)) | |
123 | draw_pixel(fbi, x, y, 0xff0000); | |
124 | else if (y > h - 20 && (x > 20 && x < w - 20)) | |
125 | draw_pixel(fbi, x, y, 0xffff00); | |
126 | else if (x == 20 || x == w - 20 || | |
127 | y == 20 || y == h - 20) | |
128 | draw_pixel(fbi, x, y, 0xffffff); | |
129 | else if (x == y || w - x == h - y) | |
130 | draw_pixel(fbi, x, y, 0xff00ff); | |
131 | else if (w - x == y || x == h - y) | |
132 | draw_pixel(fbi, x, y, 0x00ffff); | |
133 | else if (x > 20 && y > 20 && x < w - 20 && y < h - 20) { | |
134 | int t = x * 3 / w; | |
135 | unsigned r = 0, g = 0, b = 0; | |
136 | unsigned c; | |
137 | if (var->bits_per_pixel == 16) { | |
138 | if (t == 0) | |
139 | b = (y % 32) * 256 / 32; | |
140 | else if (t == 1) | |
141 | g = (y % 64) * 256 / 64; | |
142 | else if (t == 2) | |
143 | r = (y % 32) * 256 / 32; | |
144 | } else { | |
145 | if (t == 0) | |
146 | b = (y % 256); | |
147 | else if (t == 1) | |
148 | g = (y % 256); | |
149 | else if (t == 2) | |
150 | r = (y % 256); | |
151 | } | |
152 | c = (r << 16) | (g << 8) | (b << 0); | |
153 | draw_pixel(fbi, x, y, c); | |
154 | } else { | |
155 | draw_pixel(fbi, x, y, 0); | |
156 | } | |
157 | } | |
158 | } | |
159 | } | |
160 | #endif | |
161 | ||
a4c1a148 | 162 | static unsigned omapfb_get_vrfb_offset(const struct omapfb_info *ofbi, int rot) |
b39a982d | 163 | { |
078ff546 | 164 | const struct vrfb *vrfb = &ofbi->region->vrfb; |
b39a982d TV |
165 | unsigned offset; |
166 | ||
167 | switch (rot) { | |
168 | case FB_ROTATE_UR: | |
169 | offset = 0; | |
170 | break; | |
171 | case FB_ROTATE_CW: | |
172 | offset = vrfb->yoffset; | |
173 | break; | |
174 | case FB_ROTATE_UD: | |
175 | offset = vrfb->yoffset * OMAP_VRFB_LINE_LEN + vrfb->xoffset; | |
176 | break; | |
177 | case FB_ROTATE_CCW: | |
178 | offset = vrfb->xoffset * OMAP_VRFB_LINE_LEN; | |
179 | break; | |
180 | default: | |
181 | BUG(); | |
4a75cb85 | 182 | return 0; |
b39a982d TV |
183 | } |
184 | ||
185 | offset *= vrfb->bytespp; | |
186 | ||
187 | return offset; | |
188 | } | |
189 | ||
a4c1a148 | 190 | static u32 omapfb_get_region_rot_paddr(const struct omapfb_info *ofbi, int rot) |
b39a982d TV |
191 | { |
192 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { | |
078ff546 | 193 | return ofbi->region->vrfb.paddr[rot] |
b39a982d TV |
194 | + omapfb_get_vrfb_offset(ofbi, rot); |
195 | } else { | |
078ff546 | 196 | return ofbi->region->paddr; |
b39a982d TV |
197 | } |
198 | } | |
199 | ||
a4c1a148 | 200 | static u32 omapfb_get_region_paddr(const struct omapfb_info *ofbi) |
b39a982d TV |
201 | { |
202 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) | |
078ff546 | 203 | return ofbi->region->vrfb.paddr[0]; |
b39a982d | 204 | else |
078ff546 | 205 | return ofbi->region->paddr; |
b39a982d TV |
206 | } |
207 | ||
a4c1a148 | 208 | static void __iomem *omapfb_get_region_vaddr(const struct omapfb_info *ofbi) |
b39a982d TV |
209 | { |
210 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) | |
078ff546 | 211 | return ofbi->region->vrfb.vaddr[0]; |
b39a982d | 212 | else |
078ff546 | 213 | return ofbi->region->vaddr; |
b39a982d TV |
214 | } |
215 | ||
216 | static struct omapfb_colormode omapfb_colormodes[] = { | |
217 | { | |
218 | .dssmode = OMAP_DSS_COLOR_UYVY, | |
219 | .bits_per_pixel = 16, | |
220 | .nonstd = OMAPFB_COLOR_YUV422, | |
221 | }, { | |
222 | .dssmode = OMAP_DSS_COLOR_YUV2, | |
223 | .bits_per_pixel = 16, | |
224 | .nonstd = OMAPFB_COLOR_YUY422, | |
225 | }, { | |
226 | .dssmode = OMAP_DSS_COLOR_ARGB16, | |
227 | .bits_per_pixel = 16, | |
228 | .red = { .length = 4, .offset = 8, .msb_right = 0 }, | |
229 | .green = { .length = 4, .offset = 4, .msb_right = 0 }, | |
230 | .blue = { .length = 4, .offset = 0, .msb_right = 0 }, | |
231 | .transp = { .length = 4, .offset = 12, .msb_right = 0 }, | |
232 | }, { | |
233 | .dssmode = OMAP_DSS_COLOR_RGB16, | |
234 | .bits_per_pixel = 16, | |
235 | .red = { .length = 5, .offset = 11, .msb_right = 0 }, | |
236 | .green = { .length = 6, .offset = 5, .msb_right = 0 }, | |
237 | .blue = { .length = 5, .offset = 0, .msb_right = 0 }, | |
238 | .transp = { .length = 0, .offset = 0, .msb_right = 0 }, | |
239 | }, { | |
240 | .dssmode = OMAP_DSS_COLOR_RGB24P, | |
241 | .bits_per_pixel = 24, | |
242 | .red = { .length = 8, .offset = 16, .msb_right = 0 }, | |
243 | .green = { .length = 8, .offset = 8, .msb_right = 0 }, | |
244 | .blue = { .length = 8, .offset = 0, .msb_right = 0 }, | |
245 | .transp = { .length = 0, .offset = 0, .msb_right = 0 }, | |
246 | }, { | |
247 | .dssmode = OMAP_DSS_COLOR_RGB24U, | |
248 | .bits_per_pixel = 32, | |
249 | .red = { .length = 8, .offset = 16, .msb_right = 0 }, | |
250 | .green = { .length = 8, .offset = 8, .msb_right = 0 }, | |
251 | .blue = { .length = 8, .offset = 0, .msb_right = 0 }, | |
252 | .transp = { .length = 0, .offset = 0, .msb_right = 0 }, | |
253 | }, { | |
254 | .dssmode = OMAP_DSS_COLOR_ARGB32, | |
255 | .bits_per_pixel = 32, | |
256 | .red = { .length = 8, .offset = 16, .msb_right = 0 }, | |
257 | .green = { .length = 8, .offset = 8, .msb_right = 0 }, | |
258 | .blue = { .length = 8, .offset = 0, .msb_right = 0 }, | |
259 | .transp = { .length = 8, .offset = 24, .msb_right = 0 }, | |
260 | }, { | |
261 | .dssmode = OMAP_DSS_COLOR_RGBA32, | |
262 | .bits_per_pixel = 32, | |
263 | .red = { .length = 8, .offset = 24, .msb_right = 0 }, | |
264 | .green = { .length = 8, .offset = 16, .msb_right = 0 }, | |
265 | .blue = { .length = 8, .offset = 8, .msb_right = 0 }, | |
266 | .transp = { .length = 8, .offset = 0, .msb_right = 0 }, | |
267 | }, { | |
268 | .dssmode = OMAP_DSS_COLOR_RGBX32, | |
269 | .bits_per_pixel = 32, | |
270 | .red = { .length = 8, .offset = 24, .msb_right = 0 }, | |
271 | .green = { .length = 8, .offset = 16, .msb_right = 0 }, | |
272 | .blue = { .length = 8, .offset = 8, .msb_right = 0 }, | |
273 | .transp = { .length = 0, .offset = 0, .msb_right = 0 }, | |
274 | }, | |
275 | }; | |
276 | ||
277 | static bool cmp_var_to_colormode(struct fb_var_screeninfo *var, | |
278 | struct omapfb_colormode *color) | |
279 | { | |
280 | bool cmp_component(struct fb_bitfield *f1, struct fb_bitfield *f2) | |
281 | { | |
282 | return f1->length == f2->length && | |
283 | f1->offset == f2->offset && | |
284 | f1->msb_right == f2->msb_right; | |
285 | } | |
286 | ||
287 | if (var->bits_per_pixel == 0 || | |
288 | var->red.length == 0 || | |
289 | var->blue.length == 0 || | |
290 | var->green.length == 0) | |
291 | return 0; | |
292 | ||
293 | return var->bits_per_pixel == color->bits_per_pixel && | |
294 | cmp_component(&var->red, &color->red) && | |
295 | cmp_component(&var->green, &color->green) && | |
296 | cmp_component(&var->blue, &color->blue) && | |
297 | cmp_component(&var->transp, &color->transp); | |
298 | } | |
299 | ||
300 | static void assign_colormode_to_var(struct fb_var_screeninfo *var, | |
301 | struct omapfb_colormode *color) | |
302 | { | |
303 | var->bits_per_pixel = color->bits_per_pixel; | |
304 | var->nonstd = color->nonstd; | |
305 | var->red = color->red; | |
306 | var->green = color->green; | |
307 | var->blue = color->blue; | |
308 | var->transp = color->transp; | |
309 | } | |
310 | ||
311 | static int fb_mode_to_dss_mode(struct fb_var_screeninfo *var, | |
312 | enum omap_color_mode *mode) | |
313 | { | |
314 | enum omap_color_mode dssmode; | |
315 | int i; | |
316 | ||
317 | /* first match with nonstd field */ | |
318 | if (var->nonstd) { | |
319 | for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { | |
320 | struct omapfb_colormode *m = &omapfb_colormodes[i]; | |
321 | if (var->nonstd == m->nonstd) { | |
322 | assign_colormode_to_var(var, m); | |
323 | *mode = m->dssmode; | |
324 | return 0; | |
325 | } | |
326 | } | |
327 | ||
328 | return -EINVAL; | |
329 | } | |
330 | ||
331 | /* then try exact match of bpp and colors */ | |
332 | for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { | |
333 | struct omapfb_colormode *m = &omapfb_colormodes[i]; | |
334 | if (cmp_var_to_colormode(var, m)) { | |
335 | assign_colormode_to_var(var, m); | |
336 | *mode = m->dssmode; | |
337 | return 0; | |
338 | } | |
339 | } | |
340 | ||
341 | /* match with bpp if user has not filled color fields | |
342 | * properly */ | |
343 | switch (var->bits_per_pixel) { | |
344 | case 1: | |
345 | dssmode = OMAP_DSS_COLOR_CLUT1; | |
346 | break; | |
347 | case 2: | |
348 | dssmode = OMAP_DSS_COLOR_CLUT2; | |
349 | break; | |
350 | case 4: | |
351 | dssmode = OMAP_DSS_COLOR_CLUT4; | |
352 | break; | |
353 | case 8: | |
354 | dssmode = OMAP_DSS_COLOR_CLUT8; | |
355 | break; | |
356 | case 12: | |
357 | dssmode = OMAP_DSS_COLOR_RGB12U; | |
358 | break; | |
359 | case 16: | |
360 | dssmode = OMAP_DSS_COLOR_RGB16; | |
361 | break; | |
362 | case 24: | |
363 | dssmode = OMAP_DSS_COLOR_RGB24P; | |
364 | break; | |
365 | case 32: | |
366 | dssmode = OMAP_DSS_COLOR_RGB24U; | |
367 | break; | |
368 | default: | |
369 | return -EINVAL; | |
370 | } | |
371 | ||
372 | for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { | |
373 | struct omapfb_colormode *m = &omapfb_colormodes[i]; | |
374 | if (dssmode == m->dssmode) { | |
375 | assign_colormode_to_var(var, m); | |
376 | *mode = m->dssmode; | |
377 | return 0; | |
378 | } | |
379 | } | |
380 | ||
381 | return -EINVAL; | |
382 | } | |
383 | ||
384 | static int check_fb_res_bounds(struct fb_var_screeninfo *var) | |
385 | { | |
386 | int xres_min = OMAPFB_PLANE_XRES_MIN; | |
387 | int xres_max = 2048; | |
388 | int yres_min = OMAPFB_PLANE_YRES_MIN; | |
389 | int yres_max = 2048; | |
390 | ||
391 | /* XXX: some applications seem to set virtual res to 0. */ | |
392 | if (var->xres_virtual == 0) | |
393 | var->xres_virtual = var->xres; | |
394 | ||
395 | if (var->yres_virtual == 0) | |
396 | var->yres_virtual = var->yres; | |
397 | ||
398 | if (var->xres_virtual < xres_min || var->yres_virtual < yres_min) | |
399 | return -EINVAL; | |
400 | ||
401 | if (var->xres < xres_min) | |
402 | var->xres = xres_min; | |
403 | if (var->yres < yres_min) | |
404 | var->yres = yres_min; | |
405 | if (var->xres > xres_max) | |
406 | var->xres = xres_max; | |
407 | if (var->yres > yres_max) | |
408 | var->yres = yres_max; | |
409 | ||
410 | if (var->xres > var->xres_virtual) | |
411 | var->xres = var->xres_virtual; | |
412 | if (var->yres > var->yres_virtual) | |
413 | var->yres = var->yres_virtual; | |
414 | ||
415 | return 0; | |
416 | } | |
417 | ||
418 | static void shrink_height(unsigned long max_frame_size, | |
419 | struct fb_var_screeninfo *var) | |
420 | { | |
421 | DBG("can't fit FB into memory, reducing y\n"); | |
422 | var->yres_virtual = max_frame_size / | |
423 | (var->xres_virtual * var->bits_per_pixel >> 3); | |
424 | ||
425 | if (var->yres_virtual < OMAPFB_PLANE_YRES_MIN) | |
426 | var->yres_virtual = OMAPFB_PLANE_YRES_MIN; | |
427 | ||
428 | if (var->yres > var->yres_virtual) | |
429 | var->yres = var->yres_virtual; | |
430 | } | |
431 | ||
432 | static void shrink_width(unsigned long max_frame_size, | |
433 | struct fb_var_screeninfo *var) | |
434 | { | |
435 | DBG("can't fit FB into memory, reducing x\n"); | |
436 | var->xres_virtual = max_frame_size / var->yres_virtual / | |
437 | (var->bits_per_pixel >> 3); | |
438 | ||
439 | if (var->xres_virtual < OMAPFB_PLANE_XRES_MIN) | |
440 | var->xres_virtual = OMAPFB_PLANE_XRES_MIN; | |
441 | ||
442 | if (var->xres > var->xres_virtual) | |
443 | var->xres = var->xres_virtual; | |
444 | } | |
445 | ||
446 | static int check_vrfb_fb_size(unsigned long region_size, | |
447 | const struct fb_var_screeninfo *var) | |
448 | { | |
449 | unsigned long min_phys_size = omap_vrfb_min_phys_size(var->xres_virtual, | |
450 | var->yres_virtual, var->bits_per_pixel >> 3); | |
451 | ||
452 | return min_phys_size > region_size ? -EINVAL : 0; | |
453 | } | |
454 | ||
455 | static int check_fb_size(const struct omapfb_info *ofbi, | |
456 | struct fb_var_screeninfo *var) | |
457 | { | |
078ff546 | 458 | unsigned long max_frame_size = ofbi->region->size; |
b39a982d TV |
459 | int bytespp = var->bits_per_pixel >> 3; |
460 | unsigned long line_size = var->xres_virtual * bytespp; | |
461 | ||
462 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { | |
463 | /* One needs to check for both VRFB and OMAPFB limitations. */ | |
464 | if (check_vrfb_fb_size(max_frame_size, var)) | |
465 | shrink_height(omap_vrfb_max_height( | |
466 | max_frame_size, var->xres_virtual, bytespp) * | |
467 | line_size, var); | |
468 | ||
469 | if (check_vrfb_fb_size(max_frame_size, var)) { | |
470 | DBG("cannot fit FB to memory\n"); | |
471 | return -EINVAL; | |
472 | } | |
473 | ||
474 | return 0; | |
475 | } | |
476 | ||
477 | DBG("max frame size %lu, line size %lu\n", max_frame_size, line_size); | |
478 | ||
479 | if (line_size * var->yres_virtual > max_frame_size) | |
480 | shrink_height(max_frame_size, var); | |
481 | ||
482 | if (line_size * var->yres_virtual > max_frame_size) { | |
483 | shrink_width(max_frame_size, var); | |
484 | line_size = var->xres_virtual * bytespp; | |
485 | } | |
486 | ||
487 | if (line_size * var->yres_virtual > max_frame_size) { | |
488 | DBG("cannot fit FB to memory\n"); | |
489 | return -EINVAL; | |
490 | } | |
491 | ||
492 | return 0; | |
493 | } | |
494 | ||
495 | /* | |
496 | * Consider if VRFB assisted rotation is in use and if the virtual space for | |
497 | * the zero degree view needs to be mapped. The need for mapping also acts as | |
498 | * the trigger for setting up the hardware on the context in question. This | |
499 | * ensures that one does not attempt to access the virtual view before the | |
500 | * hardware is serving the address translations. | |
501 | */ | |
502 | static int setup_vrfb_rotation(struct fb_info *fbi) | |
503 | { | |
504 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
078ff546 | 505 | struct omapfb2_mem_region *rg = ofbi->region; |
b39a982d TV |
506 | struct vrfb *vrfb = &rg->vrfb; |
507 | struct fb_var_screeninfo *var = &fbi->var; | |
508 | struct fb_fix_screeninfo *fix = &fbi->fix; | |
509 | unsigned bytespp; | |
510 | bool yuv_mode; | |
511 | enum omap_color_mode mode; | |
512 | int r; | |
513 | bool reconf; | |
514 | ||
515 | if (!rg->size || ofbi->rotation_type != OMAP_DSS_ROT_VRFB) | |
516 | return 0; | |
517 | ||
518 | DBG("setup_vrfb_rotation\n"); | |
519 | ||
520 | r = fb_mode_to_dss_mode(var, &mode); | |
521 | if (r) | |
522 | return r; | |
523 | ||
524 | bytespp = var->bits_per_pixel >> 3; | |
525 | ||
526 | yuv_mode = mode == OMAP_DSS_COLOR_YUV2 || mode == OMAP_DSS_COLOR_UYVY; | |
527 | ||
528 | /* We need to reconfigure VRFB if the resolution changes, if yuv mode | |
529 | * is enabled/disabled, or if bytes per pixel changes */ | |
530 | ||
531 | /* XXX we shouldn't allow this when framebuffer is mmapped */ | |
532 | ||
533 | reconf = false; | |
534 | ||
535 | if (yuv_mode != vrfb->yuv_mode) | |
536 | reconf = true; | |
537 | else if (bytespp != vrfb->bytespp) | |
538 | reconf = true; | |
539 | else if (vrfb->xres != var->xres_virtual || | |
540 | vrfb->yres != var->yres_virtual) | |
541 | reconf = true; | |
542 | ||
543 | if (vrfb->vaddr[0] && reconf) { | |
544 | fbi->screen_base = NULL; | |
545 | fix->smem_start = 0; | |
546 | fix->smem_len = 0; | |
547 | iounmap(vrfb->vaddr[0]); | |
548 | vrfb->vaddr[0] = NULL; | |
549 | DBG("setup_vrfb_rotation: reset fb\n"); | |
550 | } | |
551 | ||
552 | if (vrfb->vaddr[0]) | |
553 | return 0; | |
554 | ||
555 | omap_vrfb_setup(&rg->vrfb, rg->paddr, | |
556 | var->xres_virtual, | |
557 | var->yres_virtual, | |
558 | bytespp, yuv_mode); | |
559 | ||
560 | /* Now one can ioremap the 0 angle view */ | |
561 | r = omap_vrfb_map_angle(vrfb, var->yres_virtual, 0); | |
562 | if (r) | |
563 | return r; | |
564 | ||
565 | /* used by open/write in fbmem.c */ | |
078ff546 | 566 | fbi->screen_base = ofbi->region->vrfb.vaddr[0]; |
b39a982d | 567 | |
078ff546 | 568 | fix->smem_start = ofbi->region->vrfb.paddr[0]; |
b39a982d TV |
569 | |
570 | switch (var->nonstd) { | |
571 | case OMAPFB_COLOR_YUV422: | |
572 | case OMAPFB_COLOR_YUY422: | |
573 | fix->line_length = | |
574 | (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 2; | |
575 | break; | |
576 | default: | |
577 | fix->line_length = | |
578 | (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 3; | |
579 | break; | |
580 | } | |
581 | ||
582 | fix->smem_len = var->yres_virtual * fix->line_length; | |
583 | ||
584 | return 0; | |
585 | } | |
586 | ||
587 | int dss_mode_to_fb_mode(enum omap_color_mode dssmode, | |
588 | struct fb_var_screeninfo *var) | |
589 | { | |
590 | int i; | |
591 | ||
592 | for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { | |
593 | struct omapfb_colormode *mode = &omapfb_colormodes[i]; | |
594 | if (dssmode == mode->dssmode) { | |
595 | assign_colormode_to_var(var, mode); | |
596 | return 0; | |
597 | } | |
598 | } | |
599 | return -ENOENT; | |
600 | } | |
601 | ||
602 | void set_fb_fix(struct fb_info *fbi) | |
603 | { | |
604 | struct fb_fix_screeninfo *fix = &fbi->fix; | |
605 | struct fb_var_screeninfo *var = &fbi->var; | |
606 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
078ff546 | 607 | struct omapfb2_mem_region *rg = ofbi->region; |
b39a982d TV |
608 | |
609 | DBG("set_fb_fix\n"); | |
610 | ||
611 | /* used by open/write in fbmem.c */ | |
612 | fbi->screen_base = (char __iomem *)omapfb_get_region_vaddr(ofbi); | |
613 | ||
614 | /* used by mmap in fbmem.c */ | |
615 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { | |
616 | switch (var->nonstd) { | |
617 | case OMAPFB_COLOR_YUV422: | |
618 | case OMAPFB_COLOR_YUY422: | |
619 | fix->line_length = | |
620 | (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 2; | |
621 | break; | |
622 | default: | |
623 | fix->line_length = | |
624 | (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 3; | |
625 | break; | |
626 | } | |
627 | ||
628 | fix->smem_len = var->yres_virtual * fix->line_length; | |
629 | } else { | |
630 | fix->line_length = | |
631 | (var->xres_virtual * var->bits_per_pixel) >> 3; | |
632 | fix->smem_len = rg->size; | |
633 | } | |
634 | ||
635 | fix->smem_start = omapfb_get_region_paddr(ofbi); | |
636 | ||
637 | fix->type = FB_TYPE_PACKED_PIXELS; | |
638 | ||
639 | if (var->nonstd) | |
640 | fix->visual = FB_VISUAL_PSEUDOCOLOR; | |
641 | else { | |
642 | switch (var->bits_per_pixel) { | |
643 | case 32: | |
644 | case 24: | |
645 | case 16: | |
646 | case 12: | |
647 | fix->visual = FB_VISUAL_TRUECOLOR; | |
648 | /* 12bpp is stored in 16 bits */ | |
649 | break; | |
650 | case 1: | |
651 | case 2: | |
652 | case 4: | |
653 | case 8: | |
654 | fix->visual = FB_VISUAL_PSEUDOCOLOR; | |
655 | break; | |
656 | } | |
657 | } | |
658 | ||
659 | fix->accel = FB_ACCEL_NONE; | |
660 | ||
661 | fix->xpanstep = 1; | |
662 | fix->ypanstep = 1; | |
663 | } | |
664 | ||
665 | /* check new var and possibly modify it to be ok */ | |
666 | int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var) | |
667 | { | |
668 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
669 | struct omap_dss_device *display = fb2display(fbi); | |
670 | enum omap_color_mode mode = 0; | |
671 | int i; | |
672 | int r; | |
673 | ||
674 | DBG("check_fb_var %d\n", ofbi->id); | |
675 | ||
1ceafc00 VS |
676 | WARN_ON(!atomic_read(&ofbi->region->lock_count)); |
677 | ||
b39a982d TV |
678 | r = fb_mode_to_dss_mode(var, &mode); |
679 | if (r) { | |
680 | DBG("cannot convert var to omap dss mode\n"); | |
681 | return r; | |
682 | } | |
683 | ||
684 | for (i = 0; i < ofbi->num_overlays; ++i) { | |
685 | if ((ofbi->overlays[i]->supported_modes & mode) == 0) { | |
686 | DBG("invalid mode\n"); | |
687 | return -EINVAL; | |
688 | } | |
689 | } | |
690 | ||
86f2d7dd | 691 | if (var->rotate > 3) |
b39a982d TV |
692 | return -EINVAL; |
693 | ||
694 | if (check_fb_res_bounds(var)) | |
695 | return -EINVAL; | |
696 | ||
276a1d43 | 697 | /* When no memory is allocated ignore the size check */ |
078ff546 | 698 | if (ofbi->region->size != 0 && check_fb_size(ofbi, var)) |
b39a982d TV |
699 | return -EINVAL; |
700 | ||
701 | if (var->xres + var->xoffset > var->xres_virtual) | |
702 | var->xoffset = var->xres_virtual - var->xres; | |
703 | if (var->yres + var->yoffset > var->yres_virtual) | |
704 | var->yoffset = var->yres_virtual - var->yres; | |
705 | ||
706 | DBG("xres = %d, yres = %d, vxres = %d, vyres = %d\n", | |
707 | var->xres, var->yres, | |
708 | var->xres_virtual, var->yres_virtual); | |
709 | ||
7a0987bf JN |
710 | if (display && display->driver->get_dimensions) { |
711 | u32 w, h; | |
712 | display->driver->get_dimensions(display, &w, &h); | |
713 | var->width = DIV_ROUND_CLOSEST(w, 1000); | |
714 | var->height = DIV_ROUND_CLOSEST(h, 1000); | |
715 | } else { | |
716 | var->height = -1; | |
717 | var->width = -1; | |
718 | } | |
719 | ||
b39a982d TV |
720 | var->grayscale = 0; |
721 | ||
69b2048f | 722 | if (display && display->driver->get_timings) { |
b39a982d | 723 | struct omap_video_timings timings; |
69b2048f | 724 | display->driver->get_timings(display, &timings); |
b39a982d TV |
725 | |
726 | /* pixclock in ps, the rest in pixclock */ | |
727 | var->pixclock = timings.pixel_clock != 0 ? | |
728 | KHZ2PICOS(timings.pixel_clock) : | |
729 | 0; | |
87ba8288 TK |
730 | var->left_margin = timings.hbp; |
731 | var->right_margin = timings.hfp; | |
732 | var->upper_margin = timings.vbp; | |
733 | var->lower_margin = timings.vfp; | |
b39a982d TV |
734 | var->hsync_len = timings.hsw; |
735 | var->vsync_len = timings.vsw; | |
783babf3 AT |
736 | var->sync |= timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH ? |
737 | FB_SYNC_HOR_HIGH_ACT : 0; | |
738 | var->sync |= timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH ? | |
739 | FB_SYNC_VERT_HIGH_ACT : 0; | |
23bae3ad AT |
740 | var->vmode = timings.interlace ? |
741 | FB_VMODE_INTERLACED : FB_VMODE_NONINTERLACED; | |
b39a982d TV |
742 | } else { |
743 | var->pixclock = 0; | |
744 | var->left_margin = 0; | |
745 | var->right_margin = 0; | |
746 | var->upper_margin = 0; | |
747 | var->lower_margin = 0; | |
748 | var->hsync_len = 0; | |
749 | var->vsync_len = 0; | |
783babf3 | 750 | var->sync = 0; |
23bae3ad | 751 | var->vmode = FB_VMODE_NONINTERLACED; |
b39a982d TV |
752 | } |
753 | ||
b39a982d TV |
754 | return 0; |
755 | } | |
756 | ||
757 | /* | |
758 | * --------------------------------------------------------------------------- | |
759 | * fbdev framework callbacks | |
760 | * --------------------------------------------------------------------------- | |
761 | */ | |
762 | static int omapfb_open(struct fb_info *fbi, int user) | |
763 | { | |
764 | return 0; | |
765 | } | |
766 | ||
767 | static int omapfb_release(struct fb_info *fbi, int user) | |
768 | { | |
b39a982d TV |
769 | return 0; |
770 | } | |
771 | ||
a4c1a148 VS |
772 | static unsigned calc_rotation_offset_dma(const struct fb_var_screeninfo *var, |
773 | const struct fb_fix_screeninfo *fix, int rotation) | |
b39a982d TV |
774 | { |
775 | unsigned offset; | |
776 | ||
777 | offset = var->yoffset * fix->line_length + | |
778 | var->xoffset * (var->bits_per_pixel >> 3); | |
779 | ||
780 | return offset; | |
781 | } | |
782 | ||
a4c1a148 VS |
783 | static unsigned calc_rotation_offset_vrfb(const struct fb_var_screeninfo *var, |
784 | const struct fb_fix_screeninfo *fix, int rotation) | |
b39a982d TV |
785 | { |
786 | unsigned offset; | |
787 | ||
788 | if (rotation == FB_ROTATE_UD) | |
789 | offset = (var->yres_virtual - var->yres) * | |
790 | fix->line_length; | |
791 | else if (rotation == FB_ROTATE_CW) | |
792 | offset = (var->yres_virtual - var->yres) * | |
793 | (var->bits_per_pixel >> 3); | |
794 | else | |
795 | offset = 0; | |
796 | ||
797 | if (rotation == FB_ROTATE_UR) | |
798 | offset += var->yoffset * fix->line_length + | |
799 | var->xoffset * (var->bits_per_pixel >> 3); | |
800 | else if (rotation == FB_ROTATE_UD) | |
801 | offset -= var->yoffset * fix->line_length + | |
802 | var->xoffset * (var->bits_per_pixel >> 3); | |
803 | else if (rotation == FB_ROTATE_CW) | |
804 | offset -= var->xoffset * fix->line_length + | |
805 | var->yoffset * (var->bits_per_pixel >> 3); | |
806 | else if (rotation == FB_ROTATE_CCW) | |
807 | offset += var->xoffset * fix->line_length + | |
808 | var->yoffset * (var->bits_per_pixel >> 3); | |
809 | ||
810 | return offset; | |
811 | } | |
812 | ||
46d3524a VS |
813 | static void omapfb_calc_addr(const struct omapfb_info *ofbi, |
814 | const struct fb_var_screeninfo *var, | |
815 | const struct fb_fix_screeninfo *fix, | |
212b0d50 | 816 | int rotation, u32 *paddr) |
46d3524a VS |
817 | { |
818 | u32 data_start_p; | |
46d3524a VS |
819 | int offset; |
820 | ||
212b0d50 | 821 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) |
46d3524a | 822 | data_start_p = omapfb_get_region_rot_paddr(ofbi, rotation); |
212b0d50 | 823 | else |
46d3524a | 824 | data_start_p = omapfb_get_region_paddr(ofbi); |
46d3524a VS |
825 | |
826 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) | |
827 | offset = calc_rotation_offset_vrfb(var, fix, rotation); | |
828 | else | |
829 | offset = calc_rotation_offset_dma(var, fix, rotation); | |
830 | ||
831 | data_start_p += offset; | |
46d3524a VS |
832 | |
833 | if (offset) | |
834 | DBG("offset %d, %d = %d\n", | |
835 | var->xoffset, var->yoffset, offset); | |
836 | ||
212b0d50 | 837 | DBG("paddr %x\n", data_start_p); |
46d3524a VS |
838 | |
839 | *paddr = data_start_p; | |
46d3524a | 840 | } |
b39a982d TV |
841 | |
842 | /* setup overlay according to the fb */ | |
078ff546 | 843 | int omapfb_setup_overlay(struct fb_info *fbi, struct omap_overlay *ovl, |
b39a982d TV |
844 | u16 posx, u16 posy, u16 outw, u16 outh) |
845 | { | |
846 | int r = 0; | |
847 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
848 | struct fb_var_screeninfo *var = &fbi->var; | |
849 | struct fb_fix_screeninfo *fix = &fbi->fix; | |
850 | enum omap_color_mode mode = 0; | |
46d3524a | 851 | u32 data_start_p = 0; |
b39a982d TV |
852 | struct omap_overlay_info info; |
853 | int xres, yres; | |
854 | int screen_width; | |
855 | int mirror; | |
856 | int rotation = var->rotate; | |
857 | int i; | |
858 | ||
1ceafc00 VS |
859 | WARN_ON(!atomic_read(&ofbi->region->lock_count)); |
860 | ||
b39a982d TV |
861 | for (i = 0; i < ofbi->num_overlays; i++) { |
862 | if (ovl != ofbi->overlays[i]) | |
863 | continue; | |
864 | ||
865 | rotation = (rotation + ofbi->rotation[i]) % 4; | |
866 | break; | |
867 | } | |
868 | ||
869 | DBG("setup_overlay %d, posx %d, posy %d, outw %d, outh %d\n", ofbi->id, | |
870 | posx, posy, outw, outh); | |
871 | ||
872 | if (rotation == FB_ROTATE_CW || rotation == FB_ROTATE_CCW) { | |
873 | xres = var->yres; | |
874 | yres = var->xres; | |
875 | } else { | |
876 | xres = var->xres; | |
877 | yres = var->yres; | |
878 | } | |
879 | ||
078ff546 | 880 | if (ofbi->region->size) |
212b0d50 | 881 | omapfb_calc_addr(ofbi, var, fix, rotation, &data_start_p); |
b39a982d TV |
882 | |
883 | r = fb_mode_to_dss_mode(var, &mode); | |
884 | if (r) { | |
885 | DBG("fb_mode_to_dss_mode failed"); | |
886 | goto err; | |
887 | } | |
888 | ||
889 | switch (var->nonstd) { | |
890 | case OMAPFB_COLOR_YUV422: | |
891 | case OMAPFB_COLOR_YUY422: | |
892 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { | |
893 | screen_width = fix->line_length | |
894 | / (var->bits_per_pixel >> 2); | |
895 | break; | |
896 | } | |
897 | default: | |
898 | screen_width = fix->line_length / (var->bits_per_pixel >> 3); | |
899 | break; | |
900 | } | |
901 | ||
902 | ovl->get_overlay_info(ovl, &info); | |
903 | ||
904 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) | |
905 | mirror = 0; | |
906 | else | |
907 | mirror = ofbi->mirror; | |
908 | ||
909 | info.paddr = data_start_p; | |
b39a982d TV |
910 | info.screen_width = screen_width; |
911 | info.width = xres; | |
912 | info.height = yres; | |
913 | info.color_mode = mode; | |
914 | info.rotation_type = ofbi->rotation_type; | |
915 | info.rotation = rotation; | |
916 | info.mirror = mirror; | |
917 | ||
918 | info.pos_x = posx; | |
919 | info.pos_y = posy; | |
920 | info.out_width = outw; | |
921 | info.out_height = outh; | |
922 | ||
923 | r = ovl->set_overlay_info(ovl, &info); | |
924 | if (r) { | |
925 | DBG("ovl->setup_overlay_info failed\n"); | |
926 | goto err; | |
927 | } | |
928 | ||
929 | return 0; | |
930 | ||
931 | err: | |
932 | DBG("setup_overlay failed\n"); | |
933 | return r; | |
934 | } | |
935 | ||
936 | /* apply var to the overlay */ | |
937 | int omapfb_apply_changes(struct fb_info *fbi, int init) | |
938 | { | |
939 | int r = 0; | |
940 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
941 | struct fb_var_screeninfo *var = &fbi->var; | |
942 | struct omap_overlay *ovl; | |
943 | u16 posx, posy; | |
944 | u16 outw, outh; | |
945 | int i; | |
946 | ||
947 | #ifdef DEBUG | |
948 | if (omapfb_test_pattern) | |
949 | fill_fb(fbi); | |
950 | #endif | |
951 | ||
1ceafc00 VS |
952 | WARN_ON(!atomic_read(&ofbi->region->lock_count)); |
953 | ||
b39a982d TV |
954 | for (i = 0; i < ofbi->num_overlays; i++) { |
955 | ovl = ofbi->overlays[i]; | |
956 | ||
957 | DBG("apply_changes, fb %d, ovl %d\n", ofbi->id, ovl->id); | |
958 | ||
078ff546 | 959 | if (ofbi->region->size == 0) { |
b39a982d TV |
960 | /* the fb is not available. disable the overlay */ |
961 | omapfb_overlay_enable(ovl, 0); | |
962 | if (!init && ovl->manager) | |
963 | ovl->manager->apply(ovl->manager); | |
964 | continue; | |
965 | } | |
966 | ||
967 | if (init || (ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { | |
968 | int rotation = (var->rotate + ofbi->rotation[i]) % 4; | |
969 | if (rotation == FB_ROTATE_CW || | |
970 | rotation == FB_ROTATE_CCW) { | |
971 | outw = var->yres; | |
972 | outh = var->xres; | |
973 | } else { | |
974 | outw = var->xres; | |
975 | outh = var->yres; | |
976 | } | |
977 | } else { | |
c1a9febf TV |
978 | struct omap_overlay_info info; |
979 | ovl->get_overlay_info(ovl, &info); | |
980 | outw = info.out_width; | |
981 | outh = info.out_height; | |
b39a982d TV |
982 | } |
983 | ||
984 | if (init) { | |
985 | posx = 0; | |
986 | posy = 0; | |
987 | } else { | |
c1a9febf TV |
988 | struct omap_overlay_info info; |
989 | ovl->get_overlay_info(ovl, &info); | |
990 | posx = info.pos_x; | |
991 | posy = info.pos_y; | |
b39a982d TV |
992 | } |
993 | ||
994 | r = omapfb_setup_overlay(fbi, ovl, posx, posy, outw, outh); | |
995 | if (r) | |
996 | goto err; | |
997 | ||
998 | if (!init && ovl->manager) | |
999 | ovl->manager->apply(ovl->manager); | |
1000 | } | |
1001 | return 0; | |
1002 | err: | |
1003 | DBG("apply_changes failed\n"); | |
1004 | return r; | |
1005 | } | |
1006 | ||
1007 | /* checks var and eventually tweaks it to something supported, | |
1008 | * DO NOT MODIFY PAR */ | |
1009 | static int omapfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi) | |
1010 | { | |
430571d5 | 1011 | struct omapfb_info *ofbi = FB2OFB(fbi); |
b39a982d TV |
1012 | int r; |
1013 | ||
1014 | DBG("check_var(%d)\n", FB2OFB(fbi)->id); | |
1015 | ||
430571d5 VS |
1016 | omapfb_get_mem_region(ofbi->region); |
1017 | ||
b39a982d TV |
1018 | r = check_fb_var(fbi, var); |
1019 | ||
430571d5 VS |
1020 | omapfb_put_mem_region(ofbi->region); |
1021 | ||
b39a982d TV |
1022 | return r; |
1023 | } | |
1024 | ||
1025 | /* set the video mode according to info->var */ | |
1026 | static int omapfb_set_par(struct fb_info *fbi) | |
1027 | { | |
430571d5 | 1028 | struct omapfb_info *ofbi = FB2OFB(fbi); |
b39a982d TV |
1029 | int r; |
1030 | ||
1031 | DBG("set_par(%d)\n", FB2OFB(fbi)->id); | |
1032 | ||
430571d5 VS |
1033 | omapfb_get_mem_region(ofbi->region); |
1034 | ||
b39a982d TV |
1035 | set_fb_fix(fbi); |
1036 | ||
1037 | r = setup_vrfb_rotation(fbi); | |
1038 | if (r) | |
430571d5 | 1039 | goto out; |
b39a982d TV |
1040 | |
1041 | r = omapfb_apply_changes(fbi, 0); | |
1042 | ||
430571d5 VS |
1043 | out: |
1044 | omapfb_put_mem_region(ofbi->region); | |
1045 | ||
b39a982d TV |
1046 | return r; |
1047 | } | |
1048 | ||
1049 | static int omapfb_pan_display(struct fb_var_screeninfo *var, | |
1050 | struct fb_info *fbi) | |
1051 | { | |
430571d5 | 1052 | struct omapfb_info *ofbi = FB2OFB(fbi); |
b39a982d TV |
1053 | struct fb_var_screeninfo new_var; |
1054 | int r; | |
1055 | ||
1056 | DBG("pan_display(%d)\n", FB2OFB(fbi)->id); | |
1057 | ||
1058 | if (var->xoffset == fbi->var.xoffset && | |
1059 | var->yoffset == fbi->var.yoffset) | |
1060 | return 0; | |
1061 | ||
1062 | new_var = fbi->var; | |
1063 | new_var.xoffset = var->xoffset; | |
1064 | new_var.yoffset = var->yoffset; | |
1065 | ||
1066 | fbi->var = new_var; | |
1067 | ||
430571d5 VS |
1068 | omapfb_get_mem_region(ofbi->region); |
1069 | ||
b39a982d TV |
1070 | r = omapfb_apply_changes(fbi, 0); |
1071 | ||
430571d5 VS |
1072 | omapfb_put_mem_region(ofbi->region); |
1073 | ||
b39a982d TV |
1074 | return r; |
1075 | } | |
1076 | ||
1077 | static void mmap_user_open(struct vm_area_struct *vma) | |
1078 | { | |
078ff546 | 1079 | struct omapfb2_mem_region *rg = vma->vm_private_data; |
b39a982d | 1080 | |
430571d5 | 1081 | omapfb_get_mem_region(rg); |
078ff546 | 1082 | atomic_inc(&rg->map_count); |
430571d5 | 1083 | omapfb_put_mem_region(rg); |
b39a982d TV |
1084 | } |
1085 | ||
1086 | static void mmap_user_close(struct vm_area_struct *vma) | |
1087 | { | |
078ff546 | 1088 | struct omapfb2_mem_region *rg = vma->vm_private_data; |
b39a982d | 1089 | |
430571d5 | 1090 | omapfb_get_mem_region(rg); |
078ff546 | 1091 | atomic_dec(&rg->map_count); |
430571d5 | 1092 | omapfb_put_mem_region(rg); |
b39a982d TV |
1093 | } |
1094 | ||
1095 | static struct vm_operations_struct mmap_user_ops = { | |
1096 | .open = mmap_user_open, | |
1097 | .close = mmap_user_close, | |
1098 | }; | |
1099 | ||
1100 | static int omapfb_mmap(struct fb_info *fbi, struct vm_area_struct *vma) | |
1101 | { | |
1102 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1103 | struct fb_fix_screeninfo *fix = &fbi->fix; | |
078ff546 | 1104 | struct omapfb2_mem_region *rg; |
b39a982d TV |
1105 | unsigned long off; |
1106 | unsigned long start; | |
1107 | u32 len; | |
430571d5 | 1108 | int r = -EINVAL; |
b39a982d TV |
1109 | |
1110 | if (vma->vm_end - vma->vm_start == 0) | |
1111 | return 0; | |
1112 | if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) | |
1113 | return -EINVAL; | |
1114 | off = vma->vm_pgoff << PAGE_SHIFT; | |
1115 | ||
430571d5 | 1116 | rg = omapfb_get_mem_region(ofbi->region); |
078ff546 | 1117 | |
b39a982d TV |
1118 | start = omapfb_get_region_paddr(ofbi); |
1119 | len = fix->smem_len; | |
1120 | if (off >= len) | |
430571d5 | 1121 | goto error; |
b39a982d | 1122 | if ((vma->vm_end - vma->vm_start + off) > len) |
430571d5 | 1123 | goto error; |
b39a982d TV |
1124 | |
1125 | off += start; | |
1126 | ||
1127 | DBG("user mmap region start %lx, len %d, off %lx\n", start, len, off); | |
1128 | ||
1129 | vma->vm_pgoff = off >> PAGE_SHIFT; | |
1130 | vma->vm_flags |= VM_IO | VM_RESERVED; | |
1131 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | |
1132 | vma->vm_ops = &mmap_user_ops; | |
078ff546 | 1133 | vma->vm_private_data = rg; |
b39a982d | 1134 | if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, |
430571d5 VS |
1135 | vma->vm_end - vma->vm_start, |
1136 | vma->vm_page_prot)) { | |
1137 | r = -EAGAIN; | |
1138 | goto error; | |
1139 | } | |
1140 | ||
b39a982d | 1141 | /* vm_ops.open won't be called for mmap itself. */ |
078ff546 | 1142 | atomic_inc(&rg->map_count); |
430571d5 VS |
1143 | |
1144 | omapfb_put_mem_region(rg); | |
1145 | ||
b39a982d | 1146 | return 0; |
430571d5 VS |
1147 | |
1148 | error: | |
1149 | omapfb_put_mem_region(ofbi->region); | |
1150 | ||
1151 | return r; | |
b39a982d TV |
1152 | } |
1153 | ||
1154 | /* Store a single color palette entry into a pseudo palette or the hardware | |
1155 | * palette if one is available. For now we support only 16bpp and thus store | |
1156 | * the entry only to the pseudo palette. | |
1157 | */ | |
1158 | static int _setcolreg(struct fb_info *fbi, u_int regno, u_int red, u_int green, | |
1159 | u_int blue, u_int transp, int update_hw_pal) | |
1160 | { | |
1161 | /*struct omapfb_info *ofbi = FB2OFB(fbi);*/ | |
1162 | /*struct omapfb2_device *fbdev = ofbi->fbdev;*/ | |
1163 | struct fb_var_screeninfo *var = &fbi->var; | |
1164 | int r = 0; | |
1165 | ||
1166 | enum omapfb_color_format mode = OMAPFB_COLOR_RGB24U; /* XXX */ | |
1167 | ||
1168 | /*switch (plane->color_mode) {*/ | |
1169 | switch (mode) { | |
1170 | case OMAPFB_COLOR_YUV422: | |
1171 | case OMAPFB_COLOR_YUV420: | |
1172 | case OMAPFB_COLOR_YUY422: | |
1173 | r = -EINVAL; | |
1174 | break; | |
1175 | case OMAPFB_COLOR_CLUT_8BPP: | |
1176 | case OMAPFB_COLOR_CLUT_4BPP: | |
1177 | case OMAPFB_COLOR_CLUT_2BPP: | |
1178 | case OMAPFB_COLOR_CLUT_1BPP: | |
1179 | /* | |
1180 | if (fbdev->ctrl->setcolreg) | |
1181 | r = fbdev->ctrl->setcolreg(regno, red, green, blue, | |
1182 | transp, update_hw_pal); | |
1183 | */ | |
1184 | /* Fallthrough */ | |
1185 | r = -EINVAL; | |
1186 | break; | |
1187 | case OMAPFB_COLOR_RGB565: | |
1188 | case OMAPFB_COLOR_RGB444: | |
1189 | case OMAPFB_COLOR_RGB24P: | |
1190 | case OMAPFB_COLOR_RGB24U: | |
1191 | if (r != 0) | |
1192 | break; | |
1193 | ||
b39a982d | 1194 | if (regno < 16) { |
c1c52848 | 1195 | u32 pal; |
b39a982d TV |
1196 | pal = ((red >> (16 - var->red.length)) << |
1197 | var->red.offset) | | |
1198 | ((green >> (16 - var->green.length)) << | |
1199 | var->green.offset) | | |
1200 | (blue >> (16 - var->blue.length)); | |
1201 | ((u32 *)(fbi->pseudo_palette))[regno] = pal; | |
1202 | } | |
1203 | break; | |
1204 | default: | |
1205 | BUG(); | |
1206 | } | |
1207 | return r; | |
1208 | } | |
1209 | ||
1210 | static int omapfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |
1211 | u_int transp, struct fb_info *info) | |
1212 | { | |
1213 | DBG("setcolreg\n"); | |
1214 | ||
1215 | return _setcolreg(info, regno, red, green, blue, transp, 1); | |
1216 | } | |
1217 | ||
1218 | static int omapfb_setcmap(struct fb_cmap *cmap, struct fb_info *info) | |
1219 | { | |
1220 | int count, index, r; | |
1221 | u16 *red, *green, *blue, *transp; | |
1222 | u16 trans = 0xffff; | |
1223 | ||
1224 | DBG("setcmap\n"); | |
1225 | ||
1226 | red = cmap->red; | |
1227 | green = cmap->green; | |
1228 | blue = cmap->blue; | |
1229 | transp = cmap->transp; | |
1230 | index = cmap->start; | |
1231 | ||
1232 | for (count = 0; count < cmap->len; count++) { | |
1233 | if (transp) | |
1234 | trans = *transp++; | |
1235 | r = _setcolreg(info, index++, *red++, *green++, *blue++, trans, | |
1236 | count == cmap->len - 1); | |
1237 | if (r != 0) | |
1238 | return r; | |
1239 | } | |
1240 | ||
1241 | return 0; | |
1242 | } | |
1243 | ||
1244 | static int omapfb_blank(int blank, struct fb_info *fbi) | |
1245 | { | |
1246 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1247 | struct omapfb2_device *fbdev = ofbi->fbdev; | |
1248 | struct omap_dss_device *display = fb2display(fbi); | |
27cc213e | 1249 | struct omapfb_display_data *d; |
b39a982d TV |
1250 | int r = 0; |
1251 | ||
93255887 JN |
1252 | if (!display) |
1253 | return -EINVAL; | |
1254 | ||
b39a982d TV |
1255 | omapfb_lock(fbdev); |
1256 | ||
27cc213e TV |
1257 | d = get_display_data(fbdev, display); |
1258 | ||
b39a982d TV |
1259 | switch (blank) { |
1260 | case FB_BLANK_UNBLANK: | |
1261 | if (display->state != OMAP_DSS_DISPLAY_SUSPENDED) | |
1262 | goto exit; | |
1263 | ||
37ac60e4 TV |
1264 | if (display->driver->resume) |
1265 | r = display->driver->resume(display); | |
b39a982d | 1266 | |
27cc213e TV |
1267 | if ((display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) && |
1268 | d->update_mode == OMAPFB_AUTO_UPDATE && | |
1269 | !d->auto_update_work_enabled) | |
1270 | omapfb_start_auto_update(fbdev, display); | |
1271 | ||
b39a982d TV |
1272 | break; |
1273 | ||
1274 | case FB_BLANK_NORMAL: | |
1275 | /* FB_BLANK_NORMAL could be implemented. | |
1276 | * Needs DSS additions. */ | |
1277 | case FB_BLANK_VSYNC_SUSPEND: | |
1278 | case FB_BLANK_HSYNC_SUSPEND: | |
1279 | case FB_BLANK_POWERDOWN: | |
1280 | if (display->state != OMAP_DSS_DISPLAY_ACTIVE) | |
1281 | goto exit; | |
1282 | ||
27cc213e TV |
1283 | if (d->auto_update_work_enabled) |
1284 | omapfb_stop_auto_update(fbdev, display); | |
1285 | ||
37ac60e4 TV |
1286 | if (display->driver->suspend) |
1287 | r = display->driver->suspend(display); | |
b39a982d TV |
1288 | |
1289 | break; | |
1290 | ||
1291 | default: | |
1292 | r = -EINVAL; | |
1293 | } | |
1294 | ||
1295 | exit: | |
1296 | omapfb_unlock(fbdev); | |
1297 | ||
b39a982d TV |
1298 | return r; |
1299 | } | |
1300 | ||
1301 | #if 0 | |
1302 | /* XXX fb_read and fb_write are needed for VRFB */ | |
1303 | ssize_t omapfb_write(struct fb_info *info, const char __user *buf, | |
1304 | size_t count, loff_t *ppos) | |
1305 | { | |
1306 | DBG("omapfb_write %d, %lu\n", count, (unsigned long)*ppos); | |
1307 | /* XXX needed for VRFB */ | |
1308 | return count; | |
1309 | } | |
1310 | #endif | |
1311 | ||
1312 | static struct fb_ops omapfb_ops = { | |
1313 | .owner = THIS_MODULE, | |
1314 | .fb_open = omapfb_open, | |
1315 | .fb_release = omapfb_release, | |
1316 | .fb_fillrect = cfb_fillrect, | |
1317 | .fb_copyarea = cfb_copyarea, | |
1318 | .fb_imageblit = cfb_imageblit, | |
1319 | .fb_blank = omapfb_blank, | |
1320 | .fb_ioctl = omapfb_ioctl, | |
1321 | .fb_check_var = omapfb_check_var, | |
1322 | .fb_set_par = omapfb_set_par, | |
1323 | .fb_pan_display = omapfb_pan_display, | |
1324 | .fb_mmap = omapfb_mmap, | |
1325 | .fb_setcolreg = omapfb_setcolreg, | |
1326 | .fb_setcmap = omapfb_setcmap, | |
1327 | /*.fb_write = omapfb_write,*/ | |
1328 | }; | |
1329 | ||
1330 | static void omapfb_free_fbmem(struct fb_info *fbi) | |
1331 | { | |
1332 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1333 | struct omapfb2_device *fbdev = ofbi->fbdev; | |
1334 | struct omapfb2_mem_region *rg; | |
1335 | ||
078ff546 VS |
1336 | rg = ofbi->region; |
1337 | ||
1338 | WARN_ON(atomic_read(&rg->map_count)); | |
b39a982d TV |
1339 | |
1340 | if (rg->paddr) | |
1341 | if (omap_vram_free(rg->paddr, rg->size)) | |
1342 | dev_err(fbdev->dev, "VRAM FREE failed\n"); | |
1343 | ||
1344 | if (rg->vaddr) | |
1345 | iounmap(rg->vaddr); | |
1346 | ||
1347 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { | |
1348 | /* unmap the 0 angle rotation */ | |
1349 | if (rg->vrfb.vaddr[0]) { | |
1350 | iounmap(rg->vrfb.vaddr[0]); | |
1351 | omap_vrfb_release_ctx(&rg->vrfb); | |
f3a82d11 | 1352 | rg->vrfb.vaddr[0] = NULL; |
b39a982d TV |
1353 | } |
1354 | } | |
1355 | ||
1356 | rg->vaddr = NULL; | |
1357 | rg->paddr = 0; | |
1358 | rg->alloc = 0; | |
1359 | rg->size = 0; | |
1360 | } | |
1361 | ||
1362 | static void clear_fb_info(struct fb_info *fbi) | |
1363 | { | |
1364 | memset(&fbi->var, 0, sizeof(fbi->var)); | |
1365 | memset(&fbi->fix, 0, sizeof(fbi->fix)); | |
1366 | strlcpy(fbi->fix.id, MODULE_NAME, sizeof(fbi->fix.id)); | |
1367 | } | |
1368 | ||
1369 | static int omapfb_free_all_fbmem(struct omapfb2_device *fbdev) | |
1370 | { | |
1371 | int i; | |
1372 | ||
1373 | DBG("free all fbmem\n"); | |
1374 | ||
1375 | for (i = 0; i < fbdev->num_fbs; i++) { | |
1376 | struct fb_info *fbi = fbdev->fbs[i]; | |
1377 | omapfb_free_fbmem(fbi); | |
1378 | clear_fb_info(fbi); | |
1379 | } | |
1380 | ||
1381 | return 0; | |
1382 | } | |
1383 | ||
1384 | static int omapfb_alloc_fbmem(struct fb_info *fbi, unsigned long size, | |
1385 | unsigned long paddr) | |
1386 | { | |
1387 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1388 | struct omapfb2_device *fbdev = ofbi->fbdev; | |
1389 | struct omapfb2_mem_region *rg; | |
1390 | void __iomem *vaddr; | |
1391 | int r; | |
1392 | ||
078ff546 VS |
1393 | rg = ofbi->region; |
1394 | ||
1395 | rg->paddr = 0; | |
1396 | rg->vaddr = NULL; | |
1397 | memset(&rg->vrfb, 0, sizeof rg->vrfb); | |
1398 | rg->size = 0; | |
1399 | rg->type = 0; | |
1400 | rg->alloc = false; | |
1401 | rg->map = false; | |
b39a982d TV |
1402 | |
1403 | size = PAGE_ALIGN(size); | |
1404 | ||
1405 | if (!paddr) { | |
1406 | DBG("allocating %lu bytes for fb %d\n", size, ofbi->id); | |
2a803c88 | 1407 | r = omap_vram_alloc(size, &paddr); |
b39a982d TV |
1408 | } else { |
1409 | DBG("reserving %lu bytes at %lx for fb %d\n", size, paddr, | |
1410 | ofbi->id); | |
1411 | r = omap_vram_reserve(paddr, size); | |
1412 | } | |
1413 | ||
1414 | if (r) { | |
1415 | dev_err(fbdev->dev, "failed to allocate framebuffer\n"); | |
1416 | return -ENOMEM; | |
1417 | } | |
1418 | ||
1419 | if (ofbi->rotation_type != OMAP_DSS_ROT_VRFB) { | |
1420 | vaddr = ioremap_wc(paddr, size); | |
1421 | ||
1422 | if (!vaddr) { | |
1423 | dev_err(fbdev->dev, "failed to ioremap framebuffer\n"); | |
1424 | omap_vram_free(paddr, size); | |
1425 | return -ENOMEM; | |
1426 | } | |
1427 | ||
1428 | DBG("allocated VRAM paddr %lx, vaddr %p\n", paddr, vaddr); | |
1429 | } else { | |
1430 | r = omap_vrfb_request_ctx(&rg->vrfb); | |
1431 | if (r) { | |
1432 | dev_err(fbdev->dev, "vrfb create ctx failed\n"); | |
1433 | return r; | |
1434 | } | |
1435 | ||
1436 | vaddr = NULL; | |
1437 | } | |
1438 | ||
1439 | rg->paddr = paddr; | |
1440 | rg->vaddr = vaddr; | |
1441 | rg->size = size; | |
1442 | rg->alloc = 1; | |
1443 | ||
1444 | return 0; | |
1445 | } | |
1446 | ||
1447 | /* allocate fbmem using display resolution as reference */ | |
1448 | static int omapfb_alloc_fbmem_display(struct fb_info *fbi, unsigned long size, | |
1449 | unsigned long paddr) | |
1450 | { | |
1451 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
a2699504 | 1452 | struct omapfb2_device *fbdev = ofbi->fbdev; |
b39a982d TV |
1453 | struct omap_dss_device *display; |
1454 | int bytespp; | |
1455 | ||
1456 | display = fb2display(fbi); | |
1457 | ||
1458 | if (!display) | |
1459 | return 0; | |
1460 | ||
a2699504 | 1461 | switch (omapfb_get_recommended_bpp(fbdev, display)) { |
b39a982d TV |
1462 | case 16: |
1463 | bytespp = 2; | |
1464 | break; | |
1465 | case 24: | |
1466 | bytespp = 4; | |
1467 | break; | |
1468 | default: | |
1469 | bytespp = 4; | |
1470 | break; | |
1471 | } | |
1472 | ||
1473 | if (!size) { | |
1474 | u16 w, h; | |
1475 | ||
96adcece | 1476 | display->driver->get_resolution(display, &w, &h); |
b39a982d TV |
1477 | |
1478 | if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { | |
1479 | size = max(omap_vrfb_min_phys_size(w, h, bytespp), | |
1480 | omap_vrfb_min_phys_size(h, w, bytespp)); | |
1481 | ||
1482 | DBG("adjusting fb mem size for VRFB, %u -> %lu\n", | |
1483 | w * h * bytespp, size); | |
1484 | } else { | |
1485 | size = w * h * bytespp; | |
1486 | } | |
1487 | } | |
1488 | ||
1489 | if (!size) | |
1490 | return 0; | |
1491 | ||
1492 | return omapfb_alloc_fbmem(fbi, size, paddr); | |
1493 | } | |
1494 | ||
b39a982d TV |
1495 | static int omapfb_parse_vram_param(const char *param, int max_entries, |
1496 | unsigned long *sizes, unsigned long *paddrs) | |
1497 | { | |
1498 | int fbnum; | |
1499 | unsigned long size; | |
1500 | unsigned long paddr = 0; | |
1501 | char *p, *start; | |
1502 | ||
1503 | start = (char *)param; | |
1504 | ||
1505 | while (1) { | |
1506 | p = start; | |
1507 | ||
1508 | fbnum = simple_strtoul(p, &p, 10); | |
1509 | ||
3a028bb9 | 1510 | if (p == start) |
b39a982d TV |
1511 | return -EINVAL; |
1512 | ||
1513 | if (*p != ':') | |
1514 | return -EINVAL; | |
1515 | ||
1516 | if (fbnum >= max_entries) | |
1517 | return -EINVAL; | |
1518 | ||
1519 | size = memparse(p + 1, &p); | |
1520 | ||
1521 | if (!size) | |
1522 | return -EINVAL; | |
1523 | ||
1524 | paddr = 0; | |
1525 | ||
1526 | if (*p == '@') { | |
1527 | paddr = simple_strtoul(p + 1, &p, 16); | |
1528 | ||
1529 | if (!paddr) | |
1530 | return -EINVAL; | |
1531 | ||
1532 | } | |
1533 | ||
1534 | paddrs[fbnum] = paddr; | |
1535 | sizes[fbnum] = size; | |
1536 | ||
1537 | if (*p == 0) | |
1538 | break; | |
1539 | ||
1540 | if (*p != ',') | |
1541 | return -EINVAL; | |
1542 | ||
1543 | ++p; | |
1544 | ||
1545 | start = p; | |
1546 | } | |
1547 | ||
1548 | return 0; | |
1549 | } | |
1550 | ||
1551 | static int omapfb_allocate_all_fbs(struct omapfb2_device *fbdev) | |
1552 | { | |
1553 | int i, r; | |
1554 | unsigned long vram_sizes[10]; | |
1555 | unsigned long vram_paddrs[10]; | |
1556 | ||
1557 | memset(&vram_sizes, 0, sizeof(vram_sizes)); | |
1558 | memset(&vram_paddrs, 0, sizeof(vram_paddrs)); | |
1559 | ||
1560 | if (def_vram && omapfb_parse_vram_param(def_vram, 10, | |
1561 | vram_sizes, vram_paddrs)) { | |
1562 | dev_err(fbdev->dev, "failed to parse vram parameter\n"); | |
1563 | ||
1564 | memset(&vram_sizes, 0, sizeof(vram_sizes)); | |
1565 | memset(&vram_paddrs, 0, sizeof(vram_paddrs)); | |
1566 | } | |
1567 | ||
b39a982d TV |
1568 | for (i = 0; i < fbdev->num_fbs; i++) { |
1569 | /* allocate memory automatically only for fb0, or if | |
1570 | * excplicitly defined with vram or plat data option */ | |
1571 | if (i == 0 || vram_sizes[i] != 0) { | |
1572 | r = omapfb_alloc_fbmem_display(fbdev->fbs[i], | |
1573 | vram_sizes[i], vram_paddrs[i]); | |
1574 | ||
1575 | if (r) | |
1576 | return r; | |
1577 | } | |
1578 | } | |
1579 | ||
1580 | for (i = 0; i < fbdev->num_fbs; i++) { | |
1581 | struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[i]); | |
1582 | struct omapfb2_mem_region *rg; | |
078ff546 | 1583 | rg = ofbi->region; |
b39a982d TV |
1584 | |
1585 | DBG("region%d phys %08x virt %p size=%lu\n", | |
1586 | i, | |
1587 | rg->paddr, | |
1588 | rg->vaddr, | |
1589 | rg->size); | |
1590 | } | |
1591 | ||
1592 | return 0; | |
1593 | } | |
1594 | ||
1595 | int omapfb_realloc_fbmem(struct fb_info *fbi, unsigned long size, int type) | |
1596 | { | |
1597 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1598 | struct omapfb2_device *fbdev = ofbi->fbdev; | |
1599 | struct omap_dss_device *display = fb2display(fbi); | |
078ff546 | 1600 | struct omapfb2_mem_region *rg = ofbi->region; |
b39a982d TV |
1601 | unsigned long old_size = rg->size; |
1602 | unsigned long old_paddr = rg->paddr; | |
1603 | int old_type = rg->type; | |
1604 | int r; | |
1605 | ||
2a803c88 | 1606 | if (type != OMAPFB_MEMTYPE_SDRAM) |
b39a982d TV |
1607 | return -EINVAL; |
1608 | ||
1609 | size = PAGE_ALIGN(size); | |
1610 | ||
1611 | if (old_size == size && old_type == type) | |
1612 | return 0; | |
1613 | ||
18946f62 TV |
1614 | if (display && display->driver->sync) |
1615 | display->driver->sync(display); | |
b39a982d TV |
1616 | |
1617 | omapfb_free_fbmem(fbi); | |
1618 | ||
1619 | if (size == 0) { | |
1620 | clear_fb_info(fbi); | |
1621 | return 0; | |
1622 | } | |
1623 | ||
1624 | r = omapfb_alloc_fbmem(fbi, size, 0); | |
1625 | ||
1626 | if (r) { | |
1627 | if (old_size) | |
1628 | omapfb_alloc_fbmem(fbi, old_size, old_paddr); | |
1629 | ||
1630 | if (rg->size == 0) | |
1631 | clear_fb_info(fbi); | |
1632 | ||
1633 | return r; | |
1634 | } | |
1635 | ||
1636 | if (old_size == size) | |
1637 | return 0; | |
1638 | ||
1639 | if (old_size == 0) { | |
1640 | DBG("initializing fb %d\n", ofbi->id); | |
1641 | r = omapfb_fb_init(fbdev, fbi); | |
1642 | if (r) { | |
1643 | DBG("omapfb_fb_init failed\n"); | |
1644 | goto err; | |
1645 | } | |
1646 | r = omapfb_apply_changes(fbi, 1); | |
1647 | if (r) { | |
1648 | DBG("omapfb_apply_changes failed\n"); | |
1649 | goto err; | |
1650 | } | |
1651 | } else { | |
1652 | struct fb_var_screeninfo new_var; | |
1653 | memcpy(&new_var, &fbi->var, sizeof(new_var)); | |
1654 | r = check_fb_var(fbi, &new_var); | |
1655 | if (r) | |
1656 | goto err; | |
1657 | memcpy(&fbi->var, &new_var, sizeof(fbi->var)); | |
1658 | set_fb_fix(fbi); | |
1659 | r = setup_vrfb_rotation(fbi); | |
1660 | if (r) | |
1661 | goto err; | |
1662 | } | |
1663 | ||
1664 | return 0; | |
1665 | err: | |
1666 | omapfb_free_fbmem(fbi); | |
1667 | clear_fb_info(fbi); | |
1668 | return r; | |
1669 | } | |
1670 | ||
27cc213e TV |
1671 | static void omapfb_auto_update_work(struct work_struct *work) |
1672 | { | |
1673 | struct omap_dss_device *dssdev; | |
1674 | struct omap_dss_driver *dssdrv; | |
1675 | struct omapfb_display_data *d; | |
1676 | u16 w, h; | |
1677 | unsigned int freq; | |
1678 | struct omapfb2_device *fbdev; | |
1679 | ||
1680 | d = container_of(work, struct omapfb_display_data, | |
1681 | auto_update_work.work); | |
1682 | ||
1683 | dssdev = d->dssdev; | |
1684 | dssdrv = dssdev->driver; | |
1685 | fbdev = d->fbdev; | |
1686 | ||
1687 | if (!dssdrv || !dssdrv->update) | |
1688 | return; | |
1689 | ||
1690 | if (dssdrv->sync) | |
1691 | dssdrv->sync(dssdev); | |
1692 | ||
1693 | dssdrv->get_resolution(dssdev, &w, &h); | |
1694 | dssdrv->update(dssdev, 0, 0, w, h); | |
1695 | ||
1696 | freq = auto_update_freq; | |
1697 | if (freq == 0) | |
1698 | freq = 20; | |
1699 | queue_delayed_work(fbdev->auto_update_wq, | |
1700 | &d->auto_update_work, HZ / freq); | |
1701 | } | |
1702 | ||
1703 | void omapfb_start_auto_update(struct omapfb2_device *fbdev, | |
1704 | struct omap_dss_device *display) | |
1705 | { | |
1706 | struct omapfb_display_data *d; | |
1707 | ||
1708 | if (fbdev->auto_update_wq == NULL) { | |
1709 | struct workqueue_struct *wq; | |
1710 | ||
1711 | wq = create_singlethread_workqueue("omapfb_auto_update"); | |
1712 | ||
1713 | if (wq == NULL) { | |
1714 | dev_err(fbdev->dev, "Failed to create workqueue for " | |
1715 | "auto-update\n"); | |
1716 | return; | |
1717 | } | |
1718 | ||
1719 | fbdev->auto_update_wq = wq; | |
1720 | } | |
1721 | ||
1722 | d = get_display_data(fbdev, display); | |
1723 | ||
1724 | INIT_DELAYED_WORK(&d->auto_update_work, omapfb_auto_update_work); | |
1725 | ||
1726 | d->auto_update_work_enabled = true; | |
1727 | ||
1728 | omapfb_auto_update_work(&d->auto_update_work.work); | |
1729 | } | |
1730 | ||
1731 | void omapfb_stop_auto_update(struct omapfb2_device *fbdev, | |
1732 | struct omap_dss_device *display) | |
1733 | { | |
1734 | struct omapfb_display_data *d; | |
1735 | ||
1736 | d = get_display_data(fbdev, display); | |
1737 | ||
1738 | cancel_delayed_work_sync(&d->auto_update_work); | |
1739 | ||
1740 | d->auto_update_work_enabled = false; | |
1741 | } | |
1742 | ||
b39a982d TV |
1743 | /* initialize fb_info, var, fix to something sane based on the display */ |
1744 | static int omapfb_fb_init(struct omapfb2_device *fbdev, struct fb_info *fbi) | |
1745 | { | |
1746 | struct fb_var_screeninfo *var = &fbi->var; | |
1747 | struct omap_dss_device *display = fb2display(fbi); | |
1748 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1749 | int r = 0; | |
1750 | ||
1751 | fbi->fbops = &omapfb_ops; | |
1752 | fbi->flags = FBINFO_FLAG_DEFAULT; | |
1753 | fbi->pseudo_palette = fbdev->pseudo_palette; | |
1754 | ||
078ff546 | 1755 | if (ofbi->region->size == 0) { |
b39a982d TV |
1756 | clear_fb_info(fbi); |
1757 | return 0; | |
1758 | } | |
1759 | ||
1760 | var->nonstd = 0; | |
1761 | var->bits_per_pixel = 0; | |
1762 | ||
1763 | var->rotate = def_rotate; | |
1764 | ||
b39a982d TV |
1765 | if (display) { |
1766 | u16 w, h; | |
1767 | int rotation = (var->rotate + ofbi->rotation[0]) % 4; | |
1768 | ||
96adcece | 1769 | display->driver->get_resolution(display, &w, &h); |
b39a982d TV |
1770 | |
1771 | if (rotation == FB_ROTATE_CW || | |
1772 | rotation == FB_ROTATE_CCW) { | |
1773 | var->xres = h; | |
1774 | var->yres = w; | |
1775 | } else { | |
1776 | var->xres = w; | |
1777 | var->yres = h; | |
1778 | } | |
1779 | ||
1780 | var->xres_virtual = var->xres; | |
1781 | var->yres_virtual = var->yres; | |
1782 | ||
1783 | if (!var->bits_per_pixel) { | |
a2699504 | 1784 | switch (omapfb_get_recommended_bpp(fbdev, display)) { |
b39a982d TV |
1785 | case 16: |
1786 | var->bits_per_pixel = 16; | |
1787 | break; | |
1788 | case 24: | |
1789 | var->bits_per_pixel = 32; | |
1790 | break; | |
1791 | default: | |
1792 | dev_err(fbdev->dev, "illegal display " | |
1793 | "bpp\n"); | |
1794 | return -EINVAL; | |
1795 | } | |
1796 | } | |
1797 | } else { | |
1798 | /* if there's no display, let's just guess some basic values */ | |
1799 | var->xres = 320; | |
1800 | var->yres = 240; | |
1801 | var->xres_virtual = var->xres; | |
1802 | var->yres_virtual = var->yres; | |
1803 | if (!var->bits_per_pixel) | |
1804 | var->bits_per_pixel = 16; | |
1805 | } | |
1806 | ||
1807 | r = check_fb_var(fbi, var); | |
1808 | if (r) | |
1809 | goto err; | |
1810 | ||
1811 | set_fb_fix(fbi); | |
1812 | r = setup_vrfb_rotation(fbi); | |
1813 | if (r) | |
1814 | goto err; | |
1815 | ||
1816 | r = fb_alloc_cmap(&fbi->cmap, 256, 0); | |
1817 | if (r) | |
1818 | dev_err(fbdev->dev, "unable to allocate color map memory\n"); | |
1819 | ||
1820 | err: | |
1821 | return r; | |
1822 | } | |
1823 | ||
1824 | static void fbinfo_cleanup(struct omapfb2_device *fbdev, struct fb_info *fbi) | |
1825 | { | |
1826 | fb_dealloc_cmap(&fbi->cmap); | |
1827 | } | |
1828 | ||
1829 | ||
1830 | static void omapfb_free_resources(struct omapfb2_device *fbdev) | |
1831 | { | |
1832 | int i; | |
1833 | ||
1834 | DBG("free_resources\n"); | |
1835 | ||
1836 | if (fbdev == NULL) | |
1837 | return; | |
1838 | ||
1839 | for (i = 0; i < fbdev->num_fbs; i++) | |
1840 | unregister_framebuffer(fbdev->fbs[i]); | |
1841 | ||
1842 | /* free the reserved fbmem */ | |
1843 | omapfb_free_all_fbmem(fbdev); | |
1844 | ||
1845 | for (i = 0; i < fbdev->num_fbs; i++) { | |
1846 | fbinfo_cleanup(fbdev, fbdev->fbs[i]); | |
1847 | framebuffer_release(fbdev->fbs[i]); | |
1848 | } | |
1849 | ||
1850 | for (i = 0; i < fbdev->num_displays; i++) { | |
065a40bd | 1851 | struct omap_dss_device *dssdev = fbdev->displays[i].dssdev; |
27cc213e TV |
1852 | |
1853 | if (fbdev->displays[i].auto_update_work_enabled) | |
1854 | omapfb_stop_auto_update(fbdev, dssdev); | |
1855 | ||
065a40bd TV |
1856 | if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) |
1857 | dssdev->driver->disable(dssdev); | |
b39a982d | 1858 | |
065a40bd | 1859 | omap_dss_put_device(dssdev); |
b39a982d TV |
1860 | } |
1861 | ||
27cc213e TV |
1862 | if (fbdev->auto_update_wq != NULL) { |
1863 | flush_workqueue(fbdev->auto_update_wq); | |
1864 | destroy_workqueue(fbdev->auto_update_wq); | |
1865 | fbdev->auto_update_wq = NULL; | |
1866 | } | |
1867 | ||
b39a982d TV |
1868 | dev_set_drvdata(fbdev->dev, NULL); |
1869 | kfree(fbdev); | |
1870 | } | |
1871 | ||
1872 | static int omapfb_create_framebuffers(struct omapfb2_device *fbdev) | |
1873 | { | |
1874 | int r, i; | |
1875 | ||
1876 | fbdev->num_fbs = 0; | |
1877 | ||
1878 | DBG("create %d framebuffers\n", CONFIG_FB_OMAP2_NUM_FBS); | |
1879 | ||
1880 | /* allocate fb_infos */ | |
1881 | for (i = 0; i < CONFIG_FB_OMAP2_NUM_FBS; i++) { | |
1882 | struct fb_info *fbi; | |
1883 | struct omapfb_info *ofbi; | |
1884 | ||
1885 | fbi = framebuffer_alloc(sizeof(struct omapfb_info), | |
1886 | fbdev->dev); | |
1887 | ||
1888 | if (fbi == NULL) { | |
1889 | dev_err(fbdev->dev, | |
1890 | "unable to allocate memory for plane info\n"); | |
1891 | return -ENOMEM; | |
1892 | } | |
1893 | ||
1894 | clear_fb_info(fbi); | |
1895 | ||
1896 | fbdev->fbs[i] = fbi; | |
1897 | ||
1898 | ofbi = FB2OFB(fbi); | |
1899 | ofbi->fbdev = fbdev; | |
1900 | ofbi->id = i; | |
1901 | ||
078ff546 VS |
1902 | ofbi->region = &fbdev->regions[i]; |
1903 | ofbi->region->id = i; | |
2f642a17 | 1904 | init_rwsem(&ofbi->region->lock); |
078ff546 | 1905 | |
b39a982d TV |
1906 | /* assign these early, so that fb alloc can use them */ |
1907 | ofbi->rotation_type = def_vrfb ? OMAP_DSS_ROT_VRFB : | |
1908 | OMAP_DSS_ROT_DMA; | |
1909 | ofbi->mirror = def_mirror; | |
1910 | ||
1911 | fbdev->num_fbs++; | |
1912 | } | |
1913 | ||
1914 | DBG("fb_infos allocated\n"); | |
1915 | ||
1916 | /* assign overlays for the fbs */ | |
1917 | for (i = 0; i < min(fbdev->num_fbs, fbdev->num_overlays); i++) { | |
1918 | struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[i]); | |
1919 | ||
1920 | ofbi->overlays[0] = fbdev->overlays[i]; | |
1921 | ofbi->num_overlays = 1; | |
1922 | } | |
1923 | ||
1924 | /* allocate fb memories */ | |
1925 | r = omapfb_allocate_all_fbs(fbdev); | |
1926 | if (r) { | |
1927 | dev_err(fbdev->dev, "failed to allocate fbmem\n"); | |
1928 | return r; | |
1929 | } | |
1930 | ||
1931 | DBG("fbmems allocated\n"); | |
1932 | ||
1933 | /* setup fb_infos */ | |
1934 | for (i = 0; i < fbdev->num_fbs; i++) { | |
430571d5 VS |
1935 | struct fb_info *fbi = fbdev->fbs[i]; |
1936 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1937 | ||
1938 | omapfb_get_mem_region(ofbi->region); | |
1939 | r = omapfb_fb_init(fbdev, fbi); | |
1940 | omapfb_put_mem_region(ofbi->region); | |
1941 | ||
b39a982d TV |
1942 | if (r) { |
1943 | dev_err(fbdev->dev, "failed to setup fb_info\n"); | |
1944 | return r; | |
1945 | } | |
1946 | } | |
1947 | ||
1948 | DBG("fb_infos initialized\n"); | |
1949 | ||
1950 | for (i = 0; i < fbdev->num_fbs; i++) { | |
1951 | r = register_framebuffer(fbdev->fbs[i]); | |
1952 | if (r != 0) { | |
1953 | dev_err(fbdev->dev, | |
1954 | "registering framebuffer %d failed\n", i); | |
1955 | return r; | |
1956 | } | |
1957 | } | |
1958 | ||
1959 | DBG("framebuffers registered\n"); | |
1960 | ||
1961 | for (i = 0; i < fbdev->num_fbs; i++) { | |
430571d5 VS |
1962 | struct fb_info *fbi = fbdev->fbs[i]; |
1963 | struct omapfb_info *ofbi = FB2OFB(fbi); | |
1964 | ||
1965 | omapfb_get_mem_region(ofbi->region); | |
1966 | r = omapfb_apply_changes(fbi, 1); | |
1967 | omapfb_put_mem_region(ofbi->region); | |
1968 | ||
b39a982d TV |
1969 | if (r) { |
1970 | dev_err(fbdev->dev, "failed to change mode\n"); | |
1971 | return r; | |
1972 | } | |
1973 | } | |
1974 | ||
b39a982d TV |
1975 | /* Enable fb0 */ |
1976 | if (fbdev->num_fbs > 0) { | |
1977 | struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[0]); | |
1978 | ||
1979 | if (ofbi->num_overlays > 0) { | |
1980 | struct omap_overlay *ovl = ofbi->overlays[0]; | |
1981 | ||
aaa874a9 TV |
1982 | ovl->manager->apply(ovl->manager); |
1983 | ||
b39a982d TV |
1984 | r = omapfb_overlay_enable(ovl, 1); |
1985 | ||
1986 | if (r) { | |
1987 | dev_err(fbdev->dev, | |
1988 | "failed to enable overlay\n"); | |
1989 | return r; | |
1990 | } | |
1991 | } | |
1992 | } | |
1993 | ||
1994 | DBG("create_framebuffers done\n"); | |
1995 | ||
1996 | return 0; | |
1997 | } | |
1998 | ||
1999 | static int omapfb_mode_to_timings(const char *mode_str, | |
783babf3 | 2000 | struct omap_dss_device *display, |
b39a982d TV |
2001 | struct omap_video_timings *timings, u8 *bpp) |
2002 | { | |
897044e9 TV |
2003 | struct fb_info *fbi; |
2004 | struct fb_var_screeninfo *var; | |
2005 | struct fb_ops *fbops; | |
b39a982d TV |
2006 | int r; |
2007 | ||
2008 | #ifdef CONFIG_OMAP2_DSS_VENC | |
2009 | if (strcmp(mode_str, "pal") == 0) { | |
2010 | *timings = omap_dss_pal_timings; | |
e8c66dcf | 2011 | *bpp = 24; |
b39a982d TV |
2012 | return 0; |
2013 | } else if (strcmp(mode_str, "ntsc") == 0) { | |
2014 | *timings = omap_dss_ntsc_timings; | |
e8c66dcf | 2015 | *bpp = 24; |
b39a982d TV |
2016 | return 0; |
2017 | } | |
2018 | #endif | |
2019 | ||
2020 | /* this is quite a hack, but I wanted to use the modedb and for | |
2021 | * that we need fb_info and var, so we create dummy ones */ | |
2022 | ||
897044e9 TV |
2023 | *bpp = 0; |
2024 | fbi = NULL; | |
2025 | var = NULL; | |
2026 | fbops = NULL; | |
b39a982d | 2027 | |
897044e9 TV |
2028 | fbi = kzalloc(sizeof(*fbi), GFP_KERNEL); |
2029 | if (fbi == NULL) { | |
2030 | r = -ENOMEM; | |
2031 | goto err; | |
2032 | } | |
2033 | ||
2034 | var = kzalloc(sizeof(*var), GFP_KERNEL); | |
2035 | if (var == NULL) { | |
2036 | r = -ENOMEM; | |
2037 | goto err; | |
2038 | } | |
2039 | ||
2040 | fbops = kzalloc(sizeof(*fbops), GFP_KERNEL); | |
2041 | if (fbops == NULL) { | |
2042 | r = -ENOMEM; | |
2043 | goto err; | |
2044 | } | |
2045 | ||
2046 | fbi->fbops = fbops; | |
2047 | ||
2048 | r = fb_find_mode(var, fbi, mode_str, NULL, 0, NULL, 24); | |
2049 | if (r == 0) { | |
2050 | r = -EINVAL; | |
2051 | goto err; | |
b39a982d | 2052 | } |
897044e9 | 2053 | |
783babf3 AT |
2054 | if (display->driver->get_timings) { |
2055 | display->driver->get_timings(display, timings); | |
2056 | } else { | |
2057 | timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; | |
2058 | timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; | |
2059 | timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; | |
2060 | } | |
2061 | ||
897044e9 TV |
2062 | timings->pixel_clock = PICOS2KHZ(var->pixclock); |
2063 | timings->hbp = var->left_margin; | |
2064 | timings->hfp = var->right_margin; | |
2065 | timings->vbp = var->upper_margin; | |
2066 | timings->vfp = var->lower_margin; | |
2067 | timings->hsw = var->hsync_len; | |
2068 | timings->vsw = var->vsync_len; | |
2069 | timings->x_res = var->xres; | |
2070 | timings->y_res = var->yres; | |
783babf3 AT |
2071 | timings->hsync_level = var->sync & FB_SYNC_HOR_HIGH_ACT ? |
2072 | OMAPDSS_SIG_ACTIVE_HIGH : | |
2073 | OMAPDSS_SIG_ACTIVE_LOW; | |
2074 | timings->vsync_level = var->sync & FB_SYNC_VERT_HIGH_ACT ? | |
2075 | OMAPDSS_SIG_ACTIVE_HIGH : | |
2076 | OMAPDSS_SIG_ACTIVE_LOW; | |
23bae3ad | 2077 | timings->interlace = var->vmode & FB_VMODE_INTERLACED; |
897044e9 TV |
2078 | |
2079 | switch (var->bits_per_pixel) { | |
2080 | case 16: | |
2081 | *bpp = 16; | |
2082 | break; | |
2083 | case 24: | |
2084 | case 32: | |
2085 | default: | |
2086 | *bpp = 24; | |
2087 | break; | |
2088 | } | |
2089 | ||
2090 | r = 0; | |
2091 | ||
2092 | err: | |
2093 | kfree(fbi); | |
2094 | kfree(var); | |
2095 | kfree(fbops); | |
2096 | ||
2097 | return r; | |
b39a982d TV |
2098 | } |
2099 | ||
a2699504 TV |
2100 | static int omapfb_set_def_mode(struct omapfb2_device *fbdev, |
2101 | struct omap_dss_device *display, char *mode_str) | |
b39a982d TV |
2102 | { |
2103 | int r; | |
2104 | u8 bpp; | |
371e2081 | 2105 | struct omap_video_timings timings, temp_timings; |
065a40bd | 2106 | struct omapfb_display_data *d; |
b39a982d | 2107 | |
783babf3 | 2108 | r = omapfb_mode_to_timings(mode_str, display, &timings, &bpp); |
b39a982d TV |
2109 | if (r) |
2110 | return r; | |
2111 | ||
065a40bd TV |
2112 | d = get_display_data(fbdev, display); |
2113 | d->bpp_override = bpp; | |
b39a982d | 2114 | |
371e2081 JM |
2115 | if (display->driver->check_timings) { |
2116 | r = display->driver->check_timings(display, &timings); | |
2117 | if (r) | |
2118 | return r; | |
2119 | } else { | |
2120 | /* If check_timings is not present compare xres and yres */ | |
2121 | if (display->driver->get_timings) { | |
2122 | display->driver->get_timings(display, &temp_timings); | |
b39a982d | 2123 | |
371e2081 JM |
2124 | if (temp_timings.x_res != timings.x_res || |
2125 | temp_timings.y_res != timings.y_res) | |
2126 | return -EINVAL; | |
2127 | } | |
2128 | } | |
b39a982d | 2129 | |
371e2081 JM |
2130 | if (display->driver->set_timings) |
2131 | display->driver->set_timings(display, &timings); | |
b39a982d TV |
2132 | |
2133 | return 0; | |
2134 | } | |
2135 | ||
a2699504 TV |
2136 | static int omapfb_get_recommended_bpp(struct omapfb2_device *fbdev, |
2137 | struct omap_dss_device *dssdev) | |
2138 | { | |
065a40bd | 2139 | struct omapfb_display_data *d; |
a2699504 TV |
2140 | |
2141 | BUG_ON(dssdev->driver->get_recommended_bpp == NULL); | |
2142 | ||
065a40bd TV |
2143 | d = get_display_data(fbdev, dssdev); |
2144 | ||
2145 | if (d->bpp_override != 0) | |
2146 | return d->bpp_override; | |
a2699504 TV |
2147 | |
2148 | return dssdev->driver->get_recommended_bpp(dssdev); | |
2149 | } | |
2150 | ||
b39a982d TV |
2151 | static int omapfb_parse_def_modes(struct omapfb2_device *fbdev) |
2152 | { | |
2153 | char *str, *options, *this_opt; | |
2154 | int r = 0; | |
2155 | ||
36e8c27f S |
2156 | str = kstrdup(def_mode, GFP_KERNEL); |
2157 | if (!str) | |
2158 | return -ENOMEM; | |
b39a982d TV |
2159 | options = str; |
2160 | ||
2161 | while (!r && (this_opt = strsep(&options, ",")) != NULL) { | |
2162 | char *p, *display_str, *mode_str; | |
2163 | struct omap_dss_device *display; | |
2164 | int i; | |
2165 | ||
2166 | p = strchr(this_opt, ':'); | |
2167 | if (!p) { | |
2168 | r = -EINVAL; | |
2169 | break; | |
2170 | } | |
2171 | ||
2172 | *p = 0; | |
2173 | display_str = this_opt; | |
2174 | mode_str = p + 1; | |
2175 | ||
2176 | display = NULL; | |
2177 | for (i = 0; i < fbdev->num_displays; ++i) { | |
065a40bd | 2178 | if (strcmp(fbdev->displays[i].dssdev->name, |
b39a982d | 2179 | display_str) == 0) { |
065a40bd | 2180 | display = fbdev->displays[i].dssdev; |
b39a982d TV |
2181 | break; |
2182 | } | |
2183 | } | |
2184 | ||
2185 | if (!display) { | |
2186 | r = -EINVAL; | |
2187 | break; | |
2188 | } | |
2189 | ||
a2699504 | 2190 | r = omapfb_set_def_mode(fbdev, display, mode_str); |
b39a982d TV |
2191 | if (r) |
2192 | break; | |
2193 | } | |
2194 | ||
2195 | kfree(str); | |
2196 | ||
2197 | return r; | |
2198 | } | |
2199 | ||
dc891fab | 2200 | static void fb_videomode_to_omap_timings(struct fb_videomode *m, |
783babf3 | 2201 | struct omap_dss_device *display, |
dc891fab TV |
2202 | struct omap_video_timings *t) |
2203 | { | |
783babf3 AT |
2204 | if (display->driver->get_timings) { |
2205 | display->driver->get_timings(display, t); | |
2206 | } else { | |
2207 | t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; | |
2208 | t->de_level = OMAPDSS_SIG_ACTIVE_HIGH; | |
2209 | t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; | |
2210 | } | |
2211 | ||
dc891fab TV |
2212 | t->x_res = m->xres; |
2213 | t->y_res = m->yres; | |
2214 | t->pixel_clock = PICOS2KHZ(m->pixclock); | |
2215 | t->hsw = m->hsync_len; | |
2216 | t->hfp = m->right_margin; | |
2217 | t->hbp = m->left_margin; | |
2218 | t->vsw = m->vsync_len; | |
2219 | t->vfp = m->lower_margin; | |
2220 | t->vbp = m->upper_margin; | |
783babf3 AT |
2221 | t->hsync_level = m->sync & FB_SYNC_HOR_HIGH_ACT ? |
2222 | OMAPDSS_SIG_ACTIVE_HIGH : | |
2223 | OMAPDSS_SIG_ACTIVE_LOW; | |
2224 | t->vsync_level = m->sync & FB_SYNC_VERT_HIGH_ACT ? | |
2225 | OMAPDSS_SIG_ACTIVE_HIGH : | |
2226 | OMAPDSS_SIG_ACTIVE_LOW; | |
23bae3ad | 2227 | t->interlace = m->vmode & FB_VMODE_INTERLACED; |
dc891fab TV |
2228 | } |
2229 | ||
2230 | static int omapfb_find_best_mode(struct omap_dss_device *display, | |
2231 | struct omap_video_timings *timings) | |
2232 | { | |
2233 | struct fb_monspecs *specs; | |
2234 | u8 *edid; | |
2235 | int r, i, best_xres, best_idx, len; | |
2236 | ||
2237 | if (!display->driver->read_edid) | |
2238 | return -ENODEV; | |
2239 | ||
2240 | len = 0x80 * 2; | |
2241 | edid = kmalloc(len, GFP_KERNEL); | |
2242 | ||
2243 | r = display->driver->read_edid(display, edid, len); | |
2244 | if (r < 0) | |
2245 | goto err1; | |
2246 | ||
2247 | specs = kzalloc(sizeof(*specs), GFP_KERNEL); | |
2248 | ||
2249 | fb_edid_to_monspecs(edid, specs); | |
2250 | ||
2251 | if (edid[126] > 0) | |
2252 | fb_edid_add_monspecs(edid + 0x80, specs); | |
2253 | ||
2254 | best_xres = 0; | |
2255 | best_idx = -1; | |
2256 | ||
2257 | for (i = 0; i < specs->modedb_len; ++i) { | |
2258 | struct fb_videomode *m; | |
2259 | struct omap_video_timings t; | |
2260 | ||
2261 | m = &specs->modedb[i]; | |
2262 | ||
2263 | if (m->pixclock == 0) | |
2264 | continue; | |
2265 | ||
2266 | /* skip repeated pixel modes */ | |
2267 | if (m->xres == 2880 || m->xres == 1440) | |
2268 | continue; | |
2269 | ||
783babf3 | 2270 | fb_videomode_to_omap_timings(m, display, &t); |
dc891fab TV |
2271 | |
2272 | r = display->driver->check_timings(display, &t); | |
2273 | if (r == 0 && best_xres < m->xres) { | |
2274 | best_xres = m->xres; | |
2275 | best_idx = i; | |
2276 | } | |
2277 | } | |
2278 | ||
2279 | if (best_xres == 0) { | |
2280 | r = -ENOENT; | |
2281 | goto err2; | |
2282 | } | |
2283 | ||
783babf3 AT |
2284 | fb_videomode_to_omap_timings(&specs->modedb[best_idx], display, |
2285 | timings); | |
dc891fab TV |
2286 | |
2287 | r = 0; | |
2288 | ||
2289 | err2: | |
2290 | fb_destroy_modedb(specs->modedb); | |
2291 | kfree(specs); | |
2292 | err1: | |
2293 | kfree(edid); | |
2294 | ||
2295 | return r; | |
2296 | } | |
2297 | ||
91ac27a6 TV |
2298 | static int omapfb_init_display(struct omapfb2_device *fbdev, |
2299 | struct omap_dss_device *dssdev) | |
2300 | { | |
2301 | struct omap_dss_driver *dssdrv = dssdev->driver; | |
27cc213e | 2302 | struct omapfb_display_data *d; |
91ac27a6 TV |
2303 | int r; |
2304 | ||
2305 | r = dssdrv->enable(dssdev); | |
2306 | if (r) { | |
2307 | dev_warn(fbdev->dev, "Failed to enable display '%s'\n", | |
2308 | dssdev->name); | |
2309 | return r; | |
2310 | } | |
2311 | ||
27cc213e TV |
2312 | d = get_display_data(fbdev, dssdev); |
2313 | ||
2314 | d->fbdev = fbdev; | |
2315 | ||
91ac27a6 TV |
2316 | if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { |
2317 | u16 w, h; | |
27cc213e TV |
2318 | |
2319 | if (auto_update) { | |
2320 | omapfb_start_auto_update(fbdev, dssdev); | |
2321 | d->update_mode = OMAPFB_AUTO_UPDATE; | |
2322 | } else { | |
2323 | d->update_mode = OMAPFB_MANUAL_UPDATE; | |
2324 | } | |
2325 | ||
91ac27a6 TV |
2326 | if (dssdrv->enable_te) { |
2327 | r = dssdrv->enable_te(dssdev, 1); | |
2328 | if (r) { | |
2329 | dev_err(fbdev->dev, "Failed to set TE\n"); | |
2330 | return r; | |
2331 | } | |
2332 | } | |
2333 | ||
91ac27a6 TV |
2334 | dssdrv->get_resolution(dssdev, &w, &h); |
2335 | r = dssdrv->update(dssdev, 0, 0, w, h); | |
2336 | if (r) { | |
2337 | dev_err(fbdev->dev, | |
2338 | "Failed to update display\n"); | |
2339 | return r; | |
2340 | } | |
2341 | } else { | |
27cc213e | 2342 | d->update_mode = OMAPFB_AUTO_UPDATE; |
91ac27a6 TV |
2343 | } |
2344 | ||
2345 | return 0; | |
2346 | } | |
2347 | ||
d64f14e1 | 2348 | static int __init omapfb_probe(struct platform_device *pdev) |
b39a982d TV |
2349 | { |
2350 | struct omapfb2_device *fbdev = NULL; | |
2351 | int r = 0; | |
2352 | int i; | |
2353 | struct omap_overlay *ovl; | |
2354 | struct omap_dss_device *def_display; | |
2355 | struct omap_dss_device *dssdev; | |
2356 | ||
2357 | DBG("omapfb_probe\n"); | |
2358 | ||
2359 | if (pdev->num_resources != 0) { | |
2360 | dev_err(&pdev->dev, "probed for an unknown device\n"); | |
2361 | r = -ENODEV; | |
2362 | goto err0; | |
2363 | } | |
2364 | ||
2365 | fbdev = kzalloc(sizeof(struct omapfb2_device), GFP_KERNEL); | |
2366 | if (fbdev == NULL) { | |
2367 | r = -ENOMEM; | |
2368 | goto err0; | |
2369 | } | |
2370 | ||
41814cfc SG |
2371 | /* TODO : Replace cpu check with omap_has_vrfb once HAS_FEATURE |
2372 | * available for OMAP2 and OMAP3 | |
2373 | */ | |
2374 | if (def_vrfb && !cpu_is_omap24xx() && !cpu_is_omap34xx()) { | |
2375 | def_vrfb = 0; | |
2376 | dev_warn(&pdev->dev, "VRFB is not supported on this hardware, " | |
2377 | "ignoring the module parameter vrfb=y\n"); | |
2378 | } | |
2379 | ||
2380 | ||
b39a982d TV |
2381 | mutex_init(&fbdev->mtx); |
2382 | ||
2383 | fbdev->dev = &pdev->dev; | |
2384 | platform_set_drvdata(pdev, fbdev); | |
2385 | ||
b3f91eb8 | 2386 | r = 0; |
b39a982d TV |
2387 | fbdev->num_displays = 0; |
2388 | dssdev = NULL; | |
2389 | for_each_dss_dev(dssdev) { | |
27cc213e TV |
2390 | struct omapfb_display_data *d; |
2391 | ||
b39a982d | 2392 | omap_dss_get_device(dssdev); |
b3f91eb8 | 2393 | |
807a7515 | 2394 | if (!dssdev->driver) { |
bab59b44 | 2395 | dev_warn(&pdev->dev, "no driver for display: %s\n", |
c5f18d7b | 2396 | dssdev->name); |
bab59b44 TV |
2397 | omap_dss_put_device(dssdev); |
2398 | continue; | |
807a7515 | 2399 | } |
b3f91eb8 | 2400 | |
27cc213e TV |
2401 | d = &fbdev->displays[fbdev->num_displays++]; |
2402 | d->dssdev = dssdev; | |
2403 | if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) | |
2404 | d->update_mode = OMAPFB_MANUAL_UPDATE; | |
2405 | else | |
2406 | d->update_mode = OMAPFB_AUTO_UPDATE; | |
b39a982d TV |
2407 | } |
2408 | ||
b3f91eb8 TV |
2409 | if (r) |
2410 | goto cleanup; | |
2411 | ||
b39a982d TV |
2412 | if (fbdev->num_displays == 0) { |
2413 | dev_err(&pdev->dev, "no displays\n"); | |
2414 | r = -EINVAL; | |
2415 | goto cleanup; | |
2416 | } | |
2417 | ||
2418 | fbdev->num_overlays = omap_dss_get_num_overlays(); | |
2419 | for (i = 0; i < fbdev->num_overlays; i++) | |
2420 | fbdev->overlays[i] = omap_dss_get_overlay(i); | |
2421 | ||
2422 | fbdev->num_managers = omap_dss_get_num_overlay_managers(); | |
2423 | for (i = 0; i < fbdev->num_managers; i++) | |
2424 | fbdev->managers[i] = omap_dss_get_overlay_manager(i); | |
2425 | ||
dc891fab TV |
2426 | /* gfx overlay should be the default one. find a display |
2427 | * connected to that, and use it as default display */ | |
2428 | ovl = omap_dss_get_overlay(0); | |
2429 | if (ovl->manager && ovl->manager->device) { | |
2430 | def_display = ovl->manager->device; | |
2431 | } else { | |
2432 | dev_warn(&pdev->dev, "cannot find default display\n"); | |
2433 | def_display = NULL; | |
2434 | } | |
2435 | ||
b39a982d TV |
2436 | if (def_mode && strlen(def_mode) > 0) { |
2437 | if (omapfb_parse_def_modes(fbdev)) | |
2438 | dev_warn(&pdev->dev, "cannot parse default modes\n"); | |
dc891fab TV |
2439 | } else if (def_display && def_display->driver->set_timings && |
2440 | def_display->driver->check_timings) { | |
2441 | struct omap_video_timings t; | |
2442 | ||
2443 | r = omapfb_find_best_mode(def_display, &t); | |
2444 | ||
2445 | if (r == 0) | |
2446 | def_display->driver->set_timings(def_display, &t); | |
b39a982d TV |
2447 | } |
2448 | ||
2449 | r = omapfb_create_framebuffers(fbdev); | |
2450 | if (r) | |
2451 | goto cleanup; | |
2452 | ||
2453 | for (i = 0; i < fbdev->num_managers; i++) { | |
2454 | struct omap_overlay_manager *mgr; | |
2455 | mgr = fbdev->managers[i]; | |
2456 | r = mgr->apply(mgr); | |
2457 | if (r) | |
2458 | dev_warn(fbdev->dev, "failed to apply dispc config\n"); | |
2459 | } | |
2460 | ||
2461 | DBG("mgr->apply'ed\n"); | |
2462 | ||
b39a982d | 2463 | if (def_display) { |
91ac27a6 | 2464 | r = omapfb_init_display(fbdev, def_display); |
6d2e0bd6 | 2465 | if (r) { |
91ac27a6 TV |
2466 | dev_err(fbdev->dev, |
2467 | "failed to initialize default " | |
2468 | "display\n"); | |
6d2e0bd6 TV |
2469 | goto cleanup; |
2470 | } | |
b39a982d TV |
2471 | } |
2472 | ||
e26ed44c AM |
2473 | DBG("create sysfs for fbs\n"); |
2474 | r = omapfb_create_sysfs(fbdev); | |
2475 | if (r) { | |
2476 | dev_err(fbdev->dev, "failed to create sysfs entries\n"); | |
2477 | goto cleanup; | |
2478 | } | |
2479 | ||
b39a982d TV |
2480 | return 0; |
2481 | ||
2482 | cleanup: | |
2483 | omapfb_free_resources(fbdev); | |
2484 | err0: | |
2485 | dev_err(&pdev->dev, "failed to setup omapfb\n"); | |
2486 | return r; | |
2487 | } | |
2488 | ||
d64f14e1 | 2489 | static int __exit omapfb_remove(struct platform_device *pdev) |
b39a982d TV |
2490 | { |
2491 | struct omapfb2_device *fbdev = platform_get_drvdata(pdev); | |
2492 | ||
2493 | /* FIXME: wait till completion of pending events */ | |
2494 | ||
2495 | omapfb_remove_sysfs(fbdev); | |
2496 | ||
2497 | omapfb_free_resources(fbdev); | |
2498 | ||
2499 | return 0; | |
2500 | } | |
2501 | ||
2502 | static struct platform_driver omapfb_driver = { | |
d64f14e1 | 2503 | .remove = __exit_p(omapfb_remove), |
b39a982d TV |
2504 | .driver = { |
2505 | .name = "omapfb", | |
2506 | .owner = THIS_MODULE, | |
2507 | }, | |
2508 | }; | |
2509 | ||
2510 | static int __init omapfb_init(void) | |
2511 | { | |
2512 | DBG("omapfb_init\n"); | |
2513 | ||
d64f14e1 | 2514 | if (platform_driver_probe(&omapfb_driver, omapfb_probe)) { |
b39a982d TV |
2515 | printk(KERN_ERR "failed to register omapfb driver\n"); |
2516 | return -ENODEV; | |
2517 | } | |
2518 | ||
2519 | return 0; | |
2520 | } | |
2521 | ||
2522 | static void __exit omapfb_exit(void) | |
2523 | { | |
2524 | DBG("omapfb_exit\n"); | |
2525 | platform_driver_unregister(&omapfb_driver); | |
2526 | } | |
2527 | ||
2528 | module_param_named(mode, def_mode, charp, 0); | |
2529 | module_param_named(vram, def_vram, charp, 0); | |
2530 | module_param_named(rotate, def_rotate, int, 0); | |
2531 | module_param_named(vrfb, def_vrfb, bool, 0); | |
2532 | module_param_named(mirror, def_mirror, bool, 0); | |
2533 | ||
2534 | /* late_initcall to let panel/ctrl drivers loaded first. | |
2535 | * I guess better option would be a more dynamic approach, | |
2536 | * so that omapfb reacts to new panels when they are loaded */ | |
2537 | late_initcall(omapfb_init); | |
2538 | /*module_init(omapfb_init);*/ | |
2539 | module_exit(omapfb_exit); | |
2540 | ||
2541 | MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>"); | |
2542 | MODULE_DESCRIPTION("OMAP2/3 Framebuffer"); | |
2543 | MODULE_LICENSE("GPL v2"); |