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OMAPDSS: HDMI: rename resource names
[deliverable/linux.git] / drivers / video / omap2 / omapfb / omapfb-main.c
CommitLineData
b39a982d
TV		 1/*
2 * linux/drivers/video/omap2/omapfb-main.c
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#include <linux/module.h>
24#include <linux/delay.h>
5a0e3ad6 25#include <linux/slab.h>
b39a982d
TV		 26#include <linux/fb.h>
27#include <linux/dma-mapping.h>
28#include <linux/vmalloc.h>
29#include <linux/device.h>
30#include <linux/platform_device.h>
31#include <linux/omapfb.h>
32
a0b38cc4 33#include <video/omapdss.h>
6a1c9f6d 34#include <video/omapvrfb.h>
b39a982d
TV		 35
36#include "omapfb.h"
37
38#define MODULE_NAME "omapfb"
39
40#define OMAPFB_PLANE_XRES_MIN 8
41#define OMAPFB_PLANE_YRES_MIN 8
42
43static char *def_mode;
44static char *def_vram;
90ab5ee9 45static bool def_vrfb;
b39a982d 46static int def_rotate;
90ab5ee9 47static bool def_mirror;
27cc213e
TV		 48static bool auto_update;
49static unsigned int auto_update_freq;
50module_param(auto_update, bool, 0);
51module_param(auto_update_freq, uint, 0644);
b39a982d
TV		 52
53#ifdef DEBUG
90ab5ee9 54bool omapfb_debug;
b39a982d 55module_param_named(debug, omapfb_debug, bool, 0644);
90ab5ee9 56static bool omapfb_test_pattern;
b39a982d
TV		 57module_param_named(test, omapfb_test_pattern, bool, 0644);
58#endif
59
60static int omapfb_fb_init(struct omapfb2_device *fbdev, struct fb_info *fbi);
a2699504
TV		 61static int omapfb_get_recommended_bpp(struct omapfb2_device *fbdev,
62 struct omap_dss_device *dssdev);
b39a982d
TV		 63
64#ifdef DEBUG
65static void draw_pixel(struct fb_info *fbi, int x, int y, unsigned color)
66{
67 struct fb_var_screeninfo *var = &fbi->var;
68 struct fb_fix_screeninfo *fix = &fbi->fix;
69 void __iomem *addr = fbi->screen_base;
70 const unsigned bytespp = var->bits_per_pixel >> 3;
71 const unsigned line_len = fix->line_length / bytespp;
72
73 int r = (color >> 16) & 0xff;
74 int g = (color >> 8) & 0xff;
75 int b = (color >> 0) & 0xff;
76
77 if (var->bits_per_pixel == 16) {
78 u16 __iomem *p = (u16 __iomem *)addr;
79 p += y * line_len + x;
80
81 r = r * 32 / 256;
82 g = g * 64 / 256;
83 b = b * 32 / 256;
84
85 __raw_writew((r << 11) | (g << 5) | (b << 0), p);
86 } else if (var->bits_per_pixel == 24) {
87 u8 __iomem *p = (u8 __iomem *)addr;
88 p += (y * line_len + x) * 3;
89
90 __raw_writeb(b, p + 0);
91 __raw_writeb(g, p + 1);
92 __raw_writeb(r, p + 2);
93 } else if (var->bits_per_pixel == 32) {
94 u32 __iomem *p = (u32 __iomem *)addr;
95 p += y * line_len + x;
96 __raw_writel(color, p);
97 }
98}
99
100static void fill_fb(struct fb_info *fbi)
101{
102 struct fb_var_screeninfo *var = &fbi->var;
103 const short w = var->xres_virtual;
104 const short h = var->yres_virtual;
105 void __iomem *addr = fbi->screen_base;
106 int y, x;
107
108 if (!addr)
109 return;
110
111 DBG("fill_fb %dx%d, line_len %d bytes\n", w, h, fbi->fix.line_length);
112
113 for (y = 0; y < h; y++) {
114 for (x = 0; x < w; x++) {
115 if (x < 20 && y < 20)
116 draw_pixel(fbi, x, y, 0xffffff);
117 else if (x < 20 && (y > 20 && y < h - 20))
118 draw_pixel(fbi, x, y, 0xff);
119 else if (y < 20 && (x > 20 && x < w - 20))
120 draw_pixel(fbi, x, y, 0xff00);
121 else if (x > w - 20 && (y > 20 && y < h - 20))
122 draw_pixel(fbi, x, y, 0xff0000);
123 else if (y > h - 20 && (x > 20 && x < w - 20))
124 draw_pixel(fbi, x, y, 0xffff00);
125 else if (x == 20 || x == w - 20 ||
126 y == 20 || y == h - 20)
127 draw_pixel(fbi, x, y, 0xffffff);
128 else if (x == y || w - x == h - y)
129 draw_pixel(fbi, x, y, 0xff00ff);
130 else if (w - x == y || x == h - y)
131 draw_pixel(fbi, x, y, 0x00ffff);
132 else if (x > 20 && y > 20 && x < w - 20 && y < h - 20) {
133 int t = x * 3 / w;
134 unsigned r = 0, g = 0, b = 0;
135 unsigned c;
136 if (var->bits_per_pixel == 16) {
137 if (t == 0)
138 b = (y % 32) * 256 / 32;
139 else if (t == 1)
140 g = (y % 64) * 256 / 64;
141 else if (t == 2)
142 r = (y % 32) * 256 / 32;
143 } else {
144 if (t == 0)
145 b = (y % 256);
146 else if (t == 1)
147 g = (y % 256);
148 else if (t == 2)
149 r = (y % 256);
150 }
151 c = (r << 16) | (g << 8) | (b << 0);
152 draw_pixel(fbi, x, y, c);
153 } else {
154 draw_pixel(fbi, x, y, 0);
155 }
156 }
157 }
158}
159#endif
160
a4c1a148 161static unsigned omapfb_get_vrfb_offset(const struct omapfb_info *ofbi, int rot)
b39a982d 162{
078ff546 163 const struct vrfb *vrfb = &ofbi->region->vrfb;
b39a982d
TV		 164 unsigned offset;
165
166 switch (rot) {
167 case FB_ROTATE_UR:
168 offset = 0;
169 break;
170 case FB_ROTATE_CW:
171 offset = vrfb->yoffset;
172 break;
173 case FB_ROTATE_UD:
174 offset = vrfb->yoffset * OMAP_VRFB_LINE_LEN + vrfb->xoffset;
175 break;
176 case FB_ROTATE_CCW:
177 offset = vrfb->xoffset * OMAP_VRFB_LINE_LEN;
178 break;
179 default:
180 BUG();
4a75cb85 181 return 0;
b39a982d
TV		 182 }
183
184 offset *= vrfb->bytespp;
185
186 return offset;
187}
188
a4c1a148 189static u32 omapfb_get_region_rot_paddr(const struct omapfb_info *ofbi, int rot)
b39a982d
TV		 190{
191 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
078ff546 192 return ofbi->region->vrfb.paddr[rot]
b39a982d
TV		 193 + omapfb_get_vrfb_offset(ofbi, rot);
194 } else {
078ff546 195 return ofbi->region->paddr;
b39a982d
TV		 196 }
197}
198
a4c1a148 199static u32 omapfb_get_region_paddr(const struct omapfb_info *ofbi)
b39a982d
TV		 200{
201 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
078ff546 202 return ofbi->region->vrfb.paddr[0];
b39a982d 203 else
078ff546 204 return ofbi->region->paddr;
b39a982d
TV		 205}
206
a4c1a148 207static void __iomem *omapfb_get_region_vaddr(const struct omapfb_info *ofbi)
b39a982d
TV		 208{
209 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
078ff546 210 return ofbi->region->vrfb.vaddr[0];
b39a982d 211 else
078ff546 212 return ofbi->region->vaddr;
b39a982d
TV		 213}
214
215static struct omapfb_colormode omapfb_colormodes[] = {
216 {
217 .dssmode = OMAP_DSS_COLOR_UYVY,
218 .bits_per_pixel = 16,
219 .nonstd = OMAPFB_COLOR_YUV422,
220 }, {
221 .dssmode = OMAP_DSS_COLOR_YUV2,
222 .bits_per_pixel = 16,
223 .nonstd = OMAPFB_COLOR_YUY422,
224 }, {
225 .dssmode = OMAP_DSS_COLOR_ARGB16,
226 .bits_per_pixel = 16,
227 .red = { .length = 4, .offset = 8, .msb_right = 0 },
228 .green = { .length = 4, .offset = 4, .msb_right = 0 },
229 .blue = { .length = 4, .offset = 0, .msb_right = 0 },
230 .transp = { .length = 4, .offset = 12, .msb_right = 0 },
231 }, {
232 .dssmode = OMAP_DSS_COLOR_RGB16,
233 .bits_per_pixel = 16,
234 .red = { .length = 5, .offset = 11, .msb_right = 0 },
235 .green = { .length = 6, .offset = 5, .msb_right = 0 },
236 .blue = { .length = 5, .offset = 0, .msb_right = 0 },
237 .transp = { .length = 0, .offset = 0, .msb_right = 0 },
238 }, {
239 .dssmode = OMAP_DSS_COLOR_RGB24P,
240 .bits_per_pixel = 24,
241 .red = { .length = 8, .offset = 16, .msb_right = 0 },
242 .green = { .length = 8, .offset = 8, .msb_right = 0 },
243 .blue = { .length = 8, .offset = 0, .msb_right = 0 },
244 .transp = { .length = 0, .offset = 0, .msb_right = 0 },
245 }, {
246 .dssmode = OMAP_DSS_COLOR_RGB24U,
247 .bits_per_pixel = 32,
248 .red = { .length = 8, .offset = 16, .msb_right = 0 },
249 .green = { .length = 8, .offset = 8, .msb_right = 0 },
250 .blue = { .length = 8, .offset = 0, .msb_right = 0 },
251 .transp = { .length = 0, .offset = 0, .msb_right = 0 },
252 }, {
253 .dssmode = OMAP_DSS_COLOR_ARGB32,
254 .bits_per_pixel = 32,
255 .red = { .length = 8, .offset = 16, .msb_right = 0 },
256 .green = { .length = 8, .offset = 8, .msb_right = 0 },
257 .blue = { .length = 8, .offset = 0, .msb_right = 0 },
258 .transp = { .length = 8, .offset = 24, .msb_right = 0 },
259 }, {
260 .dssmode = OMAP_DSS_COLOR_RGBA32,
261 .bits_per_pixel = 32,
262 .red = { .length = 8, .offset = 24, .msb_right = 0 },
263 .green = { .length = 8, .offset = 16, .msb_right = 0 },
264 .blue = { .length = 8, .offset = 8, .msb_right = 0 },
265 .transp = { .length = 8, .offset = 0, .msb_right = 0 },
266 }, {
267 .dssmode = OMAP_DSS_COLOR_RGBX32,
268 .bits_per_pixel = 32,
269 .red = { .length = 8, .offset = 24, .msb_right = 0 },
270 .green = { .length = 8, .offset = 16, .msb_right = 0 },
271 .blue = { .length = 8, .offset = 8, .msb_right = 0 },
272 .transp = { .length = 0, .offset = 0, .msb_right = 0 },
273 },
274};
275
276static bool cmp_var_to_colormode(struct fb_var_screeninfo *var,
277 struct omapfb_colormode *color)
278{
279 bool cmp_component(struct fb_bitfield *f1, struct fb_bitfield *f2)
280 {
281 return f1->length == f2->length &&
282 f1->offset == f2->offset &&
283 f1->msb_right == f2->msb_right;
284 }
285
286 if (var->bits_per_pixel == 0 ||
287 var->red.length == 0 ||
288 var->blue.length == 0 ||
289 var->green.length == 0)
290 return 0;
291
292 return var->bits_per_pixel == color->bits_per_pixel &&
293 cmp_component(&var->red, &color->red) &&
294 cmp_component(&var->green, &color->green) &&
295 cmp_component(&var->blue, &color->blue) &&
296 cmp_component(&var->transp, &color->transp);
297}
298
299static void assign_colormode_to_var(struct fb_var_screeninfo *var,
300 struct omapfb_colormode *color)
301{
302 var->bits_per_pixel = color->bits_per_pixel;
303 var->nonstd = color->nonstd;
304 var->red = color->red;
305 var->green = color->green;
306 var->blue = color->blue;
307 var->transp = color->transp;
308}
309
310static int fb_mode_to_dss_mode(struct fb_var_screeninfo *var,
311 enum omap_color_mode *mode)
312{
313 enum omap_color_mode dssmode;
314 int i;
315
316 /* first match with nonstd field */
317 if (var->nonstd) {
318 for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) {
319 struct omapfb_colormode *m = &omapfb_colormodes[i];
320 if (var->nonstd == m->nonstd) {
321 assign_colormode_to_var(var, m);
322 *mode = m->dssmode;
323 return 0;
324 }
325 }
326
327 return -EINVAL;
328 }
329
330 /* then try exact match of bpp and colors */
331 for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) {
332 struct omapfb_colormode *m = &omapfb_colormodes[i];
333 if (cmp_var_to_colormode(var, m)) {
334 assign_colormode_to_var(var, m);
335 *mode = m->dssmode;
336 return 0;
337 }
338 }
339
340 /* match with bpp if user has not filled color fields
341 * properly */
342 switch (var->bits_per_pixel) {
343 case 1:
344 dssmode = OMAP_DSS_COLOR_CLUT1;
345 break;
346 case 2:
347 dssmode = OMAP_DSS_COLOR_CLUT2;
348 break;
349 case 4:
350 dssmode = OMAP_DSS_COLOR_CLUT4;
351 break;
352 case 8:
353 dssmode = OMAP_DSS_COLOR_CLUT8;
354 break;
355 case 12:
356 dssmode = OMAP_DSS_COLOR_RGB12U;
357 break;
358 case 16:
359 dssmode = OMAP_DSS_COLOR_RGB16;
360 break;
361 case 24:
362 dssmode = OMAP_DSS_COLOR_RGB24P;
363 break;
364 case 32:
365 dssmode = OMAP_DSS_COLOR_RGB24U;
366 break;
367 default:
368 return -EINVAL;
369 }
370
371 for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) {
372 struct omapfb_colormode *m = &omapfb_colormodes[i];
373 if (dssmode == m->dssmode) {
374 assign_colormode_to_var(var, m);
375 *mode = m->dssmode;
376 return 0;
377 }
378 }
379
380 return -EINVAL;
381}
382
383static int check_fb_res_bounds(struct fb_var_screeninfo *var)
384{
385 int xres_min = OMAPFB_PLANE_XRES_MIN;
386 int xres_max = 2048;
387 int yres_min = OMAPFB_PLANE_YRES_MIN;
388 int yres_max = 2048;
389
390 /* XXX: some applications seem to set virtual res to 0. */
391 if (var->xres_virtual == 0)
392 var->xres_virtual = var->xres;
393
394 if (var->yres_virtual == 0)
395 var->yres_virtual = var->yres;
396
397 if (var->xres_virtual < xres_min || var->yres_virtual < yres_min)
398 return -EINVAL;
399
400 if (var->xres < xres_min)
401 var->xres = xres_min;
402 if (var->yres < yres_min)
403 var->yres = yres_min;
404 if (var->xres > xres_max)
405 var->xres = xres_max;
406 if (var->yres > yres_max)
407 var->yres = yres_max;
408
409 if (var->xres > var->xres_virtual)
410 var->xres = var->xres_virtual;
411 if (var->yres > var->yres_virtual)
412 var->yres = var->yres_virtual;
413
414 return 0;
415}
416
417static void shrink_height(unsigned long max_frame_size,
418 struct fb_var_screeninfo *var)
419{
420 DBG("can't fit FB into memory, reducing y\n");
421 var->yres_virtual = max_frame_size /
422 (var->xres_virtual * var->bits_per_pixel >> 3);
423
424 if (var->yres_virtual < OMAPFB_PLANE_YRES_MIN)
425 var->yres_virtual = OMAPFB_PLANE_YRES_MIN;
426
427 if (var->yres > var->yres_virtual)
428 var->yres = var->yres_virtual;
429}
430
431static void shrink_width(unsigned long max_frame_size,
432 struct fb_var_screeninfo *var)
433{
434 DBG("can't fit FB into memory, reducing x\n");
435 var->xres_virtual = max_frame_size / var->yres_virtual /
436 (var->bits_per_pixel >> 3);
437
438 if (var->xres_virtual < OMAPFB_PLANE_XRES_MIN)
439 var->xres_virtual = OMAPFB_PLANE_XRES_MIN;
440
441 if (var->xres > var->xres_virtual)
442 var->xres = var->xres_virtual;
443}
444
445static int check_vrfb_fb_size(unsigned long region_size,
446 const struct fb_var_screeninfo *var)
447{
448 unsigned long min_phys_size = omap_vrfb_min_phys_size(var->xres_virtual,
449 var->yres_virtual, var->bits_per_pixel >> 3);
450
451 return min_phys_size > region_size ? -EINVAL : 0;
452}
453
454static int check_fb_size(const struct omapfb_info *ofbi,
455 struct fb_var_screeninfo *var)
456{
078ff546 457 unsigned long max_frame_size = ofbi->region->size;
b39a982d
TV		 458 int bytespp = var->bits_per_pixel >> 3;
459 unsigned long line_size = var->xres_virtual * bytespp;
460
461 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
462 /* One needs to check for both VRFB and OMAPFB limitations. */
463 if (check_vrfb_fb_size(max_frame_size, var))
464 shrink_height(omap_vrfb_max_height(
465 max_frame_size, var->xres_virtual, bytespp) *
466 line_size, var);
467
468 if (check_vrfb_fb_size(max_frame_size, var)) {
469 DBG("cannot fit FB to memory\n");
470 return -EINVAL;
471 }
472
473 return 0;
474 }
475
476 DBG("max frame size %lu, line size %lu\n", max_frame_size, line_size);
477
478 if (line_size * var->yres_virtual > max_frame_size)
479 shrink_height(max_frame_size, var);
480
481 if (line_size * var->yres_virtual > max_frame_size) {
482 shrink_width(max_frame_size, var);
483 line_size = var->xres_virtual * bytespp;
484 }
485
486 if (line_size * var->yres_virtual > max_frame_size) {
487 DBG("cannot fit FB to memory\n");
488 return -EINVAL;
489 }
490
491 return 0;
492}
493
494/*
495 * Consider if VRFB assisted rotation is in use and if the virtual space for
496 * the zero degree view needs to be mapped. The need for mapping also acts as
497 * the trigger for setting up the hardware on the context in question. This
498 * ensures that one does not attempt to access the virtual view before the
499 * hardware is serving the address translations.
500 */
501static int setup_vrfb_rotation(struct fb_info *fbi)
502{
503 struct omapfb_info *ofbi = FB2OFB(fbi);
078ff546 504 struct omapfb2_mem_region *rg = ofbi->region;
b39a982d
TV		 505 struct vrfb *vrfb = &rg->vrfb;
506 struct fb_var_screeninfo *var = &fbi->var;
507 struct fb_fix_screeninfo *fix = &fbi->fix;
508 unsigned bytespp;
509 bool yuv_mode;
510 enum omap_color_mode mode;
511 int r;
512 bool reconf;
513
514 if (!rg->size || ofbi->rotation_type != OMAP_DSS_ROT_VRFB)
515 return 0;
516
517 DBG("setup_vrfb_rotation\n");
518
519 r = fb_mode_to_dss_mode(var, &mode);
520 if (r)
521 return r;
522
523 bytespp = var->bits_per_pixel >> 3;
524
525 yuv_mode = mode == OMAP_DSS_COLOR_YUV2 || mode == OMAP_DSS_COLOR_UYVY;
526
527 /* We need to reconfigure VRFB if the resolution changes, if yuv mode
528 * is enabled/disabled, or if bytes per pixel changes */
529
530 /* XXX we shouldn't allow this when framebuffer is mmapped */
531
532 reconf = false;
533
534 if (yuv_mode != vrfb->yuv_mode)
535 reconf = true;
536 else if (bytespp != vrfb->bytespp)
537 reconf = true;
538 else if (vrfb->xres != var->xres_virtual ||
539 vrfb->yres != var->yres_virtual)
540 reconf = true;
541
542 if (vrfb->vaddr[0] && reconf) {
543 fbi->screen_base = NULL;
544 fix->smem_start = 0;
545 fix->smem_len = 0;
546 iounmap(vrfb->vaddr[0]);
547 vrfb->vaddr[0] = NULL;
548 DBG("setup_vrfb_rotation: reset fb\n");
549 }
550
551 if (vrfb->vaddr[0])
552 return 0;
553
554 omap_vrfb_setup(&rg->vrfb, rg->paddr,
555 var->xres_virtual,
556 var->yres_virtual,
557 bytespp, yuv_mode);
558
559 /* Now one can ioremap the 0 angle view */
560 r = omap_vrfb_map_angle(vrfb, var->yres_virtual, 0);
561 if (r)
562 return r;
563
564 /* used by open/write in fbmem.c */
078ff546 565 fbi->screen_base = ofbi->region->vrfb.vaddr[0];
b39a982d 566
078ff546 567 fix->smem_start = ofbi->region->vrfb.paddr[0];
b39a982d
TV		 568
569 switch (var->nonstd) {
570 case OMAPFB_COLOR_YUV422:
571 case OMAPFB_COLOR_YUY422:
572 fix->line_length =
573 (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 2;
574 break;
575 default:
576 fix->line_length =
577 (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 3;
578 break;
579 }
580
581 fix->smem_len = var->yres_virtual * fix->line_length;
582
583 return 0;
584}
585
586int dss_mode_to_fb_mode(enum omap_color_mode dssmode,
587 struct fb_var_screeninfo *var)
588{
589 int i;
590
591 for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) {
592 struct omapfb_colormode *mode = &omapfb_colormodes[i];
593 if (dssmode == mode->dssmode) {
594 assign_colormode_to_var(var, mode);
595 return 0;
596 }
597 }
598 return -ENOENT;
599}
600
601void set_fb_fix(struct fb_info *fbi)
602{
603 struct fb_fix_screeninfo *fix = &fbi->fix;
604 struct fb_var_screeninfo *var = &fbi->var;
605 struct omapfb_info *ofbi = FB2OFB(fbi);
078ff546 606 struct omapfb2_mem_region *rg = ofbi->region;
b39a982d
TV		 607
608 DBG("set_fb_fix\n");
609
610 /* used by open/write in fbmem.c */
611 fbi->screen_base = (char __iomem *)omapfb_get_region_vaddr(ofbi);
612
613 /* used by mmap in fbmem.c */
614 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
615 switch (var->nonstd) {
616 case OMAPFB_COLOR_YUV422:
617 case OMAPFB_COLOR_YUY422:
618 fix->line_length =
619 (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 2;
620 break;
621 default:
622 fix->line_length =
623 (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 3;
624 break;
625 }
626
627 fix->smem_len = var->yres_virtual * fix->line_length;
628 } else {
629 fix->line_length =
630 (var->xres_virtual * var->bits_per_pixel) >> 3;
631 fix->smem_len = rg->size;
632 }
633
634 fix->smem_start = omapfb_get_region_paddr(ofbi);
635
636 fix->type = FB_TYPE_PACKED_PIXELS;
637
638 if (var->nonstd)
639 fix->visual = FB_VISUAL_PSEUDOCOLOR;
640 else {
641 switch (var->bits_per_pixel) {
642 case 32:
643 case 24:
644 case 16:
645 case 12:
646 fix->visual = FB_VISUAL_TRUECOLOR;
647 /* 12bpp is stored in 16 bits */
648 break;
649 case 1:
650 case 2:
651 case 4:
652 case 8:
653 fix->visual = FB_VISUAL_PSEUDOCOLOR;
654 break;
655 }
656 }
657
658 fix->accel = FB_ACCEL_NONE;
659
660 fix->xpanstep = 1;
661 fix->ypanstep = 1;
662}
663
664/* check new var and possibly modify it to be ok */
665int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var)
666{
667 struct omapfb_info *ofbi = FB2OFB(fbi);
668 struct omap_dss_device *display = fb2display(fbi);
669 enum omap_color_mode mode = 0;
670 int i;
671 int r;
672
673 DBG("check_fb_var %d\n", ofbi->id);
674
3ed37d9a
TV		 675 WARN_ON(!atomic_read(&ofbi->region->lock_count));
676
b39a982d
TV		 677 r = fb_mode_to_dss_mode(var, &mode);
678 if (r) {
679 DBG("cannot convert var to omap dss mode\n");
680 return r;
681 }
682
683 for (i = 0; i < ofbi->num_overlays; ++i) {
684 if ((ofbi->overlays[i]->supported_modes & mode) == 0) {
685 DBG("invalid mode\n");
686 return -EINVAL;
687 }
688 }
689
86f2d7dd 690 if (var->rotate > 3)
b39a982d
TV		 691 return -EINVAL;
692
693 if (check_fb_res_bounds(var))
694 return -EINVAL;
695
276a1d43 696 /* When no memory is allocated ignore the size check */
078ff546 697 if (ofbi->region->size != 0 && check_fb_size(ofbi, var))
b39a982d
TV		 698 return -EINVAL;
699
700 if (var->xres + var->xoffset > var->xres_virtual)
701 var->xoffset = var->xres_virtual - var->xres;
702 if (var->yres + var->yoffset > var->yres_virtual)
703 var->yoffset = var->yres_virtual - var->yres;
704
705 DBG("xres = %d, yres = %d, vxres = %d, vyres = %d\n",
706 var->xres, var->yres,
707 var->xres_virtual, var->yres_virtual);
708
7a0987bf
JN		 709 if (display && display->driver->get_dimensions) {
710 u32 w, h;
711 display->driver->get_dimensions(display, &w, &h);
712 var->width = DIV_ROUND_CLOSEST(w, 1000);
713 var->height = DIV_ROUND_CLOSEST(h, 1000);
714 } else {
715 var->height = -1;
716 var->width = -1;
717 }
718
b39a982d
TV		 719 var->grayscale = 0;
720
69b2048f 721 if (display && display->driver->get_timings) {
b39a982d 722 struct omap_video_timings timings;
69b2048f 723 display->driver->get_timings(display, &timings);
b39a982d
TV		 724
725 /* pixclock in ps, the rest in pixclock */
726 var->pixclock = timings.pixel_clock != 0 ?
727 KHZ2PICOS(timings.pixel_clock) :
728 0;
87ba8288
TK		 729 var->left_margin = timings.hbp;
730 var->right_margin = timings.hfp;
731 var->upper_margin = timings.vbp;
732 var->lower_margin = timings.vfp;
b39a982d
TV		 733 var->hsync_len = timings.hsw;
734 var->vsync_len = timings.vsw;
783babf3
AT		 735 var->sync |= timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH ?
736 FB_SYNC_HOR_HIGH_ACT : 0;
737 var->sync |= timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH ?
738 FB_SYNC_VERT_HIGH_ACT : 0;
23bae3ad
AT		 739 var->vmode = timings.interlace ?
740 FB_VMODE_INTERLACED : FB_VMODE_NONINTERLACED;
b39a982d
TV		 741 } else {
742 var->pixclock = 0;
743 var->left_margin = 0;
744 var->right_margin = 0;
745 var->upper_margin = 0;
746 var->lower_margin = 0;
747 var->hsync_len = 0;
748 var->vsync_len = 0;
783babf3 749 var->sync = 0;
23bae3ad 750 var->vmode = FB_VMODE_NONINTERLACED;
b39a982d
TV		 751 }
752
b39a982d
TV		 753 return 0;
754}
755
756/*
757 * ---------------------------------------------------------------------------
758 * fbdev framework callbacks
759 * ---------------------------------------------------------------------------
760 */
761static int omapfb_open(struct fb_info *fbi, int user)
762{
763 return 0;
764}
765
766static int omapfb_release(struct fb_info *fbi, int user)
767{
b39a982d
TV		 768 return 0;
769}
770
a4c1a148
VS		 771static unsigned calc_rotation_offset_dma(const struct fb_var_screeninfo *var,
772 const struct fb_fix_screeninfo *fix, int rotation)
b39a982d
TV		 773{
774 unsigned offset;
775
776 offset = var->yoffset * fix->line_length +
777 var->xoffset * (var->bits_per_pixel >> 3);
778
779 return offset;
780}
781
a4c1a148
VS		 782static unsigned calc_rotation_offset_vrfb(const struct fb_var_screeninfo *var,
783 const struct fb_fix_screeninfo *fix, int rotation)
b39a982d
TV		 784{
785 unsigned offset;
786
787 if (rotation == FB_ROTATE_UD)
788 offset = (var->yres_virtual - var->yres) *
789 fix->line_length;
790 else if (rotation == FB_ROTATE_CW)
791 offset = (var->yres_virtual - var->yres) *
792 (var->bits_per_pixel >> 3);
793 else
794 offset = 0;
795
796 if (rotation == FB_ROTATE_UR)
797 offset += var->yoffset * fix->line_length +
798 var->xoffset * (var->bits_per_pixel >> 3);
799 else if (rotation == FB_ROTATE_UD)
800 offset -= var->yoffset * fix->line_length +
801 var->xoffset * (var->bits_per_pixel >> 3);
802 else if (rotation == FB_ROTATE_CW)
803 offset -= var->xoffset * fix->line_length +
804 var->yoffset * (var->bits_per_pixel >> 3);
805 else if (rotation == FB_ROTATE_CCW)
806 offset += var->xoffset * fix->line_length +
807 var->yoffset * (var->bits_per_pixel >> 3);
808
809 return offset;
810}
811
46d3524a
VS		 812static void omapfb_calc_addr(const struct omapfb_info *ofbi,
813 const struct fb_var_screeninfo *var,
814 const struct fb_fix_screeninfo *fix,
212b0d50 815 int rotation, u32 *paddr)
46d3524a
VS		 816{
817 u32 data_start_p;
46d3524a
VS		 818 int offset;
819
212b0d50 820 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
46d3524a 821 data_start_p = omapfb_get_region_rot_paddr(ofbi, rotation);
212b0d50 822 else
46d3524a 823 data_start_p = omapfb_get_region_paddr(ofbi);
46d3524a
VS		 824
825 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
826 offset = calc_rotation_offset_vrfb(var, fix, rotation);
827 else
828 offset = calc_rotation_offset_dma(var, fix, rotation);
829
830 data_start_p += offset;
46d3524a
VS		 831
832 if (offset)
833 DBG("offset %d, %d = %d\n",
834 var->xoffset, var->yoffset, offset);
835
212b0d50 836 DBG("paddr %x\n", data_start_p);
46d3524a
VS		 837
838 *paddr = data_start_p;
46d3524a 839}
b39a982d
TV		 840
841/* setup overlay according to the fb */
078ff546 842int omapfb_setup_overlay(struct fb_info *fbi, struct omap_overlay *ovl,
b39a982d
TV		 843 u16 posx, u16 posy, u16 outw, u16 outh)
844{
845 int r = 0;
846 struct omapfb_info *ofbi = FB2OFB(fbi);
847 struct fb_var_screeninfo *var = &fbi->var;
848 struct fb_fix_screeninfo *fix = &fbi->fix;
849 enum omap_color_mode mode = 0;
46d3524a 850 u32 data_start_p = 0;
b39a982d
TV		 851 struct omap_overlay_info info;
852 int xres, yres;
853 int screen_width;
854 int mirror;
855 int rotation = var->rotate;
856 int i;
857
3ed37d9a
TV		 858 WARN_ON(!atomic_read(&ofbi->region->lock_count));
859
b39a982d
TV		 860 for (i = 0; i < ofbi->num_overlays; i++) {
861 if (ovl != ofbi->overlays[i])
862 continue;
863
864 rotation = (rotation + ofbi->rotation[i]) % 4;
865 break;
866 }
867
868 DBG("setup_overlay %d, posx %d, posy %d, outw %d, outh %d\n", ofbi->id,
869 posx, posy, outw, outh);
870
871 if (rotation == FB_ROTATE_CW || rotation == FB_ROTATE_CCW) {
872 xres = var->yres;
873 yres = var->xres;
874 } else {
875 xres = var->xres;
876 yres = var->yres;
877 }
878
078ff546 879 if (ofbi->region->size)
212b0d50 880 omapfb_calc_addr(ofbi, var, fix, rotation, &data_start_p);
b39a982d
TV		 881
882 r = fb_mode_to_dss_mode(var, &mode);
883 if (r) {
884 DBG("fb_mode_to_dss_mode failed");
885 goto err;
886 }
887
888 switch (var->nonstd) {
889 case OMAPFB_COLOR_YUV422:
890 case OMAPFB_COLOR_YUY422:
891 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
892 screen_width = fix->line_length
893 / (var->bits_per_pixel >> 2);
894 break;
895 }
896 default:
897 screen_width = fix->line_length / (var->bits_per_pixel >> 3);
898 break;
899 }
900
901 ovl->get_overlay_info(ovl, &info);
902
903 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
904 mirror = 0;
905 else
906 mirror = ofbi->mirror;
907
908 info.paddr = data_start_p;
b39a982d
TV		 909 info.screen_width = screen_width;
910 info.width = xres;
911 info.height = yres;
912 info.color_mode = mode;
913 info.rotation_type = ofbi->rotation_type;
914 info.rotation = rotation;
915 info.mirror = mirror;
916
917 info.pos_x = posx;
918 info.pos_y = posy;
919 info.out_width = outw;
920 info.out_height = outh;
921
922 r = ovl->set_overlay_info(ovl, &info);
923 if (r) {
924 DBG("ovl->setup_overlay_info failed\n");
925 goto err;
926 }
927
928 return 0;
929
930err:
931 DBG("setup_overlay failed\n");
932 return r;
933}
934
935/* apply var to the overlay */
936int omapfb_apply_changes(struct fb_info *fbi, int init)
937{
938 int r = 0;
939 struct omapfb_info *ofbi = FB2OFB(fbi);
940 struct fb_var_screeninfo *var = &fbi->var;
941 struct omap_overlay *ovl;
942 u16 posx, posy;
943 u16 outw, outh;
944 int i;
945
946#ifdef DEBUG
947 if (omapfb_test_pattern)
948 fill_fb(fbi);
949#endif
950
3ed37d9a
TV		 951 WARN_ON(!atomic_read(&ofbi->region->lock_count));
952
b39a982d
TV		 953 for (i = 0; i < ofbi->num_overlays; i++) {
954 ovl = ofbi->overlays[i];
955
956 DBG("apply_changes, fb %d, ovl %d\n", ofbi->id, ovl->id);
957
078ff546 958 if (ofbi->region->size == 0) {
b39a982d
TV		 959 /* the fb is not available. disable the overlay */
960 omapfb_overlay_enable(ovl, 0);
961 if (!init && ovl->manager)
962 ovl->manager->apply(ovl->manager);
963 continue;
964 }
965
966 if (init || (ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) {
967 int rotation = (var->rotate + ofbi->rotation[i]) % 4;
968 if (rotation == FB_ROTATE_CW ||
969 rotation == FB_ROTATE_CCW) {
970 outw = var->yres;
971 outh = var->xres;
972 } else {
973 outw = var->xres;
974 outh = var->yres;
975 }
976 } else {
c1a9febf
TV		 977 struct omap_overlay_info info;
978 ovl->get_overlay_info(ovl, &info);
979 outw = info.out_width;
980 outh = info.out_height;
b39a982d
TV		 981 }
982
983 if (init) {
984 posx = 0;
985 posy = 0;
986 } else {
c1a9febf
TV		 987 struct omap_overlay_info info;
988 ovl->get_overlay_info(ovl, &info);
989 posx = info.pos_x;
990 posy = info.pos_y;
b39a982d
TV		 991 }
992
993 r = omapfb_setup_overlay(fbi, ovl, posx, posy, outw, outh);
994 if (r)
995 goto err;
996
997 if (!init && ovl->manager)
998 ovl->manager->apply(ovl->manager);
999 }
1000 return 0;
1001err:
1002 DBG("apply_changes failed\n");
1003 return r;
1004}
1005
1006/* checks var and eventually tweaks it to something supported,
1007 * DO NOT MODIFY PAR */
1008static int omapfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi)
1009{
430571d5 1010 struct omapfb_info *ofbi = FB2OFB(fbi);
b39a982d
TV		 1011 int r;
1012
1013 DBG("check_var(%d)\n", FB2OFB(fbi)->id);
1014
3ed37d9a 1015 omapfb_get_mem_region(ofbi->region);
430571d5 1016
b39a982d
TV		 1017 r = check_fb_var(fbi, var);
1018
3ed37d9a 1019 omapfb_put_mem_region(ofbi->region);
430571d5 1020
b39a982d
TV		 1021 return r;
1022}
1023
1024/* set the video mode according to info->var */
1025static int omapfb_set_par(struct fb_info *fbi)
1026{
430571d5 1027 struct omapfb_info *ofbi = FB2OFB(fbi);
b39a982d
TV		 1028 int r;
1029
1030 DBG("set_par(%d)\n", FB2OFB(fbi)->id);
1031
3ed37d9a 1032 omapfb_get_mem_region(ofbi->region);
430571d5 1033
b39a982d
TV		 1034 set_fb_fix(fbi);
1035
1036 r = setup_vrfb_rotation(fbi);
1037 if (r)
430571d5 1038 goto out;
b39a982d
TV		 1039
1040 r = omapfb_apply_changes(fbi, 0);
1041
430571d5 1042 out:
3ed37d9a 1043 omapfb_put_mem_region(ofbi->region);
430571d5 1044
b39a982d
TV		 1045 return r;
1046}
1047
1048static int omapfb_pan_display(struct fb_var_screeninfo *var,
1049 struct fb_info *fbi)
1050{
430571d5 1051 struct omapfb_info *ofbi = FB2OFB(fbi);
b39a982d
TV		 1052 struct fb_var_screeninfo new_var;
1053 int r;
1054
1055 DBG("pan_display(%d)\n", FB2OFB(fbi)->id);
1056
1057 if (var->xoffset == fbi->var.xoffset &&
1058 var->yoffset == fbi->var.yoffset)
1059 return 0;
1060
1061 new_var = fbi->var;
1062 new_var.xoffset = var->xoffset;
1063 new_var.yoffset = var->yoffset;
1064
1065 fbi->var = new_var;
1066
3ed37d9a 1067 omapfb_get_mem_region(ofbi->region);
430571d5 1068
b39a982d
TV		 1069 r = omapfb_apply_changes(fbi, 0);
1070
3ed37d9a 1071 omapfb_put_mem_region(ofbi->region);
430571d5 1072
b39a982d
TV		 1073 return r;
1074}
1075
1076static void mmap_user_open(struct vm_area_struct *vma)
1077{
078ff546 1078 struct omapfb2_mem_region *rg = vma->vm_private_data;
b39a982d 1079
3ed37d9a 1080 omapfb_get_mem_region(rg);
078ff546 1081 atomic_inc(&rg->map_count);
3ed37d9a 1082 omapfb_put_mem_region(rg);
b39a982d
TV		 1083}
1084
1085static void mmap_user_close(struct vm_area_struct *vma)
1086{
078ff546 1087 struct omapfb2_mem_region *rg = vma->vm_private_data;
b39a982d 1088
3ed37d9a 1089 omapfb_get_mem_region(rg);
078ff546 1090 atomic_dec(&rg->map_count);
3ed37d9a 1091 omapfb_put_mem_region(rg);
b39a982d
TV		 1092}
1093
1094static struct vm_operations_struct mmap_user_ops = {
1095 .open = mmap_user_open,
1096 .close = mmap_user_close,
1097};
1098
1099static int omapfb_mmap(struct fb_info *fbi, struct vm_area_struct *vma)
1100{
1101 struct omapfb_info *ofbi = FB2OFB(fbi);
1102 struct fb_fix_screeninfo *fix = &fbi->fix;
078ff546 1103 struct omapfb2_mem_region *rg;
b39a982d
TV		 1104 unsigned long start;
1105 u32 len;
6d28c21f 1106 int r;
b39a982d 1107
3ed37d9a 1108 rg = omapfb_get_mem_region(ofbi->region);
078ff546 1109
b39a982d
TV		 1110 start = omapfb_get_region_paddr(ofbi);
1111 len = fix->smem_len;
b39a982d 1112
6d28c21f
TV		 1113 DBG("user mmap region start %lx, len %d, off %lx\n", start, len,
1114 vma->vm_pgoff << PAGE_SHIFT);
b39a982d 1115
b39a982d
TV		 1116 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1117 vma->vm_ops = &mmap_user_ops;
078ff546 1118 vma->vm_private_data = rg;
6d28c21f
TV		 1119
1120 r = vm_iomap_memory(vma, start, len);
1121 if (r)
430571d5 1122 goto error;
430571d5 1123
b39a982d 1124 /* vm_ops.open won't be called for mmap itself. */
078ff546 1125 atomic_inc(&rg->map_count);
430571d5 1126
3ed37d9a
TV		 1127 omapfb_put_mem_region(rg);
1128
b39a982d 1129 return 0;
430571d5 1130
6d28c21f 1131error:
3ed37d9a
TV		 1132 omapfb_put_mem_region(ofbi->region);
1133
430571d5 1134 return r;
b39a982d
TV		 1135}
1136
1137/* Store a single color palette entry into a pseudo palette or the hardware
1138 * palette if one is available. For now we support only 16bpp and thus store
1139 * the entry only to the pseudo palette.
1140 */
1141static int _setcolreg(struct fb_info *fbi, u_int regno, u_int red, u_int green,
1142 u_int blue, u_int transp, int update_hw_pal)
1143{
1144 /*struct omapfb_info *ofbi = FB2OFB(fbi);*/
1145 /*struct omapfb2_device *fbdev = ofbi->fbdev;*/
1146 struct fb_var_screeninfo *var = &fbi->var;
1147 int r = 0;
1148
1149 enum omapfb_color_format mode = OMAPFB_COLOR_RGB24U; /* XXX */
1150
1151 /*switch (plane->color_mode) {*/
1152 switch (mode) {
1153 case OMAPFB_COLOR_YUV422:
1154 case OMAPFB_COLOR_YUV420:
1155 case OMAPFB_COLOR_YUY422:
1156 r = -EINVAL;
1157 break;
1158 case OMAPFB_COLOR_CLUT_8BPP:
1159 case OMAPFB_COLOR_CLUT_4BPP:
1160 case OMAPFB_COLOR_CLUT_2BPP:
1161 case OMAPFB_COLOR_CLUT_1BPP:
1162 /*
1163 if (fbdev->ctrl->setcolreg)
1164 r = fbdev->ctrl->setcolreg(regno, red, green, blue,
1165 transp, update_hw_pal);
1166 */
1167 /* Fallthrough */
1168 r = -EINVAL;
1169 break;
1170 case OMAPFB_COLOR_RGB565:
1171 case OMAPFB_COLOR_RGB444:
1172 case OMAPFB_COLOR_RGB24P:
1173 case OMAPFB_COLOR_RGB24U:
1174 if (r != 0)
1175 break;
1176
b39a982d 1177 if (regno < 16) {
c1c52848 1178 u32 pal;
b39a982d
TV		 1179 pal = ((red >> (16 - var->red.length)) <<
1180 var->red.offset) |
1181 ((green >> (16 - var->green.length)) <<
1182 var->green.offset) |
1183 (blue >> (16 - var->blue.length));
1184 ((u32 *)(fbi->pseudo_palette))[regno] = pal;
1185 }
1186 break;
1187 default:
1188 BUG();
1189 }
1190 return r;
1191}
1192
1193static int omapfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1194 u_int transp, struct fb_info *info)
1195{
1196 DBG("setcolreg\n");
1197
1198 return _setcolreg(info, regno, red, green, blue, transp, 1);
1199}
1200
1201static int omapfb_setcmap(struct fb_cmap *cmap, struct fb_info *info)
1202{
1203 int count, index, r;
1204 u16 *red, *green, *blue, *transp;
1205 u16 trans = 0xffff;
1206
1207 DBG("setcmap\n");
1208
1209 red = cmap->red;
1210 green = cmap->green;
1211 blue = cmap->blue;
1212 transp = cmap->transp;
1213 index = cmap->start;
1214
1215 for (count = 0; count < cmap->len; count++) {
1216 if (transp)
1217 trans = *transp++;
1218 r = _setcolreg(info, index++, *red++, *green++, *blue++, trans,
1219 count == cmap->len - 1);
1220 if (r != 0)
1221 return r;
1222 }
1223
1224 return 0;
1225}
1226
1227static int omapfb_blank(int blank, struct fb_info *fbi)
1228{
1229 struct omapfb_info *ofbi = FB2OFB(fbi);
1230 struct omapfb2_device *fbdev = ofbi->fbdev;
1231 struct omap_dss_device *display = fb2display(fbi);
27cc213e 1232 struct omapfb_display_data *d;
b39a982d
TV		 1233 int r = 0;
1234
93255887
JN		 1235 if (!display)
1236 return -EINVAL;
1237
b39a982d
TV		 1238 omapfb_lock(fbdev);
1239
27cc213e
TV		 1240 d = get_display_data(fbdev, display);
1241
b39a982d
TV		 1242 switch (blank) {
1243 case FB_BLANK_UNBLANK:
998c336d 1244 if (display->state == OMAP_DSS_DISPLAY_ACTIVE)
b39a982d
TV		 1245 goto exit;
1246
998c336d 1247 r = display->driver->enable(display);
b39a982d 1248
27cc213e
TV		 1249 if ((display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) &&
1250 d->update_mode == OMAPFB_AUTO_UPDATE &&
1251 !d->auto_update_work_enabled)
1252 omapfb_start_auto_update(fbdev, display);
1253
b39a982d
TV		 1254 break;
1255
1256 case FB_BLANK_NORMAL:
1257 /* FB_BLANK_NORMAL could be implemented.
1258 * Needs DSS additions. */
1259 case FB_BLANK_VSYNC_SUSPEND:
1260 case FB_BLANK_HSYNC_SUSPEND:
1261 case FB_BLANK_POWERDOWN:
1262 if (display->state != OMAP_DSS_DISPLAY_ACTIVE)
1263 goto exit;
1264
27cc213e
TV		 1265 if (d->auto_update_work_enabled)
1266 omapfb_stop_auto_update(fbdev, display);
1267
998c336d 1268 display->driver->disable(display);
b39a982d
TV		 1269
1270 break;
1271
1272 default:
1273 r = -EINVAL;
1274 }
1275
1276exit:
1277 omapfb_unlock(fbdev);
1278
b39a982d
TV		 1279 return r;
1280}
1281
1282#if 0
1283/* XXX fb_read and fb_write are needed for VRFB */
1284ssize_t omapfb_write(struct fb_info *info, const char __user *buf,
1285 size_t count, loff_t *ppos)
1286{
1287 DBG("omapfb_write %d, %lu\n", count, (unsigned long)*ppos);
1288 /* XXX needed for VRFB */
1289 return count;
1290}
1291#endif
1292
1293static struct fb_ops omapfb_ops = {
1294 .owner = THIS_MODULE,
1295 .fb_open = omapfb_open,
1296 .fb_release = omapfb_release,
1297 .fb_fillrect = cfb_fillrect,
1298 .fb_copyarea = cfb_copyarea,
1299 .fb_imageblit = cfb_imageblit,
1300 .fb_blank = omapfb_blank,
1301 .fb_ioctl = omapfb_ioctl,
1302 .fb_check_var = omapfb_check_var,
1303 .fb_set_par = omapfb_set_par,
1304 .fb_pan_display = omapfb_pan_display,
1305 .fb_mmap = omapfb_mmap,
1306 .fb_setcolreg = omapfb_setcolreg,
1307 .fb_setcmap = omapfb_setcmap,
1308 /*.fb_write = omapfb_write,*/
1309};
1310
1311static void omapfb_free_fbmem(struct fb_info *fbi)
1312{
1313 struct omapfb_info *ofbi = FB2OFB(fbi);
1314 struct omapfb2_device *fbdev = ofbi->fbdev;
1315 struct omapfb2_mem_region *rg;
1316
078ff546
VS		 1317 rg = ofbi->region;
1318
0049fb26
TV		 1319 if (rg->token == NULL)
1320 return;
b39a982d 1321
0049fb26 1322 WARN_ON(atomic_read(&rg->map_count));
b39a982d
TV		 1323
1324 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
1325 /* unmap the 0 angle rotation */
1326 if (rg->vrfb.vaddr[0]) {
1327 iounmap(rg->vrfb.vaddr[0]);
f3a82d11 1328 rg->vrfb.vaddr[0] = NULL;
b39a982d 1329 }
0049fb26
TV		 1330
1331 omap_vrfb_release_ctx(&rg->vrfb);
b39a982d
TV		 1332 }
1333
0049fb26
TV		 1334 dma_free_attrs(fbdev->dev, rg->size, rg->token, rg->dma_handle,
1335 &rg->attrs);
1336
1337 rg->token = NULL;
b39a982d
TV		 1338 rg->vaddr = NULL;
1339 rg->paddr = 0;
1340 rg->alloc = 0;
1341 rg->size = 0;
1342}
1343
1344static void clear_fb_info(struct fb_info *fbi)
1345{
1346 memset(&fbi->var, 0, sizeof(fbi->var));
1347 memset(&fbi->fix, 0, sizeof(fbi->fix));
1348 strlcpy(fbi->fix.id, MODULE_NAME, sizeof(fbi->fix.id));
1349}
1350
1351static int omapfb_free_all_fbmem(struct omapfb2_device *fbdev)
1352{
1353 int i;
1354
1355 DBG("free all fbmem\n");
1356
1357 for (i = 0; i < fbdev->num_fbs; i++) {
1358 struct fb_info *fbi = fbdev->fbs[i];
1359 omapfb_free_fbmem(fbi);
1360 clear_fb_info(fbi);
1361 }
1362
1363 return 0;
1364}
1365
1366static int omapfb_alloc_fbmem(struct fb_info *fbi, unsigned long size,
1367 unsigned long paddr)
1368{
1369 struct omapfb_info *ofbi = FB2OFB(fbi);
1370 struct omapfb2_device *fbdev = ofbi->fbdev;
1371 struct omapfb2_mem_region *rg;
0049fb26
TV		 1372 void *token;
1373 DEFINE_DMA_ATTRS(attrs);
1374 dma_addr_t dma_handle;
b39a982d
TV		 1375 int r;
1376
078ff546
VS		 1377 rg = ofbi->region;
1378
1379 rg->paddr = 0;
1380 rg->vaddr = NULL;
1381 memset(&rg->vrfb, 0, sizeof rg->vrfb);
1382 rg->size = 0;
1383 rg->type = 0;
1384 rg->alloc = false;
1385 rg->map = false;
b39a982d
TV		 1386
1387 size = PAGE_ALIGN(size);
1388
0049fb26
TV		 1389 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
1390
1391 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
1392 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
1393
1394 DBG("allocating %lu bytes for fb %d\n", size, ofbi->id);
1395
1396 token = dma_alloc_attrs(fbdev->dev, size, &dma_handle,
1397 GFP_KERNEL, &attrs);
1398
1399 if (token == NULL) {
b39a982d
TV		 1400 dev_err(fbdev->dev, "failed to allocate framebuffer\n");
1401 return -ENOMEM;
1402 }
1403
0049fb26
TV		 1404 DBG("allocated VRAM paddr %lx, vaddr %p\n",
1405 (unsigned long)dma_handle, token);
b39a982d 1406
0049fb26 1407 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
b39a982d
TV		 1408 r = omap_vrfb_request_ctx(&rg->vrfb);
1409 if (r) {
0049fb26
TV		 1410 dma_free_attrs(fbdev->dev, size, token, dma_handle,
1411 &attrs);
b39a982d
TV		 1412 dev_err(fbdev->dev, "vrfb create ctx failed\n");
1413 return r;
1414 }
b39a982d
TV		 1415 }
1416
0049fb26
TV		 1417 rg->attrs = attrs;
1418 rg->token = token;
1419 rg->dma_handle = dma_handle;
1420
1421 rg->paddr = (unsigned long)dma_handle;
1422 rg->vaddr = (void __iomem *)token;
b39a982d
TV		 1423 rg->size = size;
1424 rg->alloc = 1;
1425
1426 return 0;
1427}
1428
1429/* allocate fbmem using display resolution as reference */
1430static int omapfb_alloc_fbmem_display(struct fb_info *fbi, unsigned long size,
1431 unsigned long paddr)
1432{
1433 struct omapfb_info *ofbi = FB2OFB(fbi);
a2699504 1434 struct omapfb2_device *fbdev = ofbi->fbdev;
b39a982d
TV		 1435 struct omap_dss_device *display;
1436 int bytespp;
1437
1438 display = fb2display(fbi);
1439
1440 if (!display)
1441 return 0;
1442
a2699504 1443 switch (omapfb_get_recommended_bpp(fbdev, display)) {
b39a982d
TV		 1444 case 16:
1445 bytespp = 2;
1446 break;
1447 case 24:
1448 bytespp = 4;
1449 break;
1450 default:
1451 bytespp = 4;
1452 break;
1453 }
1454
1455 if (!size) {
1456 u16 w, h;
1457
96adcece 1458 display->driver->get_resolution(display, &w, &h);
b39a982d
TV		 1459
1460 if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
1461 size = max(omap_vrfb_min_phys_size(w, h, bytespp),
1462 omap_vrfb_min_phys_size(h, w, bytespp));
1463
1464 DBG("adjusting fb mem size for VRFB, %u -> %lu\n",
1465 w * h * bytespp, size);
1466 } else {
1467 size = w * h * bytespp;
1468 }
1469 }
1470
1471 if (!size)
1472 return 0;
1473
1474 return omapfb_alloc_fbmem(fbi, size, paddr);
1475}
1476
b39a982d
TV		 1477static int omapfb_parse_vram_param(const char *param, int max_entries,
1478 unsigned long *sizes, unsigned long *paddrs)
1479{
1480 int fbnum;
1481 unsigned long size;
1482 unsigned long paddr = 0;
1483 char *p, *start;
1484
1485 start = (char *)param;
1486
1487 while (1) {
1488 p = start;
1489
1490 fbnum = simple_strtoul(p, &p, 10);
1491
3a028bb9 1492 if (p == start)
b39a982d
TV		 1493 return -EINVAL;
1494
1495 if (*p != ':')
1496 return -EINVAL;
1497
1498 if (fbnum >= max_entries)
1499 return -EINVAL;
1500
1501 size = memparse(p + 1, &p);
1502
1503 if (!size)
1504 return -EINVAL;
1505
1506 paddr = 0;
1507
1508 if (*p == '@') {
1509 paddr = simple_strtoul(p + 1, &p, 16);
1510
1511 if (!paddr)
1512 return -EINVAL;
1513
1514 }
1515
09a8c45c
TV		 1516 WARN_ONCE(paddr,
1517 "reserving memory at predefined address not supported\n");
1518
b39a982d
TV		 1519 paddrs[fbnum] = paddr;
1520 sizes[fbnum] = size;
1521
1522 if (*p == 0)
1523 break;
1524
1525 if (*p != ',')
1526 return -EINVAL;
1527
1528 ++p;
1529
1530 start = p;
1531 }
1532
1533 return 0;
1534}
1535
1536static int omapfb_allocate_all_fbs(struct omapfb2_device *fbdev)
1537{
1538 int i, r;
1539 unsigned long vram_sizes[10];
1540 unsigned long vram_paddrs[10];
1541
1542 memset(&vram_sizes, 0, sizeof(vram_sizes));
1543 memset(&vram_paddrs, 0, sizeof(vram_paddrs));
1544
1545 if (def_vram && omapfb_parse_vram_param(def_vram, 10,
1546 vram_sizes, vram_paddrs)) {
1547 dev_err(fbdev->dev, "failed to parse vram parameter\n");
1548
1549 memset(&vram_sizes, 0, sizeof(vram_sizes));
1550 memset(&vram_paddrs, 0, sizeof(vram_paddrs));
1551 }
1552
b39a982d
TV		 1553 for (i = 0; i < fbdev->num_fbs; i++) {
1554 /* allocate memory automatically only for fb0, or if
1555 * excplicitly defined with vram or plat data option */
1556 if (i == 0 || vram_sizes[i] != 0) {
1557 r = omapfb_alloc_fbmem_display(fbdev->fbs[i],
1558 vram_sizes[i], vram_paddrs[i]);
1559
1560 if (r)
1561 return r;
1562 }
1563 }
1564
1565 for (i = 0; i < fbdev->num_fbs; i++) {
1566 struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[i]);
1567 struct omapfb2_mem_region *rg;
078ff546 1568 rg = ofbi->region;
b39a982d
TV		 1569
1570 DBG("region%d phys %08x virt %p size=%lu\n",
1571 i,
1572 rg->paddr,
1573 rg->vaddr,
1574 rg->size);
1575 }
1576
1577 return 0;
1578}
1579
ca444158
TV		 1580static void omapfb_clear_fb(struct fb_info *fbi)
1581{
1582 const struct fb_fillrect rect = {
1583 .dx = 0,
1584 .dy = 0,
1585 .width = fbi->var.xres_virtual,
1586 .height = fbi->var.yres_virtual,
1587 .color = 0,
1588 .rop = ROP_COPY,
1589 };
1590
1591 cfb_fillrect(fbi, &rect);
1592}
1593
b39a982d
TV		 1594int omapfb_realloc_fbmem(struct fb_info *fbi, unsigned long size, int type)
1595{
1596 struct omapfb_info *ofbi = FB2OFB(fbi);
1597 struct omapfb2_device *fbdev = ofbi->fbdev;
078ff546 1598 struct omapfb2_mem_region *rg = ofbi->region;
b39a982d
TV		 1599 unsigned long old_size = rg->size;
1600 unsigned long old_paddr = rg->paddr;
1601 int old_type = rg->type;
1602 int r;
1603
2a803c88 1604 if (type != OMAPFB_MEMTYPE_SDRAM)
b39a982d
TV		 1605 return -EINVAL;
1606
1607 size = PAGE_ALIGN(size);
1608
1609 if (old_size == size && old_type == type)
1610 return 0;
1611
b39a982d
TV		 1612 omapfb_free_fbmem(fbi);
1613
1614 if (size == 0) {
1615 clear_fb_info(fbi);
1616 return 0;
1617 }
1618
1619 r = omapfb_alloc_fbmem(fbi, size, 0);
1620
1621 if (r) {
1622 if (old_size)
1623 omapfb_alloc_fbmem(fbi, old_size, old_paddr);
1624
1625 if (rg->size == 0)
1626 clear_fb_info(fbi);
1627
1628 return r;
1629 }
1630
1631 if (old_size == size)
1632 return 0;
1633
1634 if (old_size == 0) {
1635 DBG("initializing fb %d\n", ofbi->id);
1636 r = omapfb_fb_init(fbdev, fbi);
1637 if (r) {
1638 DBG("omapfb_fb_init failed\n");
1639 goto err;
1640 }
1641 r = omapfb_apply_changes(fbi, 1);
1642 if (r) {
1643 DBG("omapfb_apply_changes failed\n");
1644 goto err;
1645 }
1646 } else {
1647 struct fb_var_screeninfo new_var;
1648 memcpy(&new_var, &fbi->var, sizeof(new_var));
1649 r = check_fb_var(fbi, &new_var);
1650 if (r)
1651 goto err;
1652 memcpy(&fbi->var, &new_var, sizeof(fbi->var));
1653 set_fb_fix(fbi);
1654 r = setup_vrfb_rotation(fbi);
1655 if (r)
1656 goto err;
1657 }
1658
ca444158
TV		 1659 omapfb_clear_fb(fbi);
1660
b39a982d
TV		 1661 return 0;
1662err:
1663 omapfb_free_fbmem(fbi);
1664 clear_fb_info(fbi);
1665 return r;
1666}
1667
27cc213e
TV		 1668static void omapfb_auto_update_work(struct work_struct *work)
1669{
1670 struct omap_dss_device *dssdev;
1671 struct omap_dss_driver *dssdrv;
1672 struct omapfb_display_data *d;
1673 u16 w, h;
1674 unsigned int freq;
1675 struct omapfb2_device *fbdev;
1676
1677 d = container_of(work, struct omapfb_display_data,
1678 auto_update_work.work);
1679
1680 dssdev = d->dssdev;
1681 dssdrv = dssdev->driver;
1682 fbdev = d->fbdev;
1683
1684 if (!dssdrv || !dssdrv->update)
1685 return;
1686
1687 if (dssdrv->sync)
1688 dssdrv->sync(dssdev);
1689
1690 dssdrv->get_resolution(dssdev, &w, &h);
1691 dssdrv->update(dssdev, 0, 0, w, h);
1692
1693 freq = auto_update_freq;
1694 if (freq == 0)
1695 freq = 20;
1696 queue_delayed_work(fbdev->auto_update_wq,
1697 &d->auto_update_work, HZ / freq);
1698}
1699
1700void omapfb_start_auto_update(struct omapfb2_device *fbdev,
1701 struct omap_dss_device *display)
1702{
1703 struct omapfb_display_data *d;
1704
1705 if (fbdev->auto_update_wq == NULL) {
1706 struct workqueue_struct *wq;
1707
1708 wq = create_singlethread_workqueue("omapfb_auto_update");
1709
1710 if (wq == NULL) {
1711 dev_err(fbdev->dev, "Failed to create workqueue for "
1712 "auto-update\n");
1713 return;
1714 }
1715
1716 fbdev->auto_update_wq = wq;
1717 }
1718
1719 d = get_display_data(fbdev, display);
1720
1721 INIT_DELAYED_WORK(&d->auto_update_work, omapfb_auto_update_work);
1722
1723 d->auto_update_work_enabled = true;
1724
1725 omapfb_auto_update_work(&d->auto_update_work.work);
1726}
1727
1728void omapfb_stop_auto_update(struct omapfb2_device *fbdev,
1729 struct omap_dss_device *display)
1730{
1731 struct omapfb_display_data *d;
1732
1733 d = get_display_data(fbdev, display);
1734
1735 cancel_delayed_work_sync(&d->auto_update_work);
1736
1737 d->auto_update_work_enabled = false;
1738}
1739
b39a982d
TV		 1740/* initialize fb_info, var, fix to something sane based on the display */
1741static int omapfb_fb_init(struct omapfb2_device *fbdev, struct fb_info *fbi)
1742{
1743 struct fb_var_screeninfo *var = &fbi->var;
1744 struct omap_dss_device *display = fb2display(fbi);
1745 struct omapfb_info *ofbi = FB2OFB(fbi);
1746 int r = 0;
1747
1748 fbi->fbops = &omapfb_ops;
1749 fbi->flags = FBINFO_FLAG_DEFAULT;
1750 fbi->pseudo_palette = fbdev->pseudo_palette;
1751
078ff546 1752 if (ofbi->region->size == 0) {
b39a982d
TV		 1753 clear_fb_info(fbi);
1754 return 0;
1755 }
1756
1757 var->nonstd = 0;
1758 var->bits_per_pixel = 0;
1759
1760 var->rotate = def_rotate;
1761
b39a982d
TV		 1762 if (display) {
1763 u16 w, h;
1764 int rotation = (var->rotate + ofbi->rotation[0]) % 4;
1765
96adcece 1766 display->driver->get_resolution(display, &w, &h);
b39a982d
TV		 1767
1768 if (rotation == FB_ROTATE_CW ||
1769 rotation == FB_ROTATE_CCW) {
1770 var->xres = h;
1771 var->yres = w;
1772 } else {
1773 var->xres = w;
1774 var->yres = h;
1775 }
1776
1777 var->xres_virtual = var->xres;
1778 var->yres_virtual = var->yres;
1779
1780 if (!var->bits_per_pixel) {
a2699504 1781 switch (omapfb_get_recommended_bpp(fbdev, display)) {
b39a982d
TV		 1782 case 16:
1783 var->bits_per_pixel = 16;
1784 break;
1785 case 24:
1786 var->bits_per_pixel = 32;
1787 break;
1788 default:
1789 dev_err(fbdev->dev, "illegal display "
1790 "bpp\n");
1791 return -EINVAL;
1792 }
1793 }
1794 } else {
1795 /* if there's no display, let's just guess some basic values */
1796 var->xres = 320;
1797 var->yres = 240;
1798 var->xres_virtual = var->xres;
1799 var->yres_virtual = var->yres;
1800 if (!var->bits_per_pixel)
1801 var->bits_per_pixel = 16;
1802 }
1803
1804 r = check_fb_var(fbi, var);
1805 if (r)
1806 goto err;
1807
1808 set_fb_fix(fbi);
1809 r = setup_vrfb_rotation(fbi);
1810 if (r)
1811 goto err;
1812
1813 r = fb_alloc_cmap(&fbi->cmap, 256, 0);
1814 if (r)
1815 dev_err(fbdev->dev, "unable to allocate color map memory\n");
1816
1817err:
1818 return r;
1819}
1820
1821static void fbinfo_cleanup(struct omapfb2_device *fbdev, struct fb_info *fbi)
1822{
1823 fb_dealloc_cmap(&fbi->cmap);
1824}
1825
1826
1827static void omapfb_free_resources(struct omapfb2_device *fbdev)
1828{
1829 int i;
1830
1831 DBG("free_resources\n");
1832
1833 if (fbdev == NULL)
1834 return;
1835
1836 for (i = 0; i < fbdev->num_fbs; i++)
1837 unregister_framebuffer(fbdev->fbs[i]);
1838
1839 /* free the reserved fbmem */
1840 omapfb_free_all_fbmem(fbdev);
1841
1842 for (i = 0; i < fbdev->num_fbs; i++) {
1843 fbinfo_cleanup(fbdev, fbdev->fbs[i]);
1844 framebuffer_release(fbdev->fbs[i]);
1845 }
1846
1847 for (i = 0; i < fbdev->num_displays; i++) {
065a40bd 1848 struct omap_dss_device *dssdev = fbdev->displays[i].dssdev;
27cc213e
TV		 1849
1850 if (fbdev->displays[i].auto_update_work_enabled)
1851 omapfb_stop_auto_update(fbdev, dssdev);
1852
065a40bd
TV		 1853 if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED)
1854 dssdev->driver->disable(dssdev);
b39a982d 1855
a7e71e7f
TV		 1856 dssdev->driver->disconnect(dssdev);
1857
065a40bd 1858 omap_dss_put_device(dssdev);
b39a982d
TV		 1859 }
1860
27cc213e
TV		 1861 if (fbdev->auto_update_wq != NULL) {
1862 flush_workqueue(fbdev->auto_update_wq);
1863 destroy_workqueue(fbdev->auto_update_wq);
1864 fbdev->auto_update_wq = NULL;
1865 }
1866
b39a982d 1867 dev_set_drvdata(fbdev->dev, NULL);
b39a982d
TV		 1868}
1869
1870static int omapfb_create_framebuffers(struct omapfb2_device *fbdev)
1871{
1872 int r, i;
1873
1874 fbdev->num_fbs = 0;
1875
1876 DBG("create %d framebuffers\n", CONFIG_FB_OMAP2_NUM_FBS);
1877
1878 /* allocate fb_infos */
1879 for (i = 0; i < CONFIG_FB_OMAP2_NUM_FBS; i++) {
1880 struct fb_info *fbi;
1881 struct omapfb_info *ofbi;
1882
1883 fbi = framebuffer_alloc(sizeof(struct omapfb_info),
1884 fbdev->dev);
1885
1886 if (fbi == NULL) {
1887 dev_err(fbdev->dev,
1888 "unable to allocate memory for plane info\n");
1889 return -ENOMEM;
1890 }
1891
1892 clear_fb_info(fbi);
1893
1894 fbdev->fbs[i] = fbi;
1895
1896 ofbi = FB2OFB(fbi);
1897 ofbi->fbdev = fbdev;
1898 ofbi->id = i;
1899
078ff546
VS		 1900 ofbi->region = &fbdev->regions[i];
1901 ofbi->region->id = i;
3ed37d9a 1902 init_rwsem(&ofbi->region->lock);
078ff546 1903
b39a982d
TV		 1904 /* assign these early, so that fb alloc can use them */
1905 ofbi->rotation_type = def_vrfb ? OMAP_DSS_ROT_VRFB :
1906 OMAP_DSS_ROT_DMA;
1907 ofbi->mirror = def_mirror;
1908
1909 fbdev->num_fbs++;
1910 }
1911
1912 DBG("fb_infos allocated\n");
1913
1914 /* assign overlays for the fbs */
1915 for (i = 0; i < min(fbdev->num_fbs, fbdev->num_overlays); i++) {
1916 struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[i]);
1917
1918 ofbi->overlays[0] = fbdev->overlays[i];
1919 ofbi->num_overlays = 1;
1920 }
1921
1922 /* allocate fb memories */
1923 r = omapfb_allocate_all_fbs(fbdev);
1924 if (r) {
1925 dev_err(fbdev->dev, "failed to allocate fbmem\n");
1926 return r;
1927 }
1928
1929 DBG("fbmems allocated\n");
1930
1931 /* setup fb_infos */
1932 for (i = 0; i < fbdev->num_fbs; i++) {
430571d5 1933 struct fb_info *fbi = fbdev->fbs[i];
3ed37d9a 1934 struct omapfb_info *ofbi = FB2OFB(fbi);
430571d5 1935
3ed37d9a 1936 omapfb_get_mem_region(ofbi->region);
430571d5 1937 r = omapfb_fb_init(fbdev, fbi);
3ed37d9a
TV		 1938 omapfb_put_mem_region(ofbi->region);
1939
b39a982d
TV		 1940 if (r) {
1941 dev_err(fbdev->dev, "failed to setup fb_info\n");
1942 return r;
1943 }
1944 }
1945
fda7c362
AT		 1946 for (i = 0; i < fbdev->num_fbs; i++) {
1947 struct fb_info *fbi = fbdev->fbs[i];
1948 struct omapfb_info *ofbi = FB2OFB(fbi);
1949
1950 if (ofbi->region->size == 0)
1951 continue;
1952
1953 omapfb_clear_fb(fbi);
1954 }
1955
b39a982d
TV		 1956 DBG("fb_infos initialized\n");
1957
1958 for (i = 0; i < fbdev->num_fbs; i++) {
1959 r = register_framebuffer(fbdev->fbs[i]);
1960 if (r != 0) {
1961 dev_err(fbdev->dev,
1962 "registering framebuffer %d failed\n", i);
1963 return r;
1964 }
1965 }
1966
1967 DBG("framebuffers registered\n");
1968
1969 for (i = 0; i < fbdev->num_fbs; i++) {
430571d5 1970 struct fb_info *fbi = fbdev->fbs[i];
3ed37d9a 1971 struct omapfb_info *ofbi = FB2OFB(fbi);
430571d5 1972
3ed37d9a 1973 omapfb_get_mem_region(ofbi->region);
430571d5 1974 r = omapfb_apply_changes(fbi, 1);
3ed37d9a
TV		 1975 omapfb_put_mem_region(ofbi->region);
1976
b39a982d
TV		 1977 if (r) {
1978 dev_err(fbdev->dev, "failed to change mode\n");
1979 return r;
1980 }
1981 }
1982
b39a982d
TV		 1983 /* Enable fb0 */
1984 if (fbdev->num_fbs > 0) {
1985 struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[0]);
1986
1987 if (ofbi->num_overlays > 0) {
1988 struct omap_overlay *ovl = ofbi->overlays[0];
1989
aaa874a9
TV		 1990 ovl->manager->apply(ovl->manager);
1991
b39a982d
TV		 1992 r = omapfb_overlay_enable(ovl, 1);
1993
1994 if (r) {
1995 dev_err(fbdev->dev,
1996 "failed to enable overlay\n");
1997 return r;
1998 }
1999 }
2000 }
2001
2002 DBG("create_framebuffers done\n");
2003
2004 return 0;
2005}
2006
2007static int omapfb_mode_to_timings(const char *mode_str,
783babf3 2008 struct omap_dss_device *display,
b39a982d
TV		 2009 struct omap_video_timings *timings, u8 *bpp)
2010{
897044e9
TV		 2011 struct fb_info *fbi;
2012 struct fb_var_screeninfo *var;
2013 struct fb_ops *fbops;
b39a982d
TV		 2014 int r;
2015
2016#ifdef CONFIG_OMAP2_DSS_VENC
2017 if (strcmp(mode_str, "pal") == 0) {
2018 *timings = omap_dss_pal_timings;
e8c66dcf 2019 *bpp = 24;
b39a982d
TV		 2020 return 0;
2021 } else if (strcmp(mode_str, "ntsc") == 0) {
2022 *timings = omap_dss_ntsc_timings;
e8c66dcf 2023 *bpp = 24;
b39a982d
TV		 2024 return 0;
2025 }
2026#endif
2027
2028 /* this is quite a hack, but I wanted to use the modedb and for
2029 * that we need fb_info and var, so we create dummy ones */
2030
897044e9
TV		 2031 *bpp = 0;
2032 fbi = NULL;
2033 var = NULL;
2034 fbops = NULL;
b39a982d 2035
897044e9
TV		 2036 fbi = kzalloc(sizeof(*fbi), GFP_KERNEL);
2037 if (fbi == NULL) {
2038 r = -ENOMEM;
2039 goto err;
2040 }
2041
2042 var = kzalloc(sizeof(*var), GFP_KERNEL);
2043 if (var == NULL) {
2044 r = -ENOMEM;
2045 goto err;
2046 }
2047
2048 fbops = kzalloc(sizeof(*fbops), GFP_KERNEL);
2049 if (fbops == NULL) {
2050 r = -ENOMEM;
2051 goto err;
2052 }
2053
2054 fbi->fbops = fbops;
2055
2056 r = fb_find_mode(var, fbi, mode_str, NULL, 0, NULL, 24);
2057 if (r == 0) {
2058 r = -EINVAL;
2059 goto err;
b39a982d 2060 }
897044e9 2061
783babf3
AT		 2062 if (display->driver->get_timings) {
2063 display->driver->get_timings(display, timings);
2064 } else {
2065 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
2066 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
2067 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
2068 }
2069
897044e9
TV		 2070 timings->pixel_clock = PICOS2KHZ(var->pixclock);
2071 timings->hbp = var->left_margin;
2072 timings->hfp = var->right_margin;
2073 timings->vbp = var->upper_margin;
2074 timings->vfp = var->lower_margin;
2075 timings->hsw = var->hsync_len;
2076 timings->vsw = var->vsync_len;
2077 timings->x_res = var->xres;
2078 timings->y_res = var->yres;
783babf3
AT		 2079 timings->hsync_level = var->sync & FB_SYNC_HOR_HIGH_ACT ?
2080 OMAPDSS_SIG_ACTIVE_HIGH :
2081 OMAPDSS_SIG_ACTIVE_LOW;
2082 timings->vsync_level = var->sync & FB_SYNC_VERT_HIGH_ACT ?
2083 OMAPDSS_SIG_ACTIVE_HIGH :
2084 OMAPDSS_SIG_ACTIVE_LOW;
23bae3ad 2085 timings->interlace = var->vmode & FB_VMODE_INTERLACED;
897044e9
TV		 2086
2087 switch (var->bits_per_pixel) {
2088 case 16:
2089 *bpp = 16;
2090 break;
2091 case 24:
2092 case 32:
2093 default:
2094 *bpp = 24;
2095 break;
2096 }
2097
2098 r = 0;
2099
2100err:
2101 kfree(fbi);
2102 kfree(var);
2103 kfree(fbops);
2104
2105 return r;
b39a982d
TV		 2106}
2107
a2699504
TV		 2108static int omapfb_set_def_mode(struct omapfb2_device *fbdev,
2109 struct omap_dss_device *display, char *mode_str)
b39a982d
TV		 2110{
2111 int r;
2112 u8 bpp;
371e2081 2113 struct omap_video_timings timings, temp_timings;
065a40bd 2114 struct omapfb_display_data *d;
b39a982d 2115
783babf3 2116 r = omapfb_mode_to_timings(mode_str, display, &timings, &bpp);
b39a982d
TV		 2117 if (r)
2118 return r;
2119
065a40bd
TV		 2120 d = get_display_data(fbdev, display);
2121 d->bpp_override = bpp;
b39a982d 2122
371e2081
JM		 2123 if (display->driver->check_timings) {
2124 r = display->driver->check_timings(display, &timings);
2125 if (r)
2126 return r;
2127 } else {
2128 /* If check_timings is not present compare xres and yres */
2129 if (display->driver->get_timings) {
2130 display->driver->get_timings(display, &temp_timings);
b39a982d 2131
371e2081
JM		 2132 if (temp_timings.x_res != timings.x_res ||
2133 temp_timings.y_res != timings.y_res)
2134 return -EINVAL;
2135 }
2136 }
b39a982d 2137
371e2081
JM		 2138 if (display->driver->set_timings)
2139 display->driver->set_timings(display, &timings);
b39a982d
TV		 2140
2141 return 0;
2142}
2143
a2699504
TV		 2144static int omapfb_get_recommended_bpp(struct omapfb2_device *fbdev,
2145 struct omap_dss_device *dssdev)
2146{
065a40bd 2147 struct omapfb_display_data *d;
a2699504
TV		 2148
2149 BUG_ON(dssdev->driver->get_recommended_bpp == NULL);
2150
065a40bd
TV		 2151 d = get_display_data(fbdev, dssdev);
2152
2153 if (d->bpp_override != 0)
2154 return d->bpp_override;
a2699504
TV		 2155
2156 return dssdev->driver->get_recommended_bpp(dssdev);
2157}
2158
b39a982d
TV		 2159static int omapfb_parse_def_modes(struct omapfb2_device *fbdev)
2160{
2161 char *str, *options, *this_opt;
2162 int r = 0;
2163
36e8c27f
S		 2164 str = kstrdup(def_mode, GFP_KERNEL);
2165 if (!str)
2166 return -ENOMEM;
b39a982d
TV		 2167 options = str;
2168
2169 while (!r && (this_opt = strsep(&options, ",")) != NULL) {
2170 char *p, *display_str, *mode_str;
2171 struct omap_dss_device *display;
2172 int i;
2173
2174 p = strchr(this_opt, ':');
2175 if (!p) {
2176 r = -EINVAL;
2177 break;
2178 }
2179
2180 *p = 0;
2181 display_str = this_opt;
2182 mode_str = p + 1;
2183
2184 display = NULL;
2185 for (i = 0; i < fbdev->num_displays; ++i) {
065a40bd 2186 if (strcmp(fbdev->displays[i].dssdev->name,
b39a982d 2187 display_str) == 0) {
065a40bd 2188 display = fbdev->displays[i].dssdev;
b39a982d
TV		 2189 break;
2190 }
2191 }
2192
2193 if (!display) {
2194 r = -EINVAL;
2195 break;
2196 }
2197
a2699504 2198 r = omapfb_set_def_mode(fbdev, display, mode_str);
b39a982d
TV		 2199 if (r)
2200 break;
2201 }
2202
2203 kfree(str);
2204
2205 return r;
2206}
2207
dc891fab 2208static void fb_videomode_to_omap_timings(struct fb_videomode *m,
783babf3 2209 struct omap_dss_device *display,
dc891fab
TV		 2210 struct omap_video_timings *t)
2211{
783babf3
AT		 2212 if (display->driver->get_timings) {
2213 display->driver->get_timings(display, t);
2214 } else {
2215 t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
2216 t->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
2217 t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
2218 }
2219
dc891fab
TV		 2220 t->x_res = m->xres;
2221 t->y_res = m->yres;
2222 t->pixel_clock = PICOS2KHZ(m->pixclock);
2223 t->hsw = m->hsync_len;
2224 t->hfp = m->right_margin;
2225 t->hbp = m->left_margin;
2226 t->vsw = m->vsync_len;
2227 t->vfp = m->lower_margin;
2228 t->vbp = m->upper_margin;
783babf3
AT		 2229 t->hsync_level = m->sync & FB_SYNC_HOR_HIGH_ACT ?
2230 OMAPDSS_SIG_ACTIVE_HIGH :
2231 OMAPDSS_SIG_ACTIVE_LOW;
2232 t->vsync_level = m->sync & FB_SYNC_VERT_HIGH_ACT ?
2233 OMAPDSS_SIG_ACTIVE_HIGH :
2234 OMAPDSS_SIG_ACTIVE_LOW;
23bae3ad 2235 t->interlace = m->vmode & FB_VMODE_INTERLACED;
dc891fab
TV		 2236}
2237
2238static int omapfb_find_best_mode(struct omap_dss_device *display,
2239 struct omap_video_timings *timings)
2240{
2241 struct fb_monspecs *specs;
2242 u8 *edid;
5e18e352 2243 int r, i, best_idx, len;
dc891fab
TV		 2244
2245 if (!display->driver->read_edid)
2246 return -ENODEV;
2247
2248 len = 0x80 * 2;
2249 edid = kmalloc(len, GFP_KERNEL);
fa0c5e71
TV		 2250 if (edid == NULL)
2251 return -ENOMEM;
dc891fab
TV		 2252
2253 r = display->driver->read_edid(display, edid, len);
2254 if (r < 0)
2255 goto err1;
2256
2257 specs = kzalloc(sizeof(*specs), GFP_KERNEL);
fa0c5e71
TV		 2258 if (specs == NULL) {
2259 r = -ENOMEM;
2260 goto err1;
2261 }
dc891fab
TV		 2262
2263 fb_edid_to_monspecs(edid, specs);
2264
dc891fab
TV		 2265 best_idx = -1;
2266
2267 for (i = 0; i < specs->modedb_len; ++i) {
2268 struct fb_videomode *m;
2269 struct omap_video_timings t;
2270
2271 m = &specs->modedb[i];
2272
2273 if (m->pixclock == 0)
2274 continue;
2275
2276 /* skip repeated pixel modes */
2277 if (m->xres == 2880 || m->xres == 1440)
2278 continue;
2279
5e18e352
TV		 2280 if (m->vmode & FB_VMODE_INTERLACED ||
2281 m->vmode & FB_VMODE_DOUBLE)
2282 continue;
2283
783babf3 2284 fb_videomode_to_omap_timings(m, display, &t);
dc891fab
TV		 2285
2286 r = display->driver->check_timings(display, &t);
5e18e352 2287 if (r == 0) {
dc891fab 2288 best_idx = i;
5e18e352 2289 break;
dc891fab
TV		 2290 }
2291 }
2292
5e18e352 2293 if (best_idx == -1) {
dc891fab
TV		 2294 r = -ENOENT;
2295 goto err2;
2296 }
2297
783babf3
AT		 2298 fb_videomode_to_omap_timings(&specs->modedb[best_idx], display,
2299 timings);
dc891fab
TV		 2300
2301 r = 0;
2302
2303err2:
2304 fb_destroy_modedb(specs->modedb);
2305 kfree(specs);
2306err1:
2307 kfree(edid);
2308
2309 return r;
2310}
2311
91ac27a6
TV		 2312static int omapfb_init_display(struct omapfb2_device *fbdev,
2313 struct omap_dss_device *dssdev)
2314{
2315 struct omap_dss_driver *dssdrv = dssdev->driver;
27cc213e 2316 struct omapfb_display_data *d;
91ac27a6
TV		 2317 int r;
2318
2319 r = dssdrv->enable(dssdev);
2320 if (r) {
2321 dev_warn(fbdev->dev, "Failed to enable display '%s'\n",
2322 dssdev->name);
2323 return r;
2324 }
2325
27cc213e
TV		 2326 d = get_display_data(fbdev, dssdev);
2327
2328 d->fbdev = fbdev;
2329
91ac27a6
TV		 2330 if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) {
2331 u16 w, h;
27cc213e
TV		 2332
2333 if (auto_update) {
2334 omapfb_start_auto_update(fbdev, dssdev);
2335 d->update_mode = OMAPFB_AUTO_UPDATE;
2336 } else {
2337 d->update_mode = OMAPFB_MANUAL_UPDATE;
2338 }
2339
91ac27a6
TV		 2340 if (dssdrv->enable_te) {
2341 r = dssdrv->enable_te(dssdev, 1);
2342 if (r) {
2343 dev_err(fbdev->dev, "Failed to set TE\n");
2344 return r;
2345 }
2346 }
2347
91ac27a6
TV		 2348 dssdrv->get_resolution(dssdev, &w, &h);
2349 r = dssdrv->update(dssdev, 0, 0, w, h);
2350 if (r) {
2351 dev_err(fbdev->dev,
2352 "Failed to update display\n");
2353 return r;
2354 }
2355 } else {
27cc213e 2356 d->update_mode = OMAPFB_AUTO_UPDATE;
91ac27a6
TV		 2357 }
2358
2359 return 0;
2360}
2361
5d89bcc3 2362static int omapfb_init_connections(struct omapfb2_device *fbdev,
6b6f1edf 2363 struct omap_dss_device *def_dssdev)
5d89bcc3
TV		 2364{
2365 int i, r;
6b6f1edf 2366 struct omap_overlay_manager *mgr;
5d89bcc3 2367
a7e71e7f
TV		 2368 r = def_dssdev->driver->connect(def_dssdev);
2369 if (r) {
2370 dev_err(fbdev->dev, "failed to connect default display\n");
2371 return r;
2372 }
2373
6b6f1edf
TV		 2374 for (i = 0; i < fbdev->num_displays; ++i) {
2375 struct omap_dss_device *dssdev = fbdev->displays[i].dssdev;
5d89bcc3 2376
a7e71e7f 2377 if (dssdev == def_dssdev)
be8e8e1c 2378 continue;
5d89bcc3 2379
a7e71e7f
TV		 2380 /*
2381 * We don't care if the connect succeeds or not. We just want to
2382 * connect as many displays as possible.
2383 */
2384 dssdev->driver->connect(dssdev);
6b6f1edf
TV		 2385 }
2386
be8e8e1c 2387 mgr = omapdss_find_mgr_from_display(def_dssdev);
6b6f1edf
TV		 2388
2389 if (!mgr) {
2390 dev_err(fbdev->dev, "no ovl manager for the default display\n");
2391 return -EINVAL;
2392 }
5d89bcc3
TV		 2393
2394 for (i = 0; i < fbdev->num_overlays; i++) {
2395 struct omap_overlay *ovl = fbdev->overlays[i];
2396
2397 if (ovl->manager)
2398 ovl->unset_manager(ovl);
2399
2400 r = ovl->set_manager(ovl, mgr);
2401 if (r)
2402 dev_warn(fbdev->dev,
2403 "failed to connect overlay %s to manager %s\n",
2404 ovl->name, mgr->name);
2405 }
2406
2407 return 0;
2408}
2409
af56fe3c 2410static int omapfb_probe(struct platform_device *pdev)
b39a982d
TV		 2411{
2412 struct omapfb2_device *fbdev = NULL;
2413 int r = 0;
2414 int i;
b39a982d
TV		 2415 struct omap_dss_device *def_display;
2416 struct omap_dss_device *dssdev;
2417
2418 DBG("omapfb_probe\n");
2419
591a0ac7
TV		 2420 if (omapdss_is_initialized() == false)
2421 return -EPROBE_DEFER;
2422
b39a982d
TV		 2423 if (pdev->num_resources != 0) {
2424 dev_err(&pdev->dev, "probed for an unknown device\n");
2425 r = -ENODEV;
2426 goto err0;
2427 }
2428
057eeaee
TV		 2429 fbdev = devm_kzalloc(&pdev->dev, sizeof(struct omapfb2_device),
2430 GFP_KERNEL);
b39a982d
TV		 2431 if (fbdev == NULL) {
2432 r = -ENOMEM;
2433 goto err0;
2434 }
2435
a89d1a87 2436 if (def_vrfb && !omap_vrfb_supported()) {
41814cfc
SG		 2437 def_vrfb = 0;
2438 dev_warn(&pdev->dev, "VRFB is not supported on this hardware, "
2439 "ignoring the module parameter vrfb=y\n");
2440 }
2441
a9ee9f08
TV		 2442 r = omapdss_compat_init();
2443 if (r)
2444 goto err0;
41814cfc 2445
b39a982d
TV		 2446 mutex_init(&fbdev->mtx);
2447
2448 fbdev->dev = &pdev->dev;
2449 platform_set_drvdata(pdev, fbdev);
2450
2451 fbdev->num_displays = 0;
2452 dssdev = NULL;
2453 for_each_dss_dev(dssdev) {
27cc213e
TV		 2454 struct omapfb_display_data *d;
2455
b39a982d 2456 omap_dss_get_device(dssdev);
b3f91eb8 2457
807a7515 2458 if (!dssdev->driver) {
bab59b44 2459 dev_warn(&pdev->dev, "no driver for display: %s\n",
c5f18d7b 2460 dssdev->name);
bab59b44
TV		 2461 omap_dss_put_device(dssdev);
2462 continue;
807a7515 2463 }
b3f91eb8 2464
27cc213e
TV		 2465 d = &fbdev->displays[fbdev->num_displays++];
2466 d->dssdev = dssdev;
2467 if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE)
2468 d->update_mode = OMAPFB_MANUAL_UPDATE;
2469 else
2470 d->update_mode = OMAPFB_AUTO_UPDATE;
b39a982d
TV		 2471 }
2472
2473 if (fbdev->num_displays == 0) {
2474 dev_err(&pdev->dev, "no displays\n");
dfbc3231 2475 r = -EPROBE_DEFER;
b39a982d
TV		 2476 goto cleanup;
2477 }
2478
2479 fbdev->num_overlays = omap_dss_get_num_overlays();
2480 for (i = 0; i < fbdev->num_overlays; i++)
2481 fbdev->overlays[i] = omap_dss_get_overlay(i);
2482
2483 fbdev->num_managers = omap_dss_get_num_overlay_managers();
2484 for (i = 0; i < fbdev->num_managers; i++)
2485 fbdev->managers[i] = omap_dss_get_overlay_manager(i);
2486
5d89bcc3
TV		 2487 def_display = NULL;
2488
2489 for (i = 0; i < fbdev->num_displays; ++i) {
2490 struct omap_dss_device *dssdev;
2491 const char *def_name;
2492
2493 def_name = omapdss_get_default_display_name();
2494
2495 dssdev = fbdev->displays[i].dssdev;
2496
2497 if (def_name == NULL ||
2498 (dssdev->name && strcmp(def_name, dssdev->name) == 0)) {
2499 def_display = dssdev;
2500 break;
2501 }
2502 }
2503
2504 if (def_display == NULL) {
2505 dev_err(fbdev->dev, "failed to find default display\n");
e9f322b4 2506 r = -EPROBE_DEFER;
5d89bcc3
TV		 2507 goto cleanup;
2508 }
2509
2510 r = omapfb_init_connections(fbdev, def_display);
2511 if (r) {
2512 dev_err(fbdev->dev, "failed to init overlay connections\n");
2513 goto cleanup;
dc891fab
TV		 2514 }
2515
b39a982d
TV		 2516 if (def_mode && strlen(def_mode) > 0) {
2517 if (omapfb_parse_def_modes(fbdev))
2518 dev_warn(&pdev->dev, "cannot parse default modes\n");
dc891fab
TV		 2519 } else if (def_display && def_display->driver->set_timings &&
2520 def_display->driver->check_timings) {
2521 struct omap_video_timings t;
2522
2523 r = omapfb_find_best_mode(def_display, &t);
2524
2525 if (r == 0)
2526 def_display->driver->set_timings(def_display, &t);
b39a982d
TV		 2527 }
2528
2529 r = omapfb_create_framebuffers(fbdev);
2530 if (r)
2531 goto cleanup;
2532
2533 for (i = 0; i < fbdev->num_managers; i++) {
2534 struct omap_overlay_manager *mgr;
2535 mgr = fbdev->managers[i];
2536 r = mgr->apply(mgr);
2537 if (r)
2538 dev_warn(fbdev->dev, "failed to apply dispc config\n");
2539 }
2540
2541 DBG("mgr->apply'ed\n");
2542
b39a982d 2543 if (def_display) {
91ac27a6 2544 r = omapfb_init_display(fbdev, def_display);
6d2e0bd6 2545 if (r) {
91ac27a6
TV		 2546 dev_err(fbdev->dev,
2547 "failed to initialize default "
2548 "display\n");
6d2e0bd6
TV		 2549 goto cleanup;
2550 }
b39a982d
TV		 2551 }
2552
e26ed44c
AM		 2553 DBG("create sysfs for fbs\n");
2554 r = omapfb_create_sysfs(fbdev);
2555 if (r) {
2556 dev_err(fbdev->dev, "failed to create sysfs entries\n");
2557 goto cleanup;
2558 }
2559
b39a982d
TV		 2560 return 0;
2561
2562cleanup:
2563 omapfb_free_resources(fbdev);
a9ee9f08 2564 omapdss_compat_uninit();
b39a982d
TV		 2565err0:
2566 dev_err(&pdev->dev, "failed to setup omapfb\n");
2567 return r;
2568}
2569
d64f14e1 2570static int __exit omapfb_remove(struct platform_device *pdev)
b39a982d
TV		 2571{
2572 struct omapfb2_device *fbdev = platform_get_drvdata(pdev);
2573
2574 /* FIXME: wait till completion of pending events */
2575
2576 omapfb_remove_sysfs(fbdev);
2577
2578 omapfb_free_resources(fbdev);
2579
a9ee9f08
TV		 2580 omapdss_compat_uninit();
2581
b39a982d
TV		 2582 return 0;
2583}
2584
2585static struct platform_driver omapfb_driver = {
af56fe3c 2586 .probe = omapfb_probe,
d64f14e1 2587 .remove = __exit_p(omapfb_remove),
b39a982d
TV		 2588 .driver = {
2589 .name = "omapfb",
2590 .owner = THIS_MODULE,
2591 },
2592};
2593
b39a982d
TV		 2594module_param_named(mode, def_mode, charp, 0);
2595module_param_named(vram, def_vram, charp, 0);
2596module_param_named(rotate, def_rotate, int, 0);
2597module_param_named(vrfb, def_vrfb, bool, 0);
2598module_param_named(mirror, def_mirror, bool, 0);
2599
af56fe3c 2600module_platform_driver(omapfb_driver);
b39a982d
TV		 2601
2602MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>");
2603MODULE_DESCRIPTION("OMAP2/3 Framebuffer");
2604MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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