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1da177e4 LT |
1 | /* p9100.c: P9100 frame buffer driver |
2 | * | |
50312ce9 | 3 | * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
4 | * Copyright 1999 Derrick J Brashear (shadow@dementia.org) |
5 | * | |
6 | * Driver layout based loosely on tgafb.c, see that file for credits. | |
7 | */ | |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/errno.h> | |
12 | #include <linux/string.h> | |
13 | #include <linux/slab.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/fb.h> | |
17 | #include <linux/mm.h> | |
6cd5a86b | 18 | #include <linux/of_device.h> |
1da177e4 LT |
19 | |
20 | #include <asm/io.h> | |
1da177e4 LT |
21 | #include <asm/fbio.h> |
22 | ||
23 | #include "sbuslib.h" | |
24 | ||
25 | /* | |
26 | * Local functions. | |
27 | */ | |
28 | ||
29 | static int p9100_setcolreg(unsigned, unsigned, unsigned, unsigned, | |
30 | unsigned, struct fb_info *); | |
31 | static int p9100_blank(int, struct fb_info *); | |
32 | ||
216d526c | 33 | static int p9100_mmap(struct fb_info *, struct vm_area_struct *); |
67a6680d | 34 | static int p9100_ioctl(struct fb_info *, unsigned int, unsigned long); |
1da177e4 LT |
35 | |
36 | /* | |
37 | * Frame buffer operations | |
38 | */ | |
39 | ||
40 | static struct fb_ops p9100_ops = { | |
41 | .owner = THIS_MODULE, | |
42 | .fb_setcolreg = p9100_setcolreg, | |
43 | .fb_blank = p9100_blank, | |
44 | .fb_fillrect = cfb_fillrect, | |
45 | .fb_copyarea = cfb_copyarea, | |
46 | .fb_imageblit = cfb_imageblit, | |
47 | .fb_mmap = p9100_mmap, | |
48 | .fb_ioctl = p9100_ioctl, | |
9ffb83bc CH |
49 | #ifdef CONFIG_COMPAT |
50 | .fb_compat_ioctl = sbusfb_compat_ioctl, | |
51 | #endif | |
1da177e4 LT |
52 | }; |
53 | ||
54 | /* P9100 control registers */ | |
55 | #define P9100_SYSCTL_OFF 0x0UL | |
56 | #define P9100_VIDEOCTL_OFF 0x100UL | |
57 | #define P9100_VRAMCTL_OFF 0x180UL | |
58 | #define P9100_RAMDAC_OFF 0x200UL | |
59 | #define P9100_VIDEOCOPROC_OFF 0x400UL | |
60 | ||
61 | /* P9100 command registers */ | |
62 | #define P9100_CMD_OFF 0x0UL | |
63 | ||
64 | /* P9100 framebuffer memory */ | |
65 | #define P9100_FB_OFF 0x0UL | |
66 | ||
67 | /* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */ | |
68 | #define SYS_CONFIG_PIXELSIZE_SHIFT 26 | |
69 | ||
70 | #define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */ | |
71 | ||
72 | struct p9100_regs { | |
73 | /* Registers for the system control */ | |
50312ce9 DM |
74 | u32 sys_base; |
75 | u32 sys_config; | |
76 | u32 sys_intr; | |
77 | u32 sys_int_ena; | |
78 | u32 sys_alt_rd; | |
79 | u32 sys_alt_wr; | |
80 | u32 sys_xxx[58]; | |
1da177e4 LT |
81 | |
82 | /* Registers for the video control */ | |
50312ce9 DM |
83 | u32 vid_base; |
84 | u32 vid_hcnt; | |
85 | u32 vid_htotal; | |
86 | u32 vid_hsync_rise; | |
87 | u32 vid_hblank_rise; | |
88 | u32 vid_hblank_fall; | |
89 | u32 vid_hcnt_preload; | |
90 | u32 vid_vcnt; | |
91 | u32 vid_vlen; | |
92 | u32 vid_vsync_rise; | |
93 | u32 vid_vblank_rise; | |
94 | u32 vid_vblank_fall; | |
95 | u32 vid_vcnt_preload; | |
96 | u32 vid_screenpaint_addr; | |
97 | u32 vid_screenpaint_timectl1; | |
98 | u32 vid_screenpaint_qsfcnt; | |
99 | u32 vid_screenpaint_timectl2; | |
100 | u32 vid_xxx[15]; | |
1da177e4 LT |
101 | |
102 | /* Registers for the video control */ | |
50312ce9 DM |
103 | u32 vram_base; |
104 | u32 vram_memcfg; | |
105 | u32 vram_refresh_pd; | |
106 | u32 vram_refresh_cnt; | |
107 | u32 vram_raslo_max; | |
108 | u32 vram_raslo_cur; | |
109 | u32 pwrup_cfg; | |
110 | u32 vram_xxx[25]; | |
1da177e4 LT |
111 | |
112 | /* Registers for IBM RGB528 Palette */ | |
50312ce9 DM |
113 | u32 ramdac_cmap_wridx; |
114 | u32 ramdac_palette_data; | |
115 | u32 ramdac_pixel_mask; | |
116 | u32 ramdac_palette_rdaddr; | |
117 | u32 ramdac_idx_lo; | |
118 | u32 ramdac_idx_hi; | |
119 | u32 ramdac_idx_data; | |
120 | u32 ramdac_idx_ctl; | |
121 | u32 ramdac_xxx[1784]; | |
1da177e4 LT |
122 | }; |
123 | ||
124 | struct p9100_cmd_parameng { | |
50312ce9 DM |
125 | u32 parameng_status; |
126 | u32 parameng_bltcmd; | |
127 | u32 parameng_quadcmd; | |
1da177e4 LT |
128 | }; |
129 | ||
130 | struct p9100_par { | |
131 | spinlock_t lock; | |
132 | struct p9100_regs __iomem *regs; | |
133 | ||
134 | u32 flags; | |
135 | #define P9100_FLAG_BLANKED 0x00000001 | |
136 | ||
137 | unsigned long physbase; | |
50312ce9 | 138 | unsigned long which_io; |
1da177e4 | 139 | unsigned long fbsize; |
1da177e4 LT |
140 | }; |
141 | ||
142 | /** | |
143 | * p9100_setcolreg - Optional function. Sets a color register. | |
144 | * @regno: boolean, 0 copy local, 1 get_user() function | |
145 | * @red: frame buffer colormap structure | |
146 | * @green: The green value which can be up to 16 bits wide | |
147 | * @blue: The blue value which can be up to 16 bits wide. | |
148 | * @transp: If supported the alpha value which can be up to 16 bits wide. | |
149 | * @info: frame buffer info structure | |
150 | */ | |
151 | static int p9100_setcolreg(unsigned regno, | |
152 | unsigned red, unsigned green, unsigned blue, | |
153 | unsigned transp, struct fb_info *info) | |
154 | { | |
155 | struct p9100_par *par = (struct p9100_par *) info->par; | |
156 | struct p9100_regs __iomem *regs = par->regs; | |
157 | unsigned long flags; | |
158 | ||
159 | if (regno >= 256) | |
160 | return 1; | |
161 | ||
162 | red >>= 8; | |
163 | green >>= 8; | |
164 | blue >>= 8; | |
165 | ||
166 | spin_lock_irqsave(&par->lock, flags); | |
167 | ||
168 | sbus_writel((regno << 16), ®s->ramdac_cmap_wridx); | |
169 | sbus_writel((red << 16), ®s->ramdac_palette_data); | |
170 | sbus_writel((green << 16), ®s->ramdac_palette_data); | |
171 | sbus_writel((blue << 16), ®s->ramdac_palette_data); | |
172 | ||
173 | spin_unlock_irqrestore(&par->lock, flags); | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
178 | /** | |
179 | * p9100_blank - Optional function. Blanks the display. | |
180 | * @blank_mode: the blank mode we want. | |
181 | * @info: frame buffer structure that represents a single frame buffer | |
182 | */ | |
183 | static int | |
184 | p9100_blank(int blank, struct fb_info *info) | |
185 | { | |
186 | struct p9100_par *par = (struct p9100_par *) info->par; | |
187 | struct p9100_regs __iomem *regs = par->regs; | |
188 | unsigned long flags; | |
189 | u32 val; | |
190 | ||
191 | spin_lock_irqsave(&par->lock, flags); | |
192 | ||
193 | switch (blank) { | |
194 | case FB_BLANK_UNBLANK: /* Unblanking */ | |
195 | val = sbus_readl(®s->vid_screenpaint_timectl1); | |
196 | val |= SCREENPAINT_TIMECTL1_ENABLE_VIDEO; | |
197 | sbus_writel(val, ®s->vid_screenpaint_timectl1); | |
198 | par->flags &= ~P9100_FLAG_BLANKED; | |
199 | break; | |
200 | ||
201 | case FB_BLANK_NORMAL: /* Normal blanking */ | |
202 | case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ | |
203 | case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ | |
204 | case FB_BLANK_POWERDOWN: /* Poweroff */ | |
205 | val = sbus_readl(®s->vid_screenpaint_timectl1); | |
206 | val &= ~SCREENPAINT_TIMECTL1_ENABLE_VIDEO; | |
207 | sbus_writel(val, ®s->vid_screenpaint_timectl1); | |
208 | par->flags |= P9100_FLAG_BLANKED; | |
209 | break; | |
210 | } | |
211 | ||
212 | spin_unlock_irqrestore(&par->lock, flags); | |
213 | ||
214 | return 0; | |
215 | } | |
216 | ||
217 | static struct sbus_mmap_map p9100_mmap_map[] = { | |
218 | { CG3_MMAP_OFFSET, 0, SBUS_MMAP_FBSIZE(1) }, | |
219 | { 0, 0, 0 } | |
220 | }; | |
221 | ||
216d526c | 222 | static int p9100_mmap(struct fb_info *info, struct vm_area_struct *vma) |
1da177e4 LT |
223 | { |
224 | struct p9100_par *par = (struct p9100_par *)info->par; | |
225 | ||
226 | return sbusfb_mmap_helper(p9100_mmap_map, | |
227 | par->physbase, par->fbsize, | |
50312ce9 | 228 | par->which_io, vma); |
1da177e4 LT |
229 | } |
230 | ||
67a6680d CH |
231 | static int p9100_ioctl(struct fb_info *info, unsigned int cmd, |
232 | unsigned long arg) | |
1da177e4 LT |
233 | { |
234 | struct p9100_par *par = (struct p9100_par *) info->par; | |
235 | ||
236 | /* Make it look like a cg3. */ | |
237 | return sbusfb_ioctl_helper(cmd, arg, info, | |
238 | FBTYPE_SUN3COLOR, 8, par->fbsize); | |
239 | } | |
240 | ||
241 | /* | |
242 | * Initialisation | |
243 | */ | |
244 | ||
50312ce9 | 245 | static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp) |
1da177e4 | 246 | { |
50312ce9 | 247 | strlcpy(info->fix.id, dp->name, sizeof(info->fix.id)); |
1da177e4 LT |
248 | |
249 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
250 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
251 | ||
252 | info->fix.line_length = linebytes; | |
253 | ||
254 | info->fix.accel = FB_ACCEL_SUN_CGTHREE; | |
255 | } | |
256 | ||
c7f439b9 | 257 | static int __devinit p9100_probe(struct of_device *op, const struct of_device_id *match) |
1da177e4 | 258 | { |
50312ce9 | 259 | struct device_node *dp = op->node; |
c7f439b9 DM |
260 | struct fb_info *info; |
261 | struct p9100_par *par; | |
50312ce9 | 262 | int linebytes, err; |
1da177e4 | 263 | |
c7f439b9 DM |
264 | info = framebuffer_alloc(sizeof(struct p9100_par), &op->dev); |
265 | ||
266 | err = -ENOMEM; | |
267 | if (!info) | |
268 | goto out_err; | |
269 | par = info->par; | |
1da177e4 | 270 | |
c7f439b9 | 271 | spin_lock_init(&par->lock); |
1da177e4 LT |
272 | |
273 | /* This is the framebuffer and the only resource apps can mmap. */ | |
c7f439b9 DM |
274 | par->physbase = op->resource[2].start; |
275 | par->which_io = op->resource[2].flags & IORESOURCE_BITS; | |
1da177e4 | 276 | |
6cd5a86b | 277 | sbusfb_fill_var(&info->var, dp, 8); |
c7f439b9 DM |
278 | info->var.red.length = 8; |
279 | info->var.green.length = 8; | |
280 | info->var.blue.length = 8; | |
1da177e4 | 281 | |
c7f439b9 DM |
282 | linebytes = of_getintprop_default(dp, "linebytes", info->var.xres); |
283 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); | |
1da177e4 | 284 | |
c7f439b9 DM |
285 | par->regs = of_ioremap(&op->resource[0], 0, |
286 | sizeof(struct p9100_regs), "p9100 regs"); | |
287 | if (!par->regs) | |
288 | goto out_release_fb; | |
1da177e4 | 289 | |
c7f439b9 DM |
290 | info->flags = FBINFO_DEFAULT; |
291 | info->fbops = &p9100_ops; | |
292 | info->screen_base = of_ioremap(&op->resource[2], 0, | |
293 | par->fbsize, "p9100 ram"); | |
294 | if (!info->screen_base) | |
295 | goto out_unmap_regs; | |
296 | ||
59f7137a | 297 | p9100_blank(FB_BLANK_UNBLANK, info); |
c7f439b9 DM |
298 | |
299 | if (fb_alloc_cmap(&info->cmap, 256, 0)) | |
300 | goto out_unmap_screen; | |
1da177e4 | 301 | |
c7f439b9 DM |
302 | p9100_init_fix(info, linebytes, dp); |
303 | ||
304 | err = register_framebuffer(info); | |
305 | if (err < 0) | |
306 | goto out_dealloc_cmap; | |
307 | ||
308 | fb_set_cmap(&info->cmap, info); | |
309 | ||
310 | dev_set_drvdata(&op->dev, info); | |
50312ce9 | 311 | |
194f1a68 | 312 | printk(KERN_INFO "%s: p9100 at %lx:%lx\n", |
50312ce9 | 313 | dp->full_name, |
c7f439b9 | 314 | par->which_io, par->physbase); |
1da177e4 | 315 | |
50312ce9 | 316 | return 0; |
1da177e4 | 317 | |
c7f439b9 DM |
318 | out_dealloc_cmap: |
319 | fb_dealloc_cmap(&info->cmap); | |
320 | ||
321 | out_unmap_screen: | |
322 | of_iounmap(&op->resource[2], info->screen_base, par->fbsize); | |
323 | ||
324 | out_unmap_regs: | |
325 | of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs)); | |
326 | ||
327 | out_release_fb: | |
328 | framebuffer_release(info); | |
1da177e4 | 329 | |
c7f439b9 DM |
330 | out_err: |
331 | return err; | |
50312ce9 | 332 | } |
1da177e4 | 333 | |
e3a411a3 | 334 | static int __devexit p9100_remove(struct of_device *op) |
50312ce9 | 335 | { |
c7f439b9 DM |
336 | struct fb_info *info = dev_get_drvdata(&op->dev); |
337 | struct p9100_par *par = info->par; | |
50312ce9 | 338 | |
c7f439b9 DM |
339 | unregister_framebuffer(info); |
340 | fb_dealloc_cmap(&info->cmap); | |
50312ce9 | 341 | |
c7f439b9 DM |
342 | of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs)); |
343 | of_iounmap(&op->resource[2], info->screen_base, par->fbsize); | |
50312ce9 | 344 | |
c7f439b9 | 345 | framebuffer_release(info); |
50312ce9 | 346 | |
e3a411a3 | 347 | dev_set_drvdata(&op->dev, NULL); |
1da177e4 LT |
348 | |
349 | return 0; | |
350 | } | |
351 | ||
fd098316 | 352 | static const struct of_device_id p9100_match[] = { |
50312ce9 DM |
353 | { |
354 | .name = "p9100", | |
355 | }, | |
356 | {}, | |
357 | }; | |
358 | MODULE_DEVICE_TABLE(of, p9100_match); | |
1da177e4 | 359 | |
50312ce9 DM |
360 | static struct of_platform_driver p9100_driver = { |
361 | .name = "p9100", | |
362 | .match_table = p9100_match, | |
363 | .probe = p9100_probe, | |
364 | .remove = __devexit_p(p9100_remove), | |
365 | }; | |
1da177e4 | 366 | |
50312ce9 DM |
367 | static int __init p9100_init(void) |
368 | { | |
369 | if (fb_get_options("p9100fb", NULL)) | |
370 | return -ENODEV; | |
371 | ||
372 | return of_register_driver(&p9100_driver, &of_bus_type); | |
1da177e4 LT |
373 | } |
374 | ||
50312ce9 | 375 | static void __exit p9100_exit(void) |
1da177e4 | 376 | { |
50312ce9 | 377 | of_unregister_driver(&p9100_driver); |
1da177e4 LT |
378 | } |
379 | ||
380 | module_init(p9100_init); | |
1da177e4 | 381 | module_exit(p9100_exit); |
1da177e4 LT |
382 | |
383 | MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets"); | |
50312ce9 DM |
384 | MODULE_AUTHOR("David S. Miller <davem@davemloft.net>"); |
385 | MODULE_VERSION("2.0"); | |
1da177e4 | 386 | MODULE_LICENSE("GPL"); |