projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | #ifndef __PXAFB_H__ |
| 2 | #define __PXAFB_H__ | |
| 3 | ||
| 4 | /* | |
| 5 | * linux/drivers/video/pxafb.h | |
| 6 | * -- Intel PXA250/210 LCD Controller Frame Buffer Device | |
| 7 | * | |
| 8 | * Copyright (C) 1999 Eric A. Thomas. | |
| 9 | * Copyright (C) 2004 Jean-Frederic Clere. | |
| 10 | * Copyright (C) 2004 Ian Campbell. | |
| 11 | * Copyright (C) 2004 Jeff Lackey. | |
| 12 | * Based on sa1100fb.c Copyright (C) 1999 Eric A. Thomas | |
| 13 | * which in turn is | |
| 14 | * Based on acornfb.c Copyright (C) Russell King. | |
| 15 | * | |
| 16 | * 2001-08-03: Cliff Brake <cbrake@acclent.com> | |
| 17 | * - ported SA1100 code to PXA | |
| 18 | * | |
| 19 | * This file is subject to the terms and conditions of the GNU General Public | |
| 20 | * License. See the file COPYING in the main directory of this archive | |
| 21 | * for more details. | |
| 22 | */ | |
| 23 | ||
| 24 | /* Shadows for LCD controller registers */ | |
| 25 | struct pxafb_lcd_reg { | |
| 26 | unsigned int lccr0; | |
| 27 | unsigned int lccr1; | |
| 28 | unsigned int lccr2; | |
| 29 | unsigned int lccr3; | |
| 30 | }; | |
| 31 | ||
| 32 | /* PXA LCD DMA descriptor */ | |
| 33 | struct pxafb_dma_descriptor { | |
| 34 | unsigned int fdadr; | |
| 35 | unsigned int fsadr; | |
| 36 | unsigned int fidr; | |
| 37 | unsigned int ldcmd; | |
| 38 | }; | |
| 39 | ||
| 40 | struct pxafb_info { | |
| 41 | struct fb_info fb; | |
| 42 | struct device *dev; | |
| 43 | ||
| 1da177e4 LT |
44 | /* |
| 45 | * These are the addresses we mapped | |
| 46 | * the framebuffer memory region to. | |
| 47 | */ | |
| 48 | /* raw memory addresses */ | |
| 49 | dma_addr_t map_dma; /* physical */ | |
| 50 | u_char * map_cpu; /* virtual */ | |
| 51 | u_int map_size; | |
| 52 | ||
| 53 | /* addresses of pieces placed in raw buffer */ | |
| 54 | u_char * screen_cpu; /* virtual address of frame buffer */ | |
| 55 | dma_addr_t screen_dma; /* physical address of frame buffer */ | |
| 56 | u16 * palette_cpu; /* virtual address of palette memory */ | |
| 57 | dma_addr_t palette_dma; /* physical address of palette memory */ | |
| 58 | u_int palette_size; | |
| 59 | ||
| 60 | /* DMA descriptors */ | |
| 61 | struct pxafb_dma_descriptor * dmadesc_fblow_cpu; | |
| 62 | dma_addr_t dmadesc_fblow_dma; | |
| 63 | struct pxafb_dma_descriptor * dmadesc_fbhigh_cpu; | |
| 64 | dma_addr_t dmadesc_fbhigh_dma; | |
| 65 | struct pxafb_dma_descriptor * dmadesc_palette_cpu; | |
| 66 | dma_addr_t dmadesc_palette_dma; | |
| 67 | ||
| 68 | dma_addr_t fdadr0; | |
| 69 | dma_addr_t fdadr1; | |
| 70 | ||
| 71 | u_int lccr0; | |
| 72 | u_int lccr3; | |
| 73 | u_int cmap_inverse:1, | |
| 74 | cmap_static:1, | |
| 75 | unused:30; | |
| 76 | ||
| 77 | u_int reg_lccr0; | |
| 78 | u_int reg_lccr1; | |
| 79 | u_int reg_lccr2; | |
| 80 | u_int reg_lccr3; | |
| 81 | ||
| ba44cd2d RP |
82 | unsigned long hsync_time; |
| 83 | ||
| 1da177e4 LT |
84 | volatile u_char state; |
| 85 | volatile u_char task_state; | |
| 86 | struct semaphore ctrlr_sem; | |
| 87 | wait_queue_head_t ctrlr_wait; | |
| 88 | struct work_struct task; | |
| 89 | ||
| 90 | #ifdef CONFIG_CPU_FREQ | |
| 91 | struct notifier_block freq_transition; | |
| 92 | struct notifier_block freq_policy; | |
| 93 | #endif | |
| 94 | }; | |
| 95 | ||
| 96 | #define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member) | |
| 97 | ||
| 98 | /* | |
| 99 | * These are the actions for set_ctrlr_state | |
| 100 | */ | |
| 101 | #define C_DISABLE (0) | |
| 102 | #define C_ENABLE (1) | |
| 103 | #define C_DISABLE_CLKCHANGE (2) | |
| 104 | #define C_ENABLE_CLKCHANGE (3) | |
| 105 | #define C_REENABLE (4) | |
| 106 | #define C_DISABLE_PM (5) | |
| 107 | #define C_ENABLE_PM (6) | |
| 108 | #define C_STARTUP (7) | |
| 109 | ||
| 110 | #define PXA_NAME "PXA" | |
| 111 | ||
| 1da177e4 LT |
112 | /* |
| 113 | * Minimum X and Y resolutions | |
| 114 | */ | |
| 115 | #define MIN_XRES 64 | |
| 116 | #define MIN_YRES 64 | |
| 117 | ||
| 118 | #endif /* __PXAFB_H__ */ |