blacklight: remove redundant spi driver bus initialization
[deliverable/linux.git] / drivers / video / sh_mobile_lcdcfb.c
CommitLineData
cfb4f5d1
MD
1/*
2 * SuperH Mobile LCDC Framebuffer
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
f1f60b5f
LP
11#include <linux/atomic.h>
12#include <linux/backlight.h>
cfb4f5d1 13#include <linux/clk.h>
f1f60b5f 14#include <linux/console.h>
cfb4f5d1 15#include <linux/dma-mapping.h>
f1f60b5f
LP
16#include <linux/delay.h>
17#include <linux/gpio.h>
18#include <linux/init.h>
8564557a 19#include <linux/interrupt.h>
40331b21 20#include <linux/ioctl.h>
f1f60b5f
LP
21#include <linux/kernel.h>
22#include <linux/mm.h>
355b200b 23#include <linux/module.h>
f1f60b5f
LP
24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/videodev2.h>
28#include <linux/vmalloc.h>
29
225c9a8d 30#include <video/sh_mobile_lcdc.h>
8a20974f 31#include <video/sh_mobile_meram.h>
cfb4f5d1 32
6de9edd5
GL
33#include "sh_mobile_lcdcfb.h"
34
a6f15ade
PE
35#define SIDE_B_OFFSET 0x1000
36#define MIRROR_OFFSET 0x2000
cfb4f5d1 37
d2ecbab5
GL
38#define MAX_XRES 1920
39#define MAX_YRES 1080
cfb4f5d1 40
f1f60b5f
LP
41struct sh_mobile_lcdc_priv {
42 void __iomem *base;
43 int irq;
44 atomic_t hw_usecnt;
45 struct device *dev;
46 struct clk *dot_clk;
47 unsigned long lddckr;
48 struct sh_mobile_lcdc_chan ch[2];
49 struct notifier_block notifier;
50 int started;
51 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
52 struct sh_mobile_meram_info *meram_dev;
53};
54
55/* -----------------------------------------------------------------------------
56 * Registers access
57 */
58
0246c471 59static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
cfb4f5d1
MD
60 [LDDCKPAT1R] = 0x400,
61 [LDDCKPAT2R] = 0x404,
62 [LDMT1R] = 0x418,
63 [LDMT2R] = 0x41c,
64 [LDMT3R] = 0x420,
65 [LDDFR] = 0x424,
66 [LDSM1R] = 0x428,
8564557a 67 [LDSM2R] = 0x42c,
cfb4f5d1 68 [LDSA1R] = 0x430,
53b50314 69 [LDSA2R] = 0x434,
cfb4f5d1
MD
70 [LDMLSR] = 0x438,
71 [LDHCNR] = 0x448,
72 [LDHSYNR] = 0x44c,
73 [LDVLNR] = 0x450,
74 [LDVSYNR] = 0x454,
75 [LDPMR] = 0x460,
6011bdea 76 [LDHAJR] = 0x4a0,
cfb4f5d1
MD
77};
78
0246c471 79static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
cfb4f5d1
MD
80 [LDDCKPAT1R] = 0x408,
81 [LDDCKPAT2R] = 0x40c,
82 [LDMT1R] = 0x600,
83 [LDMT2R] = 0x604,
84 [LDMT3R] = 0x608,
85 [LDDFR] = 0x60c,
86 [LDSM1R] = 0x610,
8564557a 87 [LDSM2R] = 0x614,
cfb4f5d1
MD
88 [LDSA1R] = 0x618,
89 [LDMLSR] = 0x620,
90 [LDHCNR] = 0x624,
91 [LDHSYNR] = 0x628,
92 [LDVLNR] = 0x62c,
93 [LDVSYNR] = 0x630,
94 [LDPMR] = 0x63c,
95};
96
a6f15ade
PE
97static bool banked(int reg_nr)
98{
99 switch (reg_nr) {
100 case LDMT1R:
101 case LDMT2R:
102 case LDMT3R:
103 case LDDFR:
104 case LDSM1R:
105 case LDSA1R:
53b50314 106 case LDSA2R:
a6f15ade
PE
107 case LDMLSR:
108 case LDHCNR:
109 case LDHSYNR:
110 case LDVLNR:
111 case LDVSYNR:
112 return true;
113 }
114 return false;
115}
116
f1f60b5f
LP
117static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
118{
b5ef967d 119 return chan->cfg->chan == LCDC_CHAN_SUBLCD;
f1f60b5f
LP
120}
121
cfb4f5d1
MD
122static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
123 int reg_nr, unsigned long data)
124{
125 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
a6f15ade
PE
126 if (banked(reg_nr))
127 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
128 SIDE_B_OFFSET);
129}
130
131static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
132 int reg_nr, unsigned long data)
133{
134 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
135 MIRROR_OFFSET);
cfb4f5d1
MD
136}
137
138static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
139 int reg_nr)
140{
141 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
142}
143
144static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
145 unsigned long reg_offs, unsigned long data)
146{
147 iowrite32(data, priv->base + reg_offs);
148}
149
150static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
151 unsigned long reg_offs)
152{
153 return ioread32(priv->base + reg_offs);
154}
155
156static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
157 unsigned long reg_offs,
158 unsigned long mask, unsigned long until)
159{
160 while ((lcdc_read(priv, reg_offs) & mask) != until)
161 cpu_relax();
162}
163
f1f60b5f
LP
164/* -----------------------------------------------------------------------------
165 * Clock management
166 */
167
168static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1 169{
f1f60b5f
LP
170 if (atomic_inc_and_test(&priv->hw_usecnt)) {
171 if (priv->dot_clk)
172 clk_enable(priv->dot_clk);
173 pm_runtime_get_sync(priv->dev);
174 if (priv->meram_dev && priv->meram_dev->pdev)
175 pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
176 }
cfb4f5d1
MD
177}
178
f1f60b5f
LP
179static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
180{
181 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
182 if (priv->meram_dev && priv->meram_dev->pdev)
183 pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
184 pm_runtime_put(priv->dev);
185 if (priv->dot_clk)
186 clk_disable(priv->dot_clk);
187 }
188}
189
0a7f17aa
LP
190static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv,
191 int clock_source)
f1f60b5f 192{
4774c12a 193 struct clk *clk;
f1f60b5f
LP
194 char *str;
195
196 switch (clock_source) {
197 case LCDC_CLK_BUS:
198 str = "bus_clk";
199 priv->lddckr = LDDCKR_ICKSEL_BUS;
200 break;
201 case LCDC_CLK_PERIPHERAL:
202 str = "peripheral_clk";
203 priv->lddckr = LDDCKR_ICKSEL_MIPI;
204 break;
205 case LCDC_CLK_EXTERNAL:
206 str = NULL;
207 priv->lddckr = LDDCKR_ICKSEL_HDMI;
208 break;
209 default:
210 return -EINVAL;
211 }
212
4774c12a
LP
213 if (str == NULL)
214 return 0;
215
0a7f17aa 216 clk = clk_get(priv->dev, str);
4774c12a 217 if (IS_ERR(clk)) {
0a7f17aa 218 dev_err(priv->dev, "cannot get dot clock %s\n", str);
4774c12a 219 return PTR_ERR(clk);
f1f60b5f
LP
220 }
221
4774c12a 222 priv->dot_clk = clk;
f1f60b5f
LP
223 return 0;
224}
225
226/* -----------------------------------------------------------------------------
37c5dcc2 227 * Display, panel and deferred I/O
f1f60b5f
LP
228 */
229
cfb4f5d1
MD
230static void lcdc_sys_write_index(void *handle, unsigned long data)
231{
232 struct sh_mobile_lcdc_chan *ch = handle;
233
ce1c0b08
LP
234 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
235 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
236 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
237 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
238 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
239}
240
241static void lcdc_sys_write_data(void *handle, unsigned long data)
242{
243 struct sh_mobile_lcdc_chan *ch = handle;
244
ce1c0b08
LP
245 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
246 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
247 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
248 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
249 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
250}
251
252static unsigned long lcdc_sys_read_data(void *handle)
253{
254 struct sh_mobile_lcdc_chan *ch = handle;
255
ce1c0b08
LP
256 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
257 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
258 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
259 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
cfb4f5d1 260 udelay(1);
ce1c0b08 261 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1 262
ce1c0b08 263 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
cfb4f5d1
MD
264}
265
266struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
267 lcdc_sys_write_index,
268 lcdc_sys_write_data,
269 lcdc_sys_read_data,
270};
271
1c6a307a
PM
272static int sh_mobile_lcdc_sginit(struct fb_info *info,
273 struct list_head *pagelist)
274{
275 struct sh_mobile_lcdc_chan *ch = info->par;
58f03d99 276 unsigned int nr_pages_max = ch->fb_size >> PAGE_SHIFT;
1c6a307a
PM
277 struct page *page;
278 int nr_pages = 0;
279
280 sg_init_table(ch->sglist, nr_pages_max);
281
282 list_for_each_entry(page, pagelist, lru)
283 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
284
285 return nr_pages;
286}
287
8564557a
MD
288static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
289 struct list_head *pagelist)
290{
291 struct sh_mobile_lcdc_chan *ch = info->par;
b5ef967d 292 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
8564557a
MD
293
294 /* enable clocks before accessing hardware */
295 sh_mobile_lcdc_clk_on(ch->lcdc);
296
5c1a56b5
PM
297 /*
298 * It's possible to get here without anything on the pagelist via
299 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
300 * invocation. In the former case, the acceleration routines are
301 * stepped in to when using the framebuffer console causing the
302 * workqueue to be scheduled without any dirty pages on the list.
303 *
304 * Despite this, a panel update is still needed given that the
305 * acceleration routines have their own methods for writing in
306 * that still need to be updated.
307 *
308 * The fsync() and empty pagelist case could be optimized for,
309 * but we don't bother, as any application exhibiting such
310 * behaviour is fundamentally broken anyways.
311 */
312 if (!list_empty(pagelist)) {
313 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
314
315 /* trigger panel update */
e8363140 316 dma_map_sg(ch->lcdc->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
afaad83b
LP
317 if (panel->start_transfer)
318 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 319 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
e8363140
LP
320 dma_unmap_sg(ch->lcdc->dev, ch->sglist, nr_pages,
321 DMA_TO_DEVICE);
ef61aae4 322 } else {
afaad83b
LP
323 if (panel->start_transfer)
324 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 325 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
ef61aae4 326 }
8564557a
MD
327}
328
329static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
330{
331 struct fb_deferred_io *fbdefio = info->fbdefio;
332
333 if (fbdefio)
334 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
335}
336
37c5dcc2
LP
337static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch)
338{
b5ef967d 339 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
37c5dcc2 340
9a2985e7 341 if (ch->tx_dev) {
458981c3
LP
342 int ret;
343
344 ret = ch->tx_dev->ops->display_on(ch->tx_dev);
345 if (ret < 0)
9a2985e7 346 return;
458981c3
LP
347
348 if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED)
349 ch->info->state = FBINFO_STATE_SUSPENDED;
9a2985e7
LP
350 }
351
37c5dcc2 352 /* HDMI must be enabled before LCDC configuration */
afaad83b
LP
353 if (panel->display_on)
354 panel->display_on();
37c5dcc2
LP
355}
356
357static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch)
358{
b5ef967d 359 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
37c5dcc2 360
afaad83b
LP
361 if (panel->display_off)
362 panel->display_off();
9a2985e7
LP
363
364 if (ch->tx_dev)
365 ch->tx_dev->ops->display_off(ch->tx_dev);
37c5dcc2
LP
366}
367
ecd29947
LP
368static bool
369sh_mobile_lcdc_must_reconfigure(struct sh_mobile_lcdc_chan *ch,
e0c8601a 370 const struct fb_videomode *new_mode)
ecd29947 371{
ecd29947 372 dev_dbg(ch->info->dev, "Old %ux%u, new %ux%u\n",
2d04559d
LP
373 ch->display.mode.xres, ch->display.mode.yres,
374 new_mode->xres, new_mode->yres);
ecd29947 375
e0c8601a 376 /* It can be a different monitor with an equal video-mode */
2d04559d 377 if (fb_mode_is_equal(&ch->display.mode, new_mode))
ecd29947 378 return false;
ecd29947
LP
379
380 dev_dbg(ch->info->dev, "Switching %u -> %u lines\n",
2d04559d
LP
381 ch->display.mode.yres, new_mode->yres);
382 ch->display.mode = *new_mode;
ecd29947
LP
383
384 return true;
385}
386
387static int sh_mobile_check_var(struct fb_var_screeninfo *var,
388 struct fb_info *info);
389
390static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch,
391 enum sh_mobile_lcdc_entity_event event,
e0c8601a
LP
392 const struct fb_videomode *mode,
393 const struct fb_monspecs *monspec)
ecd29947
LP
394{
395 struct fb_info *info = ch->info;
e0c8601a 396 struct fb_var_screeninfo var;
ecd29947
LP
397 int ret = 0;
398
399 switch (event) {
400 case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT:
401 /* HDMI plug in */
402 if (lock_fb_info(info)) {
403 console_lock();
404
2d04559d
LP
405 ch->display.width = monspec->max_x * 10;
406 ch->display.height = monspec->max_y * 10;
e0c8601a
LP
407
408 if (!sh_mobile_lcdc_must_reconfigure(ch, mode) &&
ecd29947
LP
409 info->state == FBINFO_STATE_RUNNING) {
410 /* First activation with the default monitor.
411 * Just turn on, if we run a resume here, the
412 * logo disappears.
413 */
e0c8601a
LP
414 info->var.width = monspec->max_x * 10;
415 info->var.height = monspec->max_y * 10;
ecd29947
LP
416 sh_mobile_lcdc_display_on(ch);
417 } else {
418 /* New monitor or have to wake up */
419 fb_set_suspend(info, 0);
420 }
421
422 console_unlock();
423 unlock_fb_info(info);
424 }
425 break;
426
427 case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT:
428 /* HDMI disconnect */
429 if (lock_fb_info(info)) {
430 console_lock();
431 fb_set_suspend(info, 1);
432 console_unlock();
433 unlock_fb_info(info);
434 }
435 break;
436
437 case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE:
438 /* Validate a proposed new mode */
e0c8601a
LP
439 fb_videomode_to_var(&var, mode);
440 var.bits_per_pixel = info->var.bits_per_pixel;
441 var.grayscale = info->var.grayscale;
442 ret = sh_mobile_check_var(&var, info);
ecd29947
LP
443 break;
444 }
445
446 return ret;
447}
448
f1f60b5f
LP
449/* -----------------------------------------------------------------------------
450 * Format helpers
451 */
452
105784bb
LP
453struct sh_mobile_lcdc_format_info {
454 u32 fourcc;
455 unsigned int bpp;
456 bool yuv;
457 u32 lddfr;
458};
459
460static const struct sh_mobile_lcdc_format_info sh_mobile_format_infos[] = {
461 {
462 .fourcc = V4L2_PIX_FMT_RGB565,
463 .bpp = 16,
464 .yuv = false,
465 .lddfr = LDDFR_PKF_RGB16,
466 }, {
467 .fourcc = V4L2_PIX_FMT_BGR24,
468 .bpp = 24,
469 .yuv = false,
470 .lddfr = LDDFR_PKF_RGB24,
471 }, {
472 .fourcc = V4L2_PIX_FMT_BGR32,
473 .bpp = 32,
474 .yuv = false,
475 .lddfr = LDDFR_PKF_ARGB32,
476 }, {
477 .fourcc = V4L2_PIX_FMT_NV12,
478 .bpp = 12,
479 .yuv = true,
480 .lddfr = LDDFR_CC | LDDFR_YF_420,
481 }, {
482 .fourcc = V4L2_PIX_FMT_NV21,
483 .bpp = 12,
484 .yuv = true,
485 .lddfr = LDDFR_CC | LDDFR_YF_420,
486 }, {
487 .fourcc = V4L2_PIX_FMT_NV16,
488 .bpp = 16,
489 .yuv = true,
490 .lddfr = LDDFR_CC | LDDFR_YF_422,
491 }, {
492 .fourcc = V4L2_PIX_FMT_NV61,
493 .bpp = 16,
494 .yuv = true,
495 .lddfr = LDDFR_CC | LDDFR_YF_422,
496 }, {
497 .fourcc = V4L2_PIX_FMT_NV24,
498 .bpp = 24,
499 .yuv = true,
500 .lddfr = LDDFR_CC | LDDFR_YF_444,
501 }, {
502 .fourcc = V4L2_PIX_FMT_NV42,
503 .bpp = 24,
504 .yuv = true,
505 .lddfr = LDDFR_CC | LDDFR_YF_444,
506 },
507};
508
509static const struct sh_mobile_lcdc_format_info *
510sh_mobile_format_info(u32 fourcc)
511{
512 unsigned int i;
513
514 for (i = 0; i < ARRAY_SIZE(sh_mobile_format_infos); ++i) {
515 if (sh_mobile_format_infos[i].fourcc == fourcc)
516 return &sh_mobile_format_infos[i];
517 }
518
519 return NULL;
520}
521
f1f60b5f
LP
522static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var)
523{
524 if (var->grayscale > 1)
525 return var->grayscale;
526
527 switch (var->bits_per_pixel) {
528 case 16:
529 return V4L2_PIX_FMT_RGB565;
530 case 24:
531 return V4L2_PIX_FMT_BGR24;
532 case 32:
533 return V4L2_PIX_FMT_BGR32;
534 default:
535 return 0;
536 }
537}
538
539static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var)
540{
541 return var->grayscale > 1;
542}
543
f1f60b5f
LP
544/* -----------------------------------------------------------------------------
545 * Start, stop and IRQ
546 */
547
8564557a
MD
548static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
549{
550 struct sh_mobile_lcdc_priv *priv = data;
2feb075a 551 struct sh_mobile_lcdc_chan *ch;
9dd38819 552 unsigned long ldintr;
2feb075a
MD
553 int is_sub;
554 int k;
8564557a 555
dc48665f
LP
556 /* Acknowledge interrupts and disable further VSYNC End IRQs. */
557 ldintr = lcdc_read(priv, _LDINTR);
558 lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
8564557a 559
2feb075a 560 /* figure out if this interrupt is for main or sub lcd */
ce1c0b08 561 is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
2feb075a 562
9dd38819 563 /* wake up channel and disable clocks */
2feb075a
MD
564 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
565 ch = &priv->ch[k];
566
567 if (!ch->enabled)
568 continue;
569
dc48665f 570 /* Frame End */
9dd38819
PE
571 if (ldintr & LDINTR_FS) {
572 if (is_sub == lcdc_chan_is_sublcd(ch)) {
573 ch->frame_end = 1;
574 wake_up(&ch->frame_end_wait);
2feb075a 575
9dd38819
PE
576 sh_mobile_lcdc_clk_off(priv);
577 }
578 }
579
580 /* VSYNC End */
40331b21
PE
581 if (ldintr & LDINTR_VES)
582 complete(&ch->vsync_completion);
2feb075a
MD
583 }
584
8564557a
MD
585 return IRQ_HANDLED;
586}
587
4976677f
LP
588static int sh_mobile_wait_for_vsync(struct sh_mobile_lcdc_chan *ch)
589{
590 unsigned long ldintr;
591 int ret;
592
593 /* Enable VSync End interrupt and be careful not to acknowledge any
594 * pending interrupt.
595 */
596 ldintr = lcdc_read(ch->lcdc, _LDINTR);
597 ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
598 lcdc_write(ch->lcdc, _LDINTR, ldintr);
599
600 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
601 msecs_to_jiffies(100));
602 if (!ret)
603 return -ETIMEDOUT;
604
605 return 0;
606}
607
cfb4f5d1
MD
608static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
609 int start)
610{
611 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
612 int k;
613
614 /* start or stop the lcdc */
615 if (start)
ce1c0b08 616 lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
cfb4f5d1 617 else
ce1c0b08 618 lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
cfb4f5d1
MD
619
620 /* wait until power is applied/stopped on all channels */
621 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
622 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
623 while (1) {
ce1c0b08
LP
624 tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
625 & LDPMR_LPS;
626 if (start && tmp == LDPMR_LPS)
cfb4f5d1
MD
627 break;
628 if (!start && tmp == 0)
629 break;
630 cpu_relax();
631 }
632
633 if (!start)
634 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
635}
636
6011bdea
GL
637static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
638{
2d04559d
LP
639 const struct fb_var_screeninfo *var = &ch->info->var;
640 const struct fb_videomode *mode = &ch->display.mode;
1c120deb 641 unsigned long h_total, hsync_pos, display_h_total;
6011bdea
GL
642 u32 tmp;
643
644 tmp = ch->ldmt1r_value;
ce1c0b08
LP
645 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
646 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
b5ef967d
LP
647 tmp |= (ch->cfg->flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
648 tmp |= (ch->cfg->flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
649 tmp |= (ch->cfg->flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
650 tmp |= (ch->cfg->flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
651 tmp |= (ch->cfg->flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
6011bdea
GL
652 lcdc_write_chan(ch, LDMT1R, tmp);
653
654 /* setup SYS bus */
b5ef967d
LP
655 lcdc_write_chan(ch, LDMT2R, ch->cfg->sys_bus_cfg.ldmt2r);
656 lcdc_write_chan(ch, LDMT3R, ch->cfg->sys_bus_cfg.ldmt3r);
6011bdea
GL
657
658 /* horizontal configuration */
2d04559d
LP
659 h_total = mode->xres + mode->hsync_len + mode->left_margin
660 + mode->right_margin;
6011bdea 661 tmp = h_total / 8; /* HTCN */
58f03d99 662 tmp |= (min(mode->xres, ch->xres) / 8) << 16; /* HDCN */
6011bdea
GL
663 lcdc_write_chan(ch, LDHCNR, tmp);
664
2d04559d 665 hsync_pos = mode->xres + mode->right_margin;
6011bdea 666 tmp = hsync_pos / 8; /* HSYNP */
2d04559d 667 tmp |= (mode->hsync_len / 8) << 16; /* HSYNW */
6011bdea
GL
668 lcdc_write_chan(ch, LDHSYNR, tmp);
669
670 /* vertical configuration */
2d04559d
LP
671 tmp = mode->yres + mode->vsync_len + mode->upper_margin
672 + mode->lower_margin; /* VTLN */
58f03d99 673 tmp |= min(mode->yres, ch->yres) << 16; /* VDLN */
6011bdea
GL
674 lcdc_write_chan(ch, LDVLNR, tmp);
675
2d04559d
LP
676 tmp = mode->yres + mode->lower_margin; /* VSYNP */
677 tmp |= mode->vsync_len << 16; /* VSYNW */
6011bdea
GL
678 lcdc_write_chan(ch, LDVSYNR, tmp);
679
680 /* Adjust horizontal synchronisation for HDMI */
2d04559d
LP
681 display_h_total = mode->xres + mode->hsync_len + mode->left_margin
682 + mode->right_margin;
683 tmp = ((mode->xres & 7) << 24) | ((display_h_total & 7) << 16)
684 | ((mode->hsync_len & 7) << 8) | (hsync_pos & 7);
6011bdea
GL
685 lcdc_write_chan(ch, LDHAJR, tmp);
686}
687
9a217e34
LP
688/*
689 * __sh_mobile_lcdc_start - Configure and tart the LCDC
690 * @priv: LCDC device
691 *
692 * Configure all enabled channels and start the LCDC device. All external
693 * devices (clocks, MERAM, panels, ...) are not touched by this function.
694 */
695static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1
MD
696{
697 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1 698 unsigned long tmp;
9a217e34 699 int k, m;
8564557a 700
9a217e34
LP
701 /* Enable LCDC channels. Read data from external memory, avoid using the
702 * BEU for now.
703 */
704 lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
cfb4f5d1 705
9a217e34 706 /* Stop the LCDC first and disable all interrupts. */
cfb4f5d1 707 sh_mobile_lcdc_start_stop(priv, 0);
9a217e34 708 lcdc_write(priv, _LDINTR, 0);
cfb4f5d1 709
9a217e34 710 /* Configure power supply, dot clocks and start them. */
cfb4f5d1
MD
711 tmp = priv->lddckr;
712 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
713 ch = &priv->ch[k];
9a217e34 714 if (!ch->enabled)
cfb4f5d1
MD
715 continue;
716
9a217e34
LP
717 /* Power supply */
718 lcdc_write_chan(ch, LDPMR, 0);
719
b5ef967d 720 m = ch->cfg->clock_divider;
cfb4f5d1
MD
721 if (!m)
722 continue;
723
505c7de5
LP
724 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
725 * denominator.
726 */
727 lcdc_write_chan(ch, LDDCKPAT1R, 0);
728 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
729
cfb4f5d1 730 if (m == 1)
ce1c0b08 731 m = LDDCKR_MOSEL;
cfb4f5d1 732 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
cfb4f5d1
MD
733 }
734
735 lcdc_write(priv, _LDDCKR, tmp);
cfb4f5d1
MD
736 lcdc_write(priv, _LDDCKSTPR, 0);
737 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
738
9a217e34 739 /* Setup geometry, format, frame buffer memory and operation mode. */
cfb4f5d1
MD
740 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
741 ch = &priv->ch[k];
cfb4f5d1
MD
742 if (!ch->enabled)
743 continue;
744
6011bdea 745 sh_mobile_lcdc_geometry(ch);
cfb4f5d1 746
fc9e78e6 747 tmp = ch->format->lddfr;
edd153a3 748
fc9e78e6 749 if (ch->format->yuv) {
58f03d99 750 switch (ch->colorspace) {
edd153a3
LP
751 case V4L2_COLORSPACE_REC709:
752 tmp |= LDDFR_CF1;
53b50314 753 break;
edd153a3
LP
754 case V4L2_COLORSPACE_JPEG:
755 tmp |= LDDFR_CF0;
53b50314
DHG
756 break;
757 }
417d4827 758 }
7caa4342 759
9a217e34 760 lcdc_write_chan(ch, LDDFR, tmp);
72c04af9 761 lcdc_write_chan(ch, LDMLSR, ch->line_size);
9a217e34 762 lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
fc9e78e6 763 if (ch->format->yuv)
9a217e34 764 lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
7caa4342 765
9a217e34
LP
766 /* When using deferred I/O mode, configure the LCDC for one-shot
767 * operation and enable the frame end interrupt. Otherwise use
768 * continuous read mode.
769 */
770 if (ch->ldmt1r_value & LDMT1R_IFM &&
b5ef967d 771 ch->cfg->sys_bus_cfg.deferred_io_msec) {
9a217e34
LP
772 lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
773 lcdc_write(priv, _LDINTR, LDINTR_FE);
774 } else {
775 lcdc_write_chan(ch, LDSM1R, 0);
776 }
777 }
7caa4342 778
9a217e34 779 /* Word and long word swap. */
fc9e78e6 780 switch (priv->ch[0].format->fourcc) {
edd153a3
LP
781 case V4L2_PIX_FMT_RGB565:
782 case V4L2_PIX_FMT_NV21:
783 case V4L2_PIX_FMT_NV61:
784 case V4L2_PIX_FMT_NV42:
785 tmp = LDDDSR_LS | LDDDSR_WS;
786 break;
787 case V4L2_PIX_FMT_BGR24:
788 case V4L2_PIX_FMT_NV12:
789 case V4L2_PIX_FMT_NV16:
790 case V4L2_PIX_FMT_NV24:
9a217e34 791 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
edd153a3
LP
792 break;
793 case V4L2_PIX_FMT_BGR32:
794 default:
795 tmp = LDDDSR_LS;
796 break;
9a217e34
LP
797 }
798 lcdc_write(priv, _LDDDSR, tmp);
7caa4342 799
9a217e34
LP
800 /* Enable the display output. */
801 lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
802 sh_mobile_lcdc_start_stop(priv, 1);
803 priv->started = 1;
804}
cfb4f5d1 805
9a217e34
LP
806static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
807{
808 struct sh_mobile_meram_info *mdev = priv->meram_dev;
9a217e34
LP
809 struct sh_mobile_lcdc_chan *ch;
810 unsigned long tmp;
811 int ret;
812 int k;
cfb4f5d1 813
9a217e34
LP
814 /* enable clocks before accessing the hardware */
815 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
816 if (priv->ch[k].enabled)
817 sh_mobile_lcdc_clk_on(priv);
818 }
8564557a 819
9a217e34
LP
820 /* reset */
821 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
822 lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
8564557a 823
9a217e34 824 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
b5ef967d 825 const struct sh_mobile_lcdc_panel_cfg *panel;
8564557a 826
37c5dcc2 827 ch = &priv->ch[k];
9a217e34
LP
828 if (!ch->enabled)
829 continue;
830
b5ef967d 831 panel = &ch->cfg->panel_cfg;
afaad83b
LP
832 if (panel->setup_sys) {
833 ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops);
9a217e34
LP
834 if (ret)
835 return ret;
8564557a 836 }
cfb4f5d1
MD
837 }
838
9a217e34
LP
839 /* Compute frame buffer base address and pitch for each channel. */
840 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
9a217e34 841 int pixelformat;
48110050 842 void *meram;
cfb4f5d1 843
9a217e34
LP
844 ch = &priv->ch[k];
845 if (!ch->enabled)
846 continue;
cfb4f5d1 847
58f03d99
LP
848 ch->base_addr_y = ch->dma_handle;
849 ch->base_addr_c = ch->base_addr_y + ch->xres * ch->yres_virtual;
72c04af9 850 ch->line_size = ch->pitch;
9a217e34
LP
851
852 /* Enable MERAM if possible. */
b5ef967d
LP
853 if (mdev == NULL || mdev->ops == NULL ||
854 ch->cfg->meram_cfg == NULL)
9a217e34
LP
855 continue;
856
857 /* we need to de-init configured ICBs before we can
858 * re-initialize them.
859 */
48110050
LP
860 if (ch->meram) {
861 mdev->ops->meram_unregister(mdev, ch->meram);
862 ch->meram = NULL;
9a217e34
LP
863 }
864
fc9e78e6 865 switch (ch->format->fourcc) {
edd153a3
LP
866 case V4L2_PIX_FMT_NV12:
867 case V4L2_PIX_FMT_NV21:
868 case V4L2_PIX_FMT_NV16:
869 case V4L2_PIX_FMT_NV61:
9a217e34 870 pixelformat = SH_MOBILE_MERAM_PF_NV;
edd153a3
LP
871 break;
872 case V4L2_PIX_FMT_NV24:
873 case V4L2_PIX_FMT_NV42:
874 pixelformat = SH_MOBILE_MERAM_PF_NV24;
875 break;
876 case V4L2_PIX_FMT_RGB565:
877 case V4L2_PIX_FMT_BGR24:
878 case V4L2_PIX_FMT_BGR32:
879 default:
880 pixelformat = SH_MOBILE_MERAM_PF_RGB;
881 break;
882 }
9a217e34 883
b5ef967d
LP
884 meram = mdev->ops->meram_register(mdev, ch->cfg->meram_cfg,
885 ch->pitch, ch->yres, pixelformat,
72c04af9 886 &ch->line_size);
97d16fe6
LP
887 if (!IS_ERR(meram)) {
888 mdev->ops->meram_update(mdev, meram,
889 ch->base_addr_y, ch->base_addr_c,
890 &ch->base_addr_y, &ch->base_addr_c);
48110050 891 ch->meram = meram;
97d16fe6 892 }
9a217e34
LP
893 }
894
895 /* Start the LCDC. */
896 __sh_mobile_lcdc_start(priv);
897
898 /* Setup deferred I/O, tell the board code to enable the panels, and
899 * turn backlight on.
900 */
cfb4f5d1
MD
901 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
902 ch = &priv->ch[k];
21bc1f02
MD
903 if (!ch->enabled)
904 continue;
905
b5ef967d 906 tmp = ch->cfg->sys_bus_cfg.deferred_io_msec;
9a217e34
LP
907 if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
908 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
909 ch->defio.delay = msecs_to_jiffies(tmp);
910 ch->info->fbdefio = &ch->defio;
911 fb_deferred_io_init(ch->info);
912 }
913
37c5dcc2 914 sh_mobile_lcdc_display_on(ch);
3b0fd9d7
AC
915
916 if (ch->bl) {
917 ch->bl->props.power = FB_BLANK_UNBLANK;
918 backlight_update_status(ch->bl);
919 }
cfb4f5d1
MD
920 }
921
922 return 0;
923}
924
925static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
926{
927 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1
MD
928 int k;
929
2feb075a 930 /* clean up deferred io and ask board code to disable panel */
cfb4f5d1
MD
931 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
932 ch = &priv->ch[k];
21bc1f02
MD
933 if (!ch->enabled)
934 continue;
8564557a 935
2feb075a
MD
936 /* deferred io mode:
937 * flush frame, and wait for frame end interrupt
938 * clean up deferred io and enable clock
939 */
5ef6b505 940 if (ch->info && ch->info->fbdefio) {
2feb075a 941 ch->frame_end = 0;
e33afddc 942 schedule_delayed_work(&ch->info->deferred_work, 0);
2feb075a 943 wait_event(ch->frame_end_wait, ch->frame_end);
e33afddc
PM
944 fb_deferred_io_cleanup(ch->info);
945 ch->info->fbdefio = NULL;
2feb075a 946 sh_mobile_lcdc_clk_on(priv);
8564557a 947 }
2feb075a 948
3b0fd9d7
AC
949 if (ch->bl) {
950 ch->bl->props.power = FB_BLANK_POWERDOWN;
951 backlight_update_status(ch->bl);
952 }
953
37c5dcc2 954 sh_mobile_lcdc_display_off(ch);
7caa4342
D
955
956 /* disable the meram */
48110050 957 if (ch->meram) {
7caa4342 958 struct sh_mobile_meram_info *mdev;
7caa4342 959 mdev = priv->meram_dev;
48110050
LP
960 mdev->ops->meram_unregister(mdev, ch->meram);
961 ch->meram = 0;
7caa4342
D
962 }
963
cfb4f5d1
MD
964 }
965
966 /* stop the lcdc */
8e9bb19e
MD
967 if (priv->started) {
968 sh_mobile_lcdc_start_stop(priv, 0);
969 priv->started = 0;
970 }
b51339ff 971
8564557a
MD
972 /* stop clocks */
973 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
974 if (priv->ch[k].enabled)
975 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD
976}
977
f1f60b5f
LP
978/* -----------------------------------------------------------------------------
979 * Frame buffer operations
980 */
cfb4f5d1
MD
981
982static int sh_mobile_lcdc_setcolreg(u_int regno,
983 u_int red, u_int green, u_int blue,
984 u_int transp, struct fb_info *info)
985{
986 u32 *palette = info->pseudo_palette;
987
988 if (regno >= PALETTE_NR)
989 return -EINVAL;
990
991 /* only FB_VISUAL_TRUECOLOR supported */
992
993 red >>= 16 - info->var.red.length;
994 green >>= 16 - info->var.green.length;
995 blue >>= 16 - info->var.blue.length;
996 transp >>= 16 - info->var.transp.length;
997
998 palette[regno] = (red << info->var.red.offset) |
999 (green << info->var.green.offset) |
1000 (blue << info->var.blue.offset) |
1001 (transp << info->var.transp.offset);
1002
1003 return 0;
1004}
1005
1006static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
1007 .id = "SH Mobile LCDC",
1008 .type = FB_TYPE_PACKED_PIXELS,
1009 .visual = FB_VISUAL_TRUECOLOR,
1010 .accel = FB_ACCEL_NONE,
9dd38819
PE
1011 .xpanstep = 0,
1012 .ypanstep = 1,
1013 .ywrapstep = 0,
edd153a3 1014 .capabilities = FB_CAP_FOURCC,
cfb4f5d1
MD
1015};
1016
8564557a
MD
1017static void sh_mobile_lcdc_fillrect(struct fb_info *info,
1018 const struct fb_fillrect *rect)
1019{
1020 sys_fillrect(info, rect);
1021 sh_mobile_lcdc_deferred_io_touch(info);
1022}
1023
1024static void sh_mobile_lcdc_copyarea(struct fb_info *info,
1025 const struct fb_copyarea *area)
1026{
1027 sys_copyarea(info, area);
1028 sh_mobile_lcdc_deferred_io_touch(info);
1029}
1030
1031static void sh_mobile_lcdc_imageblit(struct fb_info *info,
1032 const struct fb_image *image)
1033{
1034 sys_imageblit(info, image);
1035 sh_mobile_lcdc_deferred_io_touch(info);
1036}
1037
9dd38819
PE
1038static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
1039 struct fb_info *info)
1040{
1041 struct sh_mobile_lcdc_chan *ch = info->par;
92e1f9a7
PE
1042 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1043 unsigned long ldrcntr;
1044 unsigned long new_pan_offset;
53b50314
DHG
1045 unsigned long base_addr_y, base_addr_c;
1046 unsigned long c_offset;
92e1f9a7 1047
58f03d99
LP
1048 if (!ch->format->yuv)
1049 new_pan_offset = var->yoffset * ch->pitch
1050 + var->xoffset * (ch->format->bpp / 8);
53b50314 1051 else
58f03d99 1052 new_pan_offset = var->yoffset * ch->pitch + var->xoffset;
9dd38819 1053
92e1f9a7 1054 if (new_pan_offset == ch->pan_offset)
9dd38819
PE
1055 return 0; /* No change, do nothing */
1056
92e1f9a7 1057 ldrcntr = lcdc_read(priv, _LDRCNTR);
9dd38819 1058
92e1f9a7 1059 /* Set the source address for the next refresh */
53b50314 1060 base_addr_y = ch->dma_handle + new_pan_offset;
58f03d99 1061 if (ch->format->yuv) {
53b50314 1062 /* Set y offset */
58f03d99
LP
1063 c_offset = var->yoffset * ch->pitch
1064 * (ch->format->bpp - 8) / 8;
1065 base_addr_c = ch->dma_handle + ch->xres * ch->yres_virtual
dc1d5ada 1066 + c_offset;
53b50314 1067 /* Set x offset */
fc9e78e6 1068 if (ch->format->fourcc == V4L2_PIX_FMT_NV24)
53b50314
DHG
1069 base_addr_c += 2 * var->xoffset;
1070 else
1071 base_addr_c += var->xoffset;
49d79ba2 1072 }
53b50314 1073
48110050 1074 if (ch->meram) {
7caa4342 1075 struct sh_mobile_meram_info *mdev;
7caa4342 1076
7caa4342 1077 mdev = priv->meram_dev;
cdf88b90 1078 mdev->ops->meram_update(mdev, ch->meram,
7caa4342 1079 base_addr_y, base_addr_c,
49d79ba2 1080 &base_addr_y, &base_addr_c);
49d79ba2 1081 }
7caa4342 1082
49d79ba2
LP
1083 ch->base_addr_y = base_addr_y;
1084 ch->base_addr_c = base_addr_c;
7caa4342 1085
49d79ba2 1086 lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
58f03d99 1087 if (ch->format->yuv)
49d79ba2 1088 lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
53b50314 1089
92e1f9a7
PE
1090 if (lcdc_chan_is_sublcd(ch))
1091 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
1092 else
1093 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
1094
1095 ch->pan_offset = new_pan_offset;
1096
1097 sh_mobile_lcdc_deferred_io_touch(info);
9dd38819
PE
1098
1099 return 0;
1100}
1101
40331b21
PE
1102static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
1103 unsigned long arg)
1104{
1105 int retval;
1106
1107 switch (cmd) {
1108 case FBIO_WAITFORVSYNC:
4976677f 1109 retval = sh_mobile_wait_for_vsync(info->par);
40331b21
PE
1110 break;
1111
1112 default:
1113 retval = -ENOIOCTLCMD;
1114 break;
1115 }
1116 return retval;
1117}
1118
dd210503
GL
1119static void sh_mobile_fb_reconfig(struct fb_info *info)
1120{
1121 struct sh_mobile_lcdc_chan *ch = info->par;
2d04559d
LP
1122 struct fb_var_screeninfo var;
1123 struct fb_videomode mode;
dd210503
GL
1124 struct fb_event event;
1125 int evnt = FB_EVENT_MODE_CHANGE_ALL;
1126
1127 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
1128 /* More framebuffer users are active */
1129 return;
1130
2d04559d 1131 fb_var_to_videomode(&mode, &info->var);
dd210503 1132
2d04559d 1133 if (fb_mode_is_equal(&ch->display.mode, &mode))
dd210503
GL
1134 return;
1135
1136 /* Display has been re-plugged, framebuffer is free now, reconfigure */
2d04559d
LP
1137 var = info->var;
1138 fb_videomode_to_var(&var, &ch->display.mode);
1139 var.width = ch->display.width;
1140 var.height = ch->display.height;
1141 var.activate = FB_ACTIVATE_NOW;
1142
1143 if (fb_set_var(info, &var) < 0)
dd210503
GL
1144 /* Couldn't reconfigure, hopefully, can continue as before */
1145 return;
1146
dd210503
GL
1147 /*
1148 * fb_set_var() calls the notifier change internally, only if
1149 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
1150 * user event, we have to call the chain ourselves.
1151 */
1152 event.info = info;
2d04559d 1153 event.data = &ch->display.mode;
dd210503
GL
1154 fb_notifier_call_chain(evnt, &event);
1155}
1156
1157/*
1158 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
1159 * user == 1, or with console sem held, if user == 0.
1160 */
1161static int sh_mobile_release(struct fb_info *info, int user)
1162{
1163 struct sh_mobile_lcdc_chan *ch = info->par;
1164
1165 mutex_lock(&ch->open_lock);
1166 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1167
1168 ch->use_count--;
1169
1170 /* Nothing to reconfigure, when called from fbcon */
1171 if (user) {
ac751efa 1172 console_lock();
dd210503 1173 sh_mobile_fb_reconfig(info);
ac751efa 1174 console_unlock();
dd210503
GL
1175 }
1176
1177 mutex_unlock(&ch->open_lock);
1178
1179 return 0;
1180}
1181
1182static int sh_mobile_open(struct fb_info *info, int user)
1183{
1184 struct sh_mobile_lcdc_chan *ch = info->par;
1185
1186 mutex_lock(&ch->open_lock);
1187 ch->use_count++;
1188
1189 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1190 mutex_unlock(&ch->open_lock);
1191
1192 return 0;
1193}
1194
1195static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1196{
1197 struct sh_mobile_lcdc_chan *ch = info->par;
417d4827 1198 struct sh_mobile_lcdc_priv *p = ch->lcdc;
03862194
LP
1199 unsigned int best_dist = (unsigned int)-1;
1200 unsigned int best_xres = 0;
1201 unsigned int best_yres = 0;
1202 unsigned int i;
dd210503 1203
03862194 1204 if (var->xres > MAX_XRES || var->yres > MAX_YRES)
dd210503 1205 return -EINVAL;
03862194
LP
1206
1207 /* If board code provides us with a list of available modes, make sure
1208 * we use one of them. Find the mode closest to the requested one. The
1209 * distance between two modes is defined as the size of the
1210 * non-overlapping parts of the two rectangles.
1211 */
b5ef967d
LP
1212 for (i = 0; i < ch->cfg->num_modes; ++i) {
1213 const struct fb_videomode *mode = &ch->cfg->lcd_modes[i];
03862194
LP
1214 unsigned int dist;
1215
1216 /* We can only round up. */
1217 if (var->xres > mode->xres || var->yres > mode->yres)
1218 continue;
1219
1220 dist = var->xres * var->yres + mode->xres * mode->yres
1221 - 2 * min(var->xres, mode->xres)
1222 * min(var->yres, mode->yres);
1223
1224 if (dist < best_dist) {
1225 best_xres = mode->xres;
1226 best_yres = mode->yres;
1227 best_dist = dist;
1228 }
dd210503 1229 }
417d4827 1230
03862194 1231 /* If no available mode can be used, return an error. */
b5ef967d 1232 if (ch->cfg->num_modes != 0) {
03862194
LP
1233 if (best_dist == (unsigned int)-1)
1234 return -EINVAL;
1235
1236 var->xres = best_xres;
1237 var->yres = best_yres;
1238 }
1239
1240 /* Make sure the virtual resolution is at least as big as the visible
1241 * resolution.
1242 */
1243 if (var->xres_virtual < var->xres)
1244 var->xres_virtual = var->xres;
1245 if (var->yres_virtual < var->yres)
1246 var->yres_virtual = var->yres;
1247
edd153a3 1248 if (sh_mobile_format_is_fourcc(var)) {
105784bb
LP
1249 const struct sh_mobile_lcdc_format_info *format;
1250
1251 format = sh_mobile_format_info(var->grayscale);
1252 if (format == NULL)
edd153a3 1253 return -EINVAL;
105784bb 1254 var->bits_per_pixel = format->bpp;
edd153a3
LP
1255
1256 /* Default to RGB and JPEG color-spaces for RGB and YUV formats
1257 * respectively.
1258 */
105784bb 1259 if (!format->yuv)
edd153a3
LP
1260 var->colorspace = V4L2_COLORSPACE_SRGB;
1261 else if (var->colorspace != V4L2_COLORSPACE_REC709)
1262 var->colorspace = V4L2_COLORSPACE_JPEG;
1263 } else {
1264 if (var->bits_per_pixel <= 16) { /* RGB 565 */
1265 var->bits_per_pixel = 16;
1266 var->red.offset = 11;
1267 var->red.length = 5;
1268 var->green.offset = 5;
1269 var->green.length = 6;
1270 var->blue.offset = 0;
1271 var->blue.length = 5;
1272 var->transp.offset = 0;
1273 var->transp.length = 0;
1274 } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
1275 var->bits_per_pixel = 24;
1276 var->red.offset = 16;
1277 var->red.length = 8;
1278 var->green.offset = 8;
1279 var->green.length = 8;
1280 var->blue.offset = 0;
1281 var->blue.length = 8;
1282 var->transp.offset = 0;
1283 var->transp.length = 0;
1284 } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
1285 var->bits_per_pixel = 32;
1286 var->red.offset = 16;
1287 var->red.length = 8;
1288 var->green.offset = 8;
1289 var->green.length = 8;
1290 var->blue.offset = 0;
1291 var->blue.length = 8;
1292 var->transp.offset = 24;
1293 var->transp.length = 8;
1294 } else
1295 return -EINVAL;
417d4827 1296
edd153a3
LP
1297 var->red.msb_right = 0;
1298 var->green.msb_right = 0;
1299 var->blue.msb_right = 0;
1300 var->transp.msb_right = 0;
1301 }
03862194
LP
1302
1303 /* Make sure we don't exceed our allocated memory. */
1304 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
1305 info->fix.smem_len)
1306 return -EINVAL;
1307
edd153a3
LP
1308 /* only accept the forced_fourcc for dual channel configurations */
1309 if (p->forced_fourcc &&
1310 p->forced_fourcc != sh_mobile_format_fourcc(var))
417d4827 1311 return -EINVAL;
417d4827 1312
dd210503
GL
1313 return 0;
1314}
40331b21 1315
ed5bebf2
LP
1316static int sh_mobile_set_par(struct fb_info *info)
1317{
1318 struct sh_mobile_lcdc_chan *ch = info->par;
1319 int ret;
1320
1321 sh_mobile_lcdc_stop(ch->lcdc);
91fba48d 1322
fc9e78e6 1323 ch->format = sh_mobile_format_info(sh_mobile_format_fourcc(&info->var));
58f03d99
LP
1324 ch->colorspace = info->var.colorspace;
1325
1326 ch->xres = info->var.xres;
1327 ch->xres_virtual = info->var.xres_virtual;
1328 ch->yres = info->var.yres;
1329 ch->yres_virtual = info->var.yres_virtual;
1330
1331 if (ch->format->yuv)
1332 ch->pitch = info->var.xres;
1333 else
1334 ch->pitch = info->var.xres * ch->format->bpp / 8;
fc9e78e6 1335
ed5bebf2 1336 ret = sh_mobile_lcdc_start(ch->lcdc);
58f03d99 1337 if (ret < 0)
ed5bebf2 1338 dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
58f03d99
LP
1339
1340 info->fix.line_length = ch->pitch;
ed5bebf2 1341
edd153a3
LP
1342 if (sh_mobile_format_is_fourcc(&info->var)) {
1343 info->fix.type = FB_TYPE_FOURCC;
1344 info->fix.visual = FB_VISUAL_FOURCC;
1345 } else {
1346 info->fix.type = FB_TYPE_PACKED_PIXELS;
1347 info->fix.visual = FB_VISUAL_TRUECOLOR;
1348 }
1349
ed5bebf2
LP
1350 return ret;
1351}
1352
8857b9aa
AC
1353/*
1354 * Screen blanking. Behavior is as follows:
1355 * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
1356 * FB_BLANK_NORMAL: screen blanked, clocks enabled
1357 * FB_BLANK_VSYNC,
1358 * FB_BLANK_HSYNC,
1359 * FB_BLANK_POWEROFF: screen blanked, clocks disabled
1360 */
1361static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
1362{
1363 struct sh_mobile_lcdc_chan *ch = info->par;
1364 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1365
1366 /* blank the screen? */
1367 if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
1368 struct fb_fillrect rect = {
58f03d99
LP
1369 .width = ch->xres,
1370 .height = ch->yres,
8857b9aa
AC
1371 };
1372 sh_mobile_lcdc_fillrect(info, &rect);
1373 }
1374 /* turn clocks on? */
1375 if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
1376 sh_mobile_lcdc_clk_on(p);
1377 }
1378 /* turn clocks off? */
1379 if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
1380 /* make sure the screen is updated with the black fill before
1381 * switching the clocks off. one vsync is not enough since
1382 * blanking may occur in the middle of a refresh. deferred io
1383 * mode will reenable the clocks and update the screen in time,
1384 * so it does not need this. */
1385 if (!info->fbdefio) {
4976677f
LP
1386 sh_mobile_wait_for_vsync(ch);
1387 sh_mobile_wait_for_vsync(ch);
8857b9aa
AC
1388 }
1389 sh_mobile_lcdc_clk_off(p);
1390 }
1391
1392 ch->blank_status = blank;
1393 return 0;
1394}
1395
cfb4f5d1 1396static struct fb_ops sh_mobile_lcdc_ops = {
9dd38819 1397 .owner = THIS_MODULE,
cfb4f5d1 1398 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
2540c111
MD
1399 .fb_read = fb_sys_read,
1400 .fb_write = fb_sys_write,
8564557a
MD
1401 .fb_fillrect = sh_mobile_lcdc_fillrect,
1402 .fb_copyarea = sh_mobile_lcdc_copyarea,
1403 .fb_imageblit = sh_mobile_lcdc_imageblit,
8857b9aa 1404 .fb_blank = sh_mobile_lcdc_blank,
9dd38819 1405 .fb_pan_display = sh_mobile_fb_pan_display,
40331b21 1406 .fb_ioctl = sh_mobile_ioctl,
dd210503
GL
1407 .fb_open = sh_mobile_open,
1408 .fb_release = sh_mobile_release,
1409 .fb_check_var = sh_mobile_check_var,
ed5bebf2 1410 .fb_set_par = sh_mobile_set_par,
cfb4f5d1
MD
1411};
1412
a67f379d
LP
1413static void
1414sh_mobile_lcdc_channel_fb_unregister(struct sh_mobile_lcdc_chan *ch)
1415{
1416 if (ch->info && ch->info->dev)
1417 unregister_framebuffer(ch->info);
1418}
1419
1420static int __devinit
1421sh_mobile_lcdc_channel_fb_register(struct sh_mobile_lcdc_chan *ch)
1422{
1423 struct fb_info *info = ch->info;
1424 int ret;
1425
1426 if (info->fbdefio) {
1427 ch->sglist = vmalloc(sizeof(struct scatterlist) *
1428 ch->fb_size >> PAGE_SHIFT);
1429 if (!ch->sglist) {
1430 dev_err(ch->lcdc->dev, "cannot allocate sglist\n");
1431 return -ENOMEM;
1432 }
1433 }
1434
1435 info->bl_dev = ch->bl;
1436
1437 ret = register_framebuffer(info);
1438 if (ret < 0)
1439 return ret;
1440
1441 dev_info(ch->lcdc->dev, "registered %s/%s as %dx%d %dbpp.\n",
b5ef967d 1442 dev_name(ch->lcdc->dev), (ch->cfg->chan == LCDC_CHAN_MAINLCD) ?
a67f379d
LP
1443 "mainlcd" : "sublcd", info->var.xres, info->var.yres,
1444 info->var.bits_per_pixel);
1445
1446 /* deferred io mode: disable clock to save power */
1447 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
1448 sh_mobile_lcdc_clk_off(ch->lcdc);
1449
1450 return ret;
1451}
1452
1453static void
1454sh_mobile_lcdc_channel_fb_cleanup(struct sh_mobile_lcdc_chan *ch)
1455{
1456 struct fb_info *info = ch->info;
1457
1458 if (!info || !info->device)
1459 return;
1460
1461 if (ch->sglist)
1462 vfree(ch->sglist);
1463
1464 fb_dealloc_cmap(&info->cmap);
1465 framebuffer_release(info);
1466}
1467
1468static int __devinit
1469sh_mobile_lcdc_channel_fb_init(struct sh_mobile_lcdc_chan *ch,
1470 const struct fb_videomode *mode,
1471 unsigned int num_modes)
1472{
1473 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1474 struct fb_var_screeninfo *var;
1475 struct fb_info *info;
1476 int ret;
1477
1478 /* Allocate and initialize the frame buffer device. Create the modes
1479 * list and allocate the color map.
1480 */
1481 info = framebuffer_alloc(0, priv->dev);
1482 if (info == NULL) {
1483 dev_err(priv->dev, "unable to allocate fb_info\n");
1484 return -ENOMEM;
1485 }
1486
1487 ch->info = info;
1488
1489 info->flags = FBINFO_FLAG_DEFAULT;
1490 info->fbops = &sh_mobile_lcdc_ops;
1491 info->device = priv->dev;
1492 info->screen_base = ch->fb_mem;
1493 info->pseudo_palette = &ch->pseudo_palette;
1494 info->par = ch;
1495
1496 fb_videomode_to_modelist(mode, num_modes, &info->modelist);
1497
1498 ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
1499 if (ret < 0) {
1500 dev_err(priv->dev, "unable to allocate cmap\n");
1501 return ret;
1502 }
1503
1504 /* Initialize fixed screen information. Restrict pan to 2 lines steps
1505 * for NV12 and NV21.
1506 */
1507 info->fix = sh_mobile_lcdc_fix;
1508 info->fix.smem_start = ch->dma_handle;
1509 info->fix.smem_len = ch->fb_size;
58f03d99
LP
1510 info->fix.line_length = ch->pitch;
1511
1512 if (ch->format->yuv)
1513 info->fix.visual = FB_VISUAL_FOURCC;
1514 else
1515 info->fix.visual = FB_VISUAL_TRUECOLOR;
1516
a67f379d
LP
1517 if (ch->format->fourcc == V4L2_PIX_FMT_NV12 ||
1518 ch->format->fourcc == V4L2_PIX_FMT_NV21)
1519 info->fix.ypanstep = 2;
1520
1521 /* Initialize variable screen information using the first mode as
1522 * default. The default Y virtual resolution is twice the panel size to
1523 * allow for double-buffering.
1524 */
1525 var = &info->var;
1526 fb_videomode_to_var(var, mode);
b5ef967d
LP
1527 var->width = ch->cfg->panel_cfg.width;
1528 var->height = ch->cfg->panel_cfg.height;
a67f379d
LP
1529 var->yres_virtual = var->yres * 2;
1530 var->activate = FB_ACTIVATE_NOW;
1531
1532 /* Use the legacy API by default for RGB formats, and the FOURCC API
1533 * for YUV formats.
1534 */
1535 if (!ch->format->yuv)
1536 var->bits_per_pixel = ch->format->bpp;
1537 else
1538 var->grayscale = ch->format->fourcc;
1539
1540 ret = sh_mobile_check_var(var, info);
1541 if (ret)
1542 return ret;
1543
a67f379d
LP
1544 return 0;
1545}
1546
f1f60b5f
LP
1547/* -----------------------------------------------------------------------------
1548 * Backlight
1549 */
1550
3b0fd9d7
AC
1551static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
1552{
1553 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7
AC
1554 int brightness = bdev->props.brightness;
1555
1556 if (bdev->props.power != FB_BLANK_UNBLANK ||
1557 bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
1558 brightness = 0;
1559
b5ef967d 1560 return ch->cfg->bl_info.set_brightness(brightness);
3b0fd9d7
AC
1561}
1562
1563static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
1564{
1565 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7 1566
b5ef967d 1567 return ch->cfg->bl_info.get_brightness();
3b0fd9d7
AC
1568}
1569
1570static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
1571 struct fb_info *info)
1572{
1573 return (info->bl_dev == bdev);
1574}
1575
1576static struct backlight_ops sh_mobile_lcdc_bl_ops = {
1577 .options = BL_CORE_SUSPENDRESUME,
1578 .update_status = sh_mobile_lcdc_update_bl,
1579 .get_brightness = sh_mobile_lcdc_get_brightness,
1580 .check_fb = sh_mobile_lcdc_check_fb,
1581};
1582
1583static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
1584 struct sh_mobile_lcdc_chan *ch)
1585{
1586 struct backlight_device *bl;
1587
b5ef967d 1588 bl = backlight_device_register(ch->cfg->bl_info.name, parent, ch,
3b0fd9d7 1589 &sh_mobile_lcdc_bl_ops, NULL);
beee1f20
DC
1590 if (IS_ERR(bl)) {
1591 dev_err(parent, "unable to register backlight device: %ld\n",
1592 PTR_ERR(bl));
3b0fd9d7
AC
1593 return NULL;
1594 }
1595
b5ef967d 1596 bl->props.max_brightness = ch->cfg->bl_info.max_brightness;
3b0fd9d7
AC
1597 bl->props.brightness = bl->props.max_brightness;
1598 backlight_update_status(bl);
1599
1600 return bl;
1601}
1602
1603static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
1604{
1605 backlight_device_unregister(bdev);
1606}
1607
f1f60b5f
LP
1608/* -----------------------------------------------------------------------------
1609 * Power management
1610 */
1611
2feb075a
MD
1612static int sh_mobile_lcdc_suspend(struct device *dev)
1613{
1614 struct platform_device *pdev = to_platform_device(dev);
1615
1616 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
1617 return 0;
1618}
1619
1620static int sh_mobile_lcdc_resume(struct device *dev)
1621{
1622 struct platform_device *pdev = to_platform_device(dev);
1623
1624 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
1625}
1626
0246c471
MD
1627static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
1628{
1629 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1630 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471
MD
1631
1632 /* turn off LCDC hardware */
2427bb24
LP
1633 lcdc_write(priv, _LDCNT1R, 0);
1634
0246c471
MD
1635 return 0;
1636}
1637
1638static int sh_mobile_lcdc_runtime_resume(struct device *dev)
1639{
1640 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1641 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471 1642
2427bb24 1643 __sh_mobile_lcdc_start(priv);
0246c471
MD
1644
1645 return 0;
1646}
1647
47145210 1648static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
2feb075a
MD
1649 .suspend = sh_mobile_lcdc_suspend,
1650 .resume = sh_mobile_lcdc_resume,
0246c471
MD
1651 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
1652 .runtime_resume = sh_mobile_lcdc_runtime_resume,
2feb075a
MD
1653};
1654
f1f60b5f
LP
1655/* -----------------------------------------------------------------------------
1656 * Framebuffer notifier
1657 */
1658
6de9edd5 1659/* locking: called with info->lock held */
6011bdea
GL
1660static int sh_mobile_lcdc_notify(struct notifier_block *nb,
1661 unsigned long action, void *data)
1662{
1663 struct fb_event *event = data;
1664 struct fb_info *info = event->info;
1665 struct sh_mobile_lcdc_chan *ch = info->par;
6011bdea
GL
1666
1667 if (&ch->lcdc->notifier != nb)
baf16374 1668 return NOTIFY_DONE;
6011bdea
GL
1669
1670 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
1671 __func__, action, event->data);
1672
1673 switch(action) {
1674 case FB_EVENT_SUSPEND:
37c5dcc2 1675 sh_mobile_lcdc_display_off(ch);
afe417c0 1676 sh_mobile_lcdc_stop(ch->lcdc);
6011bdea
GL
1677 break;
1678 case FB_EVENT_RESUME:
dd210503
GL
1679 mutex_lock(&ch->open_lock);
1680 sh_mobile_fb_reconfig(info);
1681 mutex_unlock(&ch->open_lock);
6011bdea 1682
37c5dcc2 1683 sh_mobile_lcdc_display_on(ch);
ebe5e12d 1684 sh_mobile_lcdc_start(ch->lcdc);
6011bdea
GL
1685 }
1686
baf16374 1687 return NOTIFY_OK;
6011bdea
GL
1688}
1689
f1f60b5f
LP
1690/* -----------------------------------------------------------------------------
1691 * Probe/remove and driver init/exit
1692 */
1693
217e9c43 1694static const struct fb_videomode default_720p __devinitconst = {
f1f60b5f
LP
1695 .name = "HDMI 720p",
1696 .xres = 1280,
1697 .yres = 720,
1698
1699 .left_margin = 220,
1700 .right_margin = 110,
1701 .hsync_len = 40,
1702
1703 .upper_margin = 20,
1704 .lower_margin = 5,
1705 .vsync_len = 5,
1706
1707 .pixclock = 13468,
1708 .refresh = 60,
1709 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
1710};
1711
b4bee692
LP
1712static int sh_mobile_lcdc_remove(struct platform_device *pdev)
1713{
1714 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
b4bee692
LP
1715 int i;
1716
1717 fb_unregister_client(&priv->notifier);
1718
1719 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
a67f379d 1720 sh_mobile_lcdc_channel_fb_unregister(&priv->ch[i]);
b4bee692
LP
1721
1722 sh_mobile_lcdc_stop(priv);
1723
1724 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
9a2985e7 1725 struct sh_mobile_lcdc_chan *ch = &priv->ch[i];
b4bee692 1726
e34d0bbb
LP
1727 if (ch->tx_dev) {
1728 ch->tx_dev->lcdc = NULL;
b5ef967d 1729 module_put(ch->cfg->tx_dev->dev.driver->owner);
e34d0bbb 1730 }
9a2985e7 1731
a67f379d 1732 sh_mobile_lcdc_channel_fb_cleanup(ch);
b4bee692 1733
a67f379d
LP
1734 if (ch->fb_mem)
1735 dma_free_coherent(&pdev->dev, ch->fb_size,
1736 ch->fb_mem, ch->dma_handle);
b4bee692
LP
1737 }
1738
1739 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1740 if (priv->ch[i].bl)
1741 sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
1742 }
1743
4774c12a
LP
1744 if (priv->dot_clk) {
1745 pm_runtime_disable(&pdev->dev);
b4bee692 1746 clk_put(priv->dot_clk);
4774c12a 1747 }
b4bee692
LP
1748
1749 if (priv->base)
1750 iounmap(priv->base);
1751
1752 if (priv->irq)
1753 free_irq(priv->irq, priv);
1754 kfree(priv);
1755 return 0;
1756}
cfb4f5d1 1757
217e9c43 1758static int __devinit sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
f1f60b5f 1759{
b5ef967d 1760 int interface_type = ch->cfg->interface_type;
f1f60b5f
LP
1761
1762 switch (interface_type) {
1763 case RGB8:
1764 case RGB9:
1765 case RGB12A:
1766 case RGB12B:
1767 case RGB16:
1768 case RGB18:
1769 case RGB24:
1770 case SYS8A:
1771 case SYS8B:
1772 case SYS8C:
1773 case SYS8D:
1774 case SYS9:
1775 case SYS12:
1776 case SYS16A:
1777 case SYS16B:
1778 case SYS16C:
1779 case SYS18:
1780 case SYS24:
1781 break;
1782 default:
1783 return -EINVAL;
1784 }
1785
1786 /* SUBLCD only supports SYS interface */
1787 if (lcdc_chan_is_sublcd(ch)) {
1788 if (!(interface_type & LDMT1R_IFM))
1789 return -EINVAL;
1790
1791 interface_type &= ~LDMT1R_IFM;
1792 }
1793
1794 ch->ldmt1r_value = interface_type;
1795 return 0;
1796}
1797
0a7f17aa
LP
1798static int __devinit
1799sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_priv *priv,
1800 struct sh_mobile_lcdc_chan *ch)
cfb4f5d1 1801{
105784bb 1802 const struct sh_mobile_lcdc_format_info *format;
b5ef967d 1803 const struct sh_mobile_lcdc_chan_cfg *cfg = ch->cfg;
3ce05599
LP
1804 const struct fb_videomode *max_mode;
1805 const struct fb_videomode *mode;
a67f379d 1806 unsigned int num_modes;
3ce05599 1807 unsigned int max_size;
a67f379d 1808 unsigned int i;
3ce05599 1809
a67472ad 1810 mutex_init(&ch->open_lock);
ecd29947 1811 ch->notify = sh_mobile_lcdc_display_notify;
a67472ad 1812
105784bb
LP
1813 /* Validate the format. */
1814 format = sh_mobile_format_info(cfg->fourcc);
1815 if (format == NULL) {
1816 dev_err(priv->dev, "Invalid FOURCC %08x.\n", cfg->fourcc);
1817 return -EINVAL;
1818 }
1819
3ce05599
LP
1820 /* Iterate through the modes to validate them and find the highest
1821 * resolution.
1822 */
1823 max_mode = NULL;
1824 max_size = 0;
1825
93ff2598 1826 for (i = 0, mode = cfg->lcd_modes; i < cfg->num_modes; i++, mode++) {
3ce05599
LP
1827 unsigned int size = mode->yres * mode->xres;
1828
edd153a3
LP
1829 /* NV12/NV21 buffers must have even number of lines */
1830 if ((cfg->fourcc == V4L2_PIX_FMT_NV12 ||
1831 cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) {
0a7f17aa
LP
1832 dev_err(priv->dev, "yres must be multiple of 2 for "
1833 "YCbCr420 mode.\n");
3ce05599
LP
1834 return -EINVAL;
1835 }
1836
1837 if (size > max_size) {
1838 max_mode = mode;
1839 max_size = size;
1840 }
1841 }
1842
1843 if (!max_size)
1844 max_size = MAX_XRES * MAX_YRES;
1845 else
0a7f17aa 1846 dev_dbg(priv->dev, "Found largest videomode %ux%u\n",
3ce05599
LP
1847 max_mode->xres, max_mode->yres);
1848
93ff2598 1849 if (cfg->lcd_modes == NULL) {
3ce05599 1850 mode = &default_720p;
93ff2598 1851 num_modes = 1;
3ce05599 1852 } else {
93ff2598
LP
1853 mode = cfg->lcd_modes;
1854 num_modes = cfg->num_modes;
3ce05599
LP
1855 }
1856
58f03d99
LP
1857 /* Use the first mode as default. */
1858 ch->format = format;
1859 ch->xres = mode->xres;
1860 ch->xres_virtual = mode->xres;
1861 ch->yres = mode->yres;
1862 ch->yres_virtual = mode->yres * 2;
1863
1864 if (!format->yuv) {
1865 ch->colorspace = V4L2_COLORSPACE_SRGB;
1866 ch->pitch = ch->xres * format->bpp / 8;
1867 } else {
1868 ch->colorspace = V4L2_COLORSPACE_REC709;
1869 ch->pitch = ch->xres;
1870 }
1871
a67f379d
LP
1872 ch->display.width = cfg->panel_cfg.width;
1873 ch->display.height = cfg->panel_cfg.height;
1874 ch->display.mode = *mode;
1875
1876 /* Allocate frame buffer memory. */
1877 ch->fb_size = max_size * format->bpp / 8 * 2;
1878 ch->fb_mem = dma_alloc_coherent(priv->dev, ch->fb_size, &ch->dma_handle,
1879 GFP_KERNEL);
1880 if (ch->fb_mem == NULL) {
1881 dev_err(priv->dev, "unable to allocate buffer\n");
1882 return -ENOMEM;
1883 }
3ce05599 1884
13f80eea
LP
1885 /* Initialize the transmitter device if present. */
1886 if (cfg->tx_dev) {
1887 if (!cfg->tx_dev->dev.driver ||
1888 !try_module_get(cfg->tx_dev->dev.driver->owner)) {
1889 dev_warn(priv->dev,
1890 "unable to get transmitter device\n");
1891 return -EINVAL;
1892 }
1893 ch->tx_dev = platform_get_drvdata(cfg->tx_dev);
1894 ch->tx_dev->lcdc = ch;
1895 ch->tx_dev->def_mode = *mode;
1896 }
1897
a67f379d 1898 return sh_mobile_lcdc_channel_fb_init(ch, mode, num_modes);
3ce05599
LP
1899}
1900
1901static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
1902{
01ac25b5 1903 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
3ce05599 1904 struct sh_mobile_lcdc_priv *priv;
cfb4f5d1 1905 struct resource *res;
3ce05599 1906 int num_channels;
cfb4f5d1 1907 int error;
3ce05599 1908 int i;
cfb4f5d1 1909
01ac25b5 1910 if (!pdata) {
cfb4f5d1 1911 dev_err(&pdev->dev, "no platform data defined\n");
8bed9055 1912 return -EINVAL;
cfb4f5d1
MD
1913 }
1914
1915 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8564557a
MD
1916 i = platform_get_irq(pdev, 0);
1917 if (!res || i < 0) {
1918 dev_err(&pdev->dev, "cannot get platform resources\n");
8bed9055 1919 return -ENOENT;
cfb4f5d1
MD
1920 }
1921
1922 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1923 if (!priv) {
1924 dev_err(&pdev->dev, "cannot allocate device data\n");
8bed9055 1925 return -ENOMEM;
cfb4f5d1
MD
1926 }
1927
4774c12a
LP
1928 priv->dev = &pdev->dev;
1929 priv->meram_dev = pdata->meram_dev;
8bed9055
GL
1930 platform_set_drvdata(pdev, priv);
1931
f8798ccb 1932 error = request_irq(i, sh_mobile_lcdc_irq, 0,
7ad33e74 1933 dev_name(&pdev->dev), priv);
8564557a
MD
1934 if (error) {
1935 dev_err(&pdev->dev, "unable to request irq\n");
1936 goto err1;
1937 }
1938
1939 priv->irq = i;
5ef6b505 1940 atomic_set(&priv->hw_usecnt, -1);
cfb4f5d1 1941
3ce05599
LP
1942 for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1943 struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
cfb4f5d1 1944
01ac25b5 1945 ch->lcdc = priv;
b5ef967d 1946 ch->cfg = &pdata->ch[i];
cfb4f5d1 1947
01ac25b5 1948 error = sh_mobile_lcdc_check_interface(ch);
cfb4f5d1
MD
1949 if (error) {
1950 dev_err(&pdev->dev, "unsupported interface type\n");
1951 goto err1;
1952 }
01ac25b5
GL
1953 init_waitqueue_head(&ch->frame_end_wait);
1954 init_completion(&ch->vsync_completion);
1955 ch->pan_offset = 0;
cfb4f5d1 1956
3b0fd9d7 1957 /* probe the backlight is there is one defined */
b5ef967d 1958 if (ch->cfg->bl_info.max_brightness)
3b0fd9d7
AC
1959 ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
1960
cfb4f5d1
MD
1961 switch (pdata->ch[i].chan) {
1962 case LCDC_CHAN_MAINLCD:
ce1c0b08 1963 ch->enabled = LDCNT2R_ME;
01ac25b5 1964 ch->reg_offs = lcdc_offs_mainlcd;
3ce05599 1965 num_channels++;
cfb4f5d1
MD
1966 break;
1967 case LCDC_CHAN_SUBLCD:
ce1c0b08 1968 ch->enabled = LDCNT2R_SE;
01ac25b5 1969 ch->reg_offs = lcdc_offs_sublcd;
3ce05599 1970 num_channels++;
cfb4f5d1
MD
1971 break;
1972 }
1973 }
1974
3ce05599 1975 if (!num_channels) {
cfb4f5d1
MD
1976 dev_err(&pdev->dev, "no channels defined\n");
1977 error = -EINVAL;
1978 goto err1;
1979 }
1980
edd153a3 1981 /* for dual channel LCDC (MAIN + SUB) force shared format setting */
3ce05599 1982 if (num_channels == 2)
edd153a3 1983 priv->forced_fourcc = pdata->ch[0].fourcc;
417d4827 1984
dba6f385
GL
1985 priv->base = ioremap_nocache(res->start, resource_size(res));
1986 if (!priv->base)
1987 goto err1;
1988
0a7f17aa 1989 error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source);
cfb4f5d1
MD
1990 if (error) {
1991 dev_err(&pdev->dev, "unable to setup clocks\n");
1992 goto err1;
1993 }
1994
4774c12a
LP
1995 /* Enable runtime PM. */
1996 pm_runtime_enable(&pdev->dev);
7caa4342 1997
3ce05599 1998 for (i = 0; i < num_channels; i++) {
01ac25b5 1999 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
c44f9f76 2000
0a7f17aa 2001 error = sh_mobile_lcdc_channel_init(priv, ch);
cfb4f5d1 2002 if (error)
3ce05599 2003 goto err1;
cfb4f5d1
MD
2004 }
2005
cfb4f5d1
MD
2006 error = sh_mobile_lcdc_start(priv);
2007 if (error) {
2008 dev_err(&pdev->dev, "unable to start hardware\n");
2009 goto err1;
2010 }
2011
3ce05599 2012 for (i = 0; i < num_channels; i++) {
1c6a307a 2013 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
1c6a307a 2014
a67f379d
LP
2015 error = sh_mobile_lcdc_channel_fb_register(ch);
2016 if (error)
cfb4f5d1 2017 goto err1;
cfb4f5d1
MD
2018 }
2019
6011bdea
GL
2020 /* Failure ignored */
2021 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
2022 fb_register_client(&priv->notifier);
2023
cfb4f5d1 2024 return 0;
8bed9055 2025err1:
cfb4f5d1 2026 sh_mobile_lcdc_remove(pdev);
8bed9055 2027
cfb4f5d1
MD
2028 return error;
2029}
2030
cfb4f5d1
MD
2031static struct platform_driver sh_mobile_lcdc_driver = {
2032 .driver = {
2033 .name = "sh_mobile_lcdc_fb",
2034 .owner = THIS_MODULE,
2feb075a 2035 .pm = &sh_mobile_lcdc_dev_pm_ops,
cfb4f5d1
MD
2036 },
2037 .probe = sh_mobile_lcdc_probe,
2038 .remove = sh_mobile_lcdc_remove,
2039};
2040
4277f2c4 2041module_platform_driver(sh_mobile_lcdc_driver);
cfb4f5d1
MD
2042
2043MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
2044MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
2045MODULE_LICENSE("GPL v2");
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