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fbdev: sh_mobile_lcdc: Reorganize the sh_mobile_lcdc_chan structure
[deliverable/linux.git] / drivers / video / sh_mobile_lcdcfb.c
CommitLineData
cfb4f5d1
MD		 1/*
2 * SuperH Mobile LCDC Framebuffer
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
f1f60b5f
LP		 11#include <linux/atomic.h>
12#include <linux/backlight.h>
cfb4f5d1 13#include <linux/clk.h>
f1f60b5f 14#include <linux/console.h>
cfb4f5d1 15#include <linux/dma-mapping.h>
f1f60b5f
LP		 16#include <linux/delay.h>
17#include <linux/gpio.h>
18#include <linux/init.h>
8564557a 19#include <linux/interrupt.h>
40331b21 20#include <linux/ioctl.h>
f1f60b5f
LP		 21#include <linux/kernel.h>
22#include <linux/mm.h>
355b200b 23#include <linux/module.h>
f1f60b5f
LP		 24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/videodev2.h>
28#include <linux/vmalloc.h>
29
225c9a8d 30#include <video/sh_mobile_lcdc.h>
8a20974f 31#include <video/sh_mobile_meram.h>
cfb4f5d1 32
6de9edd5
GL		 33#include "sh_mobile_lcdcfb.h"
34
a6f15ade
PE		 35#define SIDE_B_OFFSET 0x1000
36#define MIRROR_OFFSET 0x2000
cfb4f5d1 37
d2ecbab5
GL		 38#define MAX_XRES 1920
39#define MAX_YRES 1080
cfb4f5d1 40
f1f60b5f
LP		 41struct sh_mobile_lcdc_priv {
42 void __iomem *base;
43 int irq;
44 atomic_t hw_usecnt;
45 struct device *dev;
46 struct clk *dot_clk;
47 unsigned long lddckr;
48 struct sh_mobile_lcdc_chan ch[2];
49 struct notifier_block notifier;
50 int started;
51 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
52 struct sh_mobile_meram_info *meram_dev;
53};
54
55/* -----------------------------------------------------------------------------
56 * Registers access
57 */
58
0246c471 59static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
cfb4f5d1
MD		 60 [LDDCKPAT1R] = 0x400,
61 [LDDCKPAT2R] = 0x404,
62 [LDMT1R] = 0x418,
63 [LDMT2R] = 0x41c,
64 [LDMT3R] = 0x420,
65 [LDDFR] = 0x424,
66 [LDSM1R] = 0x428,
8564557a 67 [LDSM2R] = 0x42c,
cfb4f5d1 68 [LDSA1R] = 0x430,
53b50314 69 [LDSA2R] = 0x434,
cfb4f5d1
MD		 70 [LDMLSR] = 0x438,
71 [LDHCNR] = 0x448,
72 [LDHSYNR] = 0x44c,
73 [LDVLNR] = 0x450,
74 [LDVSYNR] = 0x454,
75 [LDPMR] = 0x460,
6011bdea 76 [LDHAJR] = 0x4a0,
cfb4f5d1
MD		 77};
78
0246c471 79static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
cfb4f5d1
MD		 80 [LDDCKPAT1R] = 0x408,
81 [LDDCKPAT2R] = 0x40c,
82 [LDMT1R] = 0x600,
83 [LDMT2R] = 0x604,
84 [LDMT3R] = 0x608,
85 [LDDFR] = 0x60c,
86 [LDSM1R] = 0x610,
8564557a 87 [LDSM2R] = 0x614,
cfb4f5d1
MD		 88 [LDSA1R] = 0x618,
89 [LDMLSR] = 0x620,
90 [LDHCNR] = 0x624,
91 [LDHSYNR] = 0x628,
92 [LDVLNR] = 0x62c,
93 [LDVSYNR] = 0x630,
94 [LDPMR] = 0x63c,
95};
96
a6f15ade
PE		 97static bool banked(int reg_nr)
98{
99 switch (reg_nr) {
100 case LDMT1R:
101 case LDMT2R:
102 case LDMT3R:
103 case LDDFR:
104 case LDSM1R:
105 case LDSA1R:
53b50314 106 case LDSA2R:
a6f15ade
PE		 107 case LDMLSR:
108 case LDHCNR:
109 case LDHSYNR:
110 case LDVLNR:
111 case LDVSYNR:
112 return true;
113 }
114 return false;
115}
116
f1f60b5f
LP		 117static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
118{
119 return chan->cfg.chan == LCDC_CHAN_SUBLCD;
120}
121
cfb4f5d1
MD		 122static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
123 int reg_nr, unsigned long data)
124{
125 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
a6f15ade
PE		 126 if (banked(reg_nr))
127 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
128 SIDE_B_OFFSET);
129}
130
131static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
132 int reg_nr, unsigned long data)
133{
134 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
135 MIRROR_OFFSET);
cfb4f5d1
MD		 136}
137
138static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
139 int reg_nr)
140{
141 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
142}
143
144static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
145 unsigned long reg_offs, unsigned long data)
146{
147 iowrite32(data, priv->base + reg_offs);
148}
149
150static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
151 unsigned long reg_offs)
152{
153 return ioread32(priv->base + reg_offs);
154}
155
156static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
157 unsigned long reg_offs,
158 unsigned long mask, unsigned long until)
159{
160 while ((lcdc_read(priv, reg_offs) & mask) != until)
161 cpu_relax();
162}
163
f1f60b5f
LP		 164/* -----------------------------------------------------------------------------
165 * Clock management
166 */
167
168static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1 169{
f1f60b5f
LP		 170 if (atomic_inc_and_test(&priv->hw_usecnt)) {
171 if (priv->dot_clk)
172 clk_enable(priv->dot_clk);
173 pm_runtime_get_sync(priv->dev);
174 if (priv->meram_dev && priv->meram_dev->pdev)
175 pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
176 }
cfb4f5d1
MD		 177}
178
f1f60b5f
LP		 179static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
180{
181 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
182 if (priv->meram_dev && priv->meram_dev->pdev)
183 pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
184 pm_runtime_put(priv->dev);
185 if (priv->dot_clk)
186 clk_disable(priv->dot_clk);
187 }
188}
189
0a7f17aa
LP		 190static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv,
191 int clock_source)
f1f60b5f 192{
4774c12a 193 struct clk *clk;
f1f60b5f
LP		 194 char *str;
195
196 switch (clock_source) {
197 case LCDC_CLK_BUS:
198 str = "bus_clk";
199 priv->lddckr = LDDCKR_ICKSEL_BUS;
200 break;
201 case LCDC_CLK_PERIPHERAL:
202 str = "peripheral_clk";
203 priv->lddckr = LDDCKR_ICKSEL_MIPI;
204 break;
205 case LCDC_CLK_EXTERNAL:
206 str = NULL;
207 priv->lddckr = LDDCKR_ICKSEL_HDMI;
208 break;
209 default:
210 return -EINVAL;
211 }
212
4774c12a
LP		 213 if (str == NULL)
214 return 0;
215
0a7f17aa 216 clk = clk_get(priv->dev, str);
4774c12a 217 if (IS_ERR(clk)) {
0a7f17aa 218 dev_err(priv->dev, "cannot get dot clock %s\n", str);
4774c12a 219 return PTR_ERR(clk);
f1f60b5f
LP		 220 }
221
4774c12a 222 priv->dot_clk = clk;
f1f60b5f
LP		 223 return 0;
224}
225
226/* -----------------------------------------------------------------------------
37c5dcc2 227 * Display, panel and deferred I/O
f1f60b5f
LP		 228 */
229
cfb4f5d1
MD		 230static void lcdc_sys_write_index(void *handle, unsigned long data)
231{
232 struct sh_mobile_lcdc_chan *ch = handle;
233
ce1c0b08
LP		 234 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
235 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
236 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
237 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
238 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD		 239}
240
241static void lcdc_sys_write_data(void *handle, unsigned long data)
242{
243 struct sh_mobile_lcdc_chan *ch = handle;
244
ce1c0b08
LP		 245 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
246 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
247 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
248 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
249 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD		 250}
251
252static unsigned long lcdc_sys_read_data(void *handle)
253{
254 struct sh_mobile_lcdc_chan *ch = handle;
255
ce1c0b08
LP		 256 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
257 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
258 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
259 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
cfb4f5d1 260 udelay(1);
ce1c0b08 261 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1 262
ce1c0b08 263 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
cfb4f5d1
MD		 264}
265
266struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
267 lcdc_sys_write_index,
268 lcdc_sys_write_data,
269 lcdc_sys_read_data,
270};
271
1c6a307a
PM		 272static int sh_mobile_lcdc_sginit(struct fb_info *info,
273 struct list_head *pagelist)
274{
275 struct sh_mobile_lcdc_chan *ch = info->par;
276 unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
277 struct page *page;
278 int nr_pages = 0;
279
280 sg_init_table(ch->sglist, nr_pages_max);
281
282 list_for_each_entry(page, pagelist, lru)
283 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
284
285 return nr_pages;
286}
287
8564557a
MD		 288static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
289 struct list_head *pagelist)
290{
291 struct sh_mobile_lcdc_chan *ch = info->par;
afaad83b 292 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
8564557a
MD		 293
294 /* enable clocks before accessing hardware */
295 sh_mobile_lcdc_clk_on(ch->lcdc);
296
5c1a56b5
PM		 297 /*
298 * It's possible to get here without anything on the pagelist via
299 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
300 * invocation. In the former case, the acceleration routines are
301 * stepped in to when using the framebuffer console causing the
302 * workqueue to be scheduled without any dirty pages on the list.
303 *
304 * Despite this, a panel update is still needed given that the
305 * acceleration routines have their own methods for writing in
306 * that still need to be updated.
307 *
308 * The fsync() and empty pagelist case could be optimized for,
309 * but we don't bother, as any application exhibiting such
310 * behaviour is fundamentally broken anyways.
311 */
312 if (!list_empty(pagelist)) {
313 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
314
315 /* trigger panel update */
316 dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
afaad83b
LP		 317 if (panel->start_transfer)
318 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 319 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
5c1a56b5 320 dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
ef61aae4 321 } else {
afaad83b
LP		 322 if (panel->start_transfer)
323 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 324 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
ef61aae4 325 }
8564557a
MD		 326}
327
328static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
329{
330 struct fb_deferred_io *fbdefio = info->fbdefio;
331
332 if (fbdefio)
333 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
334}
335
37c5dcc2
LP		 336static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch)
337{
afaad83b 338 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
37c5dcc2 339
9a2985e7 340 if (ch->tx_dev) {
458981c3
LP		 341 int ret;
342
343 ret = ch->tx_dev->ops->display_on(ch->tx_dev);
344 if (ret < 0)
9a2985e7 345 return;
458981c3
LP		 346
347 if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED)
348 ch->info->state = FBINFO_STATE_SUSPENDED;
9a2985e7
LP		 349 }
350
37c5dcc2 351 /* HDMI must be enabled before LCDC configuration */
afaad83b
LP		 352 if (panel->display_on)
353 panel->display_on();
37c5dcc2
LP		 354}
355
356static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch)
357{
afaad83b 358 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
37c5dcc2 359
afaad83b
LP		 360 if (panel->display_off)
361 panel->display_off();
9a2985e7
LP		 362
363 if (ch->tx_dev)
364 ch->tx_dev->ops->display_off(ch->tx_dev);
37c5dcc2
LP		 365}
366
ecd29947
LP		 367static bool
368sh_mobile_lcdc_must_reconfigure(struct sh_mobile_lcdc_chan *ch,
e0c8601a 369 const struct fb_videomode *new_mode)
ecd29947 370{
ecd29947 371 dev_dbg(ch->info->dev, "Old %ux%u, new %ux%u\n",
2d04559d
LP		 372 ch->display.mode.xres, ch->display.mode.yres,
373 new_mode->xres, new_mode->yres);
ecd29947 374
e0c8601a 375 /* It can be a different monitor with an equal video-mode */
2d04559d 376 if (fb_mode_is_equal(&ch->display.mode, new_mode))
ecd29947 377 return false;
ecd29947
LP		 378
379 dev_dbg(ch->info->dev, "Switching %u -> %u lines\n",
2d04559d
LP		 380 ch->display.mode.yres, new_mode->yres);
381 ch->display.mode = *new_mode;
ecd29947
LP		 382
383 return true;
384}
385
386static int sh_mobile_check_var(struct fb_var_screeninfo *var,
387 struct fb_info *info);
388
389static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch,
390 enum sh_mobile_lcdc_entity_event event,
e0c8601a
LP		 391 const struct fb_videomode *mode,
392 const struct fb_monspecs *monspec)
ecd29947
LP		 393{
394 struct fb_info *info = ch->info;
e0c8601a 395 struct fb_var_screeninfo var;
ecd29947
LP		 396 int ret = 0;
397
398 switch (event) {
399 case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT:
400 /* HDMI plug in */
401 if (lock_fb_info(info)) {
402 console_lock();
403
2d04559d
LP		 404 ch->display.width = monspec->max_x * 10;
405 ch->display.height = monspec->max_y * 10;
e0c8601a
LP		 406
407 if (!sh_mobile_lcdc_must_reconfigure(ch, mode) &&
ecd29947
LP		 408 info->state == FBINFO_STATE_RUNNING) {
409 /* First activation with the default monitor.
410 * Just turn on, if we run a resume here, the
411 * logo disappears.
412 */
e0c8601a
LP		 413 info->var.width = monspec->max_x * 10;
414 info->var.height = monspec->max_y * 10;
ecd29947
LP		 415 sh_mobile_lcdc_display_on(ch);
416 } else {
417 /* New monitor or have to wake up */
418 fb_set_suspend(info, 0);
419 }
420
421 console_unlock();
422 unlock_fb_info(info);
423 }
424 break;
425
426 case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT:
427 /* HDMI disconnect */
428 if (lock_fb_info(info)) {
429 console_lock();
430 fb_set_suspend(info, 1);
431 console_unlock();
432 unlock_fb_info(info);
433 }
434 break;
435
436 case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE:
437 /* Validate a proposed new mode */
e0c8601a
LP		 438 fb_videomode_to_var(&var, mode);
439 var.bits_per_pixel = info->var.bits_per_pixel;
440 var.grayscale = info->var.grayscale;
441 ret = sh_mobile_check_var(&var, info);
ecd29947
LP		 442 break;
443 }
444
445 return ret;
446}
447
f1f60b5f
LP		 448/* -----------------------------------------------------------------------------
449 * Format helpers
450 */
451
452static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var)
453{
454 if (var->grayscale > 1)
455 return var->grayscale;
456
457 switch (var->bits_per_pixel) {
458 case 16:
459 return V4L2_PIX_FMT_RGB565;
460 case 24:
461 return V4L2_PIX_FMT_BGR24;
462 case 32:
463 return V4L2_PIX_FMT_BGR32;
464 default:
465 return 0;
466 }
467}
468
469static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var)
470{
471 return var->grayscale > 1;
472}
473
474static bool sh_mobile_format_is_yuv(const struct fb_var_screeninfo *var)
475{
476 if (var->grayscale <= 1)
477 return false;
478
479 switch (var->grayscale) {
480 case V4L2_PIX_FMT_NV12:
481 case V4L2_PIX_FMT_NV21:
482 case V4L2_PIX_FMT_NV16:
483 case V4L2_PIX_FMT_NV61:
484 case V4L2_PIX_FMT_NV24:
485 case V4L2_PIX_FMT_NV42:
486 return true;
487
488 default:
489 return false;
490 }
491}
492
493/* -----------------------------------------------------------------------------
494 * Start, stop and IRQ
495 */
496
8564557a
MD		 497static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
498{
499 struct sh_mobile_lcdc_priv *priv = data;
2feb075a 500 struct sh_mobile_lcdc_chan *ch;
9dd38819 501 unsigned long ldintr;
2feb075a
MD		 502 int is_sub;
503 int k;
8564557a 504
dc48665f
LP		 505 /* Acknowledge interrupts and disable further VSYNC End IRQs. */
506 ldintr = lcdc_read(priv, _LDINTR);
507 lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
8564557a 508
2feb075a 509 /* figure out if this interrupt is for main or sub lcd */
ce1c0b08 510 is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
2feb075a 511
9dd38819 512 /* wake up channel and disable clocks */
2feb075a
MD		 513 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
514 ch = &priv->ch[k];
515
516 if (!ch->enabled)
517 continue;
518
dc48665f 519 /* Frame End */
9dd38819
PE		 520 if (ldintr & LDINTR_FS) {
521 if (is_sub == lcdc_chan_is_sublcd(ch)) {
522 ch->frame_end = 1;
523 wake_up(&ch->frame_end_wait);
2feb075a 524
9dd38819
PE		 525 sh_mobile_lcdc_clk_off(priv);
526 }
527 }
528
529 /* VSYNC End */
40331b21
PE		 530 if (ldintr & LDINTR_VES)
531 complete(&ch->vsync_completion);
2feb075a
MD		 532 }
533
8564557a
MD		 534 return IRQ_HANDLED;
535}
536
cfb4f5d1
MD		 537static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
538 int start)
539{
540 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
541 int k;
542
543 /* start or stop the lcdc */
544 if (start)
ce1c0b08 545 lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
cfb4f5d1 546 else
ce1c0b08 547 lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
cfb4f5d1
MD		 548
549 /* wait until power is applied/stopped on all channels */
550 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
551 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
552 while (1) {
ce1c0b08
LP		 553 tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
554 & LDPMR_LPS;
555 if (start && tmp == LDPMR_LPS)
cfb4f5d1
MD		 556 break;
557 if (!start && tmp == 0)
558 break;
559 cpu_relax();
560 }
561
562 if (!start)
563 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
564}
565
6011bdea
GL		 566static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
567{
2d04559d
LP		 568 const struct fb_var_screeninfo *var = &ch->info->var;
569 const struct fb_videomode *mode = &ch->display.mode;
1c120deb 570 unsigned long h_total, hsync_pos, display_h_total;
6011bdea
GL		 571 u32 tmp;
572
573 tmp = ch->ldmt1r_value;
ce1c0b08
LP		 574 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
575 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
576 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
577 tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
578 tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
579 tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
580 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
6011bdea
GL		 581 lcdc_write_chan(ch, LDMT1R, tmp);
582
583 /* setup SYS bus */
584 lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
585 lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
586
587 /* horizontal configuration */
2d04559d
LP		 588 h_total = mode->xres + mode->hsync_len + mode->left_margin
589 + mode->right_margin;
6011bdea 590 tmp = h_total / 8; /* HTCN */
2d04559d 591 tmp |= (min(mode->xres, var->xres) / 8) << 16; /* HDCN */
6011bdea
GL		 592 lcdc_write_chan(ch, LDHCNR, tmp);
593
2d04559d 594 hsync_pos = mode->xres + mode->right_margin;
6011bdea 595 tmp = hsync_pos / 8; /* HSYNP */
2d04559d 596 tmp |= (mode->hsync_len / 8) << 16; /* HSYNW */
6011bdea
GL		 597 lcdc_write_chan(ch, LDHSYNR, tmp);
598
599 /* vertical configuration */
2d04559d
LP		 600 tmp = mode->yres + mode->vsync_len + mode->upper_margin
601 + mode->lower_margin; /* VTLN */
602 tmp |= min(mode->yres, var->yres) << 16; /* VDLN */
6011bdea
GL		 603 lcdc_write_chan(ch, LDVLNR, tmp);
604
2d04559d
LP		 605 tmp = mode->yres + mode->lower_margin; /* VSYNP */
606 tmp |= mode->vsync_len << 16; /* VSYNW */
6011bdea
GL		 607 lcdc_write_chan(ch, LDVSYNR, tmp);
608
609 /* Adjust horizontal synchronisation for HDMI */
2d04559d
LP		 610 display_h_total = mode->xres + mode->hsync_len + mode->left_margin
611 + mode->right_margin;
612 tmp = ((mode->xres & 7) << 24) | ((display_h_total & 7) << 16)
613 | ((mode->hsync_len & 7) << 8) | (hsync_pos & 7);
6011bdea
GL		 614 lcdc_write_chan(ch, LDHAJR, tmp);
615}
616
9a217e34
LP		 617/*
618 * __sh_mobile_lcdc_start - Configure and tart the LCDC
619 * @priv: LCDC device
620 *
621 * Configure all enabled channels and start the LCDC device. All external
622 * devices (clocks, MERAM, panels, ...) are not touched by this function.
623 */
624static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1
MD		 625{
626 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1 627 unsigned long tmp;
9a217e34 628 int k, m;
8564557a 629
9a217e34
LP		 630 /* Enable LCDC channels. Read data from external memory, avoid using the
631 * BEU for now.
632 */
633 lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
cfb4f5d1 634
9a217e34 635 /* Stop the LCDC first and disable all interrupts. */
cfb4f5d1 636 sh_mobile_lcdc_start_stop(priv, 0);
9a217e34 637 lcdc_write(priv, _LDINTR, 0);
cfb4f5d1 638
9a217e34 639 /* Configure power supply, dot clocks and start them. */
cfb4f5d1
MD		 640 tmp = priv->lddckr;
641 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
642 ch = &priv->ch[k];
9a217e34 643 if (!ch->enabled)
cfb4f5d1
MD		 644 continue;
645
9a217e34
LP		 646 /* Power supply */
647 lcdc_write_chan(ch, LDPMR, 0);
648
cfb4f5d1
MD		 649 m = ch->cfg.clock_divider;
650 if (!m)
651 continue;
652
505c7de5
LP		 653 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
654 * denominator.
655 */
656 lcdc_write_chan(ch, LDDCKPAT1R, 0);
657 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
658
cfb4f5d1 659 if (m == 1)
ce1c0b08 660 m = LDDCKR_MOSEL;
cfb4f5d1 661 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
cfb4f5d1
MD		 662 }
663
664 lcdc_write(priv, _LDDCKR, tmp);
cfb4f5d1
MD		 665 lcdc_write(priv, _LDDCKSTPR, 0);
666 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
667
9a217e34 668 /* Setup geometry, format, frame buffer memory and operation mode. */
cfb4f5d1
MD		 669 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
670 ch = &priv->ch[k];
cfb4f5d1
MD		 671 if (!ch->enabled)
672 continue;
673
6011bdea 674 sh_mobile_lcdc_geometry(ch);
cfb4f5d1 675
edd153a3
LP		 676 switch (sh_mobile_format_fourcc(&ch->info->var)) {
677 case V4L2_PIX_FMT_RGB565:
678 tmp = LDDFR_PKF_RGB16;
679 break;
680 case V4L2_PIX_FMT_BGR24:
681 tmp = LDDFR_PKF_RGB24;
682 break;
683 case V4L2_PIX_FMT_BGR32:
684 tmp = LDDFR_PKF_ARGB32;
685 break;
686 case V4L2_PIX_FMT_NV12:
687 case V4L2_PIX_FMT_NV21:
688 tmp = LDDFR_CC | LDDFR_YF_420;
689 break;
690 case V4L2_PIX_FMT_NV16:
691 case V4L2_PIX_FMT_NV61:
692 tmp = LDDFR_CC | LDDFR_YF_422;
693 break;
694 case V4L2_PIX_FMT_NV24:
695 case V4L2_PIX_FMT_NV42:
696 tmp = LDDFR_CC | LDDFR_YF_444;
697 break;
698 }
699
700 if (sh_mobile_format_is_yuv(&ch->info->var)) {
701 switch (ch->info->var.colorspace) {
702 case V4L2_COLORSPACE_REC709:
703 tmp |= LDDFR_CF1;
53b50314 704 break;
edd153a3
LP		 705 case V4L2_COLORSPACE_JPEG:
706 tmp |= LDDFR_CF0;
53b50314
DHG		 707 break;
708 }
417d4827 709 }
7caa4342 710
9a217e34
LP		 711 lcdc_write_chan(ch, LDDFR, tmp);
712 lcdc_write_chan(ch, LDMLSR, ch->pitch);
713 lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
edd153a3 714 if (sh_mobile_format_is_yuv(&ch->info->var))
9a217e34 715 lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
7caa4342 716
9a217e34
LP		 717 /* When using deferred I/O mode, configure the LCDC for one-shot
718 * operation and enable the frame end interrupt. Otherwise use
719 * continuous read mode.
720 */
721 if (ch->ldmt1r_value & LDMT1R_IFM &&
722 ch->cfg.sys_bus_cfg.deferred_io_msec) {
723 lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
724 lcdc_write(priv, _LDINTR, LDINTR_FE);
725 } else {
726 lcdc_write_chan(ch, LDSM1R, 0);
727 }
728 }
7caa4342 729
9a217e34 730 /* Word and long word swap. */
edd153a3
LP		 731 switch (sh_mobile_format_fourcc(&priv->ch[0].info->var)) {
732 case V4L2_PIX_FMT_RGB565:
733 case V4L2_PIX_FMT_NV21:
734 case V4L2_PIX_FMT_NV61:
735 case V4L2_PIX_FMT_NV42:
736 tmp = LDDDSR_LS | LDDDSR_WS;
737 break;
738 case V4L2_PIX_FMT_BGR24:
739 case V4L2_PIX_FMT_NV12:
740 case V4L2_PIX_FMT_NV16:
741 case V4L2_PIX_FMT_NV24:
9a217e34 742 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
edd153a3
LP		 743 break;
744 case V4L2_PIX_FMT_BGR32:
745 default:
746 tmp = LDDDSR_LS;
747 break;
9a217e34
LP		 748 }
749 lcdc_write(priv, _LDDDSR, tmp);
7caa4342 750
9a217e34
LP		 751 /* Enable the display output. */
752 lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
753 sh_mobile_lcdc_start_stop(priv, 1);
754 priv->started = 1;
755}
cfb4f5d1 756
9a217e34
LP		 757static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
758{
759 struct sh_mobile_meram_info *mdev = priv->meram_dev;
9a217e34
LP		 760 struct sh_mobile_lcdc_chan *ch;
761 unsigned long tmp;
762 int ret;
763 int k;
cfb4f5d1 764
9a217e34
LP		 765 /* enable clocks before accessing the hardware */
766 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
767 if (priv->ch[k].enabled)
768 sh_mobile_lcdc_clk_on(priv);
769 }
8564557a 770
9a217e34
LP		 771 /* reset */
772 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
773 lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
8564557a 774
9a217e34 775 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
afaad83b 776 struct sh_mobile_lcdc_panel_cfg *panel;
8564557a 777
37c5dcc2 778 ch = &priv->ch[k];
9a217e34
LP		 779 if (!ch->enabled)
780 continue;
781
afaad83b
LP		 782 panel = &ch->cfg.panel_cfg;
783 if (panel->setup_sys) {
784 ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops);
9a217e34
LP		 785 if (ret)
786 return ret;
8564557a 787 }
cfb4f5d1
MD		 788 }
789
9a217e34
LP		 790 /* Compute frame buffer base address and pitch for each channel. */
791 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
792 struct sh_mobile_meram_cfg *cfg;
793 int pixelformat;
cfb4f5d1 794
9a217e34
LP		 795 ch = &priv->ch[k];
796 if (!ch->enabled)
797 continue;
cfb4f5d1 798
9a217e34
LP		 799 ch->base_addr_y = ch->info->fix.smem_start;
800 ch->base_addr_c = ch->base_addr_y
801 + ch->info->var.xres
802 * ch->info->var.yres_virtual;
803 ch->pitch = ch->info->fix.line_length;
804
805 /* Enable MERAM if possible. */
806 cfg = ch->cfg.meram_cfg;
807 if (mdev == NULL || mdev->ops == NULL || cfg == NULL)
808 continue;
809
810 /* we need to de-init configured ICBs before we can
811 * re-initialize them.
812 */
813 if (ch->meram_enabled) {
814 mdev->ops->meram_unregister(mdev, cfg);
815 ch->meram_enabled = 0;
816 }
817
edd153a3
LP		 818 switch (sh_mobile_format_fourcc(&ch->info->var)) {
819 case V4L2_PIX_FMT_NV12:
820 case V4L2_PIX_FMT_NV21:
821 case V4L2_PIX_FMT_NV16:
822 case V4L2_PIX_FMT_NV61:
9a217e34 823 pixelformat = SH_MOBILE_MERAM_PF_NV;
edd153a3
LP		 824 break;
825 case V4L2_PIX_FMT_NV24:
826 case V4L2_PIX_FMT_NV42:
827 pixelformat = SH_MOBILE_MERAM_PF_NV24;
828 break;
829 case V4L2_PIX_FMT_RGB565:
830 case V4L2_PIX_FMT_BGR24:
831 case V4L2_PIX_FMT_BGR32:
832 default:
833 pixelformat = SH_MOBILE_MERAM_PF_RGB;
834 break;
835 }
9a217e34
LP		 836
837 ret = mdev->ops->meram_register(mdev, cfg, ch->pitch,
838 ch->info->var.yres, pixelformat,
839 ch->base_addr_y, ch->base_addr_c,
840 &ch->base_addr_y, &ch->base_addr_c,
841 &ch->pitch);
842 if (!ret)
843 ch->meram_enabled = 1;
844 }
845
846 /* Start the LCDC. */
847 __sh_mobile_lcdc_start(priv);
848
849 /* Setup deferred I/O, tell the board code to enable the panels, and
850 * turn backlight on.
851 */
cfb4f5d1
MD		 852 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
853 ch = &priv->ch[k];
21bc1f02
MD		 854 if (!ch->enabled)
855 continue;
856
9a217e34
LP		 857 tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
858 if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
859 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
860 ch->defio.delay = msecs_to_jiffies(tmp);
861 ch->info->fbdefio = &ch->defio;
862 fb_deferred_io_init(ch->info);
863 }
864
37c5dcc2 865 sh_mobile_lcdc_display_on(ch);
3b0fd9d7
AC		 866
867 if (ch->bl) {
868 ch->bl->props.power = FB_BLANK_UNBLANK;
869 backlight_update_status(ch->bl);
870 }
cfb4f5d1
MD		 871 }
872
873 return 0;
874}
875
876static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
877{
878 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1
MD		 879 int k;
880
2feb075a 881 /* clean up deferred io and ask board code to disable panel */
cfb4f5d1
MD		 882 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
883 ch = &priv->ch[k];
21bc1f02
MD		 884 if (!ch->enabled)
885 continue;
8564557a 886
2feb075a
MD		 887 /* deferred io mode:
888 * flush frame, and wait for frame end interrupt
889 * clean up deferred io and enable clock
890 */
5ef6b505 891 if (ch->info && ch->info->fbdefio) {
2feb075a 892 ch->frame_end = 0;
e33afddc 893 schedule_delayed_work(&ch->info->deferred_work, 0);
2feb075a 894 wait_event(ch->frame_end_wait, ch->frame_end);
e33afddc
PM		 895 fb_deferred_io_cleanup(ch->info);
896 ch->info->fbdefio = NULL;
2feb075a 897 sh_mobile_lcdc_clk_on(priv);
8564557a 898 }
2feb075a 899
3b0fd9d7
AC		 900 if (ch->bl) {
901 ch->bl->props.power = FB_BLANK_POWERDOWN;
902 backlight_update_status(ch->bl);
903 }
904
37c5dcc2 905 sh_mobile_lcdc_display_off(ch);
7caa4342
D		 906
907 /* disable the meram */
908 if (ch->meram_enabled) {
909 struct sh_mobile_meram_cfg *cfg;
910 struct sh_mobile_meram_info *mdev;
911 cfg = ch->cfg.meram_cfg;
912 mdev = priv->meram_dev;
913 mdev->ops->meram_unregister(mdev, cfg);
914 ch->meram_enabled = 0;
915 }
916
cfb4f5d1
MD		 917 }
918
919 /* stop the lcdc */
8e9bb19e
MD		 920 if (priv->started) {
921 sh_mobile_lcdc_start_stop(priv, 0);
922 priv->started = 0;
923 }
b51339ff 924
8564557a
MD		 925 /* stop clocks */
926 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
927 if (priv->ch[k].enabled)
928 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD		 929}
930
f1f60b5f
LP		 931/* -----------------------------------------------------------------------------
932 * Frame buffer operations
933 */
cfb4f5d1
MD		 934
935static int sh_mobile_lcdc_setcolreg(u_int regno,
936 u_int red, u_int green, u_int blue,
937 u_int transp, struct fb_info *info)
938{
939 u32 *palette = info->pseudo_palette;
940
941 if (regno >= PALETTE_NR)
942 return -EINVAL;
943
944 /* only FB_VISUAL_TRUECOLOR supported */
945
946 red >>= 16 - info->var.red.length;
947 green >>= 16 - info->var.green.length;
948 blue >>= 16 - info->var.blue.length;
949 transp >>= 16 - info->var.transp.length;
950
951 palette[regno] = (red << info->var.red.offset) |
952 (green << info->var.green.offset) |
953 (blue << info->var.blue.offset) |
954 (transp << info->var.transp.offset);
955
956 return 0;
957}
958
959static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
960 .id = "SH Mobile LCDC",
961 .type = FB_TYPE_PACKED_PIXELS,
962 .visual = FB_VISUAL_TRUECOLOR,
963 .accel = FB_ACCEL_NONE,
9dd38819
PE		 964 .xpanstep = 0,
965 .ypanstep = 1,
966 .ywrapstep = 0,
edd153a3 967 .capabilities = FB_CAP_FOURCC,
cfb4f5d1
MD		 968};
969
8564557a
MD		 970static void sh_mobile_lcdc_fillrect(struct fb_info *info,
971 const struct fb_fillrect *rect)
972{
973 sys_fillrect(info, rect);
974 sh_mobile_lcdc_deferred_io_touch(info);
975}
976
977static void sh_mobile_lcdc_copyarea(struct fb_info *info,
978 const struct fb_copyarea *area)
979{
980 sys_copyarea(info, area);
981 sh_mobile_lcdc_deferred_io_touch(info);
982}
983
984static void sh_mobile_lcdc_imageblit(struct fb_info *info,
985 const struct fb_image *image)
986{
987 sys_imageblit(info, image);
988 sh_mobile_lcdc_deferred_io_touch(info);
989}
990
9dd38819
PE		 991static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
992 struct fb_info *info)
993{
994 struct sh_mobile_lcdc_chan *ch = info->par;
92e1f9a7
PE		 995 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
996 unsigned long ldrcntr;
997 unsigned long new_pan_offset;
53b50314
DHG		 998 unsigned long base_addr_y, base_addr_c;
999 unsigned long c_offset;
edd153a3 1000 bool yuv = sh_mobile_format_is_yuv(&info->var);
92e1f9a7 1001
edd153a3 1002 if (!yuv)
dc1d5ada
LP		 1003 new_pan_offset = var->yoffset * info->fix.line_length
1004 + var->xoffset * (info->var.bits_per_pixel / 8);
53b50314 1005 else
dc1d5ada
LP		 1006 new_pan_offset = var->yoffset * info->fix.line_length
1007 + var->xoffset;
9dd38819 1008
92e1f9a7 1009 if (new_pan_offset == ch->pan_offset)
9dd38819
PE		 1010 return 0; /* No change, do nothing */
1011
92e1f9a7 1012 ldrcntr = lcdc_read(priv, _LDRCNTR);
9dd38819 1013
92e1f9a7 1014 /* Set the source address for the next refresh */
53b50314 1015 base_addr_y = ch->dma_handle + new_pan_offset;
edd153a3 1016 if (yuv) {
53b50314 1017 /* Set y offset */
dc1d5ada
LP		 1018 c_offset = var->yoffset * info->fix.line_length
1019 * (info->var.bits_per_pixel - 8) / 8;
1020 base_addr_c = ch->dma_handle
1021 + info->var.xres * info->var.yres_virtual
1022 + c_offset;
53b50314 1023 /* Set x offset */
edd153a3 1024 if (sh_mobile_format_fourcc(&info->var) == V4L2_PIX_FMT_NV24)
53b50314
DHG		 1025 base_addr_c += 2 * var->xoffset;
1026 else
1027 base_addr_c += var->xoffset;
49d79ba2 1028 }
53b50314 1029
49d79ba2 1030 if (ch->meram_enabled) {
7caa4342
D		 1031 struct sh_mobile_meram_cfg *cfg;
1032 struct sh_mobile_meram_info *mdev;
7caa4342
D		 1033 int ret;
1034
1035 cfg = ch->cfg.meram_cfg;
1036 mdev = priv->meram_dev;
1037 ret = mdev->ops->meram_update(mdev, cfg,
1038 base_addr_y, base_addr_c,
49d79ba2 1039 &base_addr_y, &base_addr_c);
7caa4342
D		 1040 if (ret)
1041 return ret;
49d79ba2 1042 }
7caa4342 1043
49d79ba2
LP		 1044 ch->base_addr_y = base_addr_y;
1045 ch->base_addr_c = base_addr_c;
7caa4342 1046
49d79ba2 1047 lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
edd153a3 1048 if (yuv)
49d79ba2 1049 lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
53b50314 1050
92e1f9a7
PE		 1051 if (lcdc_chan_is_sublcd(ch))
1052 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
1053 else
1054 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
1055
1056 ch->pan_offset = new_pan_offset;
1057
1058 sh_mobile_lcdc_deferred_io_touch(info);
9dd38819
PE		 1059
1060 return 0;
1061}
1062
40331b21
PE		 1063static int sh_mobile_wait_for_vsync(struct fb_info *info)
1064{
1065 struct sh_mobile_lcdc_chan *ch = info->par;
1066 unsigned long ldintr;
1067 int ret;
1068
dc48665f
LP		 1069 /* Enable VSync End interrupt and be careful not to acknowledge any
1070 * pending interrupt.
1071 */
40331b21 1072 ldintr = lcdc_read(ch->lcdc, _LDINTR);
dc48665f 1073 ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
40331b21
PE		 1074 lcdc_write(ch->lcdc, _LDINTR, ldintr);
1075
1076 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
1077 msecs_to_jiffies(100));
1078 if (!ret)
1079 return -ETIMEDOUT;
1080
1081 return 0;
1082}
1083
1084static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
1085 unsigned long arg)
1086{
1087 int retval;
1088
1089 switch (cmd) {
1090 case FBIO_WAITFORVSYNC:
1091 retval = sh_mobile_wait_for_vsync(info);
1092 break;
1093
1094 default:
1095 retval = -ENOIOCTLCMD;
1096 break;
1097 }
1098 return retval;
1099}
1100
dd210503
GL		 1101static void sh_mobile_fb_reconfig(struct fb_info *info)
1102{
1103 struct sh_mobile_lcdc_chan *ch = info->par;
2d04559d
LP		 1104 struct fb_var_screeninfo var;
1105 struct fb_videomode mode;
dd210503
GL		 1106 struct fb_event event;
1107 int evnt = FB_EVENT_MODE_CHANGE_ALL;
1108
1109 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
1110 /* More framebuffer users are active */
1111 return;
1112
2d04559d 1113 fb_var_to_videomode(&mode, &info->var);
dd210503 1114
2d04559d 1115 if (fb_mode_is_equal(&ch->display.mode, &mode))
dd210503
GL		 1116 return;
1117
1118 /* Display has been re-plugged, framebuffer is free now, reconfigure */
2d04559d
LP		 1119 var = info->var;
1120 fb_videomode_to_var(&var, &ch->display.mode);
1121 var.width = ch->display.width;
1122 var.height = ch->display.height;
1123 var.activate = FB_ACTIVATE_NOW;
1124
1125 if (fb_set_var(info, &var) < 0)
dd210503
GL		 1126 /* Couldn't reconfigure, hopefully, can continue as before */
1127 return;
1128
dd210503
GL		 1129 /*
1130 * fb_set_var() calls the notifier change internally, only if
1131 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
1132 * user event, we have to call the chain ourselves.
1133 */
1134 event.info = info;
2d04559d 1135 event.data = &ch->display.mode;
dd210503
GL		 1136 fb_notifier_call_chain(evnt, &event);
1137}
1138
1139/*
1140 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
1141 * user == 1, or with console sem held, if user == 0.
1142 */
1143static int sh_mobile_release(struct fb_info *info, int user)
1144{
1145 struct sh_mobile_lcdc_chan *ch = info->par;
1146
1147 mutex_lock(&ch->open_lock);
1148 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1149
1150 ch->use_count--;
1151
1152 /* Nothing to reconfigure, when called from fbcon */
1153 if (user) {
ac751efa 1154 console_lock();
dd210503 1155 sh_mobile_fb_reconfig(info);
ac751efa 1156 console_unlock();
dd210503
GL		 1157 }
1158
1159 mutex_unlock(&ch->open_lock);
1160
1161 return 0;
1162}
1163
1164static int sh_mobile_open(struct fb_info *info, int user)
1165{
1166 struct sh_mobile_lcdc_chan *ch = info->par;
1167
1168 mutex_lock(&ch->open_lock);
1169 ch->use_count++;
1170
1171 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1172 mutex_unlock(&ch->open_lock);
1173
1174 return 0;
1175}
1176
1177static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1178{
1179 struct sh_mobile_lcdc_chan *ch = info->par;
417d4827 1180 struct sh_mobile_lcdc_priv *p = ch->lcdc;
03862194
LP		 1181 unsigned int best_dist = (unsigned int)-1;
1182 unsigned int best_xres = 0;
1183 unsigned int best_yres = 0;
1184 unsigned int i;
dd210503 1185
03862194 1186 if (var->xres > MAX_XRES || var->yres > MAX_YRES)
dd210503 1187 return -EINVAL;
03862194
LP		 1188
1189 /* If board code provides us with a list of available modes, make sure
1190 * we use one of them. Find the mode closest to the requested one. The
1191 * distance between two modes is defined as the size of the
1192 * non-overlapping parts of the two rectangles.
1193 */
93ff2598
LP		 1194 for (i = 0; i < ch->cfg.num_modes; ++i) {
1195 const struct fb_videomode *mode = &ch->cfg.lcd_modes[i];
03862194
LP		 1196 unsigned int dist;
1197
1198 /* We can only round up. */
1199 if (var->xres > mode->xres || var->yres > mode->yres)
1200 continue;
1201
1202 dist = var->xres * var->yres + mode->xres * mode->yres
1203 - 2 * min(var->xres, mode->xres)
1204 * min(var->yres, mode->yres);
1205
1206 if (dist < best_dist) {
1207 best_xres = mode->xres;
1208 best_yres = mode->yres;
1209 best_dist = dist;
1210 }
dd210503 1211 }
417d4827 1212
03862194 1213 /* If no available mode can be used, return an error. */
93ff2598 1214 if (ch->cfg.num_modes != 0) {
03862194
LP		 1215 if (best_dist == (unsigned int)-1)
1216 return -EINVAL;
1217
1218 var->xres = best_xres;
1219 var->yres = best_yres;
1220 }
1221
1222 /* Make sure the virtual resolution is at least as big as the visible
1223 * resolution.
1224 */
1225 if (var->xres_virtual < var->xres)
1226 var->xres_virtual = var->xres;
1227 if (var->yres_virtual < var->yres)
1228 var->yres_virtual = var->yres;
1229
edd153a3
LP		 1230 if (sh_mobile_format_is_fourcc(var)) {
1231 switch (var->grayscale) {
1232 case V4L2_PIX_FMT_NV12:
1233 case V4L2_PIX_FMT_NV21:
1234 var->bits_per_pixel = 12;
1235 break;
1236 case V4L2_PIX_FMT_RGB565:
1237 case V4L2_PIX_FMT_NV16:
1238 case V4L2_PIX_FMT_NV61:
1239 var->bits_per_pixel = 16;
1240 break;
1241 case V4L2_PIX_FMT_BGR24:
1242 case V4L2_PIX_FMT_NV24:
1243 case V4L2_PIX_FMT_NV42:
1244 var->bits_per_pixel = 24;
1245 break;
1246 case V4L2_PIX_FMT_BGR32:
1247 var->bits_per_pixel = 32;
1248 break;
1249 default:
1250 return -EINVAL;
1251 }
1252
1253 /* Default to RGB and JPEG color-spaces for RGB and YUV formats
1254 * respectively.
1255 */
1256 if (!sh_mobile_format_is_yuv(var))
1257 var->colorspace = V4L2_COLORSPACE_SRGB;
1258 else if (var->colorspace != V4L2_COLORSPACE_REC709)
1259 var->colorspace = V4L2_COLORSPACE_JPEG;
1260 } else {
1261 if (var->bits_per_pixel <= 16) { /* RGB 565 */
1262 var->bits_per_pixel = 16;
1263 var->red.offset = 11;
1264 var->red.length = 5;
1265 var->green.offset = 5;
1266 var->green.length = 6;
1267 var->blue.offset = 0;
1268 var->blue.length = 5;
1269 var->transp.offset = 0;
1270 var->transp.length = 0;
1271 } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
1272 var->bits_per_pixel = 24;
1273 var->red.offset = 16;
1274 var->red.length = 8;
1275 var->green.offset = 8;
1276 var->green.length = 8;
1277 var->blue.offset = 0;
1278 var->blue.length = 8;
1279 var->transp.offset = 0;
1280 var->transp.length = 0;
1281 } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
1282 var->bits_per_pixel = 32;
1283 var->red.offset = 16;
1284 var->red.length = 8;
1285 var->green.offset = 8;
1286 var->green.length = 8;
1287 var->blue.offset = 0;
1288 var->blue.length = 8;
1289 var->transp.offset = 24;
1290 var->transp.length = 8;
1291 } else
1292 return -EINVAL;
417d4827 1293
edd153a3
LP		 1294 var->red.msb_right = 0;
1295 var->green.msb_right = 0;
1296 var->blue.msb_right = 0;
1297 var->transp.msb_right = 0;
1298 }
03862194
LP		 1299
1300 /* Make sure we don't exceed our allocated memory. */
1301 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
1302 info->fix.smem_len)
1303 return -EINVAL;
1304
edd153a3
LP		 1305 /* only accept the forced_fourcc for dual channel configurations */
1306 if (p->forced_fourcc &&
1307 p->forced_fourcc != sh_mobile_format_fourcc(var))
417d4827 1308 return -EINVAL;
417d4827 1309
dd210503
GL		 1310 return 0;
1311}
40331b21 1312
ed5bebf2
LP		 1313static int sh_mobile_set_par(struct fb_info *info)
1314{
1315 struct sh_mobile_lcdc_chan *ch = info->par;
91fba48d 1316 u32 line_length = info->fix.line_length;
ed5bebf2
LP		 1317 int ret;
1318
1319 sh_mobile_lcdc_stop(ch->lcdc);
91fba48d 1320
edd153a3 1321 if (sh_mobile_format_is_yuv(&info->var))
91fba48d
LP		 1322 info->fix.line_length = info->var.xres;
1323 else
1324 info->fix.line_length = info->var.xres
1325 * info->var.bits_per_pixel / 8;
1326
ed5bebf2 1327 ret = sh_mobile_lcdc_start(ch->lcdc);
91fba48d 1328 if (ret < 0) {
ed5bebf2 1329 dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
91fba48d
LP		 1330 info->fix.line_length = line_length;
1331 }
ed5bebf2 1332
edd153a3
LP		 1333 if (sh_mobile_format_is_fourcc(&info->var)) {
1334 info->fix.type = FB_TYPE_FOURCC;
1335 info->fix.visual = FB_VISUAL_FOURCC;
1336 } else {
1337 info->fix.type = FB_TYPE_PACKED_PIXELS;
1338 info->fix.visual = FB_VISUAL_TRUECOLOR;
1339 }
1340
ed5bebf2
LP		 1341 return ret;
1342}
1343
8857b9aa
AC		 1344/*
1345 * Screen blanking. Behavior is as follows:
1346 * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
1347 * FB_BLANK_NORMAL: screen blanked, clocks enabled
1348 * FB_BLANK_VSYNC,
1349 * FB_BLANK_HSYNC,
1350 * FB_BLANK_POWEROFF: screen blanked, clocks disabled
1351 */
1352static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
1353{
1354 struct sh_mobile_lcdc_chan *ch = info->par;
1355 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1356
1357 /* blank the screen? */
1358 if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
1359 struct fb_fillrect rect = {
1360 .width = info->var.xres,
1361 .height = info->var.yres,
1362 };
1363 sh_mobile_lcdc_fillrect(info, &rect);
1364 }
1365 /* turn clocks on? */
1366 if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
1367 sh_mobile_lcdc_clk_on(p);
1368 }
1369 /* turn clocks off? */
1370 if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
1371 /* make sure the screen is updated with the black fill before
1372 * switching the clocks off. one vsync is not enough since
1373 * blanking may occur in the middle of a refresh. deferred io
1374 * mode will reenable the clocks and update the screen in time,
1375 * so it does not need this. */
1376 if (!info->fbdefio) {
1377 sh_mobile_wait_for_vsync(info);
1378 sh_mobile_wait_for_vsync(info);
1379 }
1380 sh_mobile_lcdc_clk_off(p);
1381 }
1382
1383 ch->blank_status = blank;
1384 return 0;
1385}
1386
cfb4f5d1 1387static struct fb_ops sh_mobile_lcdc_ops = {
9dd38819 1388 .owner = THIS_MODULE,
cfb4f5d1 1389 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
2540c111
MD		 1390 .fb_read = fb_sys_read,
1391 .fb_write = fb_sys_write,
8564557a
MD		 1392 .fb_fillrect = sh_mobile_lcdc_fillrect,
1393 .fb_copyarea = sh_mobile_lcdc_copyarea,
1394 .fb_imageblit = sh_mobile_lcdc_imageblit,
8857b9aa 1395 .fb_blank = sh_mobile_lcdc_blank,
9dd38819 1396 .fb_pan_display = sh_mobile_fb_pan_display,
40331b21 1397 .fb_ioctl = sh_mobile_ioctl,
dd210503
GL		 1398 .fb_open = sh_mobile_open,
1399 .fb_release = sh_mobile_release,
1400 .fb_check_var = sh_mobile_check_var,
ed5bebf2 1401 .fb_set_par = sh_mobile_set_par,
cfb4f5d1
MD		 1402};
1403
f1f60b5f
LP		 1404/* -----------------------------------------------------------------------------
1405 * Backlight
1406 */
1407
3b0fd9d7
AC		 1408static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
1409{
1410 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7
AC		 1411 int brightness = bdev->props.brightness;
1412
1413 if (bdev->props.power != FB_BLANK_UNBLANK ||
1414 bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
1415 brightness = 0;
1416
43059b0f 1417 return ch->cfg.bl_info.set_brightness(brightness);
3b0fd9d7
AC		 1418}
1419
1420static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
1421{
1422 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7 1423
43059b0f 1424 return ch->cfg.bl_info.get_brightness();
3b0fd9d7
AC		 1425}
1426
1427static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
1428 struct fb_info *info)
1429{
1430 return (info->bl_dev == bdev);
1431}
1432
1433static struct backlight_ops sh_mobile_lcdc_bl_ops = {
1434 .options = BL_CORE_SUSPENDRESUME,
1435 .update_status = sh_mobile_lcdc_update_bl,
1436 .get_brightness = sh_mobile_lcdc_get_brightness,
1437 .check_fb = sh_mobile_lcdc_check_fb,
1438};
1439
1440static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
1441 struct sh_mobile_lcdc_chan *ch)
1442{
1443 struct backlight_device *bl;
1444
1445 bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch,
1446 &sh_mobile_lcdc_bl_ops, NULL);
beee1f20
DC		 1447 if (IS_ERR(bl)) {
1448 dev_err(parent, "unable to register backlight device: %ld\n",
1449 PTR_ERR(bl));
3b0fd9d7
AC		 1450 return NULL;
1451 }
1452
1453 bl->props.max_brightness = ch->cfg.bl_info.max_brightness;
1454 bl->props.brightness = bl->props.max_brightness;
1455 backlight_update_status(bl);
1456
1457 return bl;
1458}
1459
1460static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
1461{
1462 backlight_device_unregister(bdev);
1463}
1464
f1f60b5f
LP		 1465/* -----------------------------------------------------------------------------
1466 * Power management
1467 */
1468
2feb075a
MD		 1469static int sh_mobile_lcdc_suspend(struct device *dev)
1470{
1471 struct platform_device *pdev = to_platform_device(dev);
1472
1473 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
1474 return 0;
1475}
1476
1477static int sh_mobile_lcdc_resume(struct device *dev)
1478{
1479 struct platform_device *pdev = to_platform_device(dev);
1480
1481 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
1482}
1483
0246c471
MD		 1484static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
1485{
1486 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1487 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471
MD		 1488
1489 /* turn off LCDC hardware */
2427bb24
LP		 1490 lcdc_write(priv, _LDCNT1R, 0);
1491
0246c471
MD		 1492 return 0;
1493}
1494
1495static int sh_mobile_lcdc_runtime_resume(struct device *dev)
1496{
1497 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1498 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471 1499
2427bb24 1500 __sh_mobile_lcdc_start(priv);
0246c471
MD		 1501
1502 return 0;
1503}
1504
47145210 1505static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
2feb075a
MD		 1506 .suspend = sh_mobile_lcdc_suspend,
1507 .resume = sh_mobile_lcdc_resume,
0246c471
MD		 1508 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
1509 .runtime_resume = sh_mobile_lcdc_runtime_resume,
2feb075a
MD		 1510};
1511
f1f60b5f
LP		 1512/* -----------------------------------------------------------------------------
1513 * Framebuffer notifier
1514 */
1515
6de9edd5 1516/* locking: called with info->lock held */
6011bdea
GL		 1517static int sh_mobile_lcdc_notify(struct notifier_block *nb,
1518 unsigned long action, void *data)
1519{
1520 struct fb_event *event = data;
1521 struct fb_info *info = event->info;
1522 struct sh_mobile_lcdc_chan *ch = info->par;
6011bdea
GL		 1523
1524 if (&ch->lcdc->notifier != nb)
baf16374 1525 return NOTIFY_DONE;
6011bdea
GL		 1526
1527 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
1528 __func__, action, event->data);
1529
1530 switch(action) {
1531 case FB_EVENT_SUSPEND:
37c5dcc2 1532 sh_mobile_lcdc_display_off(ch);
afe417c0 1533 sh_mobile_lcdc_stop(ch->lcdc);
6011bdea
GL		 1534 break;
1535 case FB_EVENT_RESUME:
dd210503
GL		 1536 mutex_lock(&ch->open_lock);
1537 sh_mobile_fb_reconfig(info);
1538 mutex_unlock(&ch->open_lock);
6011bdea 1539
37c5dcc2 1540 sh_mobile_lcdc_display_on(ch);
ebe5e12d 1541 sh_mobile_lcdc_start(ch->lcdc);
6011bdea
GL		 1542 }
1543
baf16374 1544 return NOTIFY_OK;
6011bdea
GL		 1545}
1546
f1f60b5f
LP		 1547/* -----------------------------------------------------------------------------
1548 * Probe/remove and driver init/exit
1549 */
1550
217e9c43 1551static const struct fb_videomode default_720p __devinitconst = {
f1f60b5f
LP		 1552 .name = "HDMI 720p",
1553 .xres = 1280,
1554 .yres = 720,
1555
1556 .left_margin = 220,
1557 .right_margin = 110,
1558 .hsync_len = 40,
1559
1560 .upper_margin = 20,
1561 .lower_margin = 5,
1562 .vsync_len = 5,
1563
1564 .pixclock = 13468,
1565 .refresh = 60,
1566 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
1567};
1568
b4bee692
LP		 1569static int sh_mobile_lcdc_remove(struct platform_device *pdev)
1570{
1571 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
1572 struct fb_info *info;
1573 int i;
1574
1575 fb_unregister_client(&priv->notifier);
1576
1577 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
1578 if (priv->ch[i].info && priv->ch[i].info->dev)
1579 unregister_framebuffer(priv->ch[i].info);
1580
1581 sh_mobile_lcdc_stop(priv);
1582
1583 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
9a2985e7 1584 struct sh_mobile_lcdc_chan *ch = &priv->ch[i];
b4bee692 1585
9a2985e7 1586 info = ch->info;
b4bee692
LP		 1587 if (!info || !info->device)
1588 continue;
1589
e34d0bbb
LP		 1590 if (ch->tx_dev) {
1591 ch->tx_dev->lcdc = NULL;
9a2985e7 1592 module_put(ch->cfg.tx_dev->dev.driver->owner);
e34d0bbb 1593 }
9a2985e7
LP		 1594
1595 if (ch->sglist)
1596 vfree(ch->sglist);
b4bee692
LP		 1597
1598 if (info->screen_base)
1599 dma_free_coherent(&pdev->dev, info->fix.smem_len,
9a2985e7 1600 info->screen_base, ch->dma_handle);
b4bee692
LP		 1601 fb_dealloc_cmap(&info->cmap);
1602 framebuffer_release(info);
1603 }
1604
1605 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1606 if (priv->ch[i].bl)
1607 sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
1608 }
1609
4774c12a
LP		 1610 if (priv->dot_clk) {
1611 pm_runtime_disable(&pdev->dev);
b4bee692 1612 clk_put(priv->dot_clk);
4774c12a 1613 }
b4bee692
LP		 1614
1615 if (priv->base)
1616 iounmap(priv->base);
1617
1618 if (priv->irq)
1619 free_irq(priv->irq, priv);
1620 kfree(priv);
1621 return 0;
1622}
cfb4f5d1 1623
217e9c43 1624static int __devinit sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
f1f60b5f
LP		 1625{
1626 int interface_type = ch->cfg.interface_type;
1627
1628 switch (interface_type) {
1629 case RGB8:
1630 case RGB9:
1631 case RGB12A:
1632 case RGB12B:
1633 case RGB16:
1634 case RGB18:
1635 case RGB24:
1636 case SYS8A:
1637 case SYS8B:
1638 case SYS8C:
1639 case SYS8D:
1640 case SYS9:
1641 case SYS12:
1642 case SYS16A:
1643 case SYS16B:
1644 case SYS16C:
1645 case SYS18:
1646 case SYS24:
1647 break;
1648 default:
1649 return -EINVAL;
1650 }
1651
1652 /* SUBLCD only supports SYS interface */
1653 if (lcdc_chan_is_sublcd(ch)) {
1654 if (!(interface_type & LDMT1R_IFM))
1655 return -EINVAL;
1656
1657 interface_type &= ~LDMT1R_IFM;
1658 }
1659
1660 ch->ldmt1r_value = interface_type;
1661 return 0;
1662}
1663
0a7f17aa
LP		 1664static int __devinit
1665sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_priv *priv,
1666 struct sh_mobile_lcdc_chan *ch)
cfb4f5d1 1667{
3ce05599
LP		 1668 struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
1669 const struct fb_videomode *max_mode;
1670 const struct fb_videomode *mode;
1671 struct fb_var_screeninfo *var;
cfb4f5d1 1672 struct fb_info *info;
3ce05599 1673 unsigned int max_size;
93ff2598 1674 int num_modes;
3ce05599
LP		 1675 void *buf;
1676 int ret;
1677 int i;
1678
a67472ad 1679 mutex_init(&ch->open_lock);
ecd29947 1680 ch->notify = sh_mobile_lcdc_display_notify;
a67472ad
LP		 1681
1682 /* Allocate the frame buffer device. */
0a7f17aa 1683 ch->info = framebuffer_alloc(0, priv->dev);
3ce05599 1684 if (!ch->info) {
0a7f17aa 1685 dev_err(priv->dev, "unable to allocate fb_info\n");
3ce05599
LP		 1686 return -ENOMEM;
1687 }
1688
1689 info = ch->info;
3ce05599
LP		 1690 info->fbops = &sh_mobile_lcdc_ops;
1691 info->par = ch;
a67472ad
LP		 1692 info->pseudo_palette = &ch->pseudo_palette;
1693 info->flags = FBINFO_FLAG_DEFAULT;
3ce05599
LP		 1694
1695 /* Iterate through the modes to validate them and find the highest
1696 * resolution.
1697 */
1698 max_mode = NULL;
1699 max_size = 0;
1700
93ff2598 1701 for (i = 0, mode = cfg->lcd_modes; i < cfg->num_modes; i++, mode++) {
3ce05599
LP		 1702 unsigned int size = mode->yres * mode->xres;
1703
edd153a3
LP		 1704 /* NV12/NV21 buffers must have even number of lines */
1705 if ((cfg->fourcc == V4L2_PIX_FMT_NV12 ||
1706 cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) {
0a7f17aa
LP		 1707 dev_err(priv->dev, "yres must be multiple of 2 for "
1708 "YCbCr420 mode.\n");
3ce05599
LP		 1709 return -EINVAL;
1710 }
1711
1712 if (size > max_size) {
1713 max_mode = mode;
1714 max_size = size;
1715 }
1716 }
1717
1718 if (!max_size)
1719 max_size = MAX_XRES * MAX_YRES;
1720 else
0a7f17aa 1721 dev_dbg(priv->dev, "Found largest videomode %ux%u\n",
3ce05599
LP		 1722 max_mode->xres, max_mode->yres);
1723
a67472ad 1724 /* Create the mode list. */
93ff2598 1725 if (cfg->lcd_modes == NULL) {
3ce05599 1726 mode = &default_720p;
93ff2598 1727 num_modes = 1;
3ce05599 1728 } else {
93ff2598
LP		 1729 mode = cfg->lcd_modes;
1730 num_modes = cfg->num_modes;
3ce05599
LP		 1731 }
1732
93ff2598 1733 fb_videomode_to_modelist(mode, num_modes, &info->modelist);
3ce05599 1734
13f80eea
LP		 1735 /* Initialize the transmitter device if present. */
1736 if (cfg->tx_dev) {
1737 if (!cfg->tx_dev->dev.driver ||
1738 !try_module_get(cfg->tx_dev->dev.driver->owner)) {
1739 dev_warn(priv->dev,
1740 "unable to get transmitter device\n");
1741 return -EINVAL;
1742 }
1743 ch->tx_dev = platform_get_drvdata(cfg->tx_dev);
1744 ch->tx_dev->lcdc = ch;
1745 ch->tx_dev->def_mode = *mode;
1746 }
1747
a67472ad
LP		 1748 /* Initialize variable screen information using the first mode as
1749 * default. The default Y virtual resolution is twice the panel size to
1750 * allow for double-buffering.
1751 */
1752 var = &info->var;
3ce05599 1753 fb_videomode_to_var(var, mode);
afaad83b
LP		 1754 var->width = cfg->panel_cfg.width;
1755 var->height = cfg->panel_cfg.height;
3ce05599
LP		 1756 var->yres_virtual = var->yres * 2;
1757 var->activate = FB_ACTIVATE_NOW;
1758
edd153a3
LP		 1759 switch (cfg->fourcc) {
1760 case V4L2_PIX_FMT_RGB565:
1761 var->bits_per_pixel = 16;
1762 break;
1763 case V4L2_PIX_FMT_BGR24:
1764 var->bits_per_pixel = 24;
1765 break;
1766 case V4L2_PIX_FMT_BGR32:
1767 var->bits_per_pixel = 32;
1768 break;
1769 default:
1770 var->grayscale = cfg->fourcc;
1771 break;
1772 }
1773
1774 /* Make sure the memory size check won't fail. smem_len is initialized
1775 * later based on var.
1776 */
1777 info->fix.smem_len = UINT_MAX;
a67472ad 1778 ret = sh_mobile_check_var(var, info);
3ce05599
LP		 1779 if (ret)
1780 return ret;
1781
edd153a3
LP		 1782 max_size = max_size * var->bits_per_pixel / 8 * 2;
1783
a67472ad 1784 /* Allocate frame buffer memory and color map. */
0a7f17aa
LP		 1785 buf = dma_alloc_coherent(priv->dev, max_size, &ch->dma_handle,
1786 GFP_KERNEL);
3ce05599 1787 if (!buf) {
0a7f17aa 1788 dev_err(priv->dev, "unable to allocate buffer\n");
3ce05599
LP		 1789 return -ENOMEM;
1790 }
1791
3ce05599
LP		 1792 ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
1793 if (ret < 0) {
0a7f17aa
LP		 1794 dev_err(priv->dev, "unable to allocate cmap\n");
1795 dma_free_coherent(priv->dev, max_size, buf, ch->dma_handle);
3ce05599
LP		 1796 return ret;
1797 }
1798
edd153a3
LP		 1799 /* Initialize fixed screen information. Restrict pan to 2 lines steps
1800 * for NV12 and NV21.
1801 */
1802 info->fix = sh_mobile_lcdc_fix;
3ce05599 1803 info->fix.smem_start = ch->dma_handle;
edd153a3
LP		 1804 info->fix.smem_len = max_size;
1805 if (cfg->fourcc == V4L2_PIX_FMT_NV12 ||
1806 cfg->fourcc == V4L2_PIX_FMT_NV21)
1807 info->fix.ypanstep = 2;
1808
1809 if (sh_mobile_format_is_yuv(var)) {
3ce05599 1810 info->fix.line_length = var->xres;
edd153a3
LP		 1811 info->fix.visual = FB_VISUAL_FOURCC;
1812 } else {
1813 info->fix.line_length = var->xres * var->bits_per_pixel / 8;
1814 info->fix.visual = FB_VISUAL_TRUECOLOR;
1815 }
3ce05599
LP		 1816
1817 info->screen_base = buf;
0a7f17aa 1818 info->device = priv->dev;
2d04559d
LP		 1819
1820 ch->display.width = cfg->panel_cfg.width;
1821 ch->display.height = cfg->panel_cfg.height;
1822 ch->display.mode = *mode;
3ce05599
LP		 1823
1824 return 0;
1825}
1826
1827static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
1828{
01ac25b5 1829 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
3ce05599 1830 struct sh_mobile_lcdc_priv *priv;
cfb4f5d1 1831 struct resource *res;
3ce05599 1832 int num_channels;
cfb4f5d1 1833 int error;
3ce05599 1834 int i;
cfb4f5d1 1835
01ac25b5 1836 if (!pdata) {
cfb4f5d1 1837 dev_err(&pdev->dev, "no platform data defined\n");
8bed9055 1838 return -EINVAL;
cfb4f5d1
MD		 1839 }
1840
1841 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8564557a
MD		 1842 i = platform_get_irq(pdev, 0);
1843 if (!res || i < 0) {
1844 dev_err(&pdev->dev, "cannot get platform resources\n");
8bed9055 1845 return -ENOENT;
cfb4f5d1
MD		 1846 }
1847
1848 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1849 if (!priv) {
1850 dev_err(&pdev->dev, "cannot allocate device data\n");
8bed9055 1851 return -ENOMEM;
cfb4f5d1
MD		 1852 }
1853
4774c12a
LP		 1854 priv->dev = &pdev->dev;
1855 priv->meram_dev = pdata->meram_dev;
8bed9055
GL		 1856 platform_set_drvdata(pdev, priv);
1857
f8798ccb 1858 error = request_irq(i, sh_mobile_lcdc_irq, 0,
7ad33e74 1859 dev_name(&pdev->dev), priv);
8564557a
MD		 1860 if (error) {
1861 dev_err(&pdev->dev, "unable to request irq\n");
1862 goto err1;
1863 }
1864
1865 priv->irq = i;
5ef6b505 1866 atomic_set(&priv->hw_usecnt, -1);
cfb4f5d1 1867
3ce05599
LP		 1868 for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1869 struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
cfb4f5d1 1870
01ac25b5
GL		 1871 ch->lcdc = priv;
1872 memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
cfb4f5d1 1873
01ac25b5 1874 error = sh_mobile_lcdc_check_interface(ch);
cfb4f5d1
MD		 1875 if (error) {
1876 dev_err(&pdev->dev, "unsupported interface type\n");
1877 goto err1;
1878 }
01ac25b5
GL		 1879 init_waitqueue_head(&ch->frame_end_wait);
1880 init_completion(&ch->vsync_completion);
1881 ch->pan_offset = 0;
cfb4f5d1 1882
3b0fd9d7
AC		 1883 /* probe the backlight is there is one defined */
1884 if (ch->cfg.bl_info.max_brightness)
1885 ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
1886
cfb4f5d1
MD		 1887 switch (pdata->ch[i].chan) {
1888 case LCDC_CHAN_MAINLCD:
ce1c0b08 1889 ch->enabled = LDCNT2R_ME;
01ac25b5 1890 ch->reg_offs = lcdc_offs_mainlcd;
3ce05599 1891 num_channels++;
cfb4f5d1
MD		 1892 break;
1893 case LCDC_CHAN_SUBLCD:
ce1c0b08 1894 ch->enabled = LDCNT2R_SE;
01ac25b5 1895 ch->reg_offs = lcdc_offs_sublcd;
3ce05599 1896 num_channels++;
cfb4f5d1
MD		 1897 break;
1898 }
1899 }
1900
3ce05599 1901 if (!num_channels) {
cfb4f5d1
MD		 1902 dev_err(&pdev->dev, "no channels defined\n");
1903 error = -EINVAL;
1904 goto err1;
1905 }
1906
edd153a3 1907 /* for dual channel LCDC (MAIN + SUB) force shared format setting */
3ce05599 1908 if (num_channels == 2)
edd153a3 1909 priv->forced_fourcc = pdata->ch[0].fourcc;
417d4827 1910
dba6f385
GL		 1911 priv->base = ioremap_nocache(res->start, resource_size(res));
1912 if (!priv->base)
1913 goto err1;
1914
0a7f17aa 1915 error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source);
cfb4f5d1
MD		 1916 if (error) {
1917 dev_err(&pdev->dev, "unable to setup clocks\n");
1918 goto err1;
1919 }
1920
4774c12a
LP		 1921 /* Enable runtime PM. */
1922 pm_runtime_enable(&pdev->dev);
7caa4342 1923
3ce05599 1924 for (i = 0; i < num_channels; i++) {
01ac25b5 1925 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
c44f9f76 1926
0a7f17aa 1927 error = sh_mobile_lcdc_channel_init(priv, ch);
cfb4f5d1 1928 if (error)
3ce05599 1929 goto err1;
cfb4f5d1
MD		 1930 }
1931
cfb4f5d1
MD		 1932 error = sh_mobile_lcdc_start(priv);
1933 if (error) {
1934 dev_err(&pdev->dev, "unable to start hardware\n");
1935 goto err1;
1936 }
1937
3ce05599 1938 for (i = 0; i < num_channels; i++) {
1c6a307a 1939 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
3ce05599 1940 struct fb_info *info = ch->info;
1c6a307a
PM		 1941
1942 if (info->fbdefio) {
8bed9055 1943 ch->sglist = vmalloc(sizeof(struct scatterlist) *
1c6a307a 1944 info->fix.smem_len >> PAGE_SHIFT);
8bed9055 1945 if (!ch->sglist) {
1c6a307a
PM		 1946 dev_err(&pdev->dev, "cannot allocate sglist\n");
1947 goto err1;
1948 }
1949 }
1950
3b0fd9d7
AC		 1951 info->bl_dev = ch->bl;
1952
1c6a307a 1953 error = register_framebuffer(info);
cfb4f5d1
MD		 1954 if (error < 0)
1955 goto err1;
cfb4f5d1 1956
0a7f17aa 1957 dev_info(&pdev->dev, "registered %s/%s as %dx%d %dbpp.\n",
edd153a3
LP		 1958 pdev->name, (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
1959 "mainlcd" : "sublcd", info->var.xres, info->var.yres,
1960 info->var.bits_per_pixel);
8564557a
MD		 1961
1962 /* deferred io mode: disable clock to save power */
6011bdea 1963 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
8564557a 1964 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD		 1965 }
1966
6011bdea
GL		 1967 /* Failure ignored */
1968 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
1969 fb_register_client(&priv->notifier);
1970
cfb4f5d1 1971 return 0;
8bed9055 1972err1:
cfb4f5d1 1973 sh_mobile_lcdc_remove(pdev);
8bed9055 1974
cfb4f5d1
MD		 1975 return error;
1976}
1977
cfb4f5d1
MD		 1978static struct platform_driver sh_mobile_lcdc_driver = {
1979 .driver = {
1980 .name = "sh_mobile_lcdc_fb",
1981 .owner = THIS_MODULE,
2feb075a 1982 .pm = &sh_mobile_lcdc_dev_pm_ops,
cfb4f5d1
MD		 1983 },
1984 .probe = sh_mobile_lcdc_probe,
1985 .remove = sh_mobile_lcdc_remove,
1986};
1987
4277f2c4 1988module_platform_driver(sh_mobile_lcdc_driver);
cfb4f5d1
MD		 1989
1990MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
1991MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
1992MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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