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6de9edd5 GL |
1 | #ifndef SH_MOBILE_LCDCFB_H |
2 | #define SH_MOBILE_LCDCFB_H | |
3 | ||
4 | #include <linux/completion.h> | |
5 | #include <linux/fb.h> | |
dd210503 | 6 | #include <linux/mutex.h> |
6de9edd5 GL |
7 | #include <linux/wait.h> |
8 | ||
9 | /* per-channel registers */ | |
10 | enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, | |
53b50314 | 11 | LDSM2R, LDSA1R, LDSA2R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR, |
6de9edd5 GL |
12 | LDHAJR, |
13 | NR_CH_REGS }; | |
14 | ||
15 | #define PALETTE_NR 16 | |
16 | ||
3b0fd9d7 | 17 | struct backlight_device; |
d2ccdc80 LP |
18 | struct fb_info; |
19 | struct module; | |
20 | struct sh_mobile_lcdc_entity; | |
21 | struct sh_mobile_lcdc_priv; | |
e34d0bbb | 22 | struct sh_mobile_lcdc_chan; |
d2ccdc80 LP |
23 | |
24 | struct sh_mobile_lcdc_entity_ops { | |
25 | /* Display */ | |
5864ace1 | 26 | int (*display_on)(struct sh_mobile_lcdc_entity *entity); |
d2ccdc80 LP |
27 | void (*display_off)(struct sh_mobile_lcdc_entity *entity); |
28 | }; | |
29 | ||
30 | struct sh_mobile_lcdc_entity { | |
31 | struct module *owner; | |
32 | const struct sh_mobile_lcdc_entity_ops *ops; | |
e34d0bbb | 33 | struct sh_mobile_lcdc_chan *lcdc; |
d2ccdc80 | 34 | }; |
6de9edd5 | 35 | |
9a217e34 LP |
36 | /* |
37 | * struct sh_mobile_lcdc_chan - LCDC display channel | |
38 | * | |
39 | * @base_addr_y: Frame buffer viewport base address (luma component) | |
40 | * @base_addr_c: Frame buffer viewport base address (chroma component) | |
41 | * @pitch: Frame buffer line pitch | |
42 | */ | |
6de9edd5 GL |
43 | struct sh_mobile_lcdc_chan { |
44 | struct sh_mobile_lcdc_priv *lcdc; | |
9a2985e7 LP |
45 | struct sh_mobile_lcdc_entity *tx_dev; |
46 | ||
6de9edd5 GL |
47 | unsigned long *reg_offs; |
48 | unsigned long ldmt1r_value; | |
49 | unsigned long enabled; /* ME and SE in LDCNT2R */ | |
50 | struct sh_mobile_lcdc_chan_cfg cfg; | |
51 | u32 pseudo_palette[PALETTE_NR]; | |
6de9edd5 | 52 | struct fb_info *info; |
3b0fd9d7 | 53 | struct backlight_device *bl; |
6de9edd5 GL |
54 | dma_addr_t dma_handle; |
55 | struct fb_deferred_io defio; | |
56 | struct scatterlist *sglist; | |
57 | unsigned long frame_end; | |
58 | unsigned long pan_offset; | |
59 | wait_queue_head_t frame_end_wait; | |
60 | struct completion vsync_completion; | |
1c120deb | 61 | struct fb_var_screeninfo display_var; |
dd210503 | 62 | int use_count; |
8857b9aa | 63 | int blank_status; |
dd210503 | 64 | struct mutex open_lock; /* protects the use counter */ |
7caa4342 | 65 | int meram_enabled; |
9a217e34 LP |
66 | |
67 | unsigned long base_addr_y; | |
68 | unsigned long base_addr_c; | |
69 | unsigned int pitch; | |
6de9edd5 GL |
70 | }; |
71 | ||
72 | #endif |