Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Frame buffer driver for Trident Blade and Image series | |
3 | * | |
245a2c2c | 4 | * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro> |
1da177e4 LT |
5 | * |
6 | * | |
7 | * CREDITS:(in order of appearance) | |
245a2c2c KH |
8 | * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video |
9 | * Special thanks ;) to Mattia Crivellini <tia@mclink.it> | |
10 | * much inspired by the XFree86 4.x Trident driver sources | |
11 | * by Alan Hourihane the FreeVGA project | |
12 | * Francesco Salvestrini <salvestrini@users.sf.net> XP support, | |
13 | * code, suggestions | |
1da177e4 | 14 | * TODO: |
245a2c2c KH |
15 | * timing value tweaking so it looks good on every monitor in every mode |
16 | * TGUI acceleration | |
1da177e4 LT |
17 | */ |
18 | ||
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/fb.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/pci.h> | |
23 | ||
24 | #include <linux/delay.h> | |
10172ed6 | 25 | #include <video/vga.h> |
1da177e4 LT |
26 | #include <video/trident.h> |
27 | ||
122e8ad3 | 28 | #define VERSION "0.7.9-NEWAPI" |
1da177e4 LT |
29 | |
30 | struct tridentfb_par { | |
245a2c2c | 31 | void __iomem *io_virt; /* iospace virtual memory address */ |
ea8ee55c | 32 | u32 pseudo_pal[16]; |
122e8ad3 | 33 | int chip_id; |
6eed8e1e | 34 | int flatpanel; |
d9cad04b KH |
35 | void (*init_accel) (struct tridentfb_par *, int, int); |
36 | void (*wait_engine) (struct tridentfb_par *); | |
37 | void (*fill_rect) | |
38 | (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); | |
39 | void (*copy_rect) | |
40 | (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); | |
1da177e4 LT |
41 | }; |
42 | ||
245a2c2c | 43 | static unsigned char eng_oper; /* engine operation... */ |
1da177e4 LT |
44 | static struct fb_ops tridentfb_ops; |
45 | ||
1da177e4 | 46 | static struct fb_fix_screeninfo tridentfb_fix = { |
245a2c2c | 47 | .id = "Trident", |
1da177e4 LT |
48 | .type = FB_TYPE_PACKED_PIXELS, |
49 | .ypanstep = 1, | |
50 | .visual = FB_VISUAL_PSEUDOCOLOR, | |
51 | .accel = FB_ACCEL_NONE, | |
52 | }; | |
53 | ||
1da177e4 LT |
54 | /* defaults which are normally overriden by user values */ |
55 | ||
56 | /* video mode */ | |
07f41e45 | 57 | static char *mode_option __devinitdata = "640x480"; |
6eed8e1e | 58 | static int bpp __devinitdata = 8; |
1da177e4 | 59 | |
6eed8e1e | 60 | static int noaccel __devinitdata; |
1da177e4 LT |
61 | |
62 | static int center; | |
63 | static int stretch; | |
64 | ||
6eed8e1e KH |
65 | static int fp __devinitdata; |
66 | static int crt __devinitdata; | |
1da177e4 | 67 | |
6eed8e1e KH |
68 | static int memsize __devinitdata; |
69 | static int memdiff __devinitdata; | |
1da177e4 LT |
70 | static int nativex; |
71 | ||
07f41e45 KH |
72 | module_param(mode_option, charp, 0); |
73 | MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'"); | |
9e3f0ca8 KH |
74 | module_param_named(mode, mode_option, charp, 0); |
75 | MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)"); | |
1da177e4 LT |
76 | module_param(bpp, int, 0); |
77 | module_param(center, int, 0); | |
78 | module_param(stretch, int, 0); | |
79 | module_param(noaccel, int, 0); | |
80 | module_param(memsize, int, 0); | |
81 | module_param(memdiff, int, 0); | |
82 | module_param(nativex, int, 0); | |
83 | module_param(fp, int, 0); | |
6eed8e1e | 84 | MODULE_PARM_DESC(fp, "Define if flatpanel is connected"); |
1da177e4 | 85 | module_param(crt, int, 0); |
6eed8e1e | 86 | MODULE_PARM_DESC(crt, "Define if CRT is connected"); |
1da177e4 | 87 | |
6bdf1035 KH |
88 | static int is_oldclock(int id) |
89 | { | |
a0d92256 KH |
90 | return (id == TGUI9440) || |
91 | (id == TGUI9660) || | |
0e73a47f KH |
92 | (id == CYBER9320); |
93 | } | |
94 | ||
95 | static int is_oldprotect(int id) | |
96 | { | |
a0d92256 KH |
97 | return (id == TGUI9440) || |
98 | (id == TGUI9660) || | |
0e73a47f KH |
99 | (id == PROVIDIA9685) || |
100 | (id == CYBER9320) || | |
101 | (id == CYBER9382) || | |
102 | (id == CYBER9385); | |
6bdf1035 KH |
103 | } |
104 | ||
e0759a5f KH |
105 | static int is_blade(int id) |
106 | { | |
107 | return (id == BLADE3D) || | |
108 | (id == CYBERBLADEE4) || | |
109 | (id == CYBERBLADEi7) || | |
110 | (id == CYBERBLADEi7D) || | |
111 | (id == CYBERBLADEi1) || | |
112 | (id == CYBERBLADEi1D) || | |
113 | (id == CYBERBLADEAi1) || | |
114 | (id == CYBERBLADEAi1D); | |
115 | } | |
116 | ||
117 | static int is_xp(int id) | |
118 | { | |
119 | return (id == CYBERBLADEXPAi1) || | |
120 | (id == CYBERBLADEXPm8) || | |
121 | (id == CYBERBLADEXPm16); | |
122 | } | |
123 | ||
1da177e4 LT |
124 | static int is3Dchip(int id) |
125 | { | |
245a2c2c KH |
126 | return ((id == BLADE3D) || (id == CYBERBLADEE4) || |
127 | (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) || | |
128 | (id == CYBER9397) || (id == CYBER9397DVD) || | |
129 | (id == CYBER9520) || (id == CYBER9525DVD) || | |
130 | (id == IMAGE975) || (id == IMAGE985) || | |
131 | (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) || | |
132 | (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) || | |
133 | (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) || | |
134 | (id == CYBERBLADEXPAi1)); | |
1da177e4 LT |
135 | } |
136 | ||
137 | static int iscyber(int id) | |
138 | { | |
139 | switch (id) { | |
245a2c2c KH |
140 | case CYBER9388: |
141 | case CYBER9382: | |
142 | case CYBER9385: | |
143 | case CYBER9397: | |
144 | case CYBER9397DVD: | |
145 | case CYBER9520: | |
146 | case CYBER9525DVD: | |
147 | case CYBERBLADEE4: | |
148 | case CYBERBLADEi7D: | |
149 | case CYBERBLADEi1: | |
150 | case CYBERBLADEi1D: | |
151 | case CYBERBLADEAi1: | |
152 | case CYBERBLADEAi1D: | |
153 | case CYBERBLADEXPAi1: | |
154 | return 1; | |
1da177e4 | 155 | |
245a2c2c KH |
156 | case CYBER9320: |
157 | case TGUI9660: | |
0e73a47f | 158 | case PROVIDIA9685: |
245a2c2c KH |
159 | case IMAGE975: |
160 | case IMAGE985: | |
161 | case BLADE3D: | |
162 | case CYBERBLADEi7: /* VIA MPV4 integrated version */ | |
163 | ||
164 | default: | |
165 | /* case CYBERBLDAEXPm8: Strange */ | |
166 | /* case CYBERBLDAEXPm16: Strange */ | |
167 | return 0; | |
1da177e4 LT |
168 | } |
169 | } | |
170 | ||
306fa6f6 KH |
171 | static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg) |
172 | { | |
173 | fb_writeb(val, p->io_virt + reg); | |
174 | } | |
1da177e4 | 175 | |
306fa6f6 KH |
176 | static inline u8 t_inb(struct tridentfb_par *p, u16 reg) |
177 | { | |
178 | return fb_readb(p->io_virt + reg); | |
179 | } | |
1da177e4 | 180 | |
306fa6f6 KH |
181 | static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v) |
182 | { | |
183 | fb_writel(v, par->io_virt + r); | |
184 | } | |
185 | ||
186 | static inline u32 readmmr(struct tridentfb_par *par, u16 r) | |
187 | { | |
188 | return fb_readl(par->io_virt + r); | |
189 | } | |
1da177e4 | 190 | |
1da177e4 LT |
191 | /* |
192 | * Blade specific acceleration. | |
193 | */ | |
194 | ||
245a2c2c | 195 | #define point(x, y) ((y) << 16 | (x)) |
1da177e4 LT |
196 | #define STA 0x2120 |
197 | #define CMD 0x2144 | |
198 | #define ROP 0x2148 | |
199 | #define CLR 0x2160 | |
200 | #define SR1 0x2100 | |
201 | #define SR2 0x2104 | |
202 | #define DR1 0x2108 | |
203 | #define DR2 0x210C | |
204 | ||
205 | #define ROP_S 0xCC | |
206 | ||
306fa6f6 | 207 | static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 | 208 | { |
245a2c2c KH |
209 | int v1 = (pitch >> 3) << 20; |
210 | int tmp = 0, v2; | |
1da177e4 | 211 | switch (bpp) { |
245a2c2c KH |
212 | case 8: |
213 | tmp = 0; | |
214 | break; | |
215 | case 15: | |
216 | tmp = 5; | |
217 | break; | |
218 | case 16: | |
219 | tmp = 1; | |
220 | break; | |
221 | case 24: | |
222 | case 32: | |
223 | tmp = 2; | |
224 | break; | |
1da177e4 | 225 | } |
245a2c2c | 226 | v2 = v1 | (tmp << 29); |
306fa6f6 KH |
227 | writemmr(par, 0x21C0, v2); |
228 | writemmr(par, 0x21C4, v2); | |
229 | writemmr(par, 0x21B8, v2); | |
230 | writemmr(par, 0x21BC, v2); | |
231 | writemmr(par, 0x21D0, v1); | |
232 | writemmr(par, 0x21D4, v1); | |
233 | writemmr(par, 0x21C8, v1); | |
234 | writemmr(par, 0x21CC, v1); | |
235 | writemmr(par, 0x216C, 0); | |
1da177e4 LT |
236 | } |
237 | ||
306fa6f6 | 238 | static void blade_wait_engine(struct tridentfb_par *par) |
1da177e4 | 239 | { |
306fa6f6 | 240 | while (readmmr(par, STA) & 0xFA800000) ; |
1da177e4 LT |
241 | } |
242 | ||
306fa6f6 KH |
243 | static void blade_fill_rect(struct tridentfb_par *par, |
244 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 245 | { |
306fa6f6 KH |
246 | writemmr(par, CLR, c); |
247 | writemmr(par, ROP, rop ? 0x66 : ROP_S); | |
248 | writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2); | |
1da177e4 | 249 | |
306fa6f6 KH |
250 | writemmr(par, DR1, point(x, y)); |
251 | writemmr(par, DR2, point(x + w - 1, y + h - 1)); | |
1da177e4 LT |
252 | } |
253 | ||
306fa6f6 KH |
254 | static void blade_copy_rect(struct tridentfb_par *par, |
255 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 | 256 | { |
245a2c2c | 257 | u32 s1, s2, d1, d2; |
1da177e4 | 258 | int direction = 2; |
245a2c2c KH |
259 | s1 = point(x1, y1); |
260 | s2 = point(x1 + w - 1, y1 + h - 1); | |
261 | d1 = point(x2, y2); | |
262 | d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 LT |
263 | |
264 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) | |
245a2c2c | 265 | direction = 0; |
1da177e4 | 266 | |
306fa6f6 KH |
267 | writemmr(par, ROP, ROP_S); |
268 | writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction); | |
1da177e4 | 269 | |
306fa6f6 KH |
270 | writemmr(par, SR1, direction ? s2 : s1); |
271 | writemmr(par, SR2, direction ? s1 : s2); | |
272 | writemmr(par, DR1, direction ? d2 : d1); | |
273 | writemmr(par, DR2, direction ? d1 : d2); | |
1da177e4 LT |
274 | } |
275 | ||
1da177e4 LT |
276 | /* |
277 | * BladeXP specific acceleration functions | |
278 | */ | |
279 | ||
280 | #define ROP_P 0xF0 | |
245a2c2c | 281 | #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff)) |
1da177e4 | 282 | |
306fa6f6 | 283 | static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 | 284 | { |
245a2c2c | 285 | int tmp = 0, v1; |
1da177e4 LT |
286 | unsigned char x = 0; |
287 | ||
288 | switch (bpp) { | |
245a2c2c KH |
289 | case 8: |
290 | x = 0; | |
291 | break; | |
292 | case 16: | |
293 | x = 1; | |
294 | break; | |
295 | case 24: | |
296 | x = 3; | |
297 | break; | |
298 | case 32: | |
299 | x = 2; | |
300 | break; | |
1da177e4 LT |
301 | } |
302 | ||
303 | switch (pitch << (bpp >> 3)) { | |
245a2c2c KH |
304 | case 8192: |
305 | case 512: | |
306 | x |= 0x00; | |
307 | break; | |
308 | case 1024: | |
309 | x |= 0x04; | |
310 | break; | |
311 | case 2048: | |
312 | x |= 0x08; | |
313 | break; | |
314 | case 4096: | |
315 | x |= 0x0C; | |
316 | break; | |
1da177e4 LT |
317 | } |
318 | ||
306fa6f6 | 319 | t_outb(par, x, 0x2125); |
1da177e4 LT |
320 | |
321 | eng_oper = x | 0x40; | |
322 | ||
323 | switch (bpp) { | |
245a2c2c KH |
324 | case 8: |
325 | tmp = 18; | |
326 | break; | |
327 | case 15: | |
328 | case 16: | |
329 | tmp = 19; | |
330 | break; | |
331 | case 24: | |
332 | case 32: | |
333 | tmp = 20; | |
334 | break; | |
1da177e4 LT |
335 | } |
336 | ||
337 | v1 = pitch << tmp; | |
338 | ||
306fa6f6 KH |
339 | writemmr(par, 0x2154, v1); |
340 | writemmr(par, 0x2150, v1); | |
341 | t_outb(par, 3, 0x2126); | |
1da177e4 LT |
342 | } |
343 | ||
306fa6f6 | 344 | static void xp_wait_engine(struct tridentfb_par *par) |
1da177e4 LT |
345 | { |
346 | int busy; | |
347 | int count, timeout; | |
348 | ||
349 | count = 0; | |
350 | timeout = 0; | |
351 | for (;;) { | |
306fa6f6 | 352 | busy = t_inb(par, STA) & 0x80; |
1da177e4 LT |
353 | if (busy != 0x80) |
354 | return; | |
355 | count++; | |
356 | if (count == 10000000) { | |
357 | /* Timeout */ | |
358 | count = 9990000; | |
359 | timeout++; | |
360 | if (timeout == 8) { | |
361 | /* Reset engine */ | |
306fa6f6 | 362 | t_outb(par, 0x00, 0x2120); |
1da177e4 LT |
363 | return; |
364 | } | |
365 | } | |
366 | } | |
367 | } | |
368 | ||
306fa6f6 KH |
369 | static void xp_fill_rect(struct tridentfb_par *par, |
370 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 371 | { |
306fa6f6 KH |
372 | writemmr(par, 0x2127, ROP_P); |
373 | writemmr(par, 0x2158, c); | |
374 | writemmr(par, 0x2128, 0x4000); | |
375 | writemmr(par, 0x2140, masked_point(h, w)); | |
376 | writemmr(par, 0x2138, masked_point(y, x)); | |
377 | t_outb(par, 0x01, 0x2124); | |
378 | t_outb(par, eng_oper, 0x2125); | |
1da177e4 LT |
379 | } |
380 | ||
306fa6f6 KH |
381 | static void xp_copy_rect(struct tridentfb_par *par, |
382 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 LT |
383 | { |
384 | int direction; | |
245a2c2c | 385 | u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; |
1da177e4 LT |
386 | |
387 | direction = 0x0004; | |
245a2c2c | 388 | |
1da177e4 LT |
389 | if ((x1 < x2) && (y1 == y2)) { |
390 | direction |= 0x0200; | |
391 | x1_tmp = x1 + w - 1; | |
392 | x2_tmp = x2 + w - 1; | |
393 | } else { | |
394 | x1_tmp = x1; | |
395 | x2_tmp = x2; | |
396 | } | |
245a2c2c | 397 | |
1da177e4 LT |
398 | if (y1 < y2) { |
399 | direction |= 0x0100; | |
400 | y1_tmp = y1 + h - 1; | |
401 | y2_tmp = y2 + h - 1; | |
245a2c2c | 402 | } else { |
1da177e4 LT |
403 | y1_tmp = y1; |
404 | y2_tmp = y2; | |
405 | } | |
406 | ||
306fa6f6 KH |
407 | writemmr(par, 0x2128, direction); |
408 | t_outb(par, ROP_S, 0x2127); | |
409 | writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp)); | |
410 | writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp)); | |
411 | writemmr(par, 0x2140, masked_point(h, w)); | |
412 | t_outb(par, 0x01, 0x2124); | |
1da177e4 LT |
413 | } |
414 | ||
1da177e4 LT |
415 | /* |
416 | * Image specific acceleration functions | |
417 | */ | |
306fa6f6 | 418 | static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 LT |
419 | { |
420 | int tmp = 0; | |
245a2c2c KH |
421 | switch (bpp) { |
422 | case 8: | |
423 | tmp = 0; | |
424 | break; | |
425 | case 15: | |
426 | tmp = 5; | |
427 | break; | |
428 | case 16: | |
429 | tmp = 1; | |
430 | break; | |
431 | case 24: | |
432 | case 32: | |
433 | tmp = 2; | |
434 | break; | |
1da177e4 | 435 | } |
306fa6f6 KH |
436 | writemmr(par, 0x2120, 0xF0000000); |
437 | writemmr(par, 0x2120, 0x40000000 | tmp); | |
438 | writemmr(par, 0x2120, 0x80000000); | |
439 | writemmr(par, 0x2144, 0x00000000); | |
440 | writemmr(par, 0x2148, 0x00000000); | |
441 | writemmr(par, 0x2150, 0x00000000); | |
442 | writemmr(par, 0x2154, 0x00000000); | |
443 | writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch); | |
444 | writemmr(par, 0x216C, 0x00000000); | |
445 | writemmr(par, 0x2170, 0x00000000); | |
446 | writemmr(par, 0x217C, 0x00000000); | |
447 | writemmr(par, 0x2120, 0x10000000); | |
448 | writemmr(par, 0x2130, (2047 << 16) | 2047); | |
1da177e4 LT |
449 | } |
450 | ||
306fa6f6 | 451 | static void image_wait_engine(struct tridentfb_par *par) |
1da177e4 | 452 | { |
306fa6f6 | 453 | while (readmmr(par, 0x2164) & 0xF0000000) ; |
1da177e4 LT |
454 | } |
455 | ||
306fa6f6 KH |
456 | static void image_fill_rect(struct tridentfb_par *par, |
457 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 458 | { |
306fa6f6 KH |
459 | writemmr(par, 0x2120, 0x80000000); |
460 | writemmr(par, 0x2120, 0x90000000 | ROP_S); | |
1da177e4 | 461 | |
306fa6f6 | 462 | writemmr(par, 0x2144, c); |
1da177e4 | 463 | |
306fa6f6 KH |
464 | writemmr(par, DR1, point(x, y)); |
465 | writemmr(par, DR2, point(x + w - 1, y + h - 1)); | |
1da177e4 | 466 | |
306fa6f6 | 467 | writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9); |
1da177e4 LT |
468 | } |
469 | ||
306fa6f6 KH |
470 | static void image_copy_rect(struct tridentfb_par *par, |
471 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 | 472 | { |
245a2c2c | 473 | u32 s1, s2, d1, d2; |
1da177e4 | 474 | int direction = 2; |
245a2c2c KH |
475 | s1 = point(x1, y1); |
476 | s2 = point(x1 + w - 1, y1 + h - 1); | |
477 | d1 = point(x2, y2); | |
478 | d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 | 479 | |
245a2c2c KH |
480 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) |
481 | direction = 0; | |
482 | ||
306fa6f6 KH |
483 | writemmr(par, 0x2120, 0x80000000); |
484 | writemmr(par, 0x2120, 0x90000000 | ROP_S); | |
245a2c2c | 485 | |
306fa6f6 KH |
486 | writemmr(par, SR1, direction ? s2 : s1); |
487 | writemmr(par, SR2, direction ? s1 : s2); | |
488 | writemmr(par, DR1, direction ? d2 : d1); | |
489 | writemmr(par, DR2, direction ? d1 : d2); | |
490 | writemmr(par, 0x2124, | |
491 | 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction); | |
245a2c2c | 492 | } |
1da177e4 | 493 | |
bcac2d5f KH |
494 | /* |
495 | * TGUI 9440/96XX acceleration | |
496 | */ | |
497 | ||
498 | static void tgui_init_accel(struct tridentfb_par *par, int pitch, int bpp) | |
499 | { | |
500 | unsigned char x = 0; | |
501 | ||
502 | /* disable clipping */ | |
503 | writemmr(par, 0x2148, 0); | |
504 | writemmr(par, 0x214C, point(4095, 2047)); | |
505 | ||
506 | switch (bpp) { | |
507 | case 8: | |
508 | x = 0; | |
509 | break; | |
510 | case 16: | |
511 | x = 1; | |
512 | break; | |
513 | case 24: | |
514 | x = 3; | |
515 | break; | |
516 | case 32: | |
517 | x = 2; | |
518 | break; | |
519 | } | |
520 | ||
521 | switch ((pitch * bpp) / 8) { | |
522 | case 8192: | |
523 | case 512: | |
524 | x |= 0x00; | |
525 | break; | |
526 | case 1024: | |
527 | x |= 0x04; | |
528 | break; | |
529 | case 2048: | |
530 | x |= 0x08; | |
531 | break; | |
532 | case 4096: | |
533 | x |= 0x0C; | |
534 | break; | |
535 | } | |
536 | ||
537 | fb_writew(x, par->io_virt + 0x2122); | |
538 | } | |
539 | ||
540 | static void tgui_fill_rect(struct tridentfb_par *par, | |
541 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
542 | { | |
543 | t_outb(par, ROP_P, 0x2127); | |
544 | writemmr(par, 0x212c, c); | |
545 | writemmr(par, 0x2128, 0x4020); | |
546 | writemmr(par, 0x2140, point(w - 1, h - 1)); | |
547 | writemmr(par, 0x2138, point(x, y)); | |
548 | t_outb(par, 1, 0x2124); | |
549 | } | |
550 | ||
551 | static void tgui_copy_rect(struct tridentfb_par *par, | |
552 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
553 | { | |
554 | int flags = 0; | |
555 | u16 x1_tmp, x2_tmp, y1_tmp, y2_tmp; | |
556 | ||
557 | if ((x1 < x2) && (y1 == y2)) { | |
558 | flags |= 0x0200; | |
559 | x1_tmp = x1 + w - 1; | |
560 | x2_tmp = x2 + w - 1; | |
561 | } else { | |
562 | x1_tmp = x1; | |
563 | x2_tmp = x2; | |
564 | } | |
565 | ||
566 | if (y1 < y2) { | |
567 | flags |= 0x0100; | |
568 | y1_tmp = y1 + h - 1; | |
569 | y2_tmp = y2 + h - 1; | |
570 | } else { | |
571 | y1_tmp = y1; | |
572 | y2_tmp = y2; | |
573 | } | |
574 | ||
575 | writemmr(par, 0x2128, 0x4 | flags); | |
576 | t_outb(par, ROP_S, 0x2127); | |
577 | writemmr(par, 0x213C, point(x1_tmp, y1_tmp)); | |
578 | writemmr(par, 0x2138, point(x2_tmp, y2_tmp)); | |
579 | writemmr(par, 0x2140, point(w - 1, h - 1)); | |
580 | t_outb(par, 1, 0x2124); | |
581 | } | |
582 | ||
1da177e4 LT |
583 | /* |
584 | * Accel functions called by the upper layers | |
585 | */ | |
586 | #ifdef CONFIG_FB_TRIDENT_ACCEL | |
245a2c2c KH |
587 | static void tridentfb_fillrect(struct fb_info *info, |
588 | const struct fb_fillrect *fr) | |
1da177e4 | 589 | { |
306fa6f6 | 590 | struct tridentfb_par *par = info->par; |
1da177e4 | 591 | int bpp = info->var.bits_per_pixel; |
8dad46cf | 592 | int col = 0; |
245a2c2c | 593 | |
1da177e4 | 594 | switch (bpp) { |
245a2c2c KH |
595 | default: |
596 | case 8: | |
597 | col |= fr->color; | |
598 | col |= col << 8; | |
599 | col |= col << 16; | |
600 | break; | |
601 | case 16: | |
602 | col = ((u32 *)(info->pseudo_palette))[fr->color]; | |
603 | break; | |
604 | case 32: | |
605 | col = ((u32 *)(info->pseudo_palette))[fr->color]; | |
606 | break; | |
607 | } | |
608 | ||
d9cad04b | 609 | par->fill_rect(par, fr->dx, fr->dy, fr->width, |
306fa6f6 | 610 | fr->height, col, fr->rop); |
d9cad04b | 611 | par->wait_engine(par); |
1da177e4 | 612 | } |
245a2c2c KH |
613 | static void tridentfb_copyarea(struct fb_info *info, |
614 | const struct fb_copyarea *ca) | |
1da177e4 | 615 | { |
306fa6f6 KH |
616 | struct tridentfb_par *par = info->par; |
617 | ||
d9cad04b | 618 | par->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy, |
306fa6f6 | 619 | ca->width, ca->height); |
d9cad04b | 620 | par->wait_engine(par); |
1da177e4 | 621 | } |
1da177e4 LT |
622 | #endif /* CONFIG_FB_TRIDENT_ACCEL */ |
623 | ||
1da177e4 LT |
624 | /* |
625 | * Hardware access functions | |
626 | */ | |
627 | ||
306fa6f6 | 628 | static inline unsigned char read3X4(struct tridentfb_par *par, int reg) |
1da177e4 | 629 | { |
10172ed6 | 630 | return vga_mm_rcrt(par->io_virt, reg); |
1da177e4 LT |
631 | } |
632 | ||
306fa6f6 KH |
633 | static inline void write3X4(struct tridentfb_par *par, int reg, |
634 | unsigned char val) | |
1da177e4 | 635 | { |
10172ed6 | 636 | vga_mm_wcrt(par->io_virt, reg, val); |
1da177e4 LT |
637 | } |
638 | ||
10172ed6 KH |
639 | static inline unsigned char read3CE(struct tridentfb_par *par, |
640 | unsigned char reg) | |
1da177e4 | 641 | { |
10172ed6 | 642 | return vga_mm_rgfx(par->io_virt, reg); |
1da177e4 LT |
643 | } |
644 | ||
306fa6f6 KH |
645 | static inline void writeAttr(struct tridentfb_par *par, int reg, |
646 | unsigned char val) | |
1da177e4 | 647 | { |
10172ed6 KH |
648 | fb_readb(par->io_virt + VGA_IS1_RC); /* flip-flop to index */ |
649 | vga_mm_wattr(par->io_virt, reg, val); | |
1da177e4 LT |
650 | } |
651 | ||
306fa6f6 KH |
652 | static inline void write3CE(struct tridentfb_par *par, int reg, |
653 | unsigned char val) | |
1da177e4 | 654 | { |
10172ed6 | 655 | vga_mm_wgfx(par->io_virt, reg, val); |
1da177e4 LT |
656 | } |
657 | ||
e8ed857c | 658 | static void enable_mmio(void) |
1da177e4 LT |
659 | { |
660 | /* Goto New Mode */ | |
10172ed6 | 661 | vga_io_rseq(0x0B); |
1da177e4 LT |
662 | |
663 | /* Unprotect registers */ | |
10172ed6 | 664 | vga_io_wseq(NewMode1, 0x80); |
245a2c2c | 665 | |
1da177e4 | 666 | /* Enable MMIO */ |
245a2c2c | 667 | outb(PCIReg, 0x3D4); |
1da177e4 | 668 | outb(inb(0x3D5) | 0x01, 0x3D5); |
e8ed857c KH |
669 | } |
670 | ||
306fa6f6 | 671 | static void disable_mmio(struct tridentfb_par *par) |
e8ed857c | 672 | { |
e8ed857c | 673 | /* Goto New Mode */ |
10172ed6 | 674 | vga_mm_rseq(par->io_virt, 0x0B); |
e8ed857c KH |
675 | |
676 | /* Unprotect registers */ | |
10172ed6 | 677 | vga_mm_wseq(par->io_virt, NewMode1, 0x80); |
e8ed857c KH |
678 | |
679 | /* Disable MMIO */ | |
306fa6f6 KH |
680 | t_outb(par, PCIReg, 0x3D4); |
681 | t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5); | |
1da177e4 LT |
682 | } |
683 | ||
306fa6f6 KH |
684 | static void crtc_unlock(struct tridentfb_par *par) |
685 | { | |
10172ed6 KH |
686 | write3X4(par, VGA_CRTC_V_SYNC_END, |
687 | read3X4(par, VGA_CRTC_V_SYNC_END) & 0x7F); | |
306fa6f6 | 688 | } |
1da177e4 LT |
689 | |
690 | /* Return flat panel's maximum x resolution */ | |
306fa6f6 | 691 | static int __devinit get_nativex(struct tridentfb_par *par) |
1da177e4 | 692 | { |
245a2c2c | 693 | int x, y, tmp; |
1da177e4 LT |
694 | |
695 | if (nativex) | |
696 | return nativex; | |
697 | ||
306fa6f6 | 698 | tmp = (read3CE(par, VertStretch) >> 4) & 3; |
1da177e4 LT |
699 | |
700 | switch (tmp) { | |
245a2c2c KH |
701 | case 0: |
702 | x = 1280; y = 1024; | |
703 | break; | |
704 | case 2: | |
705 | x = 1024; y = 768; | |
706 | break; | |
707 | case 3: | |
708 | x = 800; y = 600; | |
709 | break; | |
710 | case 4: | |
711 | x = 1400; y = 1050; | |
712 | break; | |
713 | case 1: | |
714 | default: | |
715 | x = 640; y = 480; | |
716 | break; | |
1da177e4 LT |
717 | } |
718 | ||
719 | output("%dx%d flat panel found\n", x, y); | |
720 | return x; | |
721 | } | |
722 | ||
723 | /* Set pitch */ | |
306fa6f6 | 724 | static void set_lwidth(struct tridentfb_par *par, int width) |
1da177e4 | 725 | { |
10172ed6 | 726 | write3X4(par, VGA_CRTC_OFFSET, width & 0xFF); |
306fa6f6 KH |
727 | write3X4(par, AddColReg, |
728 | (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4)); | |
1da177e4 LT |
729 | } |
730 | ||
731 | /* For resolutions smaller than FP resolution stretch */ | |
306fa6f6 | 732 | static void screen_stretch(struct tridentfb_par *par) |
1da177e4 | 733 | { |
122e8ad3 | 734 | if (par->chip_id != CYBERBLADEXPAi1) |
306fa6f6 | 735 | write3CE(par, BiosReg, 0); |
245a2c2c | 736 | else |
306fa6f6 KH |
737 | write3CE(par, BiosReg, 8); |
738 | write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1); | |
739 | write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1); | |
1da177e4 LT |
740 | } |
741 | ||
742 | /* For resolutions smaller than FP resolution center */ | |
306fa6f6 | 743 | static void screen_center(struct tridentfb_par *par) |
1da177e4 | 744 | { |
306fa6f6 KH |
745 | write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80); |
746 | write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80); | |
1da177e4 LT |
747 | } |
748 | ||
749 | /* Address of first shown pixel in display memory */ | |
306fa6f6 | 750 | static void set_screen_start(struct tridentfb_par *par, int base) |
1da177e4 | 751 | { |
306fa6f6 | 752 | u8 tmp; |
10172ed6 KH |
753 | write3X4(par, VGA_CRTC_START_LO, base & 0xFF); |
754 | write3X4(par, VGA_CRTC_START_HI, (base & 0xFF00) >> 8); | |
306fa6f6 KH |
755 | tmp = read3X4(par, CRTCModuleTest) & 0xDF; |
756 | write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11)); | |
757 | tmp = read3X4(par, CRTHiOrd) & 0xF8; | |
758 | write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17)); | |
1da177e4 LT |
759 | } |
760 | ||
1da177e4 | 761 | /* Set dotclock frequency */ |
306fa6f6 | 762 | static void set_vclk(struct tridentfb_par *par, unsigned long freq) |
1da177e4 | 763 | { |
245a2c2c | 764 | int m, n, k; |
6bdf1035 KH |
765 | unsigned long fi, d, di; |
766 | unsigned char best_m = 0, best_n = 0, best_k = 0; | |
767 | unsigned char hi, lo; | |
1da177e4 | 768 | |
3f275ea3 | 769 | d = 20000; |
6bdf1035 KH |
770 | for (k = 1; k >= 0; k--) |
771 | for (m = 0; m < 32; m++) | |
772 | for (n = 0; n < 122; n++) { | |
3f275ea3 | 773 | fi = ((14318l * (n + 8)) / (m + 2)) >> k; |
245a2c2c KH |
774 | if ((di = abs(fi - freq)) < d) { |
775 | d = di; | |
6bdf1035 KH |
776 | best_n = n; |
777 | best_m = m; | |
778 | best_k = k; | |
245a2c2c | 779 | } |
3f275ea3 KH |
780 | if (fi > freq) |
781 | break; | |
245a2c2c | 782 | } |
6bdf1035 KH |
783 | |
784 | if (is_oldclock(par->chip_id)) { | |
785 | lo = best_n | (best_m << 7); | |
786 | hi = (best_m >> 1) | (best_k << 4); | |
787 | } else { | |
788 | lo = best_n; | |
789 | hi = best_m | (best_k << 6); | |
790 | } | |
791 | ||
122e8ad3 | 792 | if (is3Dchip(par->chip_id)) { |
10172ed6 KH |
793 | vga_mm_wseq(par->io_virt, ClockHigh, hi); |
794 | vga_mm_wseq(par->io_virt, ClockLow, lo); | |
1da177e4 | 795 | } else { |
c1724fec KH |
796 | t_outb(par, lo, 0x43C8); |
797 | t_outb(par, hi, 0x43C9); | |
1da177e4 | 798 | } |
245a2c2c | 799 | debug("VCLK = %X %X\n", hi, lo); |
1da177e4 LT |
800 | } |
801 | ||
802 | /* Set number of lines for flat panels*/ | |
306fa6f6 | 803 | static void set_number_of_lines(struct tridentfb_par *par, int lines) |
1da177e4 | 804 | { |
306fa6f6 | 805 | int tmp = read3CE(par, CyberEnhance) & 0x8F; |
1da177e4 LT |
806 | if (lines > 1024) |
807 | tmp |= 0x50; | |
808 | else if (lines > 768) | |
809 | tmp |= 0x30; | |
810 | else if (lines > 600) | |
811 | tmp |= 0x20; | |
812 | else if (lines > 480) | |
813 | tmp |= 0x10; | |
306fa6f6 | 814 | write3CE(par, CyberEnhance, tmp); |
1da177e4 LT |
815 | } |
816 | ||
817 | /* | |
818 | * If we see that FP is active we assume we have one. | |
6eed8e1e | 819 | * Otherwise we have a CRT display. User can override. |
1da177e4 | 820 | */ |
6eed8e1e | 821 | static int __devinit is_flatpanel(struct tridentfb_par *par) |
1da177e4 LT |
822 | { |
823 | if (fp) | |
6eed8e1e | 824 | return 1; |
122e8ad3 | 825 | if (crt || !iscyber(par->chip_id)) |
6eed8e1e KH |
826 | return 0; |
827 | return (read3CE(par, FPConfig) & 0x10) ? 1 : 0; | |
1da177e4 LT |
828 | } |
829 | ||
830 | /* Try detecting the video memory size */ | |
306fa6f6 | 831 | static unsigned int __devinit get_memsize(struct tridentfb_par *par) |
1da177e4 LT |
832 | { |
833 | unsigned char tmp, tmp2; | |
834 | unsigned int k; | |
835 | ||
836 | /* If memory size provided by user */ | |
837 | if (memsize) | |
838 | k = memsize * Kb; | |
839 | else | |
122e8ad3 | 840 | switch (par->chip_id) { |
245a2c2c KH |
841 | case CYBER9525DVD: |
842 | k = 2560 * Kb; | |
843 | break; | |
1da177e4 | 844 | default: |
306fa6f6 | 845 | tmp = read3X4(par, SPR) & 0x0F; |
1da177e4 LT |
846 | switch (tmp) { |
847 | ||
245a2c2c | 848 | case 0x01: |
b614ce8b | 849 | k = 512 * Kb; |
245a2c2c KH |
850 | break; |
851 | case 0x02: | |
852 | k = 6 * Mb; /* XP */ | |
853 | break; | |
854 | case 0x03: | |
855 | k = 1 * Mb; | |
856 | break; | |
857 | case 0x04: | |
858 | k = 8 * Mb; | |
859 | break; | |
860 | case 0x06: | |
861 | k = 10 * Mb; /* XP */ | |
862 | break; | |
863 | case 0x07: | |
864 | k = 2 * Mb; | |
865 | break; | |
866 | case 0x08: | |
867 | k = 12 * Mb; /* XP */ | |
868 | break; | |
869 | case 0x0A: | |
870 | k = 14 * Mb; /* XP */ | |
871 | break; | |
872 | case 0x0C: | |
873 | k = 16 * Mb; /* XP */ | |
874 | break; | |
875 | case 0x0E: /* XP */ | |
876 | ||
10172ed6 | 877 | tmp2 = vga_mm_rseq(par->io_virt, 0xC1); |
245a2c2c KH |
878 | switch (tmp2) { |
879 | case 0x00: | |
880 | k = 20 * Mb; | |
881 | break; | |
882 | case 0x01: | |
883 | k = 24 * Mb; | |
884 | break; | |
885 | case 0x10: | |
886 | k = 28 * Mb; | |
887 | break; | |
888 | case 0x11: | |
889 | k = 32 * Mb; | |
890 | break; | |
891 | default: | |
892 | k = 1 * Mb; | |
893 | break; | |
894 | } | |
895 | break; | |
896 | ||
897 | case 0x0F: | |
898 | k = 4 * Mb; | |
899 | break; | |
900 | default: | |
901 | k = 1 * Mb; | |
1da177e4 | 902 | break; |
1da177e4 | 903 | } |
245a2c2c | 904 | } |
1da177e4 LT |
905 | |
906 | k -= memdiff * Kb; | |
245a2c2c | 907 | output("framebuffer size = %d Kb\n", k / Kb); |
1da177e4 LT |
908 | return k; |
909 | } | |
910 | ||
911 | /* See if we can handle the video mode described in var */ | |
245a2c2c KH |
912 | static int tridentfb_check_var(struct fb_var_screeninfo *var, |
913 | struct fb_info *info) | |
1da177e4 | 914 | { |
6eed8e1e | 915 | struct tridentfb_par *par = info->par; |
1da177e4 | 916 | int bpp = var->bits_per_pixel; |
bcac2d5f | 917 | int line_length; |
74a933fe | 918 | int ramdac = 230000; /* 230MHz for most 3D chips */ |
1da177e4 LT |
919 | debug("enter\n"); |
920 | ||
921 | /* check color depth */ | |
245a2c2c | 922 | if (bpp == 24) |
1da177e4 | 923 | bpp = var->bits_per_pixel = 32; |
54f019e5 KH |
924 | if (par->chip_id == TGUI9440 && bpp == 32) |
925 | return -EINVAL; | |
245a2c2c | 926 | /* check whether resolution fits on panel and in memory */ |
6eed8e1e | 927 | if (par->flatpanel && nativex && var->xres > nativex) |
1da177e4 | 928 | return -EINVAL; |
74a933fe KH |
929 | /* various resolution checks */ |
930 | var->xres = (var->xres + 7) & ~0x7; | |
931 | if (var->xres != var->xres_virtual) | |
932 | var->xres_virtual = var->xres; | |
bcac2d5f KH |
933 | line_length = var->xres_virtual * bpp / 8; |
934 | #ifdef CONFIG_FB_TRIDENT_ACCEL | |
935 | if (!is3Dchip(par->chip_id)) { | |
936 | /* acceleration requires line length to be power of 2 */ | |
937 | if (line_length <= 512) | |
938 | var->xres_virtual = 512 * 8 / bpp; | |
939 | else if (line_length <= 1024) | |
940 | var->xres_virtual = 1024 * 8 / bpp; | |
941 | else if (line_length <= 2048) | |
942 | var->xres_virtual = 2048 * 8 / bpp; | |
943 | else if (line_length <= 4096) | |
944 | var->xres_virtual = 4096 * 8 / bpp; | |
945 | else if (line_length <= 8192) | |
946 | var->xres_virtual = 8192 * 8 / bpp; | |
947 | ||
948 | line_length = var->xres_virtual * bpp / 8; | |
949 | } | |
950 | #endif | |
74a933fe KH |
951 | if (var->yres > var->yres_virtual) |
952 | var->yres_virtual = var->yres; | |
bcac2d5f | 953 | if (line_length * var->yres_virtual > info->fix.smem_len) |
1da177e4 LT |
954 | return -EINVAL; |
955 | ||
956 | switch (bpp) { | |
245a2c2c KH |
957 | case 8: |
958 | var->red.offset = 0; | |
959 | var->green.offset = 0; | |
960 | var->blue.offset = 0; | |
961 | var->red.length = 6; | |
962 | var->green.length = 6; | |
963 | var->blue.length = 6; | |
964 | break; | |
965 | case 16: | |
966 | var->red.offset = 11; | |
967 | var->green.offset = 5; | |
968 | var->blue.offset = 0; | |
969 | var->red.length = 5; | |
970 | var->green.length = 6; | |
971 | var->blue.length = 5; | |
972 | break; | |
973 | case 32: | |
974 | var->red.offset = 16; | |
975 | var->green.offset = 8; | |
976 | var->blue.offset = 0; | |
977 | var->red.length = 8; | |
978 | var->green.length = 8; | |
979 | var->blue.length = 8; | |
980 | break; | |
981 | default: | |
982 | return -EINVAL; | |
1da177e4 | 983 | } |
74a933fe KH |
984 | |
985 | if (is_xp(par->chip_id)) | |
986 | ramdac = 350000; | |
987 | ||
988 | switch (par->chip_id) { | |
989 | case TGUI9440: | |
54f019e5 | 990 | ramdac = (bpp >= 16) ? 45000 : 90000; |
74a933fe KH |
991 | break; |
992 | case CYBER9320: | |
993 | case TGUI9660: | |
994 | ramdac = 135000; | |
995 | break; | |
996 | case PROVIDIA9685: | |
997 | case CYBER9388: | |
998 | case CYBER9382: | |
999 | case CYBER9385: | |
1000 | ramdac = 170000; | |
1001 | break; | |
1002 | } | |
1003 | ||
1004 | /* The clock is doubled for 32 bpp */ | |
1005 | if (bpp == 32) | |
1006 | ramdac /= 2; | |
1007 | ||
1008 | if (PICOS2KHZ(var->pixclock) > ramdac) | |
1009 | return -EINVAL; | |
1010 | ||
1da177e4 LT |
1011 | debug("exit\n"); |
1012 | ||
1013 | return 0; | |
1014 | ||
1015 | } | |
245a2c2c | 1016 | |
1da177e4 LT |
1017 | /* Pan the display */ |
1018 | static int tridentfb_pan_display(struct fb_var_screeninfo *var, | |
245a2c2c | 1019 | struct fb_info *info) |
1da177e4 | 1020 | { |
306fa6f6 | 1021 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
1022 | unsigned int offset; |
1023 | ||
1024 | debug("enter\n"); | |
bcac2d5f | 1025 | offset = (var->xoffset + (var->yoffset * var->xres_virtual)) |
245a2c2c | 1026 | * var->bits_per_pixel / 32; |
1da177e4 LT |
1027 | info->var.xoffset = var->xoffset; |
1028 | info->var.yoffset = var->yoffset; | |
306fa6f6 | 1029 | set_screen_start(par, offset); |
1da177e4 LT |
1030 | debug("exit\n"); |
1031 | return 0; | |
1032 | } | |
1033 | ||
306fa6f6 KH |
1034 | static void shadowmode_on(struct tridentfb_par *par) |
1035 | { | |
1036 | write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81); | |
1037 | } | |
1038 | ||
1039 | static void shadowmode_off(struct tridentfb_par *par) | |
1040 | { | |
1041 | write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E); | |
1042 | } | |
1da177e4 LT |
1043 | |
1044 | /* Set the hardware to the requested video mode */ | |
1045 | static int tridentfb_set_par(struct fb_info *info) | |
1046 | { | |
245a2c2c KH |
1047 | struct tridentfb_par *par = (struct tridentfb_par *)(info->par); |
1048 | u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend; | |
1049 | u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend; | |
1050 | struct fb_var_screeninfo *var = &info->var; | |
1da177e4 LT |
1051 | int bpp = var->bits_per_pixel; |
1052 | unsigned char tmp; | |
3f275ea3 KH |
1053 | unsigned long vclk; |
1054 | ||
1da177e4 | 1055 | debug("enter\n"); |
245a2c2c | 1056 | hdispend = var->xres / 8 - 1; |
7f762d23 KH |
1057 | hsyncstart = (var->xres + var->right_margin) / 8 - 1; |
1058 | hsyncend = (var->xres + var->right_margin + var->hsync_len) / 8 - 1; | |
1059 | htotal = (var->xres + var->left_margin + var->right_margin + | |
1060 | var->hsync_len) / 8 - 5; | |
0e73a47f | 1061 | hblankstart = hdispend + 1; |
7f762d23 | 1062 | hblankend = htotal + 3; |
1da177e4 | 1063 | |
1da177e4 LT |
1064 | vdispend = var->yres - 1; |
1065 | vsyncstart = var->yres + var->lower_margin; | |
7f762d23 KH |
1066 | vsyncend = vsyncstart + var->vsync_len; |
1067 | vtotal = var->upper_margin + vsyncend - 2; | |
0e73a47f | 1068 | vblankstart = vdispend + 1; |
7f762d23 | 1069 | vblankend = vtotal; |
1da177e4 | 1070 | |
306fa6f6 KH |
1071 | crtc_unlock(par); |
1072 | write3CE(par, CyberControl, 8); | |
1da177e4 | 1073 | |
6eed8e1e | 1074 | if (par->flatpanel && var->xres < nativex) { |
1da177e4 LT |
1075 | /* |
1076 | * on flat panels with native size larger | |
1077 | * than requested resolution decide whether | |
1078 | * we stretch or center | |
1079 | */ | |
10172ed6 | 1080 | t_outb(par, 0xEB, VGA_MIS_W); |
1da177e4 | 1081 | |
306fa6f6 | 1082 | shadowmode_on(par); |
1da177e4 | 1083 | |
245a2c2c | 1084 | if (center) |
306fa6f6 | 1085 | screen_center(par); |
1da177e4 | 1086 | else if (stretch) |
306fa6f6 | 1087 | screen_stretch(par); |
1da177e4 LT |
1088 | |
1089 | } else { | |
10172ed6 | 1090 | t_outb(par, 0x2B, VGA_MIS_W); |
306fa6f6 | 1091 | write3CE(par, CyberControl, 8); |
1da177e4 LT |
1092 | } |
1093 | ||
1094 | /* vertical timing values */ | |
10172ed6 KH |
1095 | write3X4(par, VGA_CRTC_V_TOTAL, vtotal & 0xFF); |
1096 | write3X4(par, VGA_CRTC_V_DISP_END, vdispend & 0xFF); | |
1097 | write3X4(par, VGA_CRTC_V_SYNC_START, vsyncstart & 0xFF); | |
1098 | write3X4(par, VGA_CRTC_V_SYNC_END, (vsyncend & 0x0F)); | |
1099 | write3X4(par, VGA_CRTC_V_BLANK_START, vblankstart & 0xFF); | |
7f762d23 | 1100 | write3X4(par, VGA_CRTC_V_BLANK_END, vblankend & 0xFF); |
1da177e4 LT |
1101 | |
1102 | /* horizontal timing values */ | |
10172ed6 KH |
1103 | write3X4(par, VGA_CRTC_H_TOTAL, htotal & 0xFF); |
1104 | write3X4(par, VGA_CRTC_H_DISP, hdispend & 0xFF); | |
1105 | write3X4(par, VGA_CRTC_H_SYNC_START, hsyncstart & 0xFF); | |
1106 | write3X4(par, VGA_CRTC_H_SYNC_END, | |
306fa6f6 | 1107 | (hsyncend & 0x1F) | ((hblankend & 0x20) << 2)); |
10172ed6 | 1108 | write3X4(par, VGA_CRTC_H_BLANK_START, hblankstart & 0xFF); |
7f762d23 | 1109 | write3X4(par, VGA_CRTC_H_BLANK_END, hblankend & 0x1F); |
1da177e4 LT |
1110 | |
1111 | /* higher bits of vertical timing values */ | |
1112 | tmp = 0x10; | |
1113 | if (vtotal & 0x100) tmp |= 0x01; | |
1114 | if (vdispend & 0x100) tmp |= 0x02; | |
1115 | if (vsyncstart & 0x100) tmp |= 0x04; | |
1116 | if (vblankstart & 0x100) tmp |= 0x08; | |
1117 | ||
1118 | if (vtotal & 0x200) tmp |= 0x20; | |
1119 | if (vdispend & 0x200) tmp |= 0x40; | |
1120 | if (vsyncstart & 0x200) tmp |= 0x80; | |
10172ed6 | 1121 | write3X4(par, VGA_CRTC_OVERFLOW, tmp); |
1da177e4 | 1122 | |
7f762d23 KH |
1123 | tmp = read3X4(par, CRTHiOrd) & 0x07; |
1124 | tmp |= 0x08; /* line compare bit 10 */ | |
1da177e4 LT |
1125 | if (vtotal & 0x400) tmp |= 0x80; |
1126 | if (vblankstart & 0x400) tmp |= 0x40; | |
1127 | if (vsyncstart & 0x400) tmp |= 0x20; | |
1128 | if (vdispend & 0x400) tmp |= 0x10; | |
306fa6f6 | 1129 | write3X4(par, CRTHiOrd, tmp); |
1da177e4 | 1130 | |
7f762d23 KH |
1131 | tmp = (htotal >> 8) & 0x01; |
1132 | tmp |= (hdispend >> 7) & 0x02; | |
1133 | tmp |= (hsyncstart >> 5) & 0x08; | |
1134 | tmp |= (hblankstart >> 4) & 0x10; | |
306fa6f6 | 1135 | write3X4(par, HorizOverflow, tmp); |
245a2c2c | 1136 | |
1da177e4 LT |
1137 | tmp = 0x40; |
1138 | if (vblankstart & 0x200) tmp |= 0x20; | |
245a2c2c | 1139 | //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */ |
10172ed6 | 1140 | write3X4(par, VGA_CRTC_MAX_SCAN, tmp); |
1da177e4 | 1141 | |
10172ed6 KH |
1142 | write3X4(par, VGA_CRTC_LINE_COMPARE, 0xFF); |
1143 | write3X4(par, VGA_CRTC_PRESET_ROW, 0); | |
1144 | write3X4(par, VGA_CRTC_MODE, 0xC3); | |
1da177e4 | 1145 | |
306fa6f6 | 1146 | write3X4(par, LinearAddReg, 0x20); /* enable linear addressing */ |
1da177e4 | 1147 | |
245a2c2c | 1148 | tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80; |
306fa6f6 KH |
1149 | /* enable access extended memory */ |
1150 | write3X4(par, CRTCModuleTest, tmp); | |
1da177e4 | 1151 | |
306fa6f6 KH |
1152 | /* enable GE for text acceleration */ |
1153 | write3X4(par, GraphEngReg, 0x80); | |
1da177e4 | 1154 | |
245a2c2c | 1155 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
bcac2d5f | 1156 | par->init_accel(par, info->var.xres_virtual, bpp); |
8dad46cf | 1157 | #endif |
245a2c2c | 1158 | |
1da177e4 | 1159 | switch (bpp) { |
245a2c2c KH |
1160 | case 8: |
1161 | tmp = 0x00; | |
1162 | break; | |
1163 | case 16: | |
1164 | tmp = 0x05; | |
1165 | break; | |
1166 | case 24: | |
1167 | tmp = 0x29; | |
1168 | break; | |
1169 | case 32: | |
1170 | tmp = 0x09; | |
1171 | break; | |
1da177e4 LT |
1172 | } |
1173 | ||
306fa6f6 | 1174 | write3X4(par, PixelBusReg, tmp); |
1da177e4 | 1175 | |
0e73a47f KH |
1176 | tmp = read3X4(par, DRAMControl); |
1177 | if (!is_oldprotect(par->chip_id)) | |
1178 | tmp |= 0x10; | |
122e8ad3 | 1179 | if (iscyber(par->chip_id)) |
245a2c2c | 1180 | tmp |= 0x20; |
306fa6f6 | 1181 | write3X4(par, DRAMControl, tmp); /* both IO, linear enable */ |
1da177e4 | 1182 | |
306fa6f6 | 1183 | write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40); |
0e73a47f KH |
1184 | if (!is_xp(par->chip_id)) |
1185 | write3X4(par, Performance, read3X4(par, Performance) | 0x10); | |
306fa6f6 | 1186 | /* MMIO & PCI read and write burst enable */ |
a0d92256 KH |
1187 | if (par->chip_id != TGUI9440) |
1188 | write3X4(par, PCIReg, read3X4(par, PCIReg) | 0x06); | |
1da177e4 | 1189 | |
10172ed6 KH |
1190 | vga_mm_wseq(par->io_virt, 0, 3); |
1191 | vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */ | |
306fa6f6 | 1192 | /* enable 4 maps because needed in chain4 mode */ |
10172ed6 KH |
1193 | vga_mm_wseq(par->io_virt, 2, 0x0F); |
1194 | vga_mm_wseq(par->io_virt, 3, 0); | |
1195 | vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */ | |
1da177e4 | 1196 | |
54f019e5 KH |
1197 | /* convert from picoseconds to kHz */ |
1198 | vclk = PICOS2KHZ(info->var.pixclock); | |
1199 | ||
306fa6f6 | 1200 | /* divide clock by 2 if 32bpp chain4 mode display and CPU path */ |
65e93e03 | 1201 | tmp = read3CE(par, MiscExtFunc) & 0xF0; |
54f019e5 | 1202 | if (bpp == 32 || (par->chip_id == TGUI9440 && bpp == 16)) { |
65e93e03 | 1203 | tmp |= 8; |
54f019e5 KH |
1204 | vclk *= 2; |
1205 | } | |
1206 | set_vclk(par, vclk); | |
65e93e03 | 1207 | write3CE(par, MiscExtFunc, tmp | 0x12); |
306fa6f6 KH |
1208 | write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */ |
1209 | write3CE(par, 0x6, 0x05); /* graphics mode */ | |
1210 | write3CE(par, 0x7, 0x0F); /* planes? */ | |
1da177e4 | 1211 | |
122e8ad3 | 1212 | if (par->chip_id == CYBERBLADEXPAi1) { |
1da177e4 | 1213 | /* This fixes snow-effect in 32 bpp */ |
10172ed6 | 1214 | write3X4(par, VGA_CRTC_H_SYNC_START, 0x84); |
1da177e4 LT |
1215 | } |
1216 | ||
306fa6f6 KH |
1217 | /* graphics mode and support 256 color modes */ |
1218 | writeAttr(par, 0x10, 0x41); | |
1219 | writeAttr(par, 0x12, 0x0F); /* planes */ | |
1220 | writeAttr(par, 0x13, 0); /* horizontal pel panning */ | |
1da177e4 | 1221 | |
245a2c2c KH |
1222 | /* colors */ |
1223 | for (tmp = 0; tmp < 0x10; tmp++) | |
306fa6f6 | 1224 | writeAttr(par, tmp, tmp); |
10172ed6 KH |
1225 | fb_readb(par->io_virt + VGA_IS1_RC); /* flip-flop to index */ |
1226 | t_outb(par, 0x20, VGA_ATT_W); /* enable attr */ | |
1da177e4 LT |
1227 | |
1228 | switch (bpp) { | |
245a2c2c KH |
1229 | case 8: |
1230 | tmp = 0; | |
1231 | break; | |
1232 | case 15: | |
1233 | tmp = 0x10; | |
1234 | break; | |
1235 | case 16: | |
1236 | tmp = 0x30; | |
1237 | break; | |
1238 | case 24: | |
1239 | case 32: | |
1240 | tmp = 0xD0; | |
1241 | break; | |
1da177e4 LT |
1242 | } |
1243 | ||
10172ed6 KH |
1244 | t_inb(par, VGA_PEL_IW); |
1245 | t_inb(par, VGA_PEL_MSK); | |
1246 | t_inb(par, VGA_PEL_MSK); | |
1247 | t_inb(par, VGA_PEL_MSK); | |
1248 | t_inb(par, VGA_PEL_MSK); | |
1249 | t_outb(par, tmp, VGA_PEL_MSK); | |
1250 | t_inb(par, VGA_PEL_IW); | |
1da177e4 | 1251 | |
6eed8e1e | 1252 | if (par->flatpanel) |
306fa6f6 | 1253 | set_number_of_lines(par, info->var.yres); |
bcac2d5f KH |
1254 | info->fix.line_length = info->var.xres_virtual * bpp / 8; |
1255 | set_lwidth(par, info->fix.line_length / 8); | |
1da177e4 | 1256 | info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; |
245a2c2c | 1257 | info->cmap.len = (bpp == 8) ? 256 : 16; |
1da177e4 LT |
1258 | debug("exit\n"); |
1259 | return 0; | |
1260 | } | |
1261 | ||
1262 | /* Set one color register */ | |
1263 | static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, | |
245a2c2c KH |
1264 | unsigned blue, unsigned transp, |
1265 | struct fb_info *info) | |
1da177e4 LT |
1266 | { |
1267 | int bpp = info->var.bits_per_pixel; | |
306fa6f6 | 1268 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
1269 | |
1270 | if (regno >= info->cmap.len) | |
1271 | return 1; | |
1272 | ||
973d9ab2 | 1273 | if (bpp == 8) { |
10172ed6 KH |
1274 | t_outb(par, 0xFF, VGA_PEL_MSK); |
1275 | t_outb(par, regno, VGA_PEL_IW); | |
1da177e4 | 1276 | |
10172ed6 KH |
1277 | t_outb(par, red >> 10, VGA_PEL_D); |
1278 | t_outb(par, green >> 10, VGA_PEL_D); | |
1279 | t_outb(par, blue >> 10, VGA_PEL_D); | |
1da177e4 | 1280 | |
973d9ab2 AD |
1281 | } else if (regno < 16) { |
1282 | if (bpp == 16) { /* RGB 565 */ | |
1283 | u32 col; | |
1284 | ||
1285 | col = (red & 0xF800) | ((green & 0xFC00) >> 5) | | |
1286 | ((blue & 0xF800) >> 11); | |
1287 | col |= col << 16; | |
1288 | ((u32 *)(info->pseudo_palette))[regno] = col; | |
1289 | } else if (bpp == 32) /* ARGB 8888 */ | |
1290 | ((u32*)info->pseudo_palette)[regno] = | |
245a2c2c KH |
1291 | ((transp & 0xFF00) << 16) | |
1292 | ((red & 0xFF00) << 8) | | |
973d9ab2 | 1293 | ((green & 0xFF00)) | |
245a2c2c | 1294 | ((blue & 0xFF00) >> 8); |
973d9ab2 | 1295 | } |
1da177e4 | 1296 | |
245a2c2c | 1297 | /* debug("exit\n"); */ |
1da177e4 LT |
1298 | return 0; |
1299 | } | |
1300 | ||
1301 | /* Try blanking the screen.For flat panels it does nothing */ | |
1302 | static int tridentfb_blank(int blank_mode, struct fb_info *info) | |
1303 | { | |
245a2c2c | 1304 | unsigned char PMCont, DPMSCont; |
306fa6f6 | 1305 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
1306 | |
1307 | debug("enter\n"); | |
6eed8e1e | 1308 | if (par->flatpanel) |
1da177e4 | 1309 | return 0; |
306fa6f6 KH |
1310 | t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */ |
1311 | PMCont = t_inb(par, 0x83C6) & 0xFC; | |
1312 | DPMSCont = read3CE(par, PowerStatus) & 0xFC; | |
245a2c2c | 1313 | switch (blank_mode) { |
1da177e4 LT |
1314 | case FB_BLANK_UNBLANK: |
1315 | /* Screen: On, HSync: On, VSync: On */ | |
1316 | case FB_BLANK_NORMAL: | |
1317 | /* Screen: Off, HSync: On, VSync: On */ | |
1318 | PMCont |= 0x03; | |
1319 | DPMSCont |= 0x00; | |
1320 | break; | |
1321 | case FB_BLANK_HSYNC_SUSPEND: | |
1322 | /* Screen: Off, HSync: Off, VSync: On */ | |
1323 | PMCont |= 0x02; | |
1324 | DPMSCont |= 0x01; | |
1325 | break; | |
1326 | case FB_BLANK_VSYNC_SUSPEND: | |
1327 | /* Screen: Off, HSync: On, VSync: Off */ | |
1328 | PMCont |= 0x02; | |
1329 | DPMSCont |= 0x02; | |
1330 | break; | |
1331 | case FB_BLANK_POWERDOWN: | |
1332 | /* Screen: Off, HSync: Off, VSync: Off */ | |
1333 | PMCont |= 0x00; | |
1334 | DPMSCont |= 0x03; | |
1335 | break; | |
245a2c2c | 1336 | } |
1da177e4 | 1337 | |
306fa6f6 KH |
1338 | write3CE(par, PowerStatus, DPMSCont); |
1339 | t_outb(par, 4, 0x83C8); | |
1340 | t_outb(par, PMCont, 0x83C6); | |
1da177e4 LT |
1341 | |
1342 | debug("exit\n"); | |
1343 | ||
1344 | /* let fbcon do a softblank for us */ | |
1345 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; | |
1346 | } | |
1347 | ||
245a2c2c KH |
1348 | static struct fb_ops tridentfb_ops = { |
1349 | .owner = THIS_MODULE, | |
1350 | .fb_setcolreg = tridentfb_setcolreg, | |
1351 | .fb_pan_display = tridentfb_pan_display, | |
1352 | .fb_blank = tridentfb_blank, | |
1353 | .fb_check_var = tridentfb_check_var, | |
1354 | .fb_set_par = tridentfb_set_par, | |
bcac2d5f | 1355 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
245a2c2c KH |
1356 | .fb_fillrect = tridentfb_fillrect, |
1357 | .fb_copyarea = tridentfb_copyarea, | |
1358 | .fb_imageblit = cfb_imageblit, | |
bcac2d5f | 1359 | #endif |
245a2c2c KH |
1360 | }; |
1361 | ||
e09ed099 KH |
1362 | static int __devinit trident_pci_probe(struct pci_dev *dev, |
1363 | const struct pci_device_id *id) | |
1da177e4 LT |
1364 | { |
1365 | int err; | |
1366 | unsigned char revision; | |
e09ed099 KH |
1367 | struct fb_info *info; |
1368 | struct tridentfb_par *default_par; | |
122e8ad3 KH |
1369 | int defaultaccel; |
1370 | int chip3D; | |
1371 | int chip_id; | |
1da177e4 LT |
1372 | |
1373 | err = pci_enable_device(dev); | |
1374 | if (err) | |
1375 | return err; | |
1376 | ||
e09ed099 KH |
1377 | info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev); |
1378 | if (!info) | |
1379 | return -ENOMEM; | |
1380 | default_par = info->par; | |
1381 | ||
1da177e4 LT |
1382 | chip_id = id->device; |
1383 | ||
245a2c2c | 1384 | if (chip_id == CYBERBLADEi1) |
9fa68eae KP |
1385 | output("*** Please do use cyblafb, Cyberblade/i1 support " |
1386 | "will soon be removed from tridentfb!\n"); | |
1387 | ||
1388 | ||
1da177e4 | 1389 | /* If PCI id is 0x9660 then further detect chip type */ |
245a2c2c | 1390 | |
1da177e4 | 1391 | if (chip_id == TGUI9660) { |
10172ed6 | 1392 | revision = vga_io_rseq(RevisionID); |
245a2c2c | 1393 | |
1da177e4 | 1394 | switch (revision) { |
0e73a47f KH |
1395 | case 0x21: |
1396 | chip_id = PROVIDIA9685; | |
1397 | break; | |
245a2c2c KH |
1398 | case 0x22: |
1399 | case 0x23: | |
1400 | chip_id = CYBER9397; | |
1401 | break; | |
1402 | case 0x2A: | |
1403 | chip_id = CYBER9397DVD; | |
1404 | break; | |
1405 | case 0x30: | |
1406 | case 0x33: | |
1407 | case 0x34: | |
1408 | case 0x35: | |
1409 | case 0x38: | |
1410 | case 0x3A: | |
1411 | case 0xB3: | |
1412 | chip_id = CYBER9385; | |
1413 | break; | |
1414 | case 0x40 ... 0x43: | |
1415 | chip_id = CYBER9382; | |
1416 | break; | |
1417 | case 0x4A: | |
1418 | chip_id = CYBER9388; | |
1419 | break; | |
1420 | default: | |
1421 | break; | |
1da177e4 LT |
1422 | } |
1423 | } | |
1424 | ||
1425 | chip3D = is3Dchip(chip_id); | |
1da177e4 LT |
1426 | |
1427 | if (is_xp(chip_id)) { | |
d9cad04b KH |
1428 | default_par->init_accel = xp_init_accel; |
1429 | default_par->wait_engine = xp_wait_engine; | |
1430 | default_par->fill_rect = xp_fill_rect; | |
1431 | default_par->copy_rect = xp_copy_rect; | |
245a2c2c | 1432 | } else if (is_blade(chip_id)) { |
d9cad04b KH |
1433 | default_par->init_accel = blade_init_accel; |
1434 | default_par->wait_engine = blade_wait_engine; | |
1435 | default_par->fill_rect = blade_fill_rect; | |
1436 | default_par->copy_rect = blade_copy_rect; | |
bcac2d5f | 1437 | } else if (chip3D) { /* 3DImage family left */ |
d9cad04b KH |
1438 | default_par->init_accel = image_init_accel; |
1439 | default_par->wait_engine = image_wait_engine; | |
1440 | default_par->fill_rect = image_fill_rect; | |
1441 | default_par->copy_rect = image_copy_rect; | |
bcac2d5f KH |
1442 | } else { /* TGUI 9440/96XX family */ |
1443 | default_par->init_accel = tgui_init_accel; | |
1444 | default_par->wait_engine = xp_wait_engine; | |
1445 | default_par->fill_rect = tgui_fill_rect; | |
1446 | default_par->copy_rect = tgui_copy_rect; | |
1da177e4 LT |
1447 | } |
1448 | ||
122e8ad3 KH |
1449 | default_par->chip_id = chip_id; |
1450 | ||
1da177e4 LT |
1451 | /* acceleration is on by default for 3D chips */ |
1452 | defaultaccel = chip3D && !noaccel; | |
1453 | ||
1da177e4 | 1454 | /* setup MMIO region */ |
245a2c2c KH |
1455 | tridentfb_fix.mmio_start = pci_resource_start(dev, 1); |
1456 | tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000; | |
1da177e4 LT |
1457 | |
1458 | if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) { | |
1459 | debug("request_region failed!\n"); | |
3876ae8b | 1460 | framebuffer_release(info); |
1da177e4 LT |
1461 | return -1; |
1462 | } | |
1463 | ||
e09ed099 KH |
1464 | default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start, |
1465 | tridentfb_fix.mmio_len); | |
1da177e4 | 1466 | |
e09ed099 | 1467 | if (!default_par->io_virt) { |
1da177e4 | 1468 | debug("ioremap failed\n"); |
e8ed857c KH |
1469 | err = -1; |
1470 | goto out_unmap1; | |
1da177e4 LT |
1471 | } |
1472 | ||
bcac2d5f KH |
1473 | enable_mmio(); |
1474 | ||
1da177e4 | 1475 | /* setup framebuffer memory */ |
245a2c2c | 1476 | tridentfb_fix.smem_start = pci_resource_start(dev, 0); |
e09ed099 | 1477 | tridentfb_fix.smem_len = get_memsize(default_par); |
245a2c2c | 1478 | |
1da177e4 LT |
1479 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { |
1480 | debug("request_mem_region failed!\n"); | |
e09ed099 | 1481 | disable_mmio(info->par); |
a02f6402 | 1482 | err = -1; |
e8ed857c | 1483 | goto out_unmap1; |
1da177e4 LT |
1484 | } |
1485 | ||
e09ed099 KH |
1486 | info->screen_base = ioremap_nocache(tridentfb_fix.smem_start, |
1487 | tridentfb_fix.smem_len); | |
1da177e4 | 1488 | |
e09ed099 | 1489 | if (!info->screen_base) { |
1da177e4 | 1490 | debug("ioremap failed\n"); |
a02f6402 | 1491 | err = -1; |
e8ed857c | 1492 | goto out_unmap2; |
1da177e4 LT |
1493 | } |
1494 | ||
1495 | output("%s board found\n", pci_name(dev)); | |
6eed8e1e | 1496 | default_par->flatpanel = is_flatpanel(default_par); |
1da177e4 | 1497 | |
6eed8e1e | 1498 | if (default_par->flatpanel) |
e09ed099 | 1499 | nativex = get_nativex(default_par); |
1da177e4 | 1500 | |
e09ed099 KH |
1501 | info->fix = tridentfb_fix; |
1502 | info->fbops = &tridentfb_ops; | |
aa0aa8ab | 1503 | info->pseudo_palette = default_par->pseudo_pal; |
1da177e4 | 1504 | |
e09ed099 | 1505 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
1da177e4 | 1506 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
e09ed099 | 1507 | info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; |
1da177e4 | 1508 | #endif |
ea8ee55c | 1509 | if (!fb_find_mode(&info->var, info, |
07f41e45 | 1510 | mode_option, NULL, 0, NULL, bpp)) { |
a02f6402 | 1511 | err = -EINVAL; |
e8ed857c | 1512 | goto out_unmap2; |
a02f6402 | 1513 | } |
e09ed099 | 1514 | err = fb_alloc_cmap(&info->cmap, 256, 0); |
e8ed857c KH |
1515 | if (err < 0) |
1516 | goto out_unmap2; | |
1517 | ||
d9cad04b | 1518 | if (defaultaccel && default_par->init_accel) |
ea8ee55c | 1519 | info->var.accel_flags |= FB_ACCELF_TEXT; |
1da177e4 | 1520 | else |
ea8ee55c KH |
1521 | info->var.accel_flags &= ~FB_ACCELF_TEXT; |
1522 | info->var.activate |= FB_ACTIVATE_NOW; | |
e09ed099 KH |
1523 | info->device = &dev->dev; |
1524 | if (register_framebuffer(info) < 0) { | |
1da177e4 | 1525 | printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n"); |
e09ed099 | 1526 | fb_dealloc_cmap(&info->cmap); |
a02f6402 | 1527 | err = -EINVAL; |
e8ed857c | 1528 | goto out_unmap2; |
1da177e4 LT |
1529 | } |
1530 | output("fb%d: %s frame buffer device %dx%d-%dbpp\n", | |
ea8ee55c KH |
1531 | info->node, info->fix.id, info->var.xres, |
1532 | info->var.yres, info->var.bits_per_pixel); | |
e09ed099 KH |
1533 | |
1534 | pci_set_drvdata(dev, info); | |
1da177e4 | 1535 | return 0; |
a02f6402 | 1536 | |
e8ed857c | 1537 | out_unmap2: |
e09ed099 KH |
1538 | if (info->screen_base) |
1539 | iounmap(info->screen_base); | |
e8ed857c | 1540 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
e09ed099 | 1541 | disable_mmio(info->par); |
e8ed857c | 1542 | out_unmap1: |
e09ed099 KH |
1543 | if (default_par->io_virt) |
1544 | iounmap(default_par->io_virt); | |
e8ed857c | 1545 | release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
e09ed099 | 1546 | framebuffer_release(info); |
a02f6402 | 1547 | return err; |
1da177e4 LT |
1548 | } |
1549 | ||
245a2c2c | 1550 | static void __devexit trident_pci_remove(struct pci_dev *dev) |
1da177e4 | 1551 | { |
e09ed099 KH |
1552 | struct fb_info *info = pci_get_drvdata(dev); |
1553 | struct tridentfb_par *par = info->par; | |
1554 | ||
1555 | unregister_framebuffer(info); | |
1da177e4 | 1556 | iounmap(par->io_virt); |
e09ed099 | 1557 | iounmap(info->screen_base); |
1da177e4 | 1558 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
e8ed857c | 1559 | release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
e09ed099 KH |
1560 | pci_set_drvdata(dev, NULL); |
1561 | framebuffer_release(info); | |
1da177e4 LT |
1562 | } |
1563 | ||
1564 | /* List of boards that we are trying to support */ | |
1565 | static struct pci_device_id trident_devices[] = { | |
245a2c2c KH |
1566 | {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1567 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1568 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1569 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1570 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1571 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1572 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1573 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
a0d92256 | 1574 | {PCI_VENDOR_ID_TRIDENT, TGUI9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
245a2c2c KH |
1575 | {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1576 | {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1577 | {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1578 | {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1579 | {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1580 | {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1581 | {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1582 | {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1583 | {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1584 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1585 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1586 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1da177e4 | 1587 | {0,} |
245a2c2c KH |
1588 | }; |
1589 | ||
1590 | MODULE_DEVICE_TABLE(pci, trident_devices); | |
1da177e4 LT |
1591 | |
1592 | static struct pci_driver tridentfb_pci_driver = { | |
245a2c2c KH |
1593 | .name = "tridentfb", |
1594 | .id_table = trident_devices, | |
1595 | .probe = trident_pci_probe, | |
1596 | .remove = __devexit_p(trident_pci_remove) | |
1da177e4 LT |
1597 | }; |
1598 | ||
1599 | /* | |
1600 | * Parse user specified options (`video=trident:') | |
1601 | * example: | |
245a2c2c | 1602 | * video=trident:800x600,bpp=16,noaccel |
1da177e4 LT |
1603 | */ |
1604 | #ifndef MODULE | |
07f41e45 | 1605 | static int __init tridentfb_setup(char *options) |
1da177e4 | 1606 | { |
245a2c2c | 1607 | char *opt; |
1da177e4 LT |
1608 | if (!options || !*options) |
1609 | return 0; | |
245a2c2c KH |
1610 | while ((opt = strsep(&options, ",")) != NULL) { |
1611 | if (!*opt) | |
1612 | continue; | |
1613 | if (!strncmp(opt, "noaccel", 7)) | |
1da177e4 | 1614 | noaccel = 1; |
245a2c2c | 1615 | else if (!strncmp(opt, "fp", 2)) |
6eed8e1e | 1616 | fp = 1; |
245a2c2c | 1617 | else if (!strncmp(opt, "crt", 3)) |
6eed8e1e | 1618 | fp = 0; |
245a2c2c KH |
1619 | else if (!strncmp(opt, "bpp=", 4)) |
1620 | bpp = simple_strtoul(opt + 4, NULL, 0); | |
1621 | else if (!strncmp(opt, "center", 6)) | |
1da177e4 | 1622 | center = 1; |
245a2c2c | 1623 | else if (!strncmp(opt, "stretch", 7)) |
1da177e4 | 1624 | stretch = 1; |
245a2c2c KH |
1625 | else if (!strncmp(opt, "memsize=", 8)) |
1626 | memsize = simple_strtoul(opt + 8, NULL, 0); | |
1627 | else if (!strncmp(opt, "memdiff=", 8)) | |
1628 | memdiff = simple_strtoul(opt + 8, NULL, 0); | |
1629 | else if (!strncmp(opt, "nativex=", 8)) | |
1630 | nativex = simple_strtoul(opt + 8, NULL, 0); | |
1da177e4 | 1631 | else |
07f41e45 | 1632 | mode_option = opt; |
1da177e4 LT |
1633 | } |
1634 | return 0; | |
1635 | } | |
1636 | #endif | |
1637 | ||
1638 | static int __init tridentfb_init(void) | |
1639 | { | |
1640 | #ifndef MODULE | |
1641 | char *option = NULL; | |
1642 | ||
1643 | if (fb_get_options("tridentfb", &option)) | |
1644 | return -ENODEV; | |
1645 | tridentfb_setup(option); | |
1646 | #endif | |
1647 | output("Trident framebuffer %s initializing\n", VERSION); | |
1648 | return pci_register_driver(&tridentfb_pci_driver); | |
1649 | } | |
1650 | ||
1651 | static void __exit tridentfb_exit(void) | |
1652 | { | |
1653 | pci_unregister_driver(&tridentfb_pci_driver); | |
1654 | } | |
1655 | ||
1da177e4 LT |
1656 | module_init(tridentfb_init); |
1657 | module_exit(tridentfb_exit); | |
1658 | ||
1659 | MODULE_AUTHOR("Jani Monoses <jani@iv.ro>"); | |
1660 | MODULE_DESCRIPTION("Framebuffer driver for Trident cards"); | |
1661 | MODULE_LICENSE("GPL"); | |
1662 |