Commit | Line | Data |
---|---|---|
9f291634 | 1 | /* |
277d32a3 | 2 | * Copyright 1998-2009 VIA Technologies, Inc. All Rights Reserved. |
9f291634 JC |
3 | * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. |
4 | ||
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public | |
7 | * License as published by the Free Software Foundation; | |
8 | * either version 2, or (at your option) any later version. | |
9 | ||
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even | |
12 | * the implied warranty of MERCHANTABILITY or FITNESS FOR | |
13 | * A PARTICULAR PURPOSE.See the GNU General Public License | |
14 | * for more details. | |
15 | ||
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., | |
19 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
20 | */ | |
21 | ||
24b4d82e JC |
22 | #include "via-core.h" |
23 | #include "via_i2c.h" | |
9f291634 JC |
24 | #include "global.h" |
25 | ||
f045f77b JC |
26 | /* |
27 | * There can only be one set of these, so there's no point in having | |
28 | * them be dynamically allocated... | |
29 | */ | |
30 | #define VIAFB_NUM_I2C 5 | |
31 | static struct via_i2c_stuff via_i2c_par[VIAFB_NUM_I2C]; | |
32 | ||
9f291634 JC |
33 | static void via_i2c_setscl(void *data, int state) |
34 | { | |
35 | u8 val; | |
f045f77b | 36 | struct via_port_cfg *adap_data = data; |
9f291634 | 37 | |
277d32a3 HW |
38 | val = viafb_read_reg(adap_data->io_port, |
39 | adap_data->ioport_index) & 0xF0; | |
9f291634 JC |
40 | if (state) |
41 | val |= 0x20; | |
42 | else | |
43 | val &= ~0x20; | |
277d32a3 | 44 | switch (adap_data->type) { |
f045f77b | 45 | case VIA_PORT_I2C: |
9f291634 JC |
46 | val |= 0x01; |
47 | break; | |
f045f77b | 48 | case VIA_PORT_GPIO: |
9f291634 JC |
49 | val |= 0x80; |
50 | break; | |
51 | default: | |
277d32a3 | 52 | DEBUG_MSG("viafb_i2c: specify wrong i2c type.\n"); |
9f291634 | 53 | } |
277d32a3 HW |
54 | viafb_write_reg(adap_data->ioport_index, |
55 | adap_data->io_port, val); | |
9f291634 JC |
56 | } |
57 | ||
58 | static int via_i2c_getscl(void *data) | |
59 | { | |
f045f77b | 60 | struct via_port_cfg *adap_data = data; |
9f291634 | 61 | |
277d32a3 | 62 | if (viafb_read_reg(adap_data->io_port, adap_data->ioport_index) & 0x08) |
9f291634 JC |
63 | return 1; |
64 | return 0; | |
65 | } | |
66 | ||
67 | static int via_i2c_getsda(void *data) | |
68 | { | |
f045f77b | 69 | struct via_port_cfg *adap_data = data; |
9f291634 | 70 | |
277d32a3 | 71 | if (viafb_read_reg(adap_data->io_port, adap_data->ioport_index) & 0x04) |
9f291634 JC |
72 | return 1; |
73 | return 0; | |
74 | } | |
75 | ||
76 | static void via_i2c_setsda(void *data, int state) | |
77 | { | |
78 | u8 val; | |
f045f77b | 79 | struct via_port_cfg *adap_data = data; |
9f291634 | 80 | |
277d32a3 HW |
81 | val = viafb_read_reg(adap_data->io_port, |
82 | adap_data->ioport_index) & 0xF0; | |
9f291634 JC |
83 | if (state) |
84 | val |= 0x10; | |
85 | else | |
86 | val &= ~0x10; | |
277d32a3 | 87 | switch (adap_data->type) { |
f045f77b | 88 | case VIA_PORT_I2C: |
9f291634 JC |
89 | val |= 0x01; |
90 | break; | |
f045f77b | 91 | case VIA_PORT_GPIO: |
9f291634 JC |
92 | val |= 0x40; |
93 | break; | |
94 | default: | |
277d32a3 | 95 | DEBUG_MSG("viafb_i2c: specify wrong i2c type.\n"); |
9f291634 | 96 | } |
277d32a3 HW |
97 | viafb_write_reg(adap_data->ioport_index, |
98 | adap_data->io_port, val); | |
9f291634 JC |
99 | } |
100 | ||
277d32a3 | 101 | int viafb_i2c_readbyte(u8 adap, u8 slave_addr, u8 index, u8 *pdata) |
9f291634 JC |
102 | { |
103 | u8 mm1[] = {0x00}; | |
104 | struct i2c_msg msgs[2]; | |
105 | ||
106 | *pdata = 0; | |
107 | msgs[0].flags = 0; | |
108 | msgs[1].flags = I2C_M_RD; | |
109 | msgs[0].addr = msgs[1].addr = slave_addr / 2; | |
110 | mm1[0] = index; | |
111 | msgs[0].len = 1; msgs[1].len = 1; | |
112 | msgs[0].buf = mm1; msgs[1].buf = pdata; | |
f045f77b | 113 | return i2c_transfer(&via_i2c_par[adap].adapter, msgs, 2); |
9f291634 JC |
114 | } |
115 | ||
277d32a3 | 116 | int viafb_i2c_writebyte(u8 adap, u8 slave_addr, u8 index, u8 data) |
9f291634 JC |
117 | { |
118 | u8 msg[2] = { index, data }; | |
119 | struct i2c_msg msgs; | |
120 | ||
121 | msgs.flags = 0; | |
122 | msgs.addr = slave_addr / 2; | |
123 | msgs.len = 2; | |
124 | msgs.buf = msg; | |
f045f77b | 125 | return i2c_transfer(&via_i2c_par[adap].adapter, &msgs, 1); |
9f291634 JC |
126 | } |
127 | ||
277d32a3 | 128 | int viafb_i2c_readbytes(u8 adap, u8 slave_addr, u8 index, u8 *buff, int buff_len) |
9f291634 JC |
129 | { |
130 | u8 mm1[] = {0x00}; | |
131 | struct i2c_msg msgs[2]; | |
132 | ||
133 | msgs[0].flags = 0; | |
134 | msgs[1].flags = I2C_M_RD; | |
135 | msgs[0].addr = msgs[1].addr = slave_addr / 2; | |
136 | mm1[0] = index; | |
137 | msgs[0].len = 1; msgs[1].len = buff_len; | |
138 | msgs[0].buf = mm1; msgs[1].buf = buff; | |
f045f77b | 139 | return i2c_transfer(&via_i2c_par[adap].adapter, msgs, 2); |
9f291634 JC |
140 | } |
141 | ||
277d32a3 HW |
142 | static int create_i2c_bus(struct i2c_adapter *adapter, |
143 | struct i2c_algo_bit_data *algo, | |
f045f77b | 144 | struct via_port_cfg *adap_cfg, |
277d32a3 | 145 | struct pci_dev *pdev) |
9f291634 | 146 | { |
c774c13d | 147 | DEBUG_MSG(KERN_DEBUG "viafb: creating bus adap=0x%p, algo_bit_data=0x%p, adap_cfg=0x%p\n", adapter, algo, adap_cfg); |
277d32a3 HW |
148 | |
149 | algo->setsda = via_i2c_setsda; | |
150 | algo->setscl = via_i2c_setscl; | |
151 | algo->getsda = via_i2c_getsda; | |
152 | algo->getscl = via_i2c_getscl; | |
153 | algo->udelay = 40; | |
154 | algo->timeout = 20; | |
155 | algo->data = adap_cfg; | |
156 | ||
157 | sprintf(adapter->name, "viafb i2c io_port idx 0x%02x", | |
158 | adap_cfg->ioport_index); | |
159 | adapter->owner = THIS_MODULE; | |
160 | adapter->id = 0x01FFFF; | |
161 | adapter->class = I2C_CLASS_DDC; | |
162 | adapter->algo_data = algo; | |
163 | if (pdev) | |
164 | adapter->dev.parent = &pdev->dev; | |
165 | else | |
166 | adapter->dev.parent = NULL; | |
167 | /* i2c_set_adapdata(adapter, adap_cfg); */ | |
9f291634 JC |
168 | |
169 | /* Raise SCL and SDA */ | |
277d32a3 HW |
170 | via_i2c_setsda(adap_cfg, 1); |
171 | via_i2c_setscl(adap_cfg, 1); | |
9f291634 JC |
172 | udelay(20); |
173 | ||
277d32a3 HW |
174 | return i2c_bit_add_bus(adapter); |
175 | } | |
176 | ||
f045f77b | 177 | int viafb_create_i2c_busses(struct via_port_cfg *configs) |
277d32a3 HW |
178 | { |
179 | int i, ret; | |
180 | ||
f045f77b JC |
181 | for (i = 0; i < VIAFB_NUM_PORTS; i++) { |
182 | struct via_port_cfg *adap_cfg = configs++; | |
183 | struct via_i2c_stuff *i2c_stuff = &via_i2c_par[i]; | |
277d32a3 | 184 | |
f045f77b | 185 | if (adap_cfg->type == 0 || adap_cfg->mode != VIA_MODE_I2C) |
4da62e6c | 186 | continue; |
277d32a3 HW |
187 | |
188 | ret = create_i2c_bus(&i2c_stuff->adapter, | |
189 | &i2c_stuff->algo, adap_cfg, | |
190 | NULL); /* FIXME: PCIDEV */ | |
191 | if (ret < 0) { | |
192 | printk(KERN_ERR "viafb: cannot create i2c bus %u:%d\n", | |
193 | i, ret); | |
194 | /* FIXME: properly release previous busses */ | |
195 | return ret; | |
196 | } | |
197 | } | |
198 | ||
199 | return 0; | |
9f291634 JC |
200 | } |
201 | ||
f045f77b | 202 | void viafb_delete_i2c_busses(void) |
9f291634 | 203 | { |
277d32a3 HW |
204 | int i; |
205 | ||
f045f77b JC |
206 | for (i = 0; i < VIAFB_NUM_PORTS; i++) { |
207 | struct via_i2c_stuff *i2c_stuff = &via_i2c_par[i]; | |
208 | /* | |
209 | * Only remove those entries in the array that we've | |
210 | * actually used (and thus initialized algo_data) | |
211 | */ | |
277d32a3 HW |
212 | if (i2c_stuff->adapter.algo_data == &i2c_stuff->algo) |
213 | i2c_del_adapter(&i2c_stuff->adapter); | |
214 | } | |
9f291634 | 215 | } |