Commit | Line | Data |
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eaa595cb | 1 | /* |
e7b39145 | 2 | * drivers/watchdog/at91sam9_wdt.h |
eaa595cb | 3 | * |
3d73e893 AV |
4 | * Copyright (C) 2007 Andrew Victor |
5 | * Copyright (C) 2007 Atmel Corporation. | |
6 | * | |
eaa595cb AV |
7 | * Watchdog Timer (WDT) - System peripherals regsters. |
8 | * Based on AT91SAM9261 datasheet revision D. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | */ | |
15 | ||
16 | #ifndef AT91_WDT_H | |
17 | #define AT91_WDT_H | |
18 | ||
c1c30a29 | 19 | #define AT91_WDT_CR 0x00 /* Watchdog Control Register */ |
eaa595cb | 20 | #define AT91_WDT_WDRSTT (1 << 0) /* Restart */ |
0e5f82dd | 21 | #define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ |
eaa595cb | 22 | |
c1c30a29 | 23 | #define AT91_WDT_MR 0x04 /* Watchdog Mode Register */ |
eaa595cb | 24 | #define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ |
76534860 | 25 | #define AT91_WDT_SET_WDV(x) ((x) & AT91_WDT_WDV) |
eaa595cb AV |
26 | #define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ |
27 | #define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ | |
28 | #define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */ | |
29 | #define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */ | |
30 | #define AT91_WDT_WDD (0xfff << 16) /* Delta Value */ | |
76534860 | 31 | #define AT91_WDT_SET_WDD(x) (((x) << 16) & AT91_WDT_WDD) |
eaa595cb AV |
32 | #define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ |
33 | #define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ | |
34 | ||
c1c30a29 | 35 | #define AT91_WDT_SR 0x08 /* Watchdog Status Register */ |
eaa595cb AV |
36 | #define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ |
37 | #define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ | |
38 | ||
39 | #endif |