Commit | Line | Data |
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a2f40ccd | 1 | /* |
a2f40ccd KG |
2 | * Watchdog timer for PowerPC Book-E systems |
3 | * | |
4 | * Author: Matthew McClintock | |
4c8d3d99 | 5 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> |
a2f40ccd | 6 | * |
fbdd7144 | 7 | * Copyright 2005, 2008, 2010 Freescale Semiconductor Inc. |
a2f40ccd KG |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
a2f40ccd KG |
15 | #include <linux/module.h> |
16 | #include <linux/fs.h> | |
f172ddc6 | 17 | #include <linux/smp.h> |
a2f40ccd KG |
18 | #include <linux/miscdevice.h> |
19 | #include <linux/notifier.h> | |
20 | #include <linux/watchdog.h> | |
00e9c205 | 21 | #include <linux/uaccess.h> |
a2f40ccd KG |
22 | |
23 | #include <asm/reg_booke.h> | |
39cdc4bf | 24 | #include <asm/system.h> |
dcfb7484 CF |
25 | #include <asm/time.h> |
26 | #include <asm/div64.h> | |
a2f40ccd | 27 | |
40ebbcbf | 28 | /* If the kernel parameter wdt=1, the watchdog will be enabled at boot. |
a2f40ccd KG |
29 | * Also, the wdt_period sets the watchdog timer period timeout. |
30 | * For E500 cpus the wdt_period sets which bit changing from 0->1 will | |
31 | * trigger a watchog timeout. This watchdog timeout will occur 3 times, the | |
32 | * first time nothing will happen, the second time a watchdog exception will | |
33 | * occur, and the final time the board will reset. | |
34 | */ | |
35 | ||
f172ddc6 | 36 | u32 booke_wdt_enabled; |
e0dc09ff | 37 | u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT; |
a2f40ccd KG |
38 | |
39 | #ifdef CONFIG_FSL_BOOKE | |
dcfb7484 | 40 | #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15)) |
0fb06571 | 41 | #define WDTP_MASK (WDTP(0x3f)) |
a2f40ccd KG |
42 | #else |
43 | #define WDTP(x) (TCR_WP(x)) | |
0a0e9e0c | 44 | #define WDTP_MASK (TCR_WP_MASK) |
a2f40ccd KG |
45 | #endif |
46 | ||
f172ddc6 CG |
47 | static DEFINE_SPINLOCK(booke_wdt_lock); |
48 | ||
dcfb7484 CF |
49 | /* For the specified period, determine the number of seconds |
50 | * corresponding to the reset time. There will be a watchdog | |
51 | * exception at approximately 3/5 of this time. | |
52 | * | |
53 | * The formula to calculate this is given by: | |
54 | * 2.5 * (2^(63-period+1)) / timebase_freq | |
55 | * | |
56 | * In order to simplify things, we assume that period is | |
57 | * at least 1. This will still result in a very long timeout. | |
58 | */ | |
59 | static unsigned long long period_to_sec(unsigned int period) | |
60 | { | |
61 | unsigned long long tmp = 1ULL << (64 - period); | |
62 | unsigned long tmp2 = ppc_tb_freq; | |
63 | ||
64 | /* tmp may be a very large number and we don't want to overflow, | |
65 | * so divide the timebase freq instead of multiplying tmp | |
66 | */ | |
67 | tmp2 = tmp2 / 5 * 2; | |
68 | ||
69 | do_div(tmp, tmp2); | |
70 | return tmp; | |
71 | } | |
72 | ||
73 | /* | |
74 | * This procedure will find the highest period which will give a timeout | |
75 | * greater than the one required. e.g. for a bus speed of 66666666 and | |
76 | * and a parameter of 2 secs, then this procedure will return a value of 38. | |
77 | */ | |
78 | static unsigned int sec_to_period(unsigned int secs) | |
79 | { | |
80 | unsigned int period; | |
81 | for (period = 63; period > 0; period--) { | |
82 | if (period_to_sec(period) >= secs) | |
83 | return period; | |
84 | } | |
85 | return 0; | |
86 | } | |
87 | ||
f172ddc6 | 88 | static void __booke_wdt_ping(void *data) |
f31909c0 SR |
89 | { |
90 | mtspr(SPRN_TSR, TSR_ENW|TSR_WIS); | |
91 | } | |
92 | ||
f172ddc6 CG |
93 | static void booke_wdt_ping(void) |
94 | { | |
f6f88e9b | 95 | on_each_cpu(__booke_wdt_ping, NULL, 0); |
f172ddc6 CG |
96 | } |
97 | ||
98 | static void __booke_wdt_enable(void *data) | |
a2f40ccd KG |
99 | { |
100 | u32 val; | |
101 | ||
f31909c0 | 102 | /* clear status before enabling watchdog */ |
f172ddc6 | 103 | __booke_wdt_ping(NULL); |
a2f40ccd | 104 | val = mfspr(SPRN_TCR); |
0a0e9e0c | 105 | val &= ~WDTP_MASK; |
39cdc4bf | 106 | val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period)); |
a2f40ccd KG |
107 | |
108 | mtspr(SPRN_TCR, val); | |
109 | } | |
110 | ||
fbdd7144 TT |
111 | /** |
112 | * booke_wdt_disable - disable the watchdog on the given CPU | |
113 | * | |
114 | * This function is called on each CPU. It disables the watchdog on that CPU. | |
115 | * | |
116 | * TCR[WRC] cannot be changed once it has been set to non-zero, but we can | |
117 | * effectively disable the watchdog by setting its period to the maximum value. | |
118 | */ | |
119 | static void __booke_wdt_disable(void *data) | |
120 | { | |
121 | u32 val; | |
122 | ||
123 | val = mfspr(SPRN_TCR); | |
124 | val &= ~(TCR_WIE | WDTP_MASK); | |
125 | mtspr(SPRN_TCR, val); | |
126 | ||
127 | /* clear status to make sure nothing is pending */ | |
128 | __booke_wdt_ping(NULL); | |
129 | ||
130 | } | |
131 | ||
f172ddc6 | 132 | static ssize_t booke_wdt_write(struct file *file, const char __user *buf, |
a2f40ccd KG |
133 | size_t count, loff_t *ppos) |
134 | { | |
135 | booke_wdt_ping(); | |
136 | return count; | |
137 | } | |
138 | ||
d8d8b63b | 139 | static struct watchdog_info ident = { |
f172ddc6 CG |
140 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, |
141 | .identity = "PowerPC Book-E Watchdog", | |
a2f40ccd KG |
142 | }; |
143 | ||
00e9c205 AC |
144 | static long booke_wdt_ioctl(struct file *file, |
145 | unsigned int cmd, unsigned long arg) | |
a2f40ccd KG |
146 | { |
147 | u32 tmp = 0; | |
538bacf8 | 148 | u32 __user *p = (u32 __user *)arg; |
a2f40ccd KG |
149 | |
150 | switch (cmd) { | |
151 | case WDIOC_GETSUPPORT: | |
dcfb7484 | 152 | if (copy_to_user((void *)arg, &ident, sizeof(ident))) |
a2f40ccd KG |
153 | return -EFAULT; |
154 | case WDIOC_GETSTATUS: | |
8b18085a | 155 | return put_user(0, p); |
a2f40ccd KG |
156 | case WDIOC_GETBOOTSTATUS: |
157 | /* XXX: something is clearing TSR */ | |
158 | tmp = mfspr(SPRN_TSR) & TSR_WRS(3); | |
8b18085a WVS |
159 | /* returns CARDRESET if last reset was caused by the WDT */ |
160 | return (tmp ? WDIOF_CARDRESET : 0); | |
0c06090c WVS |
161 | case WDIOC_SETOPTIONS: |
162 | if (get_user(tmp, p)) | |
163 | return -EINVAL; | |
164 | if (tmp == WDIOS_ENABLECARD) { | |
165 | booke_wdt_ping(); | |
166 | break; | |
167 | } else | |
168 | return -EINVAL; | |
169 | return 0; | |
a2f40ccd KG |
170 | case WDIOC_KEEPALIVE: |
171 | booke_wdt_ping(); | |
172 | return 0; | |
173 | case WDIOC_SETTIMEOUT: | |
dcfb7484 | 174 | if (get_user(tmp, p)) |
a2f40ccd | 175 | return -EFAULT; |
dcfb7484 CF |
176 | #ifdef CONFIG_FSL_BOOKE |
177 | /* period of 1 gives the largest possible timeout */ | |
178 | if (tmp > period_to_sec(1)) | |
179 | return -EINVAL; | |
180 | booke_wdt_period = sec_to_period(tmp); | |
181 | #else | |
182 | booke_wdt_period = tmp; | |
183 | #endif | |
0a0e9e0c | 184 | mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) | |
00e9c205 | 185 | WDTP(booke_wdt_period)); |
a2f40ccd KG |
186 | return 0; |
187 | case WDIOC_GETTIMEOUT: | |
538bacf8 | 188 | return put_user(booke_wdt_period, p); |
a2f40ccd | 189 | default: |
795b89d2 | 190 | return -ENOTTY; |
a2f40ccd KG |
191 | } |
192 | ||
193 | return 0; | |
194 | } | |
f172ddc6 CG |
195 | |
196 | static int booke_wdt_open(struct inode *inode, struct file *file) | |
a2f40ccd | 197 | { |
f172ddc6 | 198 | spin_lock(&booke_wdt_lock); |
39cdc4bf KG |
199 | if (booke_wdt_enabled == 0) { |
200 | booke_wdt_enabled = 1; | |
f6f88e9b | 201 | on_each_cpu(__booke_wdt_enable, NULL, 0); |
00e9c205 AC |
202 | printk(KERN_INFO |
203 | "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n", | |
204 | booke_wdt_period); | |
a2f40ccd | 205 | } |
f172ddc6 | 206 | spin_unlock(&booke_wdt_lock); |
a2f40ccd | 207 | |
ec9505a7 | 208 | return nonseekable_open(inode, file); |
a2f40ccd KG |
209 | } |
210 | ||
fbdd7144 TT |
211 | static int booke_wdt_release(struct inode *inode, struct file *file) |
212 | { | |
213 | on_each_cpu(__booke_wdt_disable, NULL, 0); | |
214 | booke_wdt_enabled = 0; | |
215 | ||
216 | return 0; | |
217 | } | |
218 | ||
62322d25 | 219 | static const struct file_operations booke_wdt_fops = { |
f172ddc6 CG |
220 | .owner = THIS_MODULE, |
221 | .llseek = no_llseek, | |
222 | .write = booke_wdt_write, | |
00e9c205 | 223 | .unlocked_ioctl = booke_wdt_ioctl, |
f172ddc6 | 224 | .open = booke_wdt_open, |
fbdd7144 | 225 | .release = booke_wdt_release, |
a2f40ccd KG |
226 | }; |
227 | ||
228 | static struct miscdevice booke_wdt_miscdev = { | |
f172ddc6 CG |
229 | .minor = WATCHDOG_MINOR, |
230 | .name = "watchdog", | |
231 | .fops = &booke_wdt_fops, | |
a2f40ccd KG |
232 | }; |
233 | ||
234 | static void __exit booke_wdt_exit(void) | |
235 | { | |
236 | misc_deregister(&booke_wdt_miscdev); | |
237 | } | |
238 | ||
a2f40ccd KG |
239 | static int __init booke_wdt_init(void) |
240 | { | |
241 | int ret = 0; | |
242 | ||
f172ddc6 | 243 | printk(KERN_INFO "PowerPC Book-E Watchdog Timer Loaded\n"); |
a78719c3 | 244 | ident.firmware_version = cur_cpu_spec->pvr_value; |
a2f40ccd KG |
245 | |
246 | ret = misc_register(&booke_wdt_miscdev); | |
247 | if (ret) { | |
f172ddc6 | 248 | printk(KERN_CRIT "Cannot register miscdev on minor=%d: %d\n", |
a2f40ccd KG |
249 | WATCHDOG_MINOR, ret); |
250 | return ret; | |
251 | } | |
252 | ||
f172ddc6 | 253 | spin_lock(&booke_wdt_lock); |
39cdc4bf | 254 | if (booke_wdt_enabled == 1) { |
00e9c205 AC |
255 | printk(KERN_INFO |
256 | "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n", | |
257 | booke_wdt_period); | |
f6f88e9b | 258 | on_each_cpu(__booke_wdt_enable, NULL, 0); |
a2f40ccd | 259 | } |
f172ddc6 | 260 | spin_unlock(&booke_wdt_lock); |
a2f40ccd KG |
261 | |
262 | return ret; | |
263 | } | |
fbdd7144 TT |
264 | |
265 | module_init(booke_wdt_init); | |
266 | module_exit(booke_wdt_exit); | |
267 | ||
268 | MODULE_DESCRIPTION("PowerPC Book-E watchdog driver"); | |
269 | MODULE_LICENSE("GPL"); |