[deliverable/linux.git] / drivers / watchdog / davinci_wdt.c

/*
 * drivers/char/watchdog/davinci_wdt.c
 *
 * Watchdog driver for DaVinci DM644x/DM646x processors
 *
 * Copyright (C) 2006 Texas Instruments.
 *
 * 2007 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/init.h>
#include <linux/bitops.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/uaccess.h>
#include <linux/io.h>

#include <asm/hardware.h>

#define MODULE_NAME "DAVINCI-WDT: "

#define DEFAULT_HEARTBEAT 60
#define MAX_HEARTBEAT     600	/* really the max margin is 264/27MHz*/

/* Timer register set definition */
#define PID12	(0x0)
#define EMUMGT	(0x4)
#define TIM12	(0x10)
#define TIM34	(0x14)
#define PRD12	(0x18)
#define PRD34	(0x1C)
#define TCR	(0x20)
#define TGCR	(0x24)
#define WDTCR	(0x28)

/* TCR bit definitions */
#define ENAMODE12_DISABLED	(0 << 6)
#define ENAMODE12_ONESHOT	(1 << 6)
#define ENAMODE12_PERIODIC	(2 << 6)

/* TGCR bit definitions */
#define TIM12RS_UNRESET		(1 << 0)
#define TIM34RS_UNRESET		(1 << 1)
#define TIMMODE_64BIT_WDOG      (2 << 2)

/* WDTCR bit definitions */
#define WDEN			(1 << 14)
#define WDFLAG			(1 << 15)
#define WDKEY_SEQ0		(0xa5c6 << 16)
#define WDKEY_SEQ1		(0xda7e << 16)

static int heartbeat = DEFAULT_HEARTBEAT;

static DEFINE_SPINLOCK(io_lock);
static unsigned long wdt_status;
#define WDT_IN_USE        0
#define WDT_OK_TO_CLOSE   1
#define WDT_REGION_INITED 2
#define WDT_DEVICE_INITED 3

static struct resource	*wdt_mem;
static void __iomem	*wdt_base;

static void wdt_service(void)
{
	spin_lock(&io_lock);

	/* put watchdog in service state */
	davinci_writel(WDKEY_SEQ0, wdt_base + WDTCR);
	/* put watchdog in active state */
	davinci_writel(WDKEY_SEQ1, wdt_base + WDTCR);

	spin_unlock(&io_lock);
}

static void wdt_enable(void)
{
	u32 tgcr;
	u32 timer_margin;

	spin_lock(&io_lock);

	/* disable, internal clock source */
	davinci_writel(0, wdt_base + TCR);
	/* reset timer, set mode to 64-bit watchdog, and unreset */
	davinci_writel(0, wdt_base + TGCR);
	tgcr = TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET;
	davinci_writel(tgcr, wdt_base + TGCR);
	/* clear counter regs */
	davinci_writel(0, wdt_base + TIM12);
	davinci_writel(0, wdt_base + TIM34);
	/* set timeout period */
	timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff);
	davinci_writel(timer_margin, wdt_base + PRD12);
	timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32);
	davinci_writel(timer_margin, wdt_base + PRD34);
	/* enable run continuously */
	davinci_writel(ENAMODE12_PERIODIC, wdt_base + TCR);
	/* Once the WDT is in pre-active state write to
	 * TIM12, TIM34, PRD12, PRD34, TCR, TGCR, WDTCR are
	 * write protected (except for the WDKEY field)
	 */
	/* put watchdog in pre-active state */
	davinci_writel(WDKEY_SEQ0 | WDEN, wdt_base + WDTCR);
	/* put watchdog in active state */
	davinci_writel(WDKEY_SEQ1 | WDEN, wdt_base + WDTCR);

	spin_unlock(&io_lock);
}

static int davinci_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(WDT_IN_USE, &wdt_status))
		return -EBUSY;

	wdt_enable();

	return nonseekable_open(inode, file);
}

static ssize_t
davinci_wdt_write(struct file *file, const char *data, size_t len,
		  loff_t *ppos)
{
	if (len)
		wdt_service();

	return len;
}

static struct watchdog_info ident = {
	.options = WDIOF_KEEPALIVEPING,
	.identity = "DaVinci Watchdog",
};

static long davinci_wdt_ioctl(struct file *file,
					unsigned int cmd, unsigned long arg)
{
	int ret = -ENOTTY;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		ret = copy_to_user((struct watchdog_info *)arg, &ident,
				   sizeof(ident)) ? -EFAULT : 0;
		break;

	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		ret = put_user(0, (int *)arg);
		break;

	case WDIOC_KEEPALIVE:
		wdt_service();
		ret = 0;
		break;

	case WDIOC_GETTIMEOUT:
		ret = put_user(heartbeat, (int *)arg);
		break;
	}
	return ret;
}

static int davinci_wdt_release(struct inode *inode, struct file *file)
{
	wdt_service();
	clear_bit(WDT_IN_USE, &wdt_status);

	return 0;
}

static const struct file_operations davinci_wdt_fops = {
	.owner = THIS_MODULE,
	.llseek = no_llseek,
	.write = davinci_wdt_write,
	.unlocked_ioctl = davinci_wdt_ioctl,
	.open = davinci_wdt_open,
	.release = davinci_wdt_release,
};

static struct miscdevice davinci_wdt_miscdev = {
	.minor = WATCHDOG_MINOR,
	.name = "watchdog",
	.fops = &davinci_wdt_fops,
};

static int davinci_wdt_probe(struct platform_device *pdev)
{
	int ret = 0, size;
	struct resource *res;

	if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
		heartbeat = DEFAULT_HEARTBEAT;

	printk(KERN_INFO MODULE_NAME
		"DaVinci Watchdog Timer: heartbeat %d sec\n", heartbeat);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL) {
		printk(KERN_INFO MODULE_NAME
			"failed to get memory region resource\n");
		return -ENOENT;
	}

	size = res->end - res->start + 1;
	wdt_mem = request_mem_region(res->start, size, pdev->name);

	if (wdt_mem == NULL) {
		printk(KERN_INFO MODULE_NAME "failed to get memory region\n");
		return -ENOENT;
	}
	wdt_base = (void __iomem *)(res->start);

	ret = misc_register(&davinci_wdt_miscdev);
	if (ret < 0) {
		printk(KERN_ERR MODULE_NAME "cannot register misc device\n");
		release_resource(wdt_mem);
		kfree(wdt_mem);
	} else {
		set_bit(WDT_DEVICE_INITED, &wdt_status);
	}

	return ret;
}

static int davinci_wdt_remove(struct platform_device *pdev)
{
	misc_deregister(&davinci_wdt_miscdev);
	if (wdt_mem) {
		release_resource(wdt_mem);
		kfree(wdt_mem);
		wdt_mem = NULL;
	}
	return 0;
}

static struct platform_driver platform_wdt_driver = {
	.driver = {
		.name = "watchdog",
		.owner	= THIS_MODULE,
	},
	.probe = davinci_wdt_probe,
	.remove = davinci_wdt_remove,
};

static int __init davinci_wdt_init(void)
{
	return platform_driver_register(&platform_wdt_driver);
}

static void __exit davinci_wdt_exit(void)
{
	platform_driver_unregister(&platform_wdt_driver);
}

module_init(davinci_wdt_init);
module_exit(davinci_wdt_exit);

MODULE_AUTHOR("Texas Instruments");
MODULE_DESCRIPTION("DaVinci Watchdog Driver");

module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat,
		 "Watchdog heartbeat period in seconds from 1 to "
		 __MODULE_STRING(MAX_HEARTBEAT) ", default "
		 __MODULE_STRING(DEFAULT_HEARTBEAT));

MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
MODULE_ALIAS("platform:watchdog");
Commit	Line	Data
7d831bf5 VB	1	/*
	2	* drivers/char/watchdog/davinci_wdt.c
	3	*
	4	* Watchdog driver for DaVinci DM644x/DM646x processors
	5	*
	6	* Copyright (C) 2006 Texas Instruments.
	7	*
	8	* 2007 (c) MontaVista Software, Inc. This file is licensed under
	9	* the terms of the GNU General Public License version 2. This program
	10	* is licensed "as is" without any warranty of any kind, whether express
	11	* or implied.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
	16	#include <linux/types.h>
	17	#include <linux/kernel.h>
	18	#include <linux/fs.h>
	19	#include <linux/miscdevice.h>
	20	#include <linux/watchdog.h>
	21	#include <linux/init.h>
	22	#include <linux/bitops.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/spinlock.h>
f78b0a8f AC	25	#include <linux/uaccess.h>
f78b0a8f AC	26	#include <linux/io.h>
7d831bf5 VB	27
7d831bf5 VB	28	#include <asm/hardware.h>
7d831bf5 VB	29
	30	#define MODULE_NAME "DAVINCI-WDT: "
	31
	32	#define DEFAULT_HEARTBEAT 60
	33	#define MAX_HEARTBEAT 600 /* really the max margin is 264/27MHz*/
	34
	35	/* Timer register set definition */
	36	#define PID12 (0x0)
	37	#define EMUMGT (0x4)
	38	#define TIM12 (0x10)
	39	#define TIM34 (0x14)
	40	#define PRD12 (0x18)
	41	#define PRD34 (0x1C)
	42	#define TCR (0x20)
	43	#define TGCR (0x24)
	44	#define WDTCR (0x28)
	45
	46	/* TCR bit definitions */
	47	#define ENAMODE12_DISABLED (0 << 6)
	48	#define ENAMODE12_ONESHOT (1 << 6)
	49	#define ENAMODE12_PERIODIC (2 << 6)
	50
	51	/* TGCR bit definitions */
	52	#define TIM12RS_UNRESET (1 << 0)
	53	#define TIM34RS_UNRESET (1 << 1)
	54	#define TIMMODE_64BIT_WDOG (2 << 2)
	55
	56	/* WDTCR bit definitions */
	57	#define WDEN (1 << 14)
	58	#define WDFLAG (1 << 15)
	59	#define WDKEY_SEQ0 (0xa5c6 << 16)
	60	#define WDKEY_SEQ1 (0xda7e << 16)
	61
	62	static int heartbeat = DEFAULT_HEARTBEAT;
	63
c7dfd0cc	64	static DEFINE_SPINLOCK(io_lock);
7d831bf5 VB	65	static unsigned long wdt_status;
	66	#define WDT_IN_USE 0
	67	#define WDT_OK_TO_CLOSE 1
	68	#define WDT_REGION_INITED 2
	69	#define WDT_DEVICE_INITED 3
	70
	71	static struct resource *wdt_mem;
	72	static void __iomem *wdt_base;
	73
	74	static void wdt_service(void)
	75	{
	76	spin_lock(&io_lock);
	77
	78	/* put watchdog in service state */
	79	davinci_writel(WDKEY_SEQ0, wdt_base + WDTCR);
	80	/* put watchdog in active state */
	81	davinci_writel(WDKEY_SEQ1, wdt_base + WDTCR);
	82
	83	spin_unlock(&io_lock);
	84	}
	85
	86	static void wdt_enable(void)
	87	{
	88	u32 tgcr;
	89	u32 timer_margin;
	90
	91	spin_lock(&io_lock);
	92
	93	/* disable, internal clock source */
	94	davinci_writel(0, wdt_base + TCR);
	95	/* reset timer, set mode to 64-bit watchdog, and unreset */
	96	davinci_writel(0, wdt_base + TGCR);
	97	tgcr = TIMMODE_64BIT_WDOG \| TIM12RS_UNRESET \| TIM34RS_UNRESET;
	98	davinci_writel(tgcr, wdt_base + TGCR);
	99	/* clear counter regs */
	100	davinci_writel(0, wdt_base + TIM12);
	101	davinci_writel(0, wdt_base + TIM34);
	102	/* set timeout period */
	103	timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff);
	104	davinci_writel(timer_margin, wdt_base + PRD12);
	105	timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32);
	106	davinci_writel(timer_margin, wdt_base + PRD34);
	107	/* enable run continuously */
	108	davinci_writel(ENAMODE12_PERIODIC, wdt_base + TCR);
	109	/* Once the WDT is in pre-active state write to
	110	* TIM12, TIM34, PRD12, PRD34, TCR, TGCR, WDTCR are
	111	* write protected (except for the WDKEY field)
	112	*/
	113	/* put watchdog in pre-active state */
	114	davinci_writel(WDKEY_SEQ0 \| WDEN, wdt_base + WDTCR);
	115	/* put watchdog in active state */
	116	davinci_writel(WDKEY_SEQ1 \| WDEN, wdt_base + WDTCR);
	117
	118	spin_unlock(&io_lock);
	119	}
	120
	121	static int davinci_wdt_open(struct inode inode, struct file file)
	122	{
	123	if (test_and_set_bit(WDT_IN_USE, &wdt_status))
	124	return -EBUSY;
	125
	126	wdt_enable();
	127
	128	return nonseekable_open(inode, file);
129	}
130
131	static ssize_t
132	davinci_wdt_write(struct file file, const char data, size_t len,
133	loff_t *ppos)
134	{
7d831bf5 VB	135	if (len)
	136	wdt_service();
	137
	138	return len;
	139	}
	140
	141	static struct watchdog_info ident = {
f1a08cc9	142	.options = WDIOF_KEEPALIVEPING,
7d831bf5 VB	143	.identity = "DaVinci Watchdog",
	144	};
	145
f78b0a8f AC	146	static long davinci_wdt_ioctl(struct file *file,
f78b0a8f AC	147	unsigned int cmd, unsigned long arg)
7d831bf5 VB	148	{
	149	int ret = -ENOTTY;
	150
	151	switch (cmd) {
	152	case WDIOC_GETSUPPORT:
	153	ret = copy_to_user((struct watchdog_info *)arg, &ident,
	154	sizeof(ident)) ? -EFAULT : 0;
	155	break;
	156
	157	case WDIOC_GETSTATUS:
f1a08cc9	158	case WDIOC_GETBOOTSTATUS:
7d831bf5 VB	159	ret = put_user(0, (int *)arg);
	160	break;
	161
7d831bf5 VB	162	case WDIOC_KEEPALIVE:
	163	wdt_service();
	164	ret = 0;
	165	break;
0c06090c WVS	166
	167	case WDIOC_GETTIMEOUT:
	168	ret = put_user(heartbeat, (int *)arg);
	169	break;
7d831bf5 VB	170	}
	171	return ret;
	172	}
	173
	174	static int davinci_wdt_release(struct inode inode, struct file file)
	175	{
	176	wdt_service();
	177	clear_bit(WDT_IN_USE, &wdt_status);
	178
	179	return 0;
	180	}
	181
	182	static const struct file_operations davinci_wdt_fops = {
	183	.owner = THIS_MODULE,
	184	.llseek = no_llseek,
	185	.write = davinci_wdt_write,
f78b0a8f	186	.unlocked_ioctl = davinci_wdt_ioctl,
7d831bf5 VB	187	.open = davinci_wdt_open,
	188	.release = davinci_wdt_release,
	189	};
	190
	191	static struct miscdevice davinci_wdt_miscdev = {
	192	.minor = WATCHDOG_MINOR,
	193	.name = "watchdog",
	194	.fops = &davinci_wdt_fops,
	195	};
	196
	197	static int davinci_wdt_probe(struct platform_device *pdev)
	198	{
	199	int ret = 0, size;
	200	struct resource *res;
	201
7d831bf5 VB	202	if (heartbeat < 1 \|\| heartbeat > MAX_HEARTBEAT)
	203	heartbeat = DEFAULT_HEARTBEAT;
	204
	205	printk(KERN_INFO MODULE_NAME
	206	"DaVinci Watchdog Timer: heartbeat %d sec\n", heartbeat);
	207
	208	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	209	if (res == NULL) {
	210	printk(KERN_INFO MODULE_NAME
	211	"failed to get memory region resource\n");
	212	return -ENOENT;
	213	}
	214
	215	size = res->end - res->start + 1;
	216	wdt_mem = request_mem_region(res->start, size, pdev->name);
	217
	218	if (wdt_mem == NULL) {
	219	printk(KERN_INFO MODULE_NAME "failed to get memory region\n");
	220	return -ENOENT;
	221	}
	222	wdt_base = (void __iomem *)(res->start);
	223
	224	ret = misc_register(&davinci_wdt_miscdev);
	225	if (ret < 0) {
	226	printk(KERN_ERR MODULE_NAME "cannot register misc device\n");
	227	release_resource(wdt_mem);
	228	kfree(wdt_mem);
	229	} else {
	230	set_bit(WDT_DEVICE_INITED, &wdt_status);
	231	}
	232
	233	return ret;
	234	}
	235
	236	static int davinci_wdt_remove(struct platform_device *pdev)
	237	{
	238	misc_deregister(&davinci_wdt_miscdev);
	239	if (wdt_mem) {
	240	release_resource(wdt_mem);
	241	kfree(wdt_mem);
	242	wdt_mem = NULL;
	243	}
	244	return 0;
	245	}
	246
	247	static struct platform_driver platform_wdt_driver = {
	248	.driver = {
	249	.name = "watchdog",
f37d193c	250	.owner = THIS_MODULE,
7d831bf5 VB	251	},
	252	.probe = davinci_wdt_probe,
	253	.remove = davinci_wdt_remove,
	254	};
	255
	256	static int __init davinci_wdt_init(void)
	257	{
	258	return platform_driver_register(&platform_wdt_driver);
	259	}
	260
	261	static void __exit davinci_wdt_exit(void)
	262	{
bb0a38d8	263	platform_driver_unregister(&platform_wdt_driver);
7d831bf5 VB	264	}
	265
	266	module_init(davinci_wdt_init);
	267	module_exit(davinci_wdt_exit);
	268
	269	MODULE_AUTHOR("Texas Instruments");
	270	MODULE_DESCRIPTION("DaVinci Watchdog Driver");
	271
	272	module_param(heartbeat, int, 0);
	273	MODULE_PARM_DESC(heartbeat,
	274	"Watchdog heartbeat period in seconds from 1 to "
	275	__MODULE_STRING(MAX_HEARTBEAT) ", default "
	276	__MODULE_STRING(DEFAULT_HEARTBEAT));
	277
	278	MODULE_LICENSE("GPL");
	279	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
f37d193c	280	MODULE_ALIAS("platform:watchdog");