[WATCHDOG] struct file_operations should be const
[deliverable/linux.git] / drivers / watchdog / hpwdt.c
CommitLineData
7f4da474
TM
1/*
2 * HP WatchDog Driver
3 * based on
4 *
5 * SoftDog 0.05: A Software Watchdog Device
6 *
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
13 *
14 */
15
16#include <linux/device.h>
17#include <linux/fs.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/irq.h>
22#include <linux/kernel.h>
23#include <linux/miscdevice.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/kdebug.h>
27#include <linux/moduleparam.h>
28#include <linux/notifier.h>
29#include <linux/pci.h>
30#include <linux/pci_ids.h>
31#include <linux/reboot.h>
32#include <linux/sched.h>
33#include <linux/timer.h>
34#include <linux/types.h>
35#include <linux/uaccess.h>
36#include <linux/watchdog.h>
37#include <linux/dmi.h>
38#include <linux/efi.h>
39#include <linux/string.h>
40#include <linux/bootmem.h>
41#include <linux/slab.h>
7f4da474 42#include <asm/desc.h>
06026413 43#include <asm/cacheflush.h>
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TM
44
45#define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
46#define CRU_BIOS_SIGNATURE_VALUE 0x55524324
47#define PCI_BIOS32_PARAGRAPH_LEN 16
48#define PCI_ROM_BASE1 0x000F0000
49#define ROM_SIZE 0x10000
d8100c3a 50#define HPWDT_VERSION "1.01"
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51
52struct bios32_service_dir {
53 u32 signature;
54 u32 entry_point;
55 u8 revision;
56 u8 length;
57 u8 checksum;
58 u8 reserved[5];
59};
60
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TM
61/* type 212 */
62struct smbios_cru64_info {
63 u8 type;
64 u8 byte_length;
65 u16 handle;
66 u32 signature;
67 u64 physical_address;
68 u32 double_length;
69 u32 double_offset;
70};
71#define SMBIOS_CRU64_INFORMATION 212
72
73struct cmn_registers {
74 union {
75 struct {
76 u8 ral;
77 u8 rah;
78 u16 rea2;
79 };
80 u32 reax;
81 } u1;
82 union {
83 struct {
84 u8 rbl;
85 u8 rbh;
86 u8 reb2l;
87 u8 reb2h;
88 };
89 u32 rebx;
90 } u2;
91 union {
92 struct {
93 u8 rcl;
94 u8 rch;
95 u16 rec2;
96 };
97 u32 recx;
98 } u3;
99 union {
100 struct {
101 u8 rdl;
102 u8 rdh;
103 u16 red2;
104 };
105 u32 redx;
106 } u4;
107
108 u32 resi;
109 u32 redi;
110 u16 rds;
111 u16 res;
112 u32 reflags;
113} __attribute__((packed));
114
115#define DEFAULT_MARGIN 30
116static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
117static unsigned int reload; /* the computed soft_margin */
118static int nowayout = WATCHDOG_NOWAYOUT;
119static char expect_release;
120static unsigned long hpwdt_is_open;
ab4ba3cd 121static unsigned int allow_kdump;
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122
123static void __iomem *pci_mem_addr; /* the PCI-memory address */
124static unsigned long __iomem *hpwdt_timer_reg;
125static unsigned long __iomem *hpwdt_timer_con;
126
127static DEFINE_SPINLOCK(rom_lock);
128
129static void *cru_rom_addr;
130
131static struct cmn_registers cmn_regs;
132
133static struct pci_device_id hpwdt_devices[] = {
d8100c3a
TM
134 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },
135 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },
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136 {0}, /* terminate list */
137};
138MODULE_DEVICE_TABLE(pci, hpwdt_devices);
139
1f6ef234
LT
140extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, unsigned long *pRomEntry);
141
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TM
142#ifndef CONFIG_X86_64
143/* --32 Bit Bios------------------------------------------------------------ */
144
145#define HPWDT_ARCH 32
146
1f6ef234
LT
147asm(".text \n\t"
148 ".align 4 \n"
149 "asminline_call: \n\t"
150 "pushl %ebp \n\t"
151 "movl %esp, %ebp \n\t"
152 "pusha \n\t"
153 "pushf \n\t"
154 "push %es \n\t"
155 "push %ds \n\t"
156 "pop %es \n\t"
157 "movl 8(%ebp),%eax \n\t"
158 "movl 4(%eax),%ebx \n\t"
159 "movl 8(%eax),%ecx \n\t"
160 "movl 12(%eax),%edx \n\t"
161 "movl 16(%eax),%esi \n\t"
162 "movl 20(%eax),%edi \n\t"
163 "movl (%eax),%eax \n\t"
164 "push %cs \n\t"
165 "call *12(%ebp) \n\t"
166 "pushf \n\t"
167 "pushl %eax \n\t"
168 "movl 8(%ebp),%eax \n\t"
169 "movl %ebx,4(%eax) \n\t"
170 "movl %ecx,8(%eax) \n\t"
171 "movl %edx,12(%eax) \n\t"
172 "movl %esi,16(%eax) \n\t"
173 "movl %edi,20(%eax) \n\t"
174 "movw %ds,24(%eax) \n\t"
175 "movw %es,26(%eax) \n\t"
176 "popl %ebx \n\t"
177 "movl %ebx,(%eax) \n\t"
178 "popl %ebx \n\t"
179 "movl %ebx,28(%eax) \n\t"
180 "pop %es \n\t"
181 "popf \n\t"
182 "popa \n\t"
183 "leave \n\t"
184 "ret \n\t"
185 ".previous");
186
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TM
187
188/*
189 * cru_detect
190 *
191 * Routine Description:
192 * This function uses the 32-bit BIOS Service Directory record to
193 * search for a $CRU record.
194 *
195 * Return Value:
196 * 0 : SUCCESS
197 * <0 : FAILURE
198 */
199static int __devinit cru_detect(unsigned long map_entry,
200 unsigned long map_offset)
201{
202 void *bios32_map;
203 unsigned long *bios32_entrypoint;
204 unsigned long cru_physical_address;
205 unsigned long cru_length;
206 unsigned long physical_bios_base = 0;
207 unsigned long physical_bios_offset = 0;
208 int retval = -ENODEV;
209
210 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
211
212 if (bios32_map == NULL)
213 return -ENODEV;
214
215 bios32_entrypoint = bios32_map + map_offset;
216
217 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
218
219 asminline_call(&cmn_regs, bios32_entrypoint);
220
221 if (cmn_regs.u1.ral != 0) {
222 printk(KERN_WARNING
ab4ba3cd
TM
223 "hpwdt: Call succeeded but with an error: 0x%x\n",
224 cmn_regs.u1.ral);
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TM
225 } else {
226 physical_bios_base = cmn_regs.u2.rebx;
227 physical_bios_offset = cmn_regs.u4.redx;
228 cru_length = cmn_regs.u3.recx;
229 cru_physical_address =
ab4ba3cd 230 physical_bios_base + physical_bios_offset;
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TM
231
232 /* If the values look OK, then map it in. */
233 if ((physical_bios_base + physical_bios_offset)) {
234 cru_rom_addr =
ab4ba3cd 235 ioremap(cru_physical_address, cru_length);
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TM
236 if (cru_rom_addr)
237 retval = 0;
238 }
239
240 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
241 physical_bios_base);
242 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
243 physical_bios_offset);
244 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
245 cru_length);
246 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
247 (unsigned int)&cru_rom_addr);
248 }
249 iounmap(bios32_map);
250 return retval;
251}
252
30ec910e
RD
253/*
254 * bios_checksum
255 */
256static int __devinit bios_checksum(const char __iomem *ptr, int len)
257{
258 char sum = 0;
259 int i;
260
261 /*
262 * calculate checksum of size bytes. This should add up
263 * to zero if we have a valid header.
264 */
265 for (i = 0; i < len; i++)
266 sum += ptr[i];
267
268 return ((sum == 0) && (len > 0));
269}
270
7f4da474
TM
271/*
272 * bios32_present
273 *
274 * Routine Description:
275 * This function finds the 32-bit BIOS Service Directory
276 *
277 * Return Value:
278 * 0 : SUCCESS
279 * <0 : FAILURE
280 */
281static int __devinit bios32_present(const char __iomem *p)
282{
283 struct bios32_service_dir *bios_32_ptr;
284 int length;
285 unsigned long map_entry, map_offset;
286
287 bios_32_ptr = (struct bios32_service_dir *) p;
288
289 /*
290 * Search for signature by checking equal to the swizzled value
291 * instead of calling another routine to perform a strcmp.
292 */
293 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
294 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
295 if (bios_checksum(p, length)) {
296 /*
297 * According to the spec, we're looking for the
298 * first 4KB-aligned address below the entrypoint
299 * listed in the header. The Service Directory code
300 * is guaranteed to occupy no more than 2 4KB pages.
301 */
302 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
303 map_offset = bios_32_ptr->entry_point - map_entry;
304
305 return cru_detect(map_entry, map_offset);
306 }
307 }
308 return -ENODEV;
309}
310
311static int __devinit detect_cru_service(void)
312{
313 char __iomem *p, *q;
314 int rc = -1;
315
316 /*
317 * Search from 0x0f0000 through 0x0fffff, inclusive.
318 */
319 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
320 if (p == NULL)
321 return -ENOMEM;
322
323 for (q = p; q < p + ROM_SIZE; q += 16) {
324 rc = bios32_present(q);
325 if (!rc)
326 break;
327 }
328 iounmap(p);
329 return rc;
330}
331
332#else
333/* --64 Bit Bios------------------------------------------------------------ */
334
335#define HPWDT_ARCH 64
336
1f6ef234
LT
337asm(".text \n\t"
338 ".align 4 \n"
339 "asminline_call: \n\t"
340 "pushq %rbp \n\t"
341 "movq %rsp, %rbp \n\t"
342 "pushq %rax \n\t"
343 "pushq %rbx \n\t"
344 "pushq %rdx \n\t"
345 "pushq %r12 \n\t"
346 "pushq %r9 \n\t"
347 "movq %rsi, %r12 \n\t"
348 "movq %rdi, %r9 \n\t"
349 "movl 4(%r9),%ebx \n\t"
350 "movl 8(%r9),%ecx \n\t"
351 "movl 12(%r9),%edx \n\t"
352 "movl 16(%r9),%esi \n\t"
353 "movl 20(%r9),%edi \n\t"
354 "movl (%r9),%eax \n\t"
355 "call *%r12 \n\t"
356 "pushfq \n\t"
357 "popq %r12 \n\t"
1f6ef234
LT
358 "movl %eax, (%r9) \n\t"
359 "movl %ebx, 4(%r9) \n\t"
360 "movl %ecx, 8(%r9) \n\t"
361 "movl %edx, 12(%r9) \n\t"
362 "movl %esi, 16(%r9) \n\t"
363 "movl %edi, 20(%r9) \n\t"
364 "movq %r12, %rax \n\t"
365 "movl %eax, 28(%r9) \n\t"
366 "popq %r9 \n\t"
367 "popq %r12 \n\t"
368 "popq %rdx \n\t"
369 "popq %rbx \n\t"
370 "popq %rax \n\t"
371 "leave \n\t"
372 "ret \n\t"
373 ".previous");
7f4da474
TM
374
375/*
376 * dmi_find_cru
377 *
378 * Routine Description:
30ec910e 379 * This function checks whether or not a SMBIOS/DMI record is
7f4da474 380 * the 64bit CRU info or not
7f4da474
TM
381 */
382static void __devinit dmi_find_cru(const struct dmi_header *dm)
383{
384 struct smbios_cru64_info *smbios_cru64_ptr;
385 unsigned long cru_physical_address;
386
387 if (dm->type == SMBIOS_CRU64_INFORMATION) {
388 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
389 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
390 cru_physical_address =
ab4ba3cd
TM
391 smbios_cru64_ptr->physical_address +
392 smbios_cru64_ptr->double_offset;
7f4da474 393 cru_rom_addr = ioremap(cru_physical_address,
ab4ba3cd 394 smbios_cru64_ptr->double_length);
06026413
BW
395 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
396 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
7f4da474
TM
397 }
398 }
399}
400
7f4da474
TM
401static int __devinit detect_cru_service(void)
402{
403 cru_rom_addr = NULL;
404
30ec910e 405 dmi_walk(dmi_find_cru);
7f4da474
TM
406
407 /* if cru_rom_addr has been set then we found a CRU service */
ab4ba3cd 408 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
7f4da474
TM
409}
410
411/* ------------------------------------------------------------------------- */
412
413#endif
414
7f4da474
TM
415/*
416 * Watchdog operations
417 */
418static void hpwdt_start(void)
419{
420 reload = (soft_margin * 1000) / 128;
421 iowrite16(reload, hpwdt_timer_reg);
422 iowrite16(0x85, hpwdt_timer_con);
423}
424
425static void hpwdt_stop(void)
426{
427 unsigned long data;
428
429 data = ioread16(hpwdt_timer_con);
430 data &= 0xFE;
431 iowrite16(data, hpwdt_timer_con);
432}
433
434static void hpwdt_ping(void)
435{
436 iowrite16(reload, hpwdt_timer_reg);
437}
438
439static int hpwdt_change_timer(int new_margin)
440{
441 /* Arbitrary, can't find the card's limits */
442 if (new_margin < 30 || new_margin > 600) {
443 printk(KERN_WARNING
444 "hpwdt: New value passed in is invalid: %d seconds.\n",
445 new_margin);
446 return -EINVAL;
447 }
448
449 soft_margin = new_margin;
450 printk(KERN_DEBUG
451 "hpwdt: New timer passed in is %d seconds.\n",
452 new_margin);
453 reload = (soft_margin * 1000) / 128;
454
455 return 0;
456}
457
ab4ba3cd
TM
458/*
459 * NMI Handler
460 */
461static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
462 void *data)
463{
464 unsigned long rom_pl;
465 static int die_nmi_called;
466
467 if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
468 return NOTIFY_OK;
469
470 spin_lock_irqsave(&rom_lock, rom_pl);
471 if (!die_nmi_called)
472 asminline_call(&cmn_regs, cru_rom_addr);
473 die_nmi_called = 1;
474 spin_unlock_irqrestore(&rom_lock, rom_pl);
475 if (cmn_regs.u1.ral == 0) {
476 printk(KERN_WARNING "hpwdt: An NMI occurred, "
477 "but unable to determine source.\n");
478 } else {
479 if (allow_kdump)
480 hpwdt_stop();
481 panic("An NMI occurred, please see the Integrated "
482 "Management Log for details.\n");
483 }
484
290172e7 485 return NOTIFY_OK;
ab4ba3cd
TM
486}
487
7f4da474
TM
488/*
489 * /dev/watchdog handling
490 */
491static int hpwdt_open(struct inode *inode, struct file *file)
492{
493 /* /dev/watchdog can only be opened once */
494 if (test_and_set_bit(0, &hpwdt_is_open))
495 return -EBUSY;
496
497 /* Start the watchdog */
498 hpwdt_start();
499 hpwdt_ping();
500
501 return nonseekable_open(inode, file);
502}
503
504static int hpwdt_release(struct inode *inode, struct file *file)
505{
506 /* Stop the watchdog */
507 if (expect_release == 42) {
508 hpwdt_stop();
509 } else {
510 printk(KERN_CRIT
511 "hpwdt: Unexpected close, not stopping watchdog!\n");
512 hpwdt_ping();
513 }
514
515 expect_release = 0;
516
517 /* /dev/watchdog is being closed, make sure it can be re-opened */
518 clear_bit(0, &hpwdt_is_open);
519
520 return 0;
521}
522
523static ssize_t hpwdt_write(struct file *file, const char __user *data,
524 size_t len, loff_t *ppos)
525{
526 /* See if we got the magic character 'V' and reload the timer */
527 if (len) {
528 if (!nowayout) {
529 size_t i;
530
531 /* note: just in case someone wrote the magic character
532 * five months ago... */
533 expect_release = 0;
534
535 /* scan to see whether or not we got the magic char. */
536 for (i = 0; i != len; i++) {
537 char c;
7944d3a5 538 if (get_user(c, data + i))
7f4da474
TM
539 return -EFAULT;
540 if (c == 'V')
541 expect_release = 42;
542 }
543 }
544
545 /* someone wrote to us, we should reload the timer */
546 hpwdt_ping();
547 }
548
549 return len;
550}
551
552static struct watchdog_info ident = {
553 .options = WDIOF_SETTIMEOUT |
554 WDIOF_KEEPALIVEPING |
555 WDIOF_MAGICCLOSE,
556 .identity = "HP iLO2 HW Watchdog Timer",
557};
558
559static long hpwdt_ioctl(struct file *file, unsigned int cmd,
560 unsigned long arg)
561{
562 void __user *argp = (void __user *)arg;
563 int __user *p = argp;
564 int new_margin;
565 int ret = -ENOTTY;
566
567 switch (cmd) {
568 case WDIOC_GETSUPPORT:
569 ret = 0;
570 if (copy_to_user(argp, &ident, sizeof(ident)))
571 ret = -EFAULT;
572 break;
573
574 case WDIOC_GETSTATUS:
575 case WDIOC_GETBOOTSTATUS:
576 ret = put_user(0, p);
577 break;
578
579 case WDIOC_KEEPALIVE:
580 hpwdt_ping();
581 ret = 0;
582 break;
583
584 case WDIOC_SETTIMEOUT:
585 ret = get_user(new_margin, p);
586 if (ret)
587 break;
588
589 ret = hpwdt_change_timer(new_margin);
590 if (ret)
591 break;
592
593 hpwdt_ping();
594 /* Fall */
595 case WDIOC_GETTIMEOUT:
596 ret = put_user(soft_margin, p);
597 break;
598 }
599 return ret;
600}
601
602/*
603 * Kernel interfaces
604 */
d5c26a59 605static const struct file_operations hpwdt_fops = {
7f4da474
TM
606 .owner = THIS_MODULE,
607 .llseek = no_llseek,
608 .write = hpwdt_write,
609 .unlocked_ioctl = hpwdt_ioctl,
610 .open = hpwdt_open,
611 .release = hpwdt_release,
612};
613
614static struct miscdevice hpwdt_miscdev = {
615 .minor = WATCHDOG_MINOR,
616 .name = "watchdog",
617 .fops = &hpwdt_fops,
618};
619
620static struct notifier_block die_notifier = {
621 .notifier_call = hpwdt_pretimeout,
622 .priority = 0x7FFFFFFF,
623};
624
625/*
626 * Init & Exit
627 */
628
629static int __devinit hpwdt_init_one(struct pci_dev *dev,
ab4ba3cd 630 const struct pci_device_id *ent)
7f4da474
TM
631{
632 int retval;
633
634 /*
635 * First let's find out if we are on an iLO2 server. We will
636 * not run on a legacy ASM box.
ab4ba3cd 637 * So we only support the G5 ProLiant servers and higher.
7f4da474
TM
638 */
639 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
640 dev_warn(&dev->dev,
ab4ba3cd 641 "This server does not have an iLO2 ASIC.\n");
7f4da474
TM
642 return -ENODEV;
643 }
644
645 if (pci_enable_device(dev)) {
646 dev_warn(&dev->dev,
647 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
648 ent->vendor, ent->device);
649 return -ENODEV;
650 }
651
652 pci_mem_addr = pci_iomap(dev, 1, 0x80);
653 if (!pci_mem_addr) {
654 dev_warn(&dev->dev,
655 "Unable to detect the iLO2 server memory.\n");
656 retval = -ENOMEM;
657 goto error_pci_iomap;
658 }
659 hpwdt_timer_reg = pci_mem_addr + 0x70;
660 hpwdt_timer_con = pci_mem_addr + 0x72;
661
662 /* Make sure that we have a valid soft_margin */
663 if (hpwdt_change_timer(soft_margin))
664 hpwdt_change_timer(DEFAULT_MARGIN);
665
666 /*
667 * We need to map the ROM to get the CRU service.
668 * For 32 bit Operating Systems we need to go through the 32 Bit
669 * BIOS Service Directory
670 * For 64 bit Operating Systems we get that service through SMBIOS.
671 */
672 retval = detect_cru_service();
673 if (retval < 0) {
674 dev_warn(&dev->dev,
ab4ba3cd 675 "Unable to detect the %d Bit CRU Service.\n",
7f4da474
TM
676 HPWDT_ARCH);
677 goto error_get_cru;
678 }
679
680 /*
681 * We know this is the only CRU call we need to make so lets keep as
682 * few instructions as possible once the NMI comes in.
683 */
684 cmn_regs.u1.rah = 0x0D;
685 cmn_regs.u1.ral = 0x02;
686
687 retval = register_die_notifier(&die_notifier);
688 if (retval != 0) {
689 dev_warn(&dev->dev,
ab4ba3cd 690 "Unable to register a die notifier (err=%d).\n",
7f4da474
TM
691 retval);
692 goto error_die_notifier;
693 }
694
695 retval = misc_register(&hpwdt_miscdev);
696 if (retval < 0) {
697 dev_warn(&dev->dev,
698 "Unable to register miscdev on minor=%d (err=%d).\n",
699 WATCHDOG_MINOR, retval);
700 goto error_misc_register;
701 }
702
703 printk(KERN_INFO
d8100c3a 704 "hp Watchdog Timer Driver: %s"
ab4ba3cd
TM
705 ", timer margin: %d seconds (nowayout=%d)"
706 ", allow kernel dump: %s (default = 0/OFF).\n",
d8100c3a
TM
707 HPWDT_VERSION, soft_margin, nowayout,
708 (allow_kdump == 0) ? "OFF" : "ON");
7f4da474
TM
709
710 return 0;
711
712error_misc_register:
713 unregister_die_notifier(&die_notifier);
714error_die_notifier:
715 if (cru_rom_addr)
716 iounmap(cru_rom_addr);
717error_get_cru:
718 pci_iounmap(dev, pci_mem_addr);
719error_pci_iomap:
720 pci_disable_device(dev);
721 return retval;
722}
723
724static void __devexit hpwdt_exit(struct pci_dev *dev)
725{
726 if (!nowayout)
727 hpwdt_stop();
728
729 misc_deregister(&hpwdt_miscdev);
730 unregister_die_notifier(&die_notifier);
731
732 if (cru_rom_addr)
733 iounmap(cru_rom_addr);
734 pci_iounmap(dev, pci_mem_addr);
735 pci_disable_device(dev);
736}
737
738static struct pci_driver hpwdt_driver = {
739 .name = "hpwdt",
740 .id_table = hpwdt_devices,
741 .probe = hpwdt_init_one,
742 .remove = __devexit_p(hpwdt_exit),
743};
744
745static void __exit hpwdt_cleanup(void)
746{
747 pci_unregister_driver(&hpwdt_driver);
748}
749
750static int __init hpwdt_init(void)
751{
752 return pci_register_driver(&hpwdt_driver);
753}
754
755MODULE_AUTHOR("Tom Mingarelli");
756MODULE_DESCRIPTION("hp watchdog driver");
757MODULE_LICENSE("GPL");
d8100c3a 758MODULE_VERSION(HPWDT_VERSION);
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759MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
760
761module_param(soft_margin, int, 0);
762MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
763
ab4ba3cd
TM
764module_param(allow_kdump, int, 0);
765MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
766
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767module_param(nowayout, int, 0);
768MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
769 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
770
771module_init(hpwdt_init);
772module_exit(hpwdt_cleanup);
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