Commit | Line | Data |
---|---|---|
7768a13c | 1 | /* |
2817142f | 2 | * omap_wdt.c |
7768a13c | 3 | * |
2817142f | 4 | * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog |
7768a13c KS |
5 | * |
6 | * Author: MontaVista Software, Inc. | |
7 | * <gdavis@mvista.com> or <source@mvista.com> | |
8 | * | |
9 | * 2003 (c) MontaVista Software, Inc. This file is licensed under the | |
10 | * terms of the GNU General Public License version 2. This program is | |
11 | * licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | * | |
14 | * History: | |
15 | * | |
16 | * 20030527: George G. Davis <gdavis@mvista.com> | |
17 | * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c | |
18 | * (c) Copyright 2000 Oleg Drokin <green@crimea.edu> | |
29fa0586 | 19 | * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk> |
7768a13c KS |
20 | * |
21 | * Copyright (c) 2004 Texas Instruments. | |
22 | * 1. Modified to support OMAP1610 32-KHz watchdog timer | |
23 | * 2. Ported to 2.6 kernel | |
24 | * | |
25 | * Copyright (c) 2005 David Brownell | |
26 | * Use the driver model and standard identifiers; handle bigger timeouts. | |
27 | */ | |
28 | ||
27c766aa JP |
29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
30 | ||
7768a13c | 31 | #include <linux/module.h> |
7768a13c KS |
32 | #include <linux/types.h> |
33 | #include <linux/kernel.h> | |
34 | #include <linux/fs.h> | |
35 | #include <linux/mm.h> | |
36 | #include <linux/miscdevice.h> | |
37 | #include <linux/watchdog.h> | |
38 | #include <linux/reboot.h> | |
7768a13c KS |
39 | #include <linux/init.h> |
40 | #include <linux/err.h> | |
41 | #include <linux/platform_device.h> | |
42 | #include <linux/moduleparam.h> | |
1977f032 | 43 | #include <linux/bitops.h> |
089ab079 | 44 | #include <linux/io.h> |
12b9df7d | 45 | #include <linux/uaccess.h> |
5a0e3ad6 | 46 | #include <linux/slab.h> |
7ec5ad0f | 47 | #include <linux/pm_runtime.h> |
a09e64fb | 48 | #include <mach/hardware.h> |
ce491cf8 | 49 | #include <plat/prcm.h> |
7768a13c KS |
50 | |
51 | #include "omap_wdt.h" | |
52 | ||
2817142f FB |
53 | static struct platform_device *omap_wdt_dev; |
54 | ||
7768a13c KS |
55 | static unsigned timer_margin; |
56 | module_param(timer_margin, uint, 0); | |
57 | MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); | |
58 | ||
7768a13c | 59 | static unsigned int wdt_trgr_pattern = 0x1234; |
1334f329 | 60 | static DEFINE_SPINLOCK(wdt_lock); |
7768a13c | 61 | |
2817142f FB |
62 | struct omap_wdt_dev { |
63 | void __iomem *base; /* physical */ | |
64 | struct device *dev; | |
65 | int omap_wdt_users; | |
2817142f FB |
66 | struct resource *mem; |
67 | struct miscdevice omap_wdt_miscdev; | |
68 | }; | |
69 | ||
70 | static void omap_wdt_ping(struct omap_wdt_dev *wdev) | |
7768a13c | 71 | { |
2817142f | 72 | void __iomem *base = wdev->base; |
b3112180 | 73 | |
7768a13c | 74 | /* wait for posted write to complete */ |
9f69e3b0 | 75 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
7768a13c | 76 | cpu_relax(); |
b3112180 | 77 | |
7768a13c | 78 | wdt_trgr_pattern = ~wdt_trgr_pattern; |
9f69e3b0 | 79 | __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR)); |
b3112180 | 80 | |
7768a13c | 81 | /* wait for posted write to complete */ |
9f69e3b0 | 82 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
7768a13c KS |
83 | cpu_relax(); |
84 | /* reloaded WCRR from WLDR */ | |
85 | } | |
86 | ||
2817142f | 87 | static void omap_wdt_enable(struct omap_wdt_dev *wdev) |
7768a13c | 88 | { |
b3112180 FB |
89 | void __iomem *base = wdev->base; |
90 | ||
7768a13c | 91 | /* Sequence to enable the watchdog */ |
9f69e3b0 FB |
92 | __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR); |
93 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) | |
7768a13c | 94 | cpu_relax(); |
b3112180 | 95 | |
9f69e3b0 FB |
96 | __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR); |
97 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) | |
7768a13c KS |
98 | cpu_relax(); |
99 | } | |
100 | ||
2817142f | 101 | static void omap_wdt_disable(struct omap_wdt_dev *wdev) |
7768a13c | 102 | { |
b3112180 FB |
103 | void __iomem *base = wdev->base; |
104 | ||
7768a13c | 105 | /* sequence required to disable watchdog */ |
9f69e3b0 FB |
106 | __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
107 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) | |
7768a13c | 108 | cpu_relax(); |
b3112180 | 109 | |
9f69e3b0 FB |
110 | __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
111 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) | |
7768a13c KS |
112 | cpu_relax(); |
113 | } | |
114 | ||
115 | static void omap_wdt_adjust_timeout(unsigned new_timeout) | |
116 | { | |
117 | if (new_timeout < TIMER_MARGIN_MIN) | |
118 | new_timeout = TIMER_MARGIN_DEFAULT; | |
119 | if (new_timeout > TIMER_MARGIN_MAX) | |
120 | new_timeout = TIMER_MARGIN_MAX; | |
121 | timer_margin = new_timeout; | |
122 | } | |
123 | ||
2817142f | 124 | static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev) |
7768a13c KS |
125 | { |
126 | u32 pre_margin = GET_WLDR_VAL(timer_margin); | |
b3112180 | 127 | void __iomem *base = wdev->base; |
7768a13c | 128 | |
0503add9 PW |
129 | pm_runtime_get_sync(wdev->dev); |
130 | ||
7768a13c | 131 | /* just count up at 32 KHz */ |
9f69e3b0 | 132 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) |
7768a13c | 133 | cpu_relax(); |
b3112180 | 134 | |
9f69e3b0 FB |
135 | __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR); |
136 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) | |
7768a13c | 137 | cpu_relax(); |
0503add9 PW |
138 | |
139 | pm_runtime_put_sync(wdev->dev); | |
7768a13c KS |
140 | } |
141 | ||
142 | /* | |
143 | * Allow only one task to hold it open | |
144 | */ | |
7768a13c KS |
145 | static int omap_wdt_open(struct inode *inode, struct file *file) |
146 | { | |
b3112180 FB |
147 | struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev); |
148 | void __iomem *base = wdev->base; | |
149 | ||
2817142f | 150 | if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) |
7768a13c KS |
151 | return -EBUSY; |
152 | ||
7ec5ad0f | 153 | pm_runtime_get_sync(wdev->dev); |
7768a13c KS |
154 | |
155 | /* initialize prescaler */ | |
9f69e3b0 | 156 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) |
7768a13c | 157 | cpu_relax(); |
b3112180 | 158 | |
9f69e3b0 FB |
159 | __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL); |
160 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) | |
7768a13c KS |
161 | cpu_relax(); |
162 | ||
2817142f FB |
163 | file->private_data = (void *) wdev; |
164 | ||
165 | omap_wdt_set_timeout(wdev); | |
789cd470 | 166 | omap_wdt_ping(wdev); /* trigger loading of new timeout value */ |
2817142f | 167 | omap_wdt_enable(wdev); |
b3112180 | 168 | |
0503add9 PW |
169 | pm_runtime_put_sync(wdev->dev); |
170 | ||
ec9505a7 | 171 | return nonseekable_open(inode, file); |
7768a13c KS |
172 | } |
173 | ||
174 | static int omap_wdt_release(struct inode *inode, struct file *file) | |
175 | { | |
b3112180 FB |
176 | struct omap_wdt_dev *wdev = file->private_data; |
177 | ||
7768a13c KS |
178 | /* |
179 | * Shut off the timer unless NOWAYOUT is defined. | |
180 | */ | |
181 | #ifndef CONFIG_WATCHDOG_NOWAYOUT | |
0503add9 | 182 | pm_runtime_get_sync(wdev->dev); |
7768a13c | 183 | |
2817142f | 184 | omap_wdt_disable(wdev); |
7768a13c | 185 | |
7ec5ad0f | 186 | pm_runtime_put_sync(wdev->dev); |
7768a13c | 187 | #else |
27c766aa | 188 | pr_crit("Unexpected close, not stopping!\n"); |
7768a13c | 189 | #endif |
2817142f | 190 | wdev->omap_wdt_users = 0; |
b3112180 | 191 | |
7768a13c KS |
192 | return 0; |
193 | } | |
194 | ||
12b9df7d | 195 | static ssize_t omap_wdt_write(struct file *file, const char __user *data, |
7768a13c KS |
196 | size_t len, loff_t *ppos) |
197 | { | |
b3112180 FB |
198 | struct omap_wdt_dev *wdev = file->private_data; |
199 | ||
7768a13c | 200 | /* Refresh LOAD_TIME. */ |
12b9df7d | 201 | if (len) { |
0503add9 | 202 | pm_runtime_get_sync(wdev->dev); |
12b9df7d | 203 | spin_lock(&wdt_lock); |
2817142f | 204 | omap_wdt_ping(wdev); |
12b9df7d | 205 | spin_unlock(&wdt_lock); |
0503add9 | 206 | pm_runtime_put_sync(wdev->dev); |
12b9df7d | 207 | } |
7768a13c KS |
208 | return len; |
209 | } | |
210 | ||
12b9df7d AC |
211 | static long omap_wdt_ioctl(struct file *file, unsigned int cmd, |
212 | unsigned long arg) | |
7768a13c | 213 | { |
2817142f | 214 | struct omap_wdt_dev *wdev; |
7768a13c | 215 | int new_margin; |
12b9df7d | 216 | static const struct watchdog_info ident = { |
7768a13c KS |
217 | .identity = "OMAP Watchdog", |
218 | .options = WDIOF_SETTIMEOUT, | |
219 | .firmware_version = 0, | |
220 | }; | |
b3112180 | 221 | |
2817142f | 222 | wdev = file->private_data; |
7768a13c KS |
223 | |
224 | switch (cmd) { | |
7768a13c KS |
225 | case WDIOC_GETSUPPORT: |
226 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | |
227 | sizeof(ident)); | |
228 | case WDIOC_GETSTATUS: | |
229 | return put_user(0, (int __user *)arg); | |
230 | case WDIOC_GETBOOTSTATUS: | |
231 | if (cpu_is_omap16xx()) | |
9f69e3b0 | 232 | return put_user(__raw_readw(ARM_SYSST), |
7768a13c KS |
233 | (int __user *)arg); |
234 | if (cpu_is_omap24xx()) | |
235 | return put_user(omap_prcm_get_reset_sources(), | |
236 | (int __user *)arg); | |
e2bf7c4c | 237 | return put_user(0, (int __user *)arg); |
7768a13c | 238 | case WDIOC_KEEPALIVE: |
0503add9 | 239 | pm_runtime_get_sync(wdev->dev); |
12b9df7d | 240 | spin_lock(&wdt_lock); |
2817142f | 241 | omap_wdt_ping(wdev); |
12b9df7d | 242 | spin_unlock(&wdt_lock); |
0503add9 | 243 | pm_runtime_put_sync(wdev->dev); |
7768a13c KS |
244 | return 0; |
245 | case WDIOC_SETTIMEOUT: | |
246 | if (get_user(new_margin, (int __user *)arg)) | |
247 | return -EFAULT; | |
248 | omap_wdt_adjust_timeout(new_margin); | |
249 | ||
0503add9 | 250 | pm_runtime_get_sync(wdev->dev); |
12b9df7d | 251 | spin_lock(&wdt_lock); |
2817142f FB |
252 | omap_wdt_disable(wdev); |
253 | omap_wdt_set_timeout(wdev); | |
254 | omap_wdt_enable(wdev); | |
7768a13c | 255 | |
2817142f | 256 | omap_wdt_ping(wdev); |
12b9df7d | 257 | spin_unlock(&wdt_lock); |
0503add9 | 258 | pm_runtime_put_sync(wdev->dev); |
7768a13c KS |
259 | /* Fall */ |
260 | case WDIOC_GETTIMEOUT: | |
261 | return put_user(timer_margin, (int __user *)arg); | |
0c06090c WVS |
262 | default: |
263 | return -ENOTTY; | |
7768a13c KS |
264 | } |
265 | } | |
266 | ||
2b8693c0 | 267 | static const struct file_operations omap_wdt_fops = { |
7768a13c KS |
268 | .owner = THIS_MODULE, |
269 | .write = omap_wdt_write, | |
12b9df7d | 270 | .unlocked_ioctl = omap_wdt_ioctl, |
7768a13c KS |
271 | .open = omap_wdt_open, |
272 | .release = omap_wdt_release, | |
6038f373 | 273 | .llseek = no_llseek, |
7768a13c KS |
274 | }; |
275 | ||
0e3912c7 | 276 | static int __devinit omap_wdt_probe(struct platform_device *pdev) |
7768a13c KS |
277 | { |
278 | struct resource *res, *mem; | |
2817142f | 279 | struct omap_wdt_dev *wdev; |
b3112180 | 280 | int ret; |
7768a13c KS |
281 | |
282 | /* reserve static register mappings */ | |
283 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
b3112180 FB |
284 | if (!res) { |
285 | ret = -ENOENT; | |
286 | goto err_get_resource; | |
287 | } | |
7768a13c | 288 | |
b3112180 FB |
289 | if (omap_wdt_dev) { |
290 | ret = -EBUSY; | |
291 | goto err_busy; | |
292 | } | |
2817142f | 293 | |
b782a563 | 294 | mem = request_mem_region(res->start, resource_size(res), pdev->name); |
b3112180 FB |
295 | if (!mem) { |
296 | ret = -EBUSY; | |
297 | goto err_busy; | |
298 | } | |
7768a13c | 299 | |
2817142f FB |
300 | wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL); |
301 | if (!wdev) { | |
302 | ret = -ENOMEM; | |
b3112180 | 303 | goto err_kzalloc; |
2817142f | 304 | } |
b3112180 | 305 | |
2817142f FB |
306 | wdev->omap_wdt_users = 0; |
307 | wdev->mem = mem; | |
7ec5ad0f | 308 | wdev->dev = &pdev->dev; |
2817142f | 309 | |
b782a563 | 310 | wdev->base = ioremap(res->start, resource_size(res)); |
9f69e3b0 FB |
311 | if (!wdev->base) { |
312 | ret = -ENOMEM; | |
b3112180 | 313 | goto err_ioremap; |
9f69e3b0 FB |
314 | } |
315 | ||
2817142f | 316 | platform_set_drvdata(pdev, wdev); |
7768a13c | 317 | |
7ec5ad0f VC |
318 | pm_runtime_enable(wdev->dev); |
319 | pm_runtime_get_sync(wdev->dev); | |
789cd470 | 320 | |
2817142f | 321 | omap_wdt_disable(wdev); |
7768a13c KS |
322 | omap_wdt_adjust_timeout(timer_margin); |
323 | ||
2817142f FB |
324 | wdev->omap_wdt_miscdev.parent = &pdev->dev; |
325 | wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR; | |
326 | wdev->omap_wdt_miscdev.name = "watchdog"; | |
327 | wdev->omap_wdt_miscdev.fops = &omap_wdt_fops; | |
328 | ||
329 | ret = misc_register(&(wdev->omap_wdt_miscdev)); | |
7768a13c | 330 | if (ret) |
b3112180 | 331 | goto err_misc; |
7768a13c | 332 | |
2817142f | 333 | pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n", |
9f69e3b0 | 334 | __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, |
2817142f | 335 | timer_margin); |
7768a13c | 336 | |
7ec5ad0f | 337 | pm_runtime_put_sync(wdev->dev); |
789cd470 | 338 | |
2817142f FB |
339 | omap_wdt_dev = pdev; |
340 | ||
7768a13c KS |
341 | return 0; |
342 | ||
b3112180 | 343 | err_misc: |
12c583d8 | 344 | pm_runtime_disable(wdev->dev); |
b3112180 FB |
345 | platform_set_drvdata(pdev, NULL); |
346 | iounmap(wdev->base); | |
347 | ||
348 | err_ioremap: | |
349 | wdev->base = NULL; | |
b3112180 FB |
350 | kfree(wdev); |
351 | ||
352 | err_kzalloc: | |
b782a563 | 353 | release_mem_region(res->start, resource_size(res)); |
b3112180 FB |
354 | |
355 | err_busy: | |
356 | err_get_resource: | |
357 | ||
7768a13c KS |
358 | return ret; |
359 | } | |
360 | ||
361 | static void omap_wdt_shutdown(struct platform_device *pdev) | |
362 | { | |
b3112180 | 363 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
2817142f | 364 | |
0503add9 PW |
365 | if (wdev->omap_wdt_users) { |
366 | pm_runtime_get_sync(wdev->dev); | |
2817142f | 367 | omap_wdt_disable(wdev); |
0503add9 PW |
368 | pm_runtime_put_sync(wdev->dev); |
369 | } | |
7768a13c KS |
370 | } |
371 | ||
0e3912c7 | 372 | static int __devexit omap_wdt_remove(struct platform_device *pdev) |
7768a13c | 373 | { |
b3112180 | 374 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
2817142f FB |
375 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
376 | ||
12c583d8 | 377 | pm_runtime_disable(wdev->dev); |
2817142f FB |
378 | if (!res) |
379 | return -ENOENT; | |
380 | ||
381 | misc_deregister(&(wdev->omap_wdt_miscdev)); | |
b782a563 | 382 | release_mem_region(res->start, resource_size(res)); |
2817142f | 383 | platform_set_drvdata(pdev, NULL); |
b3112180 | 384 | |
9f69e3b0 FB |
385 | iounmap(wdev->base); |
386 | ||
2817142f FB |
387 | kfree(wdev); |
388 | omap_wdt_dev = NULL; | |
b3112180 | 389 | |
7768a13c KS |
390 | return 0; |
391 | } | |
392 | ||
393 | #ifdef CONFIG_PM | |
394 | ||
395 | /* REVISIT ... not clear this is the best way to handle system suspend; and | |
396 | * it's very inappropriate for selective device suspend (e.g. suspending this | |
397 | * through sysfs rather than by stopping the watchdog daemon). Also, this | |
398 | * may not play well enough with NOWAYOUT... | |
399 | */ | |
400 | ||
401 | static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) | |
402 | { | |
b3112180 FB |
403 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
404 | ||
0503add9 PW |
405 | if (wdev->omap_wdt_users) { |
406 | pm_runtime_get_sync(wdev->dev); | |
2817142f | 407 | omap_wdt_disable(wdev); |
0503add9 PW |
408 | pm_runtime_put_sync(wdev->dev); |
409 | } | |
b3112180 | 410 | |
7768a13c KS |
411 | return 0; |
412 | } | |
413 | ||
414 | static int omap_wdt_resume(struct platform_device *pdev) | |
415 | { | |
b3112180 FB |
416 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
417 | ||
2817142f | 418 | if (wdev->omap_wdt_users) { |
0503add9 | 419 | pm_runtime_get_sync(wdev->dev); |
2817142f FB |
420 | omap_wdt_enable(wdev); |
421 | omap_wdt_ping(wdev); | |
0503add9 | 422 | pm_runtime_put_sync(wdev->dev); |
7768a13c | 423 | } |
b3112180 | 424 | |
7768a13c KS |
425 | return 0; |
426 | } | |
427 | ||
428 | #else | |
429 | #define omap_wdt_suspend NULL | |
430 | #define omap_wdt_resume NULL | |
431 | #endif | |
432 | ||
433 | static struct platform_driver omap_wdt_driver = { | |
434 | .probe = omap_wdt_probe, | |
0e3912c7 | 435 | .remove = __devexit_p(omap_wdt_remove), |
7768a13c KS |
436 | .shutdown = omap_wdt_shutdown, |
437 | .suspend = omap_wdt_suspend, | |
438 | .resume = omap_wdt_resume, | |
439 | .driver = { | |
440 | .owner = THIS_MODULE, | |
441 | .name = "omap_wdt", | |
442 | }, | |
443 | }; | |
444 | ||
b8ec6118 | 445 | module_platform_driver(omap_wdt_driver); |
7768a13c KS |
446 | |
447 | MODULE_AUTHOR("George G. Davis"); | |
448 | MODULE_LICENSE("GPL"); | |
449 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
f37d193c | 450 | MODULE_ALIAS("platform:omap_wdt"); |