[deliverable/linux.git] / drivers / watchdog / omap_wdt.c

/*
 * linux/drivers/char/watchdog/omap_wdt.c
 *
 * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
 *
 * Author: MontaVista Software, Inc.
 *	 <gdavis@mvista.com> or <source@mvista.com>
 *
 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
 * terms of the GNU General Public License version 2. This program is
 * licensed "as is" without any warranty of any kind, whether express
 * or implied.
 *
 * History:
 *
 * 20030527: George G. Davis <gdavis@mvista.com>
 *	Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
 *	(c) Copyright 2000 Oleg Drokin <green@crimea.edu>
 *	Based on SoftDog driver by Alan Cox <alan@redhat.com>
 *
 * Copyright (c) 2004 Texas Instruments.
 *	1. Modified to support OMAP1610 32-KHz watchdog timer
 *	2. Ported to 2.6 kernel
 *
 * Copyright (c) 2005 David Brownell
 *	Use the driver model and standard identifiers; handle bigger timeouts.
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/moduleparam.h>
#include <linux/clk.h>
#include <linux/bitops.h>

#include </io.h>
#include <linux/uaccess.h>
#include <linux/hardware.h>

#include <asm/arch/prcm.h>

#include "omap_wdt.h"

static unsigned timer_margin;
module_param(timer_margin, uint, 0);
MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");

static int omap_wdt_users;
static struct clk *armwdt_ck;
static struct clk *mpu_wdt_ick;
static struct clk *mpu_wdt_fck;

static unsigned int wdt_trgr_pattern = 0x1234;
static spinlock_t wdt_lock;

static void omap_wdt_ping(void)
{
	/* wait for posted write to complete */
	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
		cpu_relax();
	wdt_trgr_pattern = ~wdt_trgr_pattern;
	omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
	/* wait for posted write to complete */
	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
		cpu_relax();
	/* reloaded WCRR from WLDR */
}

static void omap_wdt_enable(void)
{
	/* Sequence to enable the watchdog */
	omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
		cpu_relax();
	omap_writel(0x4444, OMAP_WATCHDOG_SPR);
	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
		cpu_relax();
}

static void omap_wdt_disable(void)
{
	/* sequence required to disable watchdog */
	omap_writel(0xAAAA, OMAP_WATCHDOG_SPR);	/* TIMER_MODE */
	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
		cpu_relax();
	omap_writel(0x5555, OMAP_WATCHDOG_SPR);	/* TIMER_MODE */
	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
		cpu_relax();
}

static void omap_wdt_adjust_timeout(unsigned new_timeout)
{
	if (new_timeout < TIMER_MARGIN_MIN)
		new_timeout = TIMER_MARGIN_DEFAULT;
	if (new_timeout > TIMER_MARGIN_MAX)
		new_timeout = TIMER_MARGIN_MAX;
	timer_margin = new_timeout;
}

static void omap_wdt_set_timeout(void)
{
	u32 pre_margin = GET_WLDR_VAL(timer_margin);

	/* just count up at 32 KHz */
	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
		cpu_relax();
	omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
		cpu_relax();
}

/*
 *	Allow only one task to hold it open
 */

static int omap_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
		return -EBUSY;

	if (cpu_is_omap16xx())
		clk_enable(armwdt_ck);	/* Enable the clock */

	if (cpu_is_omap24xx()) {
		clk_enable(mpu_wdt_ick);    /* Enable the interface clock */
		clk_enable(mpu_wdt_fck);    /* Enable the functional clock */
	}

	/* initialize prescaler */
	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
		cpu_relax();
	omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL);
	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
		cpu_relax();

	omap_wdt_set_timeout();
	omap_wdt_enable();
	return nonseekable_open(inode, file);
}

static int omap_wdt_release(struct inode *inode, struct file *file)
{
	/*
	 *      Shut off the timer unless NOWAYOUT is defined.
	 */
#ifndef CONFIG_WATCHDOG_NOWAYOUT
	omap_wdt_disable();

	if (cpu_is_omap16xx()) {
		clk_disable(armwdt_ck);	/* Disable the clock */
		clk_put(armwdt_ck);
		armwdt_ck = NULL;
	}

	if (cpu_is_omap24xx()) {
		clk_disable(mpu_wdt_ick);	/* Disable the clock */
		clk_disable(mpu_wdt_fck);	/* Disable the clock */
		clk_put(mpu_wdt_ick);
		clk_put(mpu_wdt_fck);
		mpu_wdt_ick = NULL;
		mpu_wdt_fck = NULL;
	}
#else
	printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
#endif
	omap_wdt_users = 0;
	return 0;
}

static ssize_t omap_wdt_write(struct file *file, const char __user *data,
		size_t len, loff_t *ppos)
{
	/* Refresh LOAD_TIME. */
	if (len) {
		spin_lock(&wdt_lock);
		omap_wdt_ping();
		spin_unlock(&wdt_lock);
	}
	return len;
}

static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
						unsigned long arg)
{
	int new_margin;
	static const struct watchdog_info ident = {
		.identity = "OMAP Watchdog",
		.options = WDIOF_SETTIMEOUT,
		.firmware_version = 0,
	};

	switch (cmd) {
	default:
		return -ENOTTY;
	case WDIOC_GETSUPPORT:
		return copy_to_user((struct watchdog_info __user *)arg, &ident,
				sizeof(ident));
	case WDIOC_GETSTATUS:
		return put_user(0, (int __user *)arg);
	case WDIOC_GETBOOTSTATUS:
		if (cpu_is_omap16xx())
			return put_user(omap_readw(ARM_SYSST),
					(int __user *)arg);
		if (cpu_is_omap24xx())
			return put_user(omap_prcm_get_reset_sources(),
					(int __user *)arg);
	case WDIOC_KEEPALIVE:
		spin_lock(&wdt_lock);
		omap_wdt_ping();
		spin_unlock(&wdt_lock);
		return 0;
	case WDIOC_SETTIMEOUT:
		if (get_user(new_margin, (int __user *)arg))
			return -EFAULT;
		omap_wdt_adjust_timeout(new_margin);

		spin_lock(&wdt_lock);
		omap_wdt_disable();
		omap_wdt_set_timeout();
		omap_wdt_enable();

		omap_wdt_ping();
		spin_unlock(&wdt_lock);
		/* Fall */
	case WDIOC_GETTIMEOUT:
		return put_user(timer_margin, (int __user *)arg);
	}
}

static const struct file_operations omap_wdt_fops = {
	.owner = THIS_MODULE,
	.write = omap_wdt_write,
	.unlocked_ioctl = omap_wdt_ioctl,
	.open = omap_wdt_open,
	.release = omap_wdt_release,
};

static struct miscdevice omap_wdt_miscdev = {
	.minor = WATCHDOG_MINOR,
	.name = "watchdog",
	.fops = &omap_wdt_fops
};

static int __init omap_wdt_probe(struct platform_device *pdev)
{
	struct resource *res, *mem;
	int ret;

	/* reserve static register mappings */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENOENT;

	mem = request_mem_region(res->start, res->end - res->start + 1,
				 pdev->name);
	if (mem == NULL)
		return -EBUSY;

	platform_set_drvdata(pdev, mem);

	omap_wdt_users = 0;

	if (cpu_is_omap16xx()) {
		armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
		if (IS_ERR(armwdt_ck)) {
			ret = PTR_ERR(armwdt_ck);
			armwdt_ck = NULL;
			goto fail;
		}
	}

	if (cpu_is_omap24xx()) {
		mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
		if (IS_ERR(mpu_wdt_ick)) {
			ret = PTR_ERR(mpu_wdt_ick);
			mpu_wdt_ick = NULL;
			goto fail;
		}
		mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
		if (IS_ERR(mpu_wdt_fck)) {
			ret = PTR_ERR(mpu_wdt_fck);
			mpu_wdt_fck = NULL;
			goto fail;
		}
	}

	omap_wdt_disable();
	omap_wdt_adjust_timeout(timer_margin);

	omap_wdt_miscdev.parent = &pdev->dev;
	ret = misc_register(&omap_wdt_miscdev);
	if (ret)
		goto fail;

	pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);

	/* autogate OCP interface clock */
	omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
	return 0;

fail:
	if (armwdt_ck)
		clk_put(armwdt_ck);
	if (mpu_wdt_ick)
		clk_put(mpu_wdt_ick);
	if (mpu_wdt_fck)
		clk_put(mpu_wdt_fck);
	release_resource(mem);
	return ret;
}

static void omap_wdt_shutdown(struct platform_device *pdev)
{
	omap_wdt_disable();
}

static int omap_wdt_remove(struct platform_device *pdev)
{
	struct resource *mem = platform_get_drvdata(pdev);
	misc_deregister(&omap_wdt_miscdev);
	release_resource(mem);
	if (armwdt_ck)
		clk_put(armwdt_ck);
	if (mpu_wdt_ick)
		clk_put(mpu_wdt_ick);
	if (mpu_wdt_fck)
		clk_put(mpu_wdt_fck);
	return 0;
}

#ifdef	CONFIG_PM

/* REVISIT ... not clear this is the best way to handle system suspend; and
 * it's very inappropriate for selective device suspend (e.g. suspending this
 * through sysfs rather than by stopping the watchdog daemon).  Also, this
 * may not play well enough with NOWAYOUT...
 */

static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
{
	if (omap_wdt_users)
		omap_wdt_disable();
	return 0;
}

static int omap_wdt_resume(struct platform_device *pdev)
{
	if (omap_wdt_users) {
		omap_wdt_enable();
		omap_wdt_ping();
	}
	return 0;
}

#else
#define	omap_wdt_suspend	NULL
#define	omap_wdt_resume		NULL
#endif

static struct platform_driver omap_wdt_driver = {
	.probe		= omap_wdt_probe,
	.remove		= omap_wdt_remove,
	.shutdown	= omap_wdt_shutdown,
	.suspend	= omap_wdt_suspend,
	.resume		= omap_wdt_resume,
	.driver		= {
		.owner	= THIS_MODULE,
		.name	= "omap_wdt",
	},
};

static int __init omap_wdt_init(void)
{
	spin_lock_init(&wdt_lock);
	return platform_driver_register(&omap_wdt_driver);
}

static void __exit omap_wdt_exit(void)
{
	platform_driver_unregister(&omap_wdt_driver);
}

module_init(omap_wdt_init);
module_exit(omap_wdt_exit);

MODULE_AUTHOR("George G. Davis");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
MODULE_ALIAS("platform:omap_wdt");
Commit	Line	Data
7768a13c KS	1	/*
	2	* linux/drivers/char/watchdog/omap_wdt.c
	3	*
	4	* Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
	5	*
	6	* Author: MontaVista Software, Inc.
	7	* <gdavis@mvista.com> or <source@mvista.com>
	8	*
	9	* 2003 (c) MontaVista Software, Inc. This file is licensed under the
	10	* terms of the GNU General Public License version 2. This program is
	11	* licensed "as is" without any warranty of any kind, whether express
	12	* or implied.
	13	*
	14	* History:
	15	*
	16	* 20030527: George G. Davis <gdavis@mvista.com>
	17	* Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
	18	* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
	19	* Based on SoftDog driver by Alan Cox <alan@redhat.com>
	20	*
	21	* Copyright (c) 2004 Texas Instruments.
	22	* 1. Modified to support OMAP1610 32-KHz watchdog timer
	23	* 2. Ported to 2.6 kernel
	24	*
	25	* Copyright (c) 2005 David Brownell
	26	* Use the driver model and standard identifiers; handle bigger timeouts.
	27	*/
	28
	29	#include <linux/module.h>
7768a13c KS	30	#include <linux/types.h>
	31	#include <linux/kernel.h>
	32	#include <linux/fs.h>
	33	#include <linux/mm.h>
	34	#include <linux/miscdevice.h>
	35	#include <linux/watchdog.h>
	36	#include <linux/reboot.h>
7768a13c KS	37	#include <linux/init.h>
	38	#include <linux/err.h>
	39	#include <linux/platform_device.h>
	40	#include <linux/moduleparam.h>
	41	#include <linux/clk.h>
1977f032	42	#include <linux/bitops.h>
7768a13c	43
12b9df7d AC	44	#include </io.h>
	45	#include <linux/uaccess.h>
	46	#include <linux/hardware.h>
7768a13c KS	47
	48	#include <asm/arch/prcm.h>
	49
	50	#include "omap_wdt.h"
	51
	52	static unsigned timer_margin;
	53	module_param(timer_margin, uint, 0);
	54	MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
	55
	56	static int omap_wdt_users;
12b9df7d AC	57	static struct clk *armwdt_ck;
	58	static struct clk *mpu_wdt_ick;
	59	static struct clk *mpu_wdt_fck;
7768a13c KS	60
7768a13c KS	61	static unsigned int wdt_trgr_pattern = 0x1234;
12b9df7d	62	static spinlock_t wdt_lock;
7768a13c KS	63
	64	static void omap_wdt_ping(void)
	65	{
	66	/* wait for posted write to complete */
	67	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
	68	cpu_relax();
	69	wdt_trgr_pattern = ~wdt_trgr_pattern;
	70	omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
	71	/* wait for posted write to complete */
	72	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
	73	cpu_relax();
	74	/* reloaded WCRR from WLDR */
	75	}
	76
	77	static void omap_wdt_enable(void)
	78	{
	79	/* Sequence to enable the watchdog */
	80	omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
	81	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
	82	cpu_relax();
	83	omap_writel(0x4444, OMAP_WATCHDOG_SPR);
	84	while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
	85	cpu_relax();
	86	}
	87
	88	static void omap_wdt_disable(void)
	89	{
	90	/* sequence required to disable watchdog */
	91	omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
	92	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
	93	cpu_relax();
	94	omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
	95	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
	96	cpu_relax();
	97	}
	98
	99	static void omap_wdt_adjust_timeout(unsigned new_timeout)
	100	{
	101	if (new_timeout < TIMER_MARGIN_MIN)
	102	new_timeout = TIMER_MARGIN_DEFAULT;
	103	if (new_timeout > TIMER_MARGIN_MAX)
	104	new_timeout = TIMER_MARGIN_MAX;
	105	timer_margin = new_timeout;
	106	}
	107
	108	static void omap_wdt_set_timeout(void)
	109	{
	110	u32 pre_margin = GET_WLDR_VAL(timer_margin);
	111
	112	/* just count up at 32 KHz */
	113	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
	114	cpu_relax();
	115	omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
	116	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
	117	cpu_relax();
	118	}
	119
	120	/*
	121	* Allow only one task to hold it open
	122	*/
	123
	124	static int omap_wdt_open(struct inode inode, struct file file)
	125	{
	126	if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
127	return -EBUSY;
128
129	if (cpu_is_omap16xx())
130	clk_enable(armwdt_ck); /* Enable the clock */
131
132	if (cpu_is_omap24xx()) {
133	clk_enable(mpu_wdt_ick); /* Enable the interface clock */
134	clk_enable(mpu_wdt_fck); /* Enable the functional clock */
135	}
136
137	/* initialize prescaler */
138	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
139	cpu_relax();
140	omap_writel((1 << 5) \| (PTV << 2), OMAP_WATCHDOG_CNTRL);
141	while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
142	cpu_relax();
143
144	omap_wdt_set_timeout();
145	omap_wdt_enable();
ec9505a7	146	return nonseekable_open(inode, file);
7768a13c KS	147	}
	148
	149	static int omap_wdt_release(struct inode inode, struct file file)
	150	{
	151	/*
	152	* Shut off the timer unless NOWAYOUT is defined.
	153	*/
	154	#ifndef CONFIG_WATCHDOG_NOWAYOUT
	155	omap_wdt_disable();
	156
	157	if (cpu_is_omap16xx()) {
	158	clk_disable(armwdt_ck); /* Disable the clock */
	159	clk_put(armwdt_ck);
	160	armwdt_ck = NULL;
	161	}
	162
	163	if (cpu_is_omap24xx()) {
	164	clk_disable(mpu_wdt_ick); /* Disable the clock */
	165	clk_disable(mpu_wdt_fck); /* Disable the clock */
	166	clk_put(mpu_wdt_ick);
	167	clk_put(mpu_wdt_fck);
	168	mpu_wdt_ick = NULL;
	169	mpu_wdt_fck = NULL;
	170	}
	171	#else
	172	printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
	173	#endif
	174	omap_wdt_users = 0;
	175	return 0;
	176	}
	177
12b9df7d	178	static ssize_t omap_wdt_write(struct file file, const char __user data,
7768a13c KS	179	size_t len, loff_t *ppos)
	180	{
	181	/* Refresh LOAD_TIME. */
12b9df7d AC	182	if (len) {
12b9df7d AC	183	spin_lock(&wdt_lock);
7768a13c	184	omap_wdt_ping();
12b9df7d AC	185	spin_unlock(&wdt_lock);
12b9df7d AC	186	}
7768a13c KS	187	return len;
	188	}
	189
12b9df7d AC	190	static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
12b9df7d AC	191	unsigned long arg)
7768a13c KS	192	{
7768a13c KS	193	int new_margin;
12b9df7d	194	static const struct watchdog_info ident = {
7768a13c KS	195	.identity = "OMAP Watchdog",
	196	.options = WDIOF_SETTIMEOUT,
	197	.firmware_version = 0,
	198	};
	199
	200	switch (cmd) {
	201	default:
1bf1496d	202	return -ENOTTY;
7768a13c KS	203	case WDIOC_GETSUPPORT:
	204	return copy_to_user((struct watchdog_info __user *)arg, &ident,
	205	sizeof(ident));
	206	case WDIOC_GETSTATUS:
	207	return put_user(0, (int __user *)arg);
	208	case WDIOC_GETBOOTSTATUS:
	209	if (cpu_is_omap16xx())
	210	return put_user(omap_readw(ARM_SYSST),
	211	(int __user *)arg);
	212	if (cpu_is_omap24xx())
	213	return put_user(omap_prcm_get_reset_sources(),
	214	(int __user *)arg);
	215	case WDIOC_KEEPALIVE:
12b9df7d	216	spin_lock(&wdt_lock);
7768a13c	217	omap_wdt_ping();
12b9df7d	218	spin_unlock(&wdt_lock);
7768a13c KS	219	return 0;
	220	case WDIOC_SETTIMEOUT:
	221	if (get_user(new_margin, (int __user *)arg))
	222	return -EFAULT;
	223	omap_wdt_adjust_timeout(new_margin);
	224
12b9df7d	225	spin_lock(&wdt_lock);
7768a13c KS	226	omap_wdt_disable();
	227	omap_wdt_set_timeout();
	228	omap_wdt_enable();
	229
	230	omap_wdt_ping();
12b9df7d	231	spin_unlock(&wdt_lock);
7768a13c KS	232	/* Fall */
	233	case WDIOC_GETTIMEOUT:
	234	return put_user(timer_margin, (int __user *)arg);
	235	}
	236	}
	237
2b8693c0	238	static const struct file_operations omap_wdt_fops = {
7768a13c KS	239	.owner = THIS_MODULE,
7768a13c KS	240	.write = omap_wdt_write,
12b9df7d	241	.unlocked_ioctl = omap_wdt_ioctl,
7768a13c KS	242	.open = omap_wdt_open,
	243	.release = omap_wdt_release,
	244	};
	245
	246	static struct miscdevice omap_wdt_miscdev = {
	247	.minor = WATCHDOG_MINOR,
	248	.name = "watchdog",
	249	.fops = &omap_wdt_fops
	250	};
	251
	252	static int __init omap_wdt_probe(struct platform_device *pdev)
	253	{
	254	struct resource res, mem;
	255	int ret;
	256
	257	/* reserve static register mappings */
	258	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	259	if (!res)
	260	return -ENOENT;
	261
	262	mem = request_mem_region(res->start, res->end - res->start + 1,
	263	pdev->name);
	264	if (mem == NULL)
	265	return -EBUSY;
	266
	267	platform_set_drvdata(pdev, mem);
	268
	269	omap_wdt_users = 0;
	270
	271	if (cpu_is_omap16xx()) {
	272	armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
	273	if (IS_ERR(armwdt_ck)) {
	274	ret = PTR_ERR(armwdt_ck);
	275	armwdt_ck = NULL;
	276	goto fail;
	277	}
	278	}
	279
	280	if (cpu_is_omap24xx()) {
	281	mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
	282	if (IS_ERR(mpu_wdt_ick)) {
	283	ret = PTR_ERR(mpu_wdt_ick);
	284	mpu_wdt_ick = NULL;
	285	goto fail;
	286	}
	287	mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
	288	if (IS_ERR(mpu_wdt_fck)) {
	289	ret = PTR_ERR(mpu_wdt_fck);
	290	mpu_wdt_fck = NULL;
	291	goto fail;
	292	}
	293	}
	294
	295	omap_wdt_disable();
	296	omap_wdt_adjust_timeout(timer_margin);
	297
e0b79e0b	298	omap_wdt_miscdev.parent = &pdev->dev;
7768a13c KS	299	ret = misc_register(&omap_wdt_miscdev);
	300	if (ret)
	301	goto fail;
	302
	303	pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);
	304
	305	/* autogate OCP interface clock */
	306	omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
	307	return 0;
	308
	309	fail:
	310	if (armwdt_ck)
	311	clk_put(armwdt_ck);
	312	if (mpu_wdt_ick)
	313	clk_put(mpu_wdt_ick);
	314	if (mpu_wdt_fck)
	315	clk_put(mpu_wdt_fck);
	316	release_resource(mem);
	317	return ret;
	318	}
	319
	320	static void omap_wdt_shutdown(struct platform_device *pdev)
	321	{
	322	omap_wdt_disable();
	323	}
	324
	325	static int omap_wdt_remove(struct platform_device *pdev)
	326	{
	327	struct resource *mem = platform_get_drvdata(pdev);
	328	misc_deregister(&omap_wdt_miscdev);
	329	release_resource(mem);
	330	if (armwdt_ck)
	331	clk_put(armwdt_ck);
	332	if (mpu_wdt_ick)
	333	clk_put(mpu_wdt_ick);
	334	if (mpu_wdt_fck)
	335	clk_put(mpu_wdt_fck);
	336	return 0;
	337	}
	338
	339	#ifdef CONFIG_PM
	340
	341	/* REVISIT ... not clear this is the best way to handle system suspend; and
	342	* it's very inappropriate for selective device suspend (e.g. suspending this
	343	* through sysfs rather than by stopping the watchdog daemon). Also, this
	344	* may not play well enough with NOWAYOUT...
	345	*/
	346
	347	static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
	348	{
	349	if (omap_wdt_users)
	350	omap_wdt_disable();
	351	return 0;
	352	}
	353
	354	static int omap_wdt_resume(struct platform_device *pdev)
	355	{
	356	if (omap_wdt_users) {
	357	omap_wdt_enable();
	358	omap_wdt_ping();
	359	}
	360	return 0;
	361	}
	362
363	#else
364	#define omap_wdt_suspend NULL
365	#define omap_wdt_resume NULL
366	#endif
367
368	static struct platform_driver omap_wdt_driver = {
369	.probe = omap_wdt_probe,
370	.remove = omap_wdt_remove,
371	.shutdown = omap_wdt_shutdown,
372	.suspend = omap_wdt_suspend,
373	.resume = omap_wdt_resume,
374	.driver = {
375	.owner = THIS_MODULE,
376	.name = "omap_wdt",
377	},
378	};
379
380	static int __init omap_wdt_init(void)
381	{
12b9df7d	382	spin_lock_init(&wdt_lock);
7768a13c KS	383	return platform_driver_register(&omap_wdt_driver);
	384	}
	385
	386	static void __exit omap_wdt_exit(void)
	387	{
	388	platform_driver_unregister(&omap_wdt_driver);
	389	}
	390
	391	module_init(omap_wdt_init);
	392	module_exit(omap_wdt_exit);
	393
	394	MODULE_AUTHOR("George G. Davis");
	395	MODULE_LICENSE("GPL");
	396	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
f37d193c	397	MODULE_ALIAS("platform:omap_wdt");