[deliverable/linux.git] / drivers / watchdog / sp805_wdt.c

/*
 * drivers/char/watchdog/sp805-wdt.c
 *
 * Watchdog driver for ARM SP805 watchdog module
 *
 * Copyright (C) 2010 ST Microelectronics
 * Viresh Kumar<viresh.kumar@st.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2 or later. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/device.h>
#include <linux/resource.h>
#include <linux/amba/bus.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/types.h>
#include <linux/watchdog.h>

/* default timeout in seconds */
#define DEFAULT_TIMEOUT		60

#define MODULE_NAME		"sp805-wdt"

/* watchdog register offsets and masks */
#define WDTLOAD			0x000
	#define LOAD_MIN	0x00000001
	#define LOAD_MAX	0xFFFFFFFF
#define WDTVALUE		0x004
#define WDTCONTROL		0x008
	/* control register masks */
	#define	INT_ENABLE	(1 << 0)
	#define	RESET_ENABLE	(1 << 1)
#define WDTINTCLR		0x00C
#define WDTRIS			0x010
#define WDTMIS			0x014
	#define INT_MASK	(1 << 0)
#define WDTLOCK			0xC00
	#define	UNLOCK		0x1ACCE551
	#define	LOCK		0x00000001

/**
 * struct sp805_wdt: sp805 wdt device structure
 * @wdd: instance of struct watchdog_device
 * @lock: spin lock protecting dev structure and io access
 * @base: base address of wdt
 * @clk: clock structure of wdt
 * @adev: amba device structure of wdt
 * @status: current status of wdt
 * @load_val: load value to be set for current timeout
 * @timeout: current programmed timeout
 */
struct sp805_wdt {
	struct watchdog_device		wdd;
	spinlock_t			lock;
	void __iomem			*base;
	struct clk			*clk;
	struct amba_device		*adev;
	unsigned int			load_val;
	unsigned int			timeout;
};

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
		"Set to 1 to keep watchdog running after device release");

/* This routine finds load value that will reset system in required timout */
static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	u64 load, rate;

	rate = clk_get_rate(wdt->clk);

	/*
	 * sp805 runs counter with given value twice, after the end of first
	 * counter it gives an interrupt and then starts counter again. If
	 * interrupt already occurred then it resets the system. This is why
	 * load is half of what should be required.
	 */
	load = div_u64(rate, 2) * timeout - 1;

	load = (load > LOAD_MAX) ? LOAD_MAX : load;
	load = (load < LOAD_MIN) ? LOAD_MIN : load;

	spin_lock(&wdt->lock);
	wdt->load_val = load;
	/* roundup timeout to closest positive integer value */
	wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
	spin_unlock(&wdt->lock);

	return 0;
}

/* returns number of seconds left for reset to occur */
static unsigned int wdt_timeleft(struct watchdog_device *wdd)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	u64 load, rate;

	rate = clk_get_rate(wdt->clk);

	spin_lock(&wdt->lock);
	load = readl_relaxed(wdt->base + WDTVALUE);

	/*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
	if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
		load += wdt->load_val + 1;
	spin_unlock(&wdt->lock);

	return div_u64(load, rate);
}

static int wdt_config(struct watchdog_device *wdd, bool ping)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	int ret;

	if (!ping) {
		ret = clk_enable(wdt->clk);
		if (ret) {
			dev_err(&wdt->adev->dev, "clock enable fail");
			return ret;
		}
	}

	spin_lock(&wdt->lock);

	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
	writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);

	if (!ping) {
		writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
		writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
				WDTCONTROL);
	}

	writel_relaxed(LOCK, wdt->base + WDTLOCK);

	/* Flush posted writes. */
	readl_relaxed(wdt->base + WDTLOCK);
	spin_unlock(&wdt->lock);

	return 0;
}

static int wdt_ping(struct watchdog_device *wdd)
{
	return wdt_config(wdd, true);
}

/* enables watchdog timers reset */
static int wdt_enable(struct watchdog_device *wdd)
{
	return wdt_config(wdd, false);
}

/* disables watchdog timers reset */
static int wdt_disable(struct watchdog_device *wdd)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);

	spin_lock(&wdt->lock);

	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
	writel_relaxed(0, wdt->base + WDTCONTROL);
	writel_relaxed(LOCK, wdt->base + WDTLOCK);

	/* Flush posted writes. */
	readl_relaxed(wdt->base + WDTLOCK);
	spin_unlock(&wdt->lock);

	clk_disable(wdt->clk);

	return 0;
}

static const struct watchdog_info wdt_info = {
	.options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
	.identity = MODULE_NAME,
};

static const struct watchdog_ops wdt_ops = {
	.owner		= THIS_MODULE,
	.start		= wdt_enable,
	.stop		= wdt_disable,
	.ping		= wdt_ping,
	.set_timeout	= wdt_setload,
	.get_timeleft	= wdt_timeleft,
};

static int __devinit
sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
{
	struct sp805_wdt *wdt;
	int ret = 0;

	if (!devm_request_mem_region(&adev->dev, adev->res.start,
				resource_size(&adev->res), "sp805_wdt")) {
		dev_warn(&adev->dev, "Failed to get memory region resource\n");
		ret = -ENOENT;
		goto err;
	}

	wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
	if (!wdt) {
		dev_warn(&adev->dev, "Kzalloc failed\n");
		ret = -ENOMEM;
		goto err;
	}

	wdt->base = devm_ioremap(&adev->dev, adev->res.start,
			resource_size(&adev->res));
	if (!wdt->base) {
		ret = -ENOMEM;
		dev_warn(&adev->dev, "ioremap fail\n");
		goto err;
	}

	wdt->clk = clk_get(&adev->dev, NULL);
	if (IS_ERR(wdt->clk)) {
		dev_warn(&adev->dev, "Clock not found\n");
		ret = PTR_ERR(wdt->clk);
		goto err;
	}

	wdt->adev = adev;
	wdt->wdd.info = &wdt_info;
	wdt->wdd.ops = &wdt_ops;

	spin_lock_init(&wdt->lock);
	watchdog_set_nowayout(&wdt->wdd, nowayout);
	watchdog_set_drvdata(&wdt->wdd, wdt);
	wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);

	ret = watchdog_register_device(&wdt->wdd);
	if (ret) {
		dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
				ret);
		goto err_register;
	}
	amba_set_drvdata(adev, wdt);

	dev_info(&adev->dev, "registration successful\n");
	return 0;

err_register:
	clk_put(wdt->clk);
err:
	dev_err(&adev->dev, "Probe Failed!!!\n");
	return ret;
}

static int __devexit sp805_wdt_remove(struct amba_device *adev)
{
	struct sp805_wdt *wdt = amba_get_drvdata(adev);

	watchdog_unregister_device(&wdt->wdd);
	amba_set_drvdata(adev, NULL);
	watchdog_set_drvdata(&wdt->wdd, NULL);
	clk_put(wdt->clk);

	return 0;
}

#ifdef CONFIG_PM
static int sp805_wdt_suspend(struct device *dev)
{
	struct sp805_wdt *wdt = dev_get_drvdata(dev);

	if (watchdog_active(&wdt->wdd))
		return wdt_disable(&wdt->wdd);

	return 0;
}

static int sp805_wdt_resume(struct device *dev)
{
	struct sp805_wdt *wdt = dev_get_drvdata(dev);

	if (watchdog_active(&wdt->wdd))
		return wdt_enable(&wdt->wdd);

	return 0;
}
#endif /* CONFIG_PM */

static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
		sp805_wdt_resume);

static struct amba_id sp805_wdt_ids[] = {
	{
		.id	= 0x00141805,
		.mask	= 0x00ffffff,
	},
	{ 0, 0 },
};

MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);

static struct amba_driver sp805_wdt_driver = {
	.drv = {
		.name	= MODULE_NAME,
		.pm	= &sp805_wdt_dev_pm_ops,
	},
	.id_table	= sp805_wdt_ids,
	.probe		= sp805_wdt_probe,
	.remove = __devexit_p(sp805_wdt_remove),
};

module_amba_driver(sp805_wdt_driver);

MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
4a370278 VK	1	/*
	2	* drivers/char/watchdog/sp805-wdt.c
	3	*
	4	* Watchdog driver for ARM SP805 watchdog module
	5	*
	6	* Copyright (C) 2010 ST Microelectronics
	7	* Viresh Kumar<viresh.kumar@st.com>
	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2 or later. This program is licensed "as is" without any
	11	* warranty of any kind, whether express or implied.
	12	*/
	13
	14	#include <linux/device.h>
	15	#include <linux/resource.h>
	16	#include <linux/amba/bus.h>
	17	#include <linux/bitops.h>
	18	#include <linux/clk.h>
4a370278 VK	19	#include <linux/init.h>
	20	#include <linux/io.h>
	21	#include <linux/ioport.h>
	22	#include <linux/kernel.h>
	23	#include <linux/math64.h>
4a370278 VK	24	#include <linux/module.h>
4a370278 VK	25	#include <linux/moduleparam.h>
16ac4abe	26	#include <linux/pm.h>
4a370278 VK	27	#include <linux/slab.h>
	28	#include <linux/spinlock.h>
	29	#include <linux/types.h>
4a370278 VK	30	#include <linux/watchdog.h>
	31
	32	/* default timeout in seconds */
	33	#define DEFAULT_TIMEOUT 60
	34
	35	#define MODULE_NAME "sp805-wdt"
	36
	37	/* watchdog register offsets and masks */
	38	#define WDTLOAD 0x000
	39	#define LOAD_MIN 0x00000001
	40	#define LOAD_MAX 0xFFFFFFFF
	41	#define WDTVALUE 0x004
	42	#define WDTCONTROL 0x008
	43	/* control register masks */
	44	#define INT_ENABLE (1 << 0)
	45	#define RESET_ENABLE (1 << 1)
	46	#define WDTINTCLR 0x00C
	47	#define WDTRIS 0x010
	48	#define WDTMIS 0x014
	49	#define INT_MASK (1 << 0)
	50	#define WDTLOCK 0xC00
	51	#define UNLOCK 0x1ACCE551
	52	#define LOCK 0x00000001
	53
	54	/**
	55	* struct sp805_wdt: sp805 wdt device structure
4a516539	56	* @wdd: instance of struct watchdog_device
bfae14b6 VK	57	* @lock: spin lock protecting dev structure and io access
	58	* @base: base address of wdt
	59	* @clk: clock structure of wdt
	60	* @adev: amba device structure of wdt
	61	* @status: current status of wdt
	62	* @load_val: load value to be set for current timeout
	63	* @timeout: current programmed timeout
4a370278 VK	64	*/
4a370278 VK	65	struct sp805_wdt {
4a516539	66	struct watchdog_device wdd;
4a370278 VK	67	spinlock_t lock;
	68	void __iomem *base;
	69	struct clk *clk;
	70	struct amba_device *adev;
4a370278 VK	71	unsigned int load_val;
	72	unsigned int timeout;
	73	};
	74
86a1e189	75	static bool nowayout = WATCHDOG_NOWAYOUT;
4a516539 VK	76	module_param(nowayout, bool, 0);
	77	MODULE_PARM_DESC(nowayout,
	78	"Set to 1 to keep watchdog running after device release");
4a370278 VK	79
4a370278 VK	80	/* This routine finds load value that will reset system in required timout */
4a516539	81	static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
4a370278	82	{
4a516539	83	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
4a370278 VK	84	u64 load, rate;
	85
	86	rate = clk_get_rate(wdt->clk);
	87
	88	/*
	89	* sp805 runs counter with given value twice, after the end of first
	90	* counter it gives an interrupt and then starts counter again. If
25985edc	91	* interrupt already occurred then it resets the system. This is why
4a370278 VK	92	* load is half of what should be required.
	93	*/
	94	load = div_u64(rate, 2) * timeout - 1;
	95
	96	load = (load > LOAD_MAX) ? LOAD_MAX : load;
	97	load = (load < LOAD_MIN) ? LOAD_MIN : load;
	98
	99	spin_lock(&wdt->lock);
	100	wdt->load_val = load;
	101	/* roundup timeout to closest positive integer value */
	102	wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
	103	spin_unlock(&wdt->lock);
4a516539 VK	104
4a516539 VK	105	return 0;
4a370278 VK	106	}
	107
	108	/* returns number of seconds left for reset to occur */
4a516539	109	static unsigned int wdt_timeleft(struct watchdog_device *wdd)
4a370278	110	{
4a516539	111	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
4a370278 VK	112	u64 load, rate;
	113
	114	rate = clk_get_rate(wdt->clk);
	115
	116	spin_lock(&wdt->lock);
d2e8919b	117	load = readl_relaxed(wdt->base + WDTVALUE);
4a370278 VK	118
4a370278 VK	119	/If the interrupt is inactive then time left is WDTValue + WDTLoad. /
d2e8919b	120	if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
4a370278 VK	121	load += wdt->load_val + 1;
	122	spin_unlock(&wdt->lock);
	123
	124	return div_u64(load, rate);
	125	}
	126
4a516539	127	static int wdt_config(struct watchdog_device *wdd, bool ping)
4a370278	128	{
4a516539 VK	129	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	130	int ret;
	131
	132	if (!ping) {
	133	ret = clk_enable(wdt->clk);
	134	if (ret) {
	135	dev_err(&wdt->adev->dev, "clock enable fail");
	136	return ret;
	137	}
	138	}
	139
4a370278 VK	140	spin_lock(&wdt->lock);
4a370278 VK	141
d2e8919b VK	142	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
d2e8919b VK	143	writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
4a370278	144
4a516539 VK	145	if (!ping) {
	146	writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
	147	writel_relaxed(INT_ENABLE \| RESET_ENABLE, wdt->base +
	148	WDTCONTROL);
	149	}
4a370278	150
d2e8919b	151	writel_relaxed(LOCK, wdt->base + WDTLOCK);
4a370278	152
081d83a3	153	/* Flush posted writes. */
d2e8919b	154	readl_relaxed(wdt->base + WDTLOCK);
4a370278	155	spin_unlock(&wdt->lock);
4a516539 VK	156
4a516539 VK	157	return 0;
4a370278 VK	158	}
4a370278 VK	159
4a516539	160	static int wdt_ping(struct watchdog_device *wdd)
4a370278	161	{
4a516539	162	return wdt_config(wdd, true);
4a370278 VK	163	}
4a370278 VK	164
4a516539 VK	165	/* enables watchdog timers reset */
4a516539 VK	166	static int wdt_enable(struct watchdog_device *wdd)
4a370278	167	{
4a516539	168	return wdt_config(wdd, false);
4a370278 VK	169	}
4a370278 VK	170
4a516539 VK	171	/* disables watchdog timers reset */
4a516539 VK	172	static int wdt_disable(struct watchdog_device *wdd)
4a370278	173	{
4a516539	174	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
4a370278	175
4a516539	176	spin_lock(&wdt->lock);
4a370278	177
4a516539 VK	178	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
	179	writel_relaxed(0, wdt->base + WDTCONTROL);
	180	writel_relaxed(LOCK, wdt->base + WDTLOCK);
4a370278	181
4a516539 VK	182	/* Flush posted writes. */
	183	readl_relaxed(wdt->base + WDTLOCK);
	184	spin_unlock(&wdt->lock);
4a370278	185
4a370278	186	clk_disable(wdt->clk);
4a370278 VK	187
	188	return 0;
	189	}
	190
4a516539 VK	191	static const struct watchdog_info wdt_info = {
	192	.options = WDIOF_MAGICCLOSE \| WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING,
	193	.identity = MODULE_NAME,
4a370278 VK	194	};
4a370278 VK	195
4a516539 VK	196	static const struct watchdog_ops wdt_ops = {
	197	.owner = THIS_MODULE,
	198	.start = wdt_enable,
	199	.stop = wdt_disable,
	200	.ping = wdt_ping,
	201	.set_timeout = wdt_setload,
	202	.get_timeleft = wdt_timeleft,
4a370278 VK	203	};
	204
	205	static int __devinit
aa25afad	206	sp805_wdt_probe(struct amba_device adev, const struct amba_id id)
4a370278	207	{
4a516539	208	struct sp805_wdt *wdt;
4a370278 VK	209	int ret = 0;
4a370278 VK	210
fb35a5ad VK	211	if (!devm_request_mem_region(&adev->dev, adev->res.start,
fb35a5ad VK	212	resource_size(&adev->res), "sp805_wdt")) {
4a370278 VK	213	dev_warn(&adev->dev, "Failed to get memory region resource\n");
	214	ret = -ENOENT;
	215	goto err;
	216	}
	217
fb35a5ad	218	wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
4a370278 VK	219	if (!wdt) {
	220	dev_warn(&adev->dev, "Kzalloc failed\n");
	221	ret = -ENOMEM;
fb35a5ad VK	222	goto err;
	223	}
	224
	225	wdt->base = devm_ioremap(&adev->dev, adev->res.start,
	226	resource_size(&adev->res));
	227	if (!wdt->base) {
	228	ret = -ENOMEM;
	229	dev_warn(&adev->dev, "ioremap fail\n");
	230	goto err;
4a370278 VK	231	}
	232
	233	wdt->clk = clk_get(&adev->dev, NULL);
	234	if (IS_ERR(wdt->clk)) {
	235	dev_warn(&adev->dev, "Clock not found\n");
	236	ret = PTR_ERR(wdt->clk);
fb35a5ad	237	goto err;
4a370278 VK	238	}
	239
	240	wdt->adev = adev;
4a516539 VK	241	wdt->wdd.info = &wdt_info;
	242	wdt->wdd.ops = &wdt_ops;
	243
4a370278	244	spin_lock_init(&wdt->lock);
4a516539 VK	245	watchdog_set_nowayout(&wdt->wdd, nowayout);
	246	watchdog_set_drvdata(&wdt->wdd, wdt);
	247	wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
4a370278	248
4a516539 VK	249	ret = watchdog_register_device(&wdt->wdd);
	250	if (ret) {
	251	dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
	252	ret);
	253	goto err_register;
4a370278	254	}
4a516539	255	amba_set_drvdata(adev, wdt);
4a370278 VK	256
	257	dev_info(&adev->dev, "registration successful\n");
	258	return 0;
	259
4a516539	260	err_register:
4a370278	261	clk_put(wdt->clk);
4a370278 VK	262	err:
	263	dev_err(&adev->dev, "Probe Failed!!!\n");
	264	return ret;
	265	}
	266
	267	static int __devexit sp805_wdt_remove(struct amba_device *adev)
	268	{
4a516539 VK	269	struct sp805_wdt *wdt = amba_get_drvdata(adev);
	270
	271	watchdog_unregister_device(&wdt->wdd);
	272	amba_set_drvdata(adev, NULL);
	273	watchdog_set_drvdata(&wdt->wdd, NULL);
4a370278	274	clk_put(wdt->clk);
4a370278 VK	275
	276	return 0;
	277	}
	278
16ac4abe VK	279	#ifdef CONFIG_PM
	280	static int sp805_wdt_suspend(struct device *dev)
	281	{
4a516539 VK	282	struct sp805_wdt *wdt = dev_get_drvdata(dev);
	283
	284	if (watchdog_active(&wdt->wdd))
	285	return wdt_disable(&wdt->wdd);
16ac4abe VK	286
	287	return 0;
	288	}
	289
	290	static int sp805_wdt_resume(struct device *dev)
	291	{
4a516539	292	struct sp805_wdt *wdt = dev_get_drvdata(dev);
16ac4abe	293
4a516539 VK	294	if (watchdog_active(&wdt->wdd))
4a516539 VK	295	return wdt_enable(&wdt->wdd);
16ac4abe	296
4a516539	297	return 0;
16ac4abe VK	298	}
	299	#endif /* CONFIG_PM */
	300
	301	static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
	302	sp805_wdt_resume);
	303
bb558dac	304	static struct amba_id sp805_wdt_ids[] = {
4a370278 VK	305	{
	306	.id = 0x00141805,
	307	.mask = 0x00ffffff,
	308	},
	309	{ 0, 0 },
	310	};
	311
17885b05 DM	312	MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
17885b05 DM	313
4a370278 VK	314	static struct amba_driver sp805_wdt_driver = {
	315	.drv = {
	316	.name = MODULE_NAME,
16ac4abe	317	.pm = &sp805_wdt_dev_pm_ops,
4a370278 VK	318	},
	319	.id_table = sp805_wdt_ids,
	320	.probe = sp805_wdt_probe,
	321	.remove = __devexit_p(sp805_wdt_remove),
	322	};
	323
9e5ed094	324	module_amba_driver(sp805_wdt_driver);
4a370278	325
4a370278 VK	326	MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
	327	MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
	328	MODULE_LICENSE("GPL");