Commit | Line | Data |
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b4cc4aa2 JMG |
1 | /* |
2 | * W83977F Watchdog Timer Driver for Winbond W83977F I/O Chip | |
3 | * | |
4 | * (c) Copyright 2005 Jose Goncalves <jose.goncalves@inov.pt> | |
5 | * | |
6 | * Based on w83877f_wdt.c by Scott Jennings, | |
7 | * and wdt977.c by Woody Suwalski | |
8 | * | |
9 | * ----------------------- | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | */ | |
17 | ||
27c766aa JP |
18 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
19 | ||
b4cc4aa2 JMG |
20 | #include <linux/module.h> |
21 | #include <linux/moduleparam.h> | |
b4cc4aa2 JMG |
22 | #include <linux/types.h> |
23 | #include <linux/kernel.h> | |
24 | #include <linux/fs.h> | |
25 | #include <linux/miscdevice.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/watchdog.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/reboot.h> | |
84af401a AC |
31 | #include <linux/uaccess.h> |
32 | #include <linux/io.h> | |
b4cc4aa2 | 33 | |
b4cc4aa2 | 34 | #include <asm/system.h> |
b4cc4aa2 JMG |
35 | |
36 | #define WATCHDOG_VERSION "1.00" | |
37 | #define WATCHDOG_NAME "W83977F WDT" | |
b4cc4aa2 JMG |
38 | |
39 | #define IO_INDEX_PORT 0x3F0 | |
40 | #define IO_DATA_PORT (IO_INDEX_PORT+1) | |
41 | ||
42 | #define UNLOCK_DATA 0x87 | |
43 | #define LOCK_DATA 0xAA | |
44 | #define DEVICE_REGISTER 0x07 | |
45 | ||
46 | #define DEFAULT_TIMEOUT 45 /* default timeout in seconds */ | |
47 | ||
48 | static int timeout = DEFAULT_TIMEOUT; | |
49 | static int timeoutW; /* timeout in watchdog counter units */ | |
50 | static unsigned long timer_alive; | |
51 | static int testmode; | |
52 | static char expect_close; | |
c7dfd0cc | 53 | static DEFINE_SPINLOCK(spinlock); |
b4cc4aa2 JMG |
54 | |
55 | module_param(timeout, int, 0); | |
84af401a AC |
56 | MODULE_PARM_DESC(timeout, |
57 | "Watchdog timeout in seconds (15..7635), default=" | |
58 | __MODULE_STRING(DEFAULT_TIMEOUT) ")"); | |
b4cc4aa2 | 59 | module_param(testmode, int, 0); |
84af401a | 60 | MODULE_PARM_DESC(testmode, "Watchdog testmode (1 = no reboot), default=0"); |
b4cc4aa2 | 61 | |
3908bb18 | 62 | static int nowayout = WATCHDOG_NOWAYOUT; |
b4cc4aa2 | 63 | module_param(nowayout, int, 0); |
84af401a AC |
64 | MODULE_PARM_DESC(nowayout, |
65 | "Watchdog cannot be stopped once started (default=" | |
66 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
b4cc4aa2 JMG |
67 | |
68 | /* | |
69 | * Start the watchdog | |
70 | */ | |
71 | ||
72 | static int wdt_start(void) | |
73 | { | |
74 | unsigned long flags; | |
75 | ||
76 | spin_lock_irqsave(&spinlock, flags); | |
77 | ||
78 | /* Unlock the SuperIO chip */ | |
84af401a AC |
79 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
80 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
81 | |
82 | /* | |
83 | * Select device Aux2 (device=8) to set watchdog regs F2, F3 and F4. | |
84 | * F2 has the timeout in watchdog counter units. | |
85 | * F3 is set to enable watchdog LED blink at timeout. | |
86 | * F4 is used to just clear the TIMEOUT'ed state (bit 0). | |
87 | */ | |
84af401a AC |
88 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
89 | outb_p(0x08, IO_DATA_PORT); | |
90 | outb_p(0xF2, IO_INDEX_PORT); | |
91 | outb_p(timeoutW, IO_DATA_PORT); | |
92 | outb_p(0xF3, IO_INDEX_PORT); | |
93 | outb_p(0x08, IO_DATA_PORT); | |
94 | outb_p(0xF4, IO_INDEX_PORT); | |
95 | outb_p(0x00, IO_DATA_PORT); | |
b4cc4aa2 JMG |
96 | |
97 | /* Set device Aux2 active */ | |
84af401a AC |
98 | outb_p(0x30, IO_INDEX_PORT); |
99 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 | 100 | |
84af401a | 101 | /* |
b4cc4aa2 JMG |
102 | * Select device Aux1 (dev=7) to set GP16 as the watchdog output |
103 | * (in reg E6) and GP13 as the watchdog LED output (in reg E3). | |
104 | * Map GP16 at pin 119. | |
105 | * In test mode watch the bit 0 on F4 to indicate "triggered" or | |
106 | * check watchdog LED on SBC. | |
107 | */ | |
84af401a AC |
108 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
109 | outb_p(0x07, IO_DATA_PORT); | |
110 | if (!testmode) { | |
b4cc4aa2 JMG |
111 | unsigned pin_map; |
112 | ||
84af401a AC |
113 | outb_p(0xE6, IO_INDEX_PORT); |
114 | outb_p(0x0A, IO_DATA_PORT); | |
115 | outb_p(0x2C, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
116 | pin_map = inb_p(IO_DATA_PORT); |
117 | pin_map |= 0x10; | |
118 | pin_map &= ~(0x20); | |
84af401a AC |
119 | outb_p(0x2C, IO_INDEX_PORT); |
120 | outb_p(pin_map, IO_DATA_PORT); | |
b4cc4aa2 | 121 | } |
84af401a AC |
122 | outb_p(0xE3, IO_INDEX_PORT); |
123 | outb_p(0x08, IO_DATA_PORT); | |
b4cc4aa2 JMG |
124 | |
125 | /* Set device Aux1 active */ | |
84af401a AC |
126 | outb_p(0x30, IO_INDEX_PORT); |
127 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 JMG |
128 | |
129 | /* Lock the SuperIO chip */ | |
84af401a | 130 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
131 | |
132 | spin_unlock_irqrestore(&spinlock, flags); | |
133 | ||
27c766aa | 134 | pr_info("activated\n"); |
b4cc4aa2 JMG |
135 | |
136 | return 0; | |
137 | } | |
138 | ||
139 | /* | |
140 | * Stop the watchdog | |
141 | */ | |
142 | ||
143 | static int wdt_stop(void) | |
144 | { | |
145 | unsigned long flags; | |
146 | ||
147 | spin_lock_irqsave(&spinlock, flags); | |
148 | ||
149 | /* Unlock the SuperIO chip */ | |
84af401a AC |
150 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
151 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 | 152 | |
84af401a | 153 | /* |
b4cc4aa2 JMG |
154 | * Select device Aux2 (device=8) to set watchdog regs F2, F3 and F4. |
155 | * F2 is reset to its default value (watchdog timer disabled). | |
156 | * F3 is reset to its default state. | |
157 | * F4 clears the TIMEOUT'ed state (bit 0) - back to default. | |
158 | */ | |
84af401a AC |
159 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
160 | outb_p(0x08, IO_DATA_PORT); | |
161 | outb_p(0xF2, IO_INDEX_PORT); | |
162 | outb_p(0xFF, IO_DATA_PORT); | |
163 | outb_p(0xF3, IO_INDEX_PORT); | |
164 | outb_p(0x00, IO_DATA_PORT); | |
165 | outb_p(0xF4, IO_INDEX_PORT); | |
166 | outb_p(0x00, IO_DATA_PORT); | |
167 | outb_p(0xF2, IO_INDEX_PORT); | |
168 | outb_p(0x00, IO_DATA_PORT); | |
b4cc4aa2 JMG |
169 | |
170 | /* | |
84af401a | 171 | * Select device Aux1 (dev=7) to set GP16 (in reg E6) and |
b4cc4aa2 JMG |
172 | * Gp13 (in reg E3) as inputs. |
173 | */ | |
84af401a AC |
174 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
175 | outb_p(0x07, IO_DATA_PORT); | |
176 | if (!testmode) { | |
177 | outb_p(0xE6, IO_INDEX_PORT); | |
178 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 | 179 | } |
84af401a AC |
180 | outb_p(0xE3, IO_INDEX_PORT); |
181 | outb_p(0x01, IO_DATA_PORT); | |
b4cc4aa2 JMG |
182 | |
183 | /* Lock the SuperIO chip */ | |
84af401a | 184 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
185 | |
186 | spin_unlock_irqrestore(&spinlock, flags); | |
187 | ||
27c766aa | 188 | pr_info("shutdown\n"); |
b4cc4aa2 JMG |
189 | |
190 | return 0; | |
191 | } | |
192 | ||
193 | /* | |
194 | * Send a keepalive ping to the watchdog | |
195 | * This is done by simply re-writing the timeout to reg. 0xF2 | |
196 | */ | |
197 | ||
198 | static int wdt_keepalive(void) | |
199 | { | |
200 | unsigned long flags; | |
201 | ||
202 | spin_lock_irqsave(&spinlock, flags); | |
203 | ||
204 | /* Unlock the SuperIO chip */ | |
84af401a AC |
205 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
206 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
207 | |
208 | /* Select device Aux2 (device=8) to kick watchdog reg F2 */ | |
84af401a AC |
209 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
210 | outb_p(0x08, IO_DATA_PORT); | |
211 | outb_p(0xF2, IO_INDEX_PORT); | |
212 | outb_p(timeoutW, IO_DATA_PORT); | |
b4cc4aa2 JMG |
213 | |
214 | /* Lock the SuperIO chip */ | |
84af401a | 215 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
216 | |
217 | spin_unlock_irqrestore(&spinlock, flags); | |
218 | ||
219 | return 0; | |
220 | } | |
221 | ||
222 | /* | |
223 | * Set the watchdog timeout value | |
224 | */ | |
225 | ||
226 | static int wdt_set_timeout(int t) | |
227 | { | |
228 | int tmrval; | |
229 | ||
230 | /* | |
231 | * Convert seconds to watchdog counter time units, rounding up. | |
84af401a | 232 | * On PCM-5335 watchdog units are 30 seconds/step with 15 sec startup |
b4cc4aa2 JMG |
233 | * value. This information is supplied in the PCM-5335 manual and was |
234 | * checked by me on a real board. This is a bit strange because W83977f | |
235 | * datasheet says counter unit is in minutes! | |
236 | */ | |
237 | if (t < 15) | |
238 | return -EINVAL; | |
239 | ||
240 | tmrval = ((t + 15) + 29) / 30; | |
241 | ||
242 | if (tmrval > 255) | |
243 | return -EINVAL; | |
244 | ||
245 | /* | |
84af401a | 246 | * timeout is the timeout in seconds, |
b4cc4aa2 JMG |
247 | * timeoutW is the timeout in watchdog counter units. |
248 | */ | |
249 | timeoutW = tmrval; | |
250 | timeout = (timeoutW * 30) - 15; | |
251 | return 0; | |
252 | } | |
253 | ||
254 | /* | |
255 | * Get the watchdog status | |
256 | */ | |
257 | ||
258 | static int wdt_get_status(int *status) | |
259 | { | |
260 | int new_status; | |
261 | unsigned long flags; | |
262 | ||
263 | spin_lock_irqsave(&spinlock, flags); | |
264 | ||
265 | /* Unlock the SuperIO chip */ | |
84af401a AC |
266 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); |
267 | outb_p(UNLOCK_DATA, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
268 | |
269 | /* Select device Aux2 (device=8) to read watchdog reg F4 */ | |
84af401a AC |
270 | outb_p(DEVICE_REGISTER, IO_INDEX_PORT); |
271 | outb_p(0x08, IO_DATA_PORT); | |
272 | outb_p(0xF4, IO_INDEX_PORT); | |
b4cc4aa2 JMG |
273 | new_status = inb_p(IO_DATA_PORT); |
274 | ||
275 | /* Lock the SuperIO chip */ | |
84af401a | 276 | outb_p(LOCK_DATA, IO_INDEX_PORT); |
b4cc4aa2 JMG |
277 | |
278 | spin_unlock_irqrestore(&spinlock, flags); | |
279 | ||
280 | *status = 0; | |
281 | if (new_status & 1) | |
282 | *status |= WDIOF_CARDRESET; | |
283 | ||
284 | return 0; | |
285 | } | |
286 | ||
287 | ||
288 | /* | |
289 | * /dev/watchdog handling | |
290 | */ | |
291 | ||
292 | static int wdt_open(struct inode *inode, struct file *file) | |
293 | { | |
294 | /* If the watchdog is alive we don't need to start it again */ | |
84af401a | 295 | if (test_and_set_bit(0, &timer_alive)) |
b4cc4aa2 JMG |
296 | return -EBUSY; |
297 | ||
298 | if (nowayout) | |
299 | __module_get(THIS_MODULE); | |
300 | ||
301 | wdt_start(); | |
302 | return nonseekable_open(inode, file); | |
303 | } | |
304 | ||
305 | static int wdt_release(struct inode *inode, struct file *file) | |
306 | { | |
307 | /* | |
308 | * Shut off the timer. | |
309 | * Lock it in if it's a module and we set nowayout | |
310 | */ | |
84af401a | 311 | if (expect_close == 42) { |
b4cc4aa2 JMG |
312 | wdt_stop(); |
313 | clear_bit(0, &timer_alive); | |
314 | } else { | |
315 | wdt_keepalive(); | |
27c766aa | 316 | pr_crit("unexpected close, not stopping watchdog!\n"); |
b4cc4aa2 JMG |
317 | } |
318 | expect_close = 0; | |
319 | return 0; | |
320 | } | |
321 | ||
322 | /* | |
323 | * wdt_write: | |
324 | * @file: file handle to the watchdog | |
325 | * @buf: buffer to write (unused as data does not matter here | |
326 | * @count: count of bytes | |
327 | * @ppos: pointer to the position to write. No seeks allowed | |
328 | * | |
329 | * A write to a watchdog device is defined as a keepalive signal. Any | |
330 | * write of data will do, as we we don't define content meaning. | |
331 | */ | |
332 | ||
333 | static ssize_t wdt_write(struct file *file, const char __user *buf, | |
334 | size_t count, loff_t *ppos) | |
335 | { | |
336 | /* See if we got the magic character 'V' and reload the timer */ | |
84af401a AC |
337 | if (count) { |
338 | if (!nowayout) { | |
b4cc4aa2 JMG |
339 | size_t ofs; |
340 | ||
84af401a AC |
341 | /* note: just in case someone wrote the |
342 | magic character long ago */ | |
b4cc4aa2 JMG |
343 | expect_close = 0; |
344 | ||
84af401a AC |
345 | /* scan to see whether or not we got the |
346 | magic character */ | |
347 | for (ofs = 0; ofs != count; ofs++) { | |
b4cc4aa2 JMG |
348 | char c; |
349 | if (get_user(c, buf + ofs)) | |
350 | return -EFAULT; | |
84af401a | 351 | if (c == 'V') |
b4cc4aa2 | 352 | expect_close = 42; |
b4cc4aa2 JMG |
353 | } |
354 | } | |
355 | ||
356 | /* someone wrote to us, we should restart timer */ | |
357 | wdt_keepalive(); | |
358 | } | |
359 | return count; | |
360 | } | |
361 | ||
362 | /* | |
363 | * wdt_ioctl: | |
364 | * @inode: inode of the device | |
365 | * @file: file handle to the device | |
366 | * @cmd: watchdog command | |
367 | * @arg: argument pointer | |
368 | * | |
369 | * The watchdog API defines a common set of functions for all watchdogs | |
370 | * according to their available features. | |
371 | */ | |
372 | ||
42747d71 | 373 | static const struct watchdog_info ident = { |
b4cc4aa2 JMG |
374 | .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, |
375 | .firmware_version = 1, | |
376 | .identity = WATCHDOG_NAME, | |
377 | }; | |
378 | ||
84af401a | 379 | static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
b4cc4aa2 JMG |
380 | { |
381 | int status; | |
382 | int new_options, retval = -EINVAL; | |
383 | int new_timeout; | |
384 | union { | |
385 | struct watchdog_info __user *ident; | |
386 | int __user *i; | |
387 | } uarg; | |
388 | ||
389 | uarg.i = (int __user *)arg; | |
390 | ||
84af401a | 391 | switch (cmd) { |
b4cc4aa2 | 392 | case WDIOC_GETSUPPORT: |
84af401a AC |
393 | return copy_to_user(uarg.ident, &ident, |
394 | sizeof(ident)) ? -EFAULT : 0; | |
b4cc4aa2 JMG |
395 | |
396 | case WDIOC_GETSTATUS: | |
397 | wdt_get_status(&status); | |
398 | return put_user(status, uarg.i); | |
399 | ||
400 | case WDIOC_GETBOOTSTATUS: | |
401 | return put_user(0, uarg.i); | |
402 | ||
b4cc4aa2 | 403 | case WDIOC_SETOPTIONS: |
84af401a | 404 | if (get_user(new_options, uarg.i)) |
b4cc4aa2 JMG |
405 | return -EFAULT; |
406 | ||
407 | if (new_options & WDIOS_DISABLECARD) { | |
408 | wdt_stop(); | |
409 | retval = 0; | |
410 | } | |
411 | ||
412 | if (new_options & WDIOS_ENABLECARD) { | |
413 | wdt_start(); | |
414 | retval = 0; | |
415 | } | |
416 | ||
417 | return retval; | |
418 | ||
0c06090c WVS |
419 | case WDIOC_KEEPALIVE: |
420 | wdt_keepalive(); | |
421 | return 0; | |
422 | ||
b4cc4aa2 JMG |
423 | case WDIOC_SETTIMEOUT: |
424 | if (get_user(new_timeout, uarg.i)) | |
425 | return -EFAULT; | |
426 | ||
427 | if (wdt_set_timeout(new_timeout)) | |
143a2e54 | 428 | return -EINVAL; |
b4cc4aa2 JMG |
429 | |
430 | wdt_keepalive(); | |
431 | /* Fall */ | |
432 | ||
433 | case WDIOC_GETTIMEOUT: | |
434 | return put_user(timeout, uarg.i); | |
435 | ||
0c06090c WVS |
436 | default: |
437 | return -ENOTTY; | |
438 | ||
b4cc4aa2 JMG |
439 | } |
440 | } | |
441 | ||
442 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, | |
443 | void *unused) | |
444 | { | |
84af401a | 445 | if (code == SYS_DOWN || code == SYS_HALT) |
b4cc4aa2 JMG |
446 | wdt_stop(); |
447 | return NOTIFY_DONE; | |
448 | } | |
449 | ||
84af401a | 450 | static const struct file_operations wdt_fops = { |
b4cc4aa2 JMG |
451 | .owner = THIS_MODULE, |
452 | .llseek = no_llseek, | |
453 | .write = wdt_write, | |
84af401a | 454 | .unlocked_ioctl = wdt_ioctl, |
b4cc4aa2 JMG |
455 | .open = wdt_open, |
456 | .release = wdt_release, | |
457 | }; | |
458 | ||
84af401a | 459 | static struct miscdevice wdt_miscdev = { |
b4cc4aa2 JMG |
460 | .minor = WATCHDOG_MINOR, |
461 | .name = "watchdog", | |
462 | .fops = &wdt_fops, | |
463 | }; | |
464 | ||
465 | static struct notifier_block wdt_notifier = { | |
466 | .notifier_call = wdt_notify_sys, | |
467 | }; | |
468 | ||
469 | static int __init w83977f_wdt_init(void) | |
470 | { | |
471 | int rc; | |
472 | ||
27c766aa | 473 | pr_info("driver v%s\n", WATCHDOG_VERSION); |
b4cc4aa2 | 474 | |
b4cc4aa2 | 475 | /* |
84af401a | 476 | * Check that the timeout value is within it's range; |
b4cc4aa2 JMG |
477 | * if not reset to the default |
478 | */ | |
479 | if (wdt_set_timeout(timeout)) { | |
480 | wdt_set_timeout(DEFAULT_TIMEOUT); | |
27c766aa JP |
481 | pr_info("timeout value must be 15 <= timeout <= 7635, using %d\n", |
482 | DEFAULT_TIMEOUT); | |
b4cc4aa2 JMG |
483 | } |
484 | ||
84af401a | 485 | if (!request_region(IO_INDEX_PORT, 2, WATCHDOG_NAME)) { |
27c766aa | 486 | pr_err("I/O address 0x%04x already in use\n", IO_INDEX_PORT); |
b4cc4aa2 JMG |
487 | rc = -EIO; |
488 | goto err_out; | |
489 | } | |
490 | ||
c6cb13ae | 491 | rc = register_reboot_notifier(&wdt_notifier); |
84af401a | 492 | if (rc) { |
27c766aa | 493 | pr_err("cannot register reboot notifier (err=%d)\n", rc); |
b4cc4aa2 JMG |
494 | goto err_out_region; |
495 | } | |
496 | ||
c6cb13ae | 497 | rc = misc_register(&wdt_miscdev); |
84af401a | 498 | if (rc) { |
27c766aa JP |
499 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", |
500 | wdt_miscdev.minor, rc); | |
c6cb13ae | 501 | goto err_out_reboot; |
b4cc4aa2 JMG |
502 | } |
503 | ||
27c766aa JP |
504 | pr_info("initialized. timeout=%d sec (nowayout=%d testmode=%d)\n", |
505 | timeout, nowayout, testmode); | |
b4cc4aa2 JMG |
506 | |
507 | return 0; | |
508 | ||
c6cb13ae WVS |
509 | err_out_reboot: |
510 | unregister_reboot_notifier(&wdt_notifier); | |
b4cc4aa2 | 511 | err_out_region: |
84af401a | 512 | release_region(IO_INDEX_PORT, 2); |
b4cc4aa2 JMG |
513 | err_out: |
514 | return rc; | |
515 | } | |
516 | ||
517 | static void __exit w83977f_wdt_exit(void) | |
518 | { | |
519 | wdt_stop(); | |
520 | misc_deregister(&wdt_miscdev); | |
521 | unregister_reboot_notifier(&wdt_notifier); | |
84af401a | 522 | release_region(IO_INDEX_PORT, 2); |
b4cc4aa2 JMG |
523 | } |
524 | ||
525 | module_init(w83977f_wdt_init); | |
526 | module_exit(w83977f_wdt_exit); | |
527 | ||
528 | MODULE_AUTHOR("Jose Goncalves <jose.goncalves@inov.pt>"); | |
529 | MODULE_DESCRIPTION("Driver for watchdog timer in W83977F I/O chip"); | |
530 | MODULE_LICENSE("GPL"); | |
531 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |