Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Intel 21285 watchdog driver | |
3 | * Copyright (c) Phil Blundell <pb@nexus.co.uk>, 1998 | |
4 | * | |
5 | * based on | |
6 | * | |
7 | * SoftDog 0.05: A Software Watchdog Device | |
8 | * | |
29fa0586 AC |
9 | * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>, |
10 | * All Rights Reserved. | |
1da177e4 LT |
11 | * |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | * | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/moduleparam.h> | |
21 | #include <linux/types.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/fs.h> | |
24 | #include <linux/mm.h> | |
25 | #include <linux/miscdevice.h> | |
26 | #include <linux/watchdog.h> | |
27 | #include <linux/reboot.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/interrupt.h> | |
d0e58eed AC |
30 | #include <linux/uaccess.h> |
31 | #include <linux/irq.h> | |
a09e64fb | 32 | #include <mach/hardware.h> |
1da177e4 | 33 | |
1da177e4 | 34 | #include <asm/mach-types.h> |
9f97da78 | 35 | #include <asm/system_info.h> |
1da177e4 LT |
36 | #include <asm/hardware/dec21285.h> |
37 | ||
38 | /* | |
39 | * Define this to stop the watchdog actually rebooting the machine. | |
40 | */ | |
41 | #undef ONLY_TESTING | |
42 | ||
43 | static unsigned int soft_margin = 60; /* in seconds */ | |
44 | static unsigned int reload; | |
45 | static unsigned long timer_alive; | |
46 | ||
47 | #ifdef ONLY_TESTING | |
48 | /* | |
49 | * If the timer expires.. | |
50 | */ | |
7d12e780 | 51 | static void watchdog_fire(int irq, void *dev_id) |
1da177e4 LT |
52 | { |
53 | printk(KERN_CRIT "Watchdog: Would Reboot.\n"); | |
54 | *CSR_TIMER4_CNTL = 0; | |
55 | *CSR_TIMER4_CLR = 0; | |
56 | } | |
57 | #endif | |
58 | ||
59 | /* | |
60 | * Refresh the timer. | |
61 | */ | |
62 | static void watchdog_ping(void) | |
63 | { | |
64 | *CSR_TIMER4_LOAD = reload; | |
65 | } | |
66 | ||
67 | /* | |
68 | * Allow only one person to hold it open | |
69 | */ | |
70 | static int watchdog_open(struct inode *inode, struct file *file) | |
71 | { | |
72 | int ret; | |
73 | ||
74 | if (*CSR_SA110_CNTL & (1 << 13)) | |
75 | return -EBUSY; | |
76 | ||
77 | if (test_and_set_bit(1, &timer_alive)) | |
78 | return -EBUSY; | |
79 | ||
80 | reload = soft_margin * (mem_fclk_21285 / 256); | |
81 | ||
82 | *CSR_TIMER4_CLR = 0; | |
83 | watchdog_ping(); | |
84 | *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | |
85 | | TIMER_CNTL_DIV256; | |
86 | ||
87 | #ifdef ONLY_TESTING | |
88 | ret = request_irq(IRQ_TIMER4, watchdog_fire, 0, "watchdog", NULL); | |
89 | if (ret) { | |
90 | *CSR_TIMER4_CNTL = 0; | |
91 | clear_bit(1, &timer_alive); | |
92 | } | |
93 | #else | |
94 | /* | |
95 | * Setting this bit is irreversible; once enabled, there is | |
96 | * no way to disable the watchdog. | |
97 | */ | |
98 | *CSR_SA110_CNTL |= 1 << 13; | |
99 | ||
100 | ret = 0; | |
101 | #endif | |
102 | nonseekable_open(inode, file); | |
103 | return ret; | |
104 | } | |
105 | ||
106 | /* | |
107 | * Shut off the timer. | |
108 | * Note: if we really have enabled the watchdog, there | |
109 | * is no way to turn off. | |
110 | */ | |
111 | static int watchdog_release(struct inode *inode, struct file *file) | |
112 | { | |
113 | #ifdef ONLY_TESTING | |
114 | free_irq(IRQ_TIMER4, NULL); | |
115 | clear_bit(1, &timer_alive); | |
116 | #endif | |
117 | return 0; | |
118 | } | |
119 | ||
edf86c9b BD |
120 | static ssize_t watchdog_write(struct file *file, const char __user *data, |
121 | size_t len, loff_t *ppos) | |
1da177e4 LT |
122 | { |
123 | /* | |
124 | * Refresh the timer. | |
125 | */ | |
126 | if (len) | |
127 | watchdog_ping(); | |
128 | ||
129 | return len; | |
130 | } | |
131 | ||
d0e58eed | 132 | static const struct watchdog_info ident = { |
1da177e4 LT |
133 | .options = WDIOF_SETTIMEOUT, |
134 | .identity = "Footbridge Watchdog", | |
135 | }; | |
136 | ||
d0e58eed | 137 | static long watchdog_ioctl(struct file *file, unsigned int cmd, |
edf86c9b | 138 | unsigned long arg) |
1da177e4 LT |
139 | { |
140 | unsigned int new_margin; | |
edf86c9b | 141 | int __user *int_arg = (int __user *)arg; |
795b89d2 | 142 | int ret = -ENOTTY; |
1da177e4 | 143 | |
d0e58eed | 144 | switch (cmd) { |
1da177e4 LT |
145 | case WDIOC_GETSUPPORT: |
146 | ret = 0; | |
edf86c9b | 147 | if (copy_to_user((void __user *)arg, &ident, sizeof(ident))) |
1da177e4 LT |
148 | ret = -EFAULT; |
149 | break; | |
150 | ||
151 | case WDIOC_GETSTATUS: | |
152 | case WDIOC_GETBOOTSTATUS: | |
edf86c9b | 153 | ret = put_user(0, int_arg); |
1da177e4 LT |
154 | break; |
155 | ||
156 | case WDIOC_KEEPALIVE: | |
157 | watchdog_ping(); | |
158 | ret = 0; | |
159 | break; | |
160 | ||
161 | case WDIOC_SETTIMEOUT: | |
edf86c9b | 162 | ret = get_user(new_margin, int_arg); |
1da177e4 LT |
163 | if (ret) |
164 | break; | |
165 | ||
166 | /* Arbitrary, can't find the card's limits */ | |
167 | if (new_margin < 0 || new_margin > 60) { | |
168 | ret = -EINVAL; | |
169 | break; | |
170 | } | |
171 | ||
172 | soft_margin = new_margin; | |
173 | reload = soft_margin * (mem_fclk_21285 / 256); | |
174 | watchdog_ping(); | |
175 | /* Fall */ | |
176 | case WDIOC_GETTIMEOUT: | |
edf86c9b | 177 | ret = put_user(soft_margin, int_arg); |
1da177e4 LT |
178 | break; |
179 | } | |
180 | return ret; | |
181 | } | |
182 | ||
62322d25 | 183 | static const struct file_operations watchdog_fops = { |
1da177e4 LT |
184 | .owner = THIS_MODULE, |
185 | .llseek = no_llseek, | |
186 | .write = watchdog_write, | |
d0e58eed | 187 | .unlocked_ioctl = watchdog_ioctl, |
1da177e4 LT |
188 | .open = watchdog_open, |
189 | .release = watchdog_release, | |
190 | }; | |
191 | ||
192 | static struct miscdevice watchdog_miscdev = { | |
193 | .minor = WATCHDOG_MINOR, | |
194 | .name = "watchdog", | |
195 | .fops = &watchdog_fops, | |
196 | }; | |
197 | ||
198 | static int __init footbridge_watchdog_init(void) | |
199 | { | |
200 | int retval; | |
201 | ||
202 | if (machine_is_netwinder()) | |
203 | return -ENODEV; | |
204 | ||
205 | retval = misc_register(&watchdog_miscdev); | |
206 | if (retval < 0) | |
207 | return retval; | |
208 | ||
d0e58eed AC |
209 | printk(KERN_INFO |
210 | "Footbridge Watchdog Timer: 0.01, timer margin: %d sec\n", | |
211 | soft_margin); | |
1da177e4 LT |
212 | |
213 | if (machine_is_cats()) | |
3f11df21 | 214 | printk(KERN_WARNING |
d0e58eed | 215 | "Warning: Watchdog reset may not work on this machine.\n"); |
1da177e4 LT |
216 | return 0; |
217 | } | |
218 | ||
219 | static void __exit footbridge_watchdog_exit(void) | |
220 | { | |
221 | misc_deregister(&watchdog_miscdev); | |
222 | } | |
223 | ||
224 | MODULE_AUTHOR("Phil Blundell <pb@nexus.co.uk>"); | |
225 | MODULE_DESCRIPTION("Footbridge watchdog driver"); | |
226 | MODULE_LICENSE("GPL"); | |
227 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
228 | ||
229 | module_param(soft_margin, int, 0); | |
d0e58eed | 230 | MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); |
1da177e4 LT |
231 | |
232 | module_init(footbridge_watchdog_init); | |
233 | module_exit(footbridge_watchdog_exit); |