* gdbcmd.h (detachlist): Declare.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
86157c20
AS
12006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
2
3 * config/tc-sh.c (md_assemble): Define size of branches.
4
ba5f0fda
BE
52006-10-26 Ben Elliston <bje@au.ibm.com>
6
7 * dw2gencfi.c (cfi_add_CFA_offset):
8 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
9
033cd5fd
BE
10 * write.c (chain_frchains_together_1): Assert that this function
11 never returns a pointer to the auto variable `dummy'.
12
e9f53129
AM
132006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
14 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
15 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
16 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
17 Alan Modra <amodra@bigpond.net.au>
18
19 * config/tc-spu.c: New file.
20 * config/tc-spu.h: New file.
21 * configure.tgt: Add SPU support.
22 * Makefile.am: Likewise. Run "make dep-am".
23 * Makefile.in: Regenerate.
24 * po/POTFILES.in: Regenerate.
25
7b383517
BE
262006-10-25 Ben Elliston <bje@au.ibm.com>
27
28 * expr.c (expr): Replace O_add case in switch (op_left) explaining
29 why it can never occur.
30
ede602d7
AM
312006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
32
33 * doc/c-ppc.texi (-mcell): Document.
34 * config/tc-ppc.c (parse_cpu): Parse -mcell.
35 (md_show_usage): Document -mcell.
36
7918206c
MM
372006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
38
39 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
40
878bcc43
AM
412006-10-23 Alan Modra <amodra@bigpond.net.au>
42
43 * config/tc-m68hc11.c (md_assemble): Quiet warning.
44
8620418b
MF
452006-10-19 Mike Frysinger <vapier@gentoo.org>
46
47 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
48 (x86_64_section_letter): Likewise.
49
b3549761
NC
502006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
51
52 * config/tc-score.c (build_relax_frag): Compute correct
53 tc_frag_data.fixp.
54
71a75f6f
MF
552006-10-18 Roy Marples <uberlord@gentoo.org>
56
57 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
58 elf32-sparc as a viable target for the -32 switch and any target
59 starting with elf64-sparc as a viable target for the -64 switch.
60 (sparc_target_format): For 64-bit ELF flavoured output use
61 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
62 ELF_TARGET_FORMAT.
71a75f6f
MF
63 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
64
e1b5fdd4
L
652006-10-17 H.J. Lu <hongjiu.lu@intel.com>
66
67 * configure: Regenerated.
68
f8ef9cd7
BS
692006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
70
71 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
72 in addition to testing for '\n'.
73 (TC_EOL_IN_INSN): Provide a default definition if necessary.
74
eb1fe072
NC
752006-10-13 Sterling Augstine <sterling@tensilica.com>
76
77 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
78 a disjoint DW_AT range.
79
ec6e49f4
NC
802006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
81
82 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
83
036dc3f7
PB
842006-10-08 Paul Brook <paul@codesourcery.com>
85
86 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
87 (parse_operands): Use parse_big_immediate for OP_NILO.
88 (neon_cmode_for_logic_imm): Try smaller element sizes.
89 (neon_cmode_for_move_imm): Ditto.
90 (do_neon_logic): Handle .i64 pseudo-op.
91
3bb0c887
AM
922006-09-29 Alan Modra <amodra@bigpond.net.au>
93
94 * po/POTFILES.in: Regenerate.
95
ef05d495
L
962006-09-28 H.J. Lu <hongjiu.lu@intel.com>
97
98 * config/tc-i386.h (CpuMNI): Renamed to ...
99 (CpuSSSE3): This.
100 (CpuUnknownFlags): Updated.
101 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
102 and PROCESSOR_MEROM with PROCESSOR_CORE2.
103 * config/tc-i386.c: Updated.
104 * doc/c-i386.texi: Likewise.
a70ae331 105
ef05d495
L
106 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
107
d8ad03e9
NC
1082006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
109
110 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
111
df3ca5a3
NC
1122006-09-27 Nick Clifton <nickc@redhat.com>
113
114 * output-file.c (output_file_close): Prevent an infinite loop
115 reporting that stdoutput could not be closed.
116
2d447fca
JM
1172006-09-26 Mark Shinwell <shinwell@codesourcery.com>
118 Joseph Myers <joseph@codesourcery.com>
119 Ian Lance Taylor <ian@wasabisystems.com>
120 Ben Elliston <bje@wasabisystems.com>
121
122 * config/tc-arm.c (arm_cext_iwmmxt2): New.
123 (enum operand_parse_code): New code OP_RIWR_I32z.
124 (parse_operands): Handle OP_RIWR_I32z.
125 (do_iwmmxt_wmerge): New function.
126 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
127 a register.
128 (do_iwmmxt_wrwrwr_or_imm5): New function.
129 (insns): Mark instructions as RIWR_I32z as appropriate.
130 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
131 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
132 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
133 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
134 (md_begin): Handle IWMMXT2.
135 (arm_cpus): Add iwmmxt2.
136 (arm_extensions): Likewise.
137 (arm_archs): Likewise.
138
ba83aca1
BW
1392006-09-25 Bob Wilson <bob.wilson@acm.org>
140
141 * doc/as.texinfo (Overview): Revise description of --keep-locals.
142 Add xref to "Symbol Names".
143 (L): Refer to "local symbols" instead of "local labels". Move
144 definition to "Symbol Names" section; add xref to that section.
145 (Symbol Names): Use "Local Symbol Names" section to define local
146 symbols. Add "Local Labels" heading for description of temporary
147 forward/backward labels, and refer to those as "local labels".
148
539e75ad
L
1492006-09-23 H.J. Lu <hongjiu.lu@intel.com>
150
151 PR binutils/3235
152 * config/tc-i386.c (match_template): Check address size prefix
153 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
154 operand.
155
5e02f92e
AM
1562006-09-22 Alan Modra <amodra@bigpond.net.au>
157
158 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
159
885afe7b
AM
1602006-09-22 Alan Modra <amodra@bigpond.net.au>
161
162 * as.h (as_perror): Delete declaration.
163 * gdbinit.in (as_perror): Delete breakpoint.
164 * messages.c (as_perror): Delete function.
165 * doc/internals.texi: Remove as_perror description.
166 * listing.c (listing_print: Don't use as_perror.
167 * output-file.c (output_file_create, output_file_close): Likewise.
168 * symbols.c (symbol_create, symbol_clone): Likewise.
169 * write.c (write_contents): Likewise.
170 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
171 * config/tc-tic54x.c (tic54x_mlib): Likewise.
172
3aeeedbb
AM
1732006-09-22 Alan Modra <amodra@bigpond.net.au>
174
175 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
176 (ppc_handle_align): New function.
177 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
178 (SUB_SEGMENT_ALIGN): Define as zero.
179
96e9638b
BW
1802006-09-20 Bob Wilson <bob.wilson@acm.org>
181
182 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
183 (Overview): Skip cross reference in man page.
184
99ad8390
NC
1852006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
186
187 * configure.in: Add new target x86_64-pc-mingw64.
188 * configure: Regenerate.
189 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
190 * config/obj-coff.h: Add handling for TE_PEP target specific code
191 and definitions.
99ad8390
NC
192 * config/tc-i386.c: Add new targets.
193 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
194 (x86_64_target_format): Add new method for setup proper default
195 target cpu mode.
99ad8390
NC
196 * config/te-pep.h: Add new target definition header.
197 (TE_PEP): New macro: Identifies new target architecture.
198 (COFF_WITH_pex64): Set proper includes in bfd.
199 * NEWS: Mention new target.
200
73332571
BS
2012006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
202
203 * config/bfin-parse.y (binary): Change sub of const to add of negated
204 const.
205
1c0d3aa6
NC
2062006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
207
208 * config/tc-score.c: New file.
209 * config/tc-score.h: Newf file.
210 * configure.tgt: Add Score target.
211 * Makefile.am: Add Score files.
212 * Makefile.in: Regenerate.
213 * NEWS: Mention new target support.
214
4fa3602b
PB
2152006-09-16 Paul Brook <paul@codesourcery.com>
216
217 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
218 * doc/c-arm.texi (movsp): Document offset argument.
219
16dd5e42
PB
2202006-09-16 Paul Brook <paul@codesourcery.com>
221
222 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
223 unsigned int to avoid 64-bit host problems.
224
c4ae04ce
BS
2252006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
226
227 * config/bfin-parse.y (binary): Do some more constant folding for
228 additions.
229
e5d4a5a6
JB
2302006-09-13 Jan Beulich <jbeulich@novell.com>
231
232 * input-file.c (input_file_give_next_buffer): Demote as_bad to
233 as_warn.
234
1a1219cb
AM
2352006-09-13 Alan Modra <amodra@bigpond.net.au>
236
237 PR gas/3165
238 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
239 in parens.
240
f79d9c1d
AM
2412006-09-13 Alan Modra <amodra@bigpond.net.au>
242
243 * input-file.c (input_file_open): Replace as_perror with as_bad
244 so that gas exits with error on file errors. Correct error
245 message.
246 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 247 * input-file.h: Update comment.
f79d9c1d 248
f512f76f
NC
2492006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
250
251 PR gas/3172
252 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
253 registers as a sub-class of wC registers.
254
8d79fd44
AM
2552006-09-11 Alan Modra <amodra@bigpond.net.au>
256
257 PR gas/3165
258 * config/tc-mips.h (enum dwarf2_format): Forward declare.
259 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
260 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
261 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
262
6258339f
NC
2632006-09-08 Nick Clifton <nickc@redhat.com>
264
265 PR gas/3129
266 * doc/as.texinfo (Macro): Improve documentation about separating
267 macro arguments from following text.
268
f91e006c
PB
2692006-09-08 Paul Brook <paul@codesourcery.com>
270
271 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
272
466bbf93
PB
2732006-09-07 Paul Brook <paul@codesourcery.com>
274
275 * config/tc-arm.c (parse_operands): Mark operand as present.
276
428e3f1f
PB
2772006-09-04 Paul Brook <paul@codesourcery.com>
278
279 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
280 (do_neon_dyadic_if_i_d): Avoid setting U bit.
281 (do_neon_mac_maybe_scalar): Ditto.
282 (do_neon_dyadic_narrow): Force operand type to NT_integer.
283 (insns): Remove out of date comments.
284
fb25138b
NC
2852006-08-29 Nick Clifton <nickc@redhat.com>
286
287 * read.c (s_align): Initialize the 'stopc' variable to prevent
288 compiler complaints about it being used without being
289 initialized.
290 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
291 s_float_space, s_struct, cons_worker, equals): Likewise.
292
5091343a
AM
2932006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
294
295 * ecoff.c (ecoff_directive_val): Fix message typo.
296 * config/tc-ns32k.c (convert_iif): Likewise.
297 * config/tc-sh64.c (shmedia_check_limits): Likewise.
298
1f2a7e38
BW
2992006-08-25 Sterling Augustine <sterling@tensilica.com>
300 Bob Wilson <bob.wilson@acm.org>
301
302 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
303 the state of the absolute_literals directive. Remove align frag at
304 the start of the literal pool position.
305
34135039
BW
3062006-08-25 Bob Wilson <bob.wilson@acm.org>
307
308 * doc/c-xtensa.texi: Add @group commands in examples.
309
74869ac7
BW
3102006-08-24 Bob Wilson <bob.wilson@acm.org>
311
312 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
313 (INIT_LITERAL_SECTION_NAME): Delete.
314 (lit_state struct): Remove segment names, init_lit_seg, and
315 fini_lit_seg. Add lit_prefix and current_text_seg.
316 (init_literal_head_h, init_literal_head): Delete.
317 (fini_literal_head_h, fini_literal_head): Delete.
318 (xtensa_begin_directive): Move argument parsing to
319 xtensa_literal_prefix function.
320 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
321 (xtensa_literal_prefix): Parse the directive argument here and
322 record it in the lit_prefix field. Remove code to derive literal
323 section names.
324 (linkonce_len): New.
325 (get_is_linkonce_section): Use linkonce_len. Check for any
326 ".gnu.linkonce.*" section, not just text sections.
327 (md_begin): Remove initialization of deleted lit_state fields.
328 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
329 to init_literal_head and fini_literal_head.
330 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
331 when traversing literal_head list.
332 (match_section_group): New.
333 (cache_literal_section): Rewrite to determine the literal section
334 name on the fly, create the section and return it.
335 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
336 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
337 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
338 Use xtensa_get_property_section from bfd.
339 (retrieve_xtensa_section): Delete.
340 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
341 description to refer to plural literal sections and add xref to
342 the Literal Directive section.
343 (Literal Directive): Describe new rules for deriving literal section
344 names. Add footnote for special case of .init/.fini with
345 --text-section-literals.
346 (Literal Prefix Directive): Replace old naming rules with xref to the
347 Literal Directive section.
348
87a1fd79
JM
3492006-08-21 Joseph Myers <joseph@codesourcery.com>
350
351 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
352 merging with previous long opcode.
353
7148cc28
NC
3542006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
355
356 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
357 * Makefile.in: Regenerate.
358 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
359 renamed. Adjust.
360
3e9e4fcf
JB
3612006-08-16 Julian Brown <julian@codesourcery.com>
362
363 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
364 to use ARM instructions on non-ARM-supporting cores.
365 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
366 mode automatically based on cpu variant.
367 (md_begin): Call above function.
368
267d2029
JB
3692006-08-16 Julian Brown <julian@codesourcery.com>
370
371 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
372 recognized in non-unified syntax mode.
373
4be041b2
TS
3742006-08-15 Thiemo Seufer <ths@mips.com>
375 Nigel Stephens <nigel@mips.com>
376 David Ung <davidu@mips.com>
377
378 * configure.tgt: Handle mips*-sde-elf*.
379
3a93f742
TS
3802006-08-12 Thiemo Seufer <ths@networkno.de>
381
382 * config/tc-mips.c (mips16_ip): Fix argument register handling
383 for restore instruction.
384
1737851b
BW
3852006-08-08 Bob Wilson <bob.wilson@acm.org>
386
387 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
388 (out_sleb128): New.
389 (out_fixed_inc_line_addr): New.
390 (process_entries): Use out_fixed_inc_line_addr when
391 DWARF2_USE_FIXED_ADVANCE_PC is set.
392 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
393
e14e52f8
DD
3942006-08-08 DJ Delorie <dj@redhat.com>
395
396 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
397 vs full symbols so that we never have more than one pointer value
398 for any given symbol in our symbol table.
399
802f5d9e
NC
4002006-08-08 Sterling Augustine <sterling@tensilica.com>
401
402 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
403 and emit DW_AT_ranges when code in compilation unit is not
404 contiguous.
405 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
406 is not contiguous.
407 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
408 (out_debug_ranges): New function to emit .debug_ranges section
409 when code is not contiguous.
410
720abc60
NC
4112006-08-08 Nick Clifton <nickc@redhat.com>
412
413 * config/tc-arm.c (WARN_DEPRECATED): Enable.
414
f0927246
NC
4152006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
416
417 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
418 only block.
419 (pe_directive_secrel) [TE_PE]: New function.
420 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
421 loc, loc_mark_labels.
422 [TE_PE]: Handle secrel32.
423 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
424 call.
425 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
426 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
427 (md_section_align): Only round section sizes here for AOUT
428 targets.
429 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
430 (tc_pe_dwarf2_emit_offset): New function.
431 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
432 (cons_fix_new_arm): Handle O_secrel.
433 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
434 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
435 of OBJ_ELF only block.
436 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
437 tc_pe_dwarf2_emit_offset.
438
55e6e397
RS
4392006-08-04 Richard Sandiford <richard@codesourcery.com>
440
441 * config/tc-sh.c (apply_full_field_fix): New function.
442 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
443 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
444 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
445 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
446
9cd19b17
NC
4472006-08-03 Nick Clifton <nickc@redhat.com>
448
449 PR gas/2991
450 * config.in: Regenerate.
451
97f87066
JM
4522006-08-03 Joseph Myers <joseph@codesourcery.com>
453
454 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 455 for OP_RIWR_RIWC.
97f87066 456
41adaa5c
JM
4572006-08-03 Joseph Myers <joseph@codesourcery.com>
458
459 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
460 (parse_operands): Handle it.
461 (insns): Use it for tmcr and tmrc.
462
9d7cbccd
NC
4632006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
464
465 PR binutils/2983
466 * config/tc-i386.c (md_parse_option): Treat any target starting
467 with elf64_x86_64 as a viable target for the -64 switch.
468 (i386_target_format): For 64-bit ELF flavoured output use
469 ELF_TARGET_FORMAT64.
470 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
471
c973bc5c
NC
4722006-08-02 Nick Clifton <nickc@redhat.com>
473
474 PR gas/2991
475 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
476 bfd/aclocal.m4.
477 * configure.in: Run BFD_BINARY_FOPEN.
478 * configure: Regenerate.
479 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
480 file to include.
481
cfde7f70
L
4822006-08-01 H.J. Lu <hongjiu.lu@intel.com>
483
484 * config/tc-i386.c (md_assemble): Don't update
485 cpu_arch_isa_flags.
486
b4c71f56
TS
4872006-08-01 Thiemo Seufer <ths@mips.com>
488
489 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
490
54f4ddb3
TS
4912006-08-01 Thiemo Seufer <ths@mips.com>
492
493 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
494 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
495 BFD_RELOC_32 and BFD_RELOC_16.
496 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
497 md_convert_frag, md_obj_end): Fix comment formatting.
498
d103cf61
TS
4992006-07-31 Thiemo Seufer <ths@mips.com>
500
501 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
502 handling for BFD_RELOC_MIPS16_JMP.
503
601e61cd
NC
5042006-07-24 Andreas Schwab <schwab@suse.de>
505
506 PR/2756
507 * read.c (read_a_source_file): Ignore unknown text after line
508 comment character. Fix misleading comment.
509
b45619c0
NC
5102006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
511
512 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
513 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
514 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
515 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
516 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
517 doc/c-z80.texi, doc/internals.texi: Fix some typos.
518
784906c5
NC
5192006-07-21 Nick Clifton <nickc@redhat.com>
520
521 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
522 linker testsuite.
523
d5f010e9
TS
5242006-07-20 Thiemo Seufer <ths@mips.com>
525 Nigel Stephens <nigel@mips.com>
526
527 * config/tc-mips.c (md_parse_option): Don't infer optimisation
528 options from debug options.
529
35d3d567
TS
5302006-07-20 Thiemo Seufer <ths@mips.com>
531
532 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
533 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
534
401a54cf
PB
5352006-07-19 Paul Brook <paul@codesourcery.com>
536
537 * config/tc-arm.c (insns): Fix rbit Arm opcode.
538
16805f35
PB
5392006-07-18 Paul Brook <paul@codesourcery.com>
540
541 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
542 (md_convert_frag): Use correct reloc for add_pc. Use
543 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
544 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
545 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
546
d9e05e4e
AM
5472006-07-17 Mat Hostetter <mat@lcs.mit.edu>
548
549 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
550 when file and line unknown.
551
f43abd2b
TS
5522006-07-17 Thiemo Seufer <ths@mips.com>
553
554 * read.c (s_struct): Use IS_ELF.
555 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
556 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
557 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
558 s_mips_mask): Likewise.
559
a2902af6
TS
5602006-07-16 Thiemo Seufer <ths@mips.com>
561 David Ung <davidu@mips.com>
562
563 * read.c (s_struct): Handle ELF section changing.
564 * config/tc-mips.c (s_align): Leave enabling auto-align to the
565 generic code.
566 (s_change_sec): Try section changing only if we output ELF.
567
d32cad65
L
5682006-07-15 H.J. Lu <hongjiu.lu@intel.com>
569
570 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
571 CpuAmdFam10.
572 (smallest_imm_type): Remove Cpu086.
573 (i386_target_format): Likewise.
574
575 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
576 Update CpuXXX.
577
050dfa73
MM
5782006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
579 Michael Meissner <michael.meissner@amd.com>
580
581 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
582 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
583 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
584 architecture.
585 (i386_align_code): Ditto.
586 (md_assemble_code): Add support for insertq/extrq instructions,
587 swapping as needed for intel syntax.
588 (swap_imm_operands): New function to swap immediate operands.
589 (swap_operands): Deal with 4 operand instructions.
590 (build_modrm_byte): Add support for insertq instruction.
591
6b2de085
L
5922006-07-13 H.J. Lu <hongjiu.lu@intel.com>
593
594 * config/tc-i386.h (Size64): Fix a typo in comment.
595
01eaea5a
NC
5962006-07-12 Nick Clifton <nickc@redhat.com>
597
598 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 599 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
600 already been checked here.
601
1e85aad8
JW
6022006-07-07 James E Wilson <wilson@specifix.com>
603
604 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
605
1370e33d
NC
6062006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
607 Nick Clifton <nickc@redhat.com>
608
609 PR binutils/2877
610 * doc/as.texi: Fix spelling typo: branchs => branches.
611 * doc/c-m68hc11.texi: Likewise.
612 * config/tc-m68hc11.c: Likewise.
613 Support old spelling of command line switch for backwards
614 compatibility.
615
5f0fe04b
TS
6162006-07-04 Thiemo Seufer <ths@mips.com>
617 David Ung <davidu@mips.com>
618
619 * config/tc-mips.c (s_is_linkonce): New function.
620 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
621 weak, external, and linkonce symbols.
622 (pic_need_relax): Use s_is_linkonce.
623
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L
6242006-06-24 H.J. Lu <hongjiu.lu@intel.com>
625
626 * doc/as.texinfo (Org): Remove space.
627 (P2align): Add "@var{abs-expr},".
628
ccc9c027
L
6292006-06-23 H.J. Lu <hongjiu.lu@intel.com>
630
631 * config/tc-i386.c (cpu_arch_tune_set): New.
632 (cpu_arch_isa): Likewise.
633 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
634 nops with short or long nop sequences based on -march=/.arch
635 and -mtune=.
636 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
637 set cpu_arch_tune and cpu_arch_tune_flags.
638 (md_parse_option): For -march=, set cpu_arch_isa and set
639 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
640 0. Set cpu_arch_tune_set to 1 for -mtune=.
641 (i386_target_format): Don't set cpu_arch_tune.
642
d4dc2f22
TS
6432006-06-23 Nigel Stephens <nigel@mips.com>
644
645 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
646 generated .sbss.* and .gnu.linkonce.sb.*.
647
a8dbcb85
TS
6482006-06-23 Thiemo Seufer <ths@mips.com>
649 David Ung <davidu@mips.com>
650
651 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
652 label_list.
653 * config/tc-mips.c (label_list): Define per-segment label_list.
654 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
655 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
656 mips_from_file_after_relocs, mips_define_label): Use per-segment
657 label_list.
658
3994f87e
TS
6592006-06-22 Thiemo Seufer <ths@mips.com>
660
661 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
662 (append_insn): Use it.
663 (md_apply_fix): Whitespace formatting.
664 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
665 mips16_extended_frag): Remove register specifier.
666 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
667 constants.
668
fa073d69
MS
6692006-06-21 Mark Shinwell <shinwell@codesourcery.com>
670
671 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
672 a directive saving VFP registers for ARMv6 or later.
673 (s_arm_unwind_save): Add parameter arch_v6 and call
674 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
675 appropriate.
676 (md_pseudo_table): Add entry for new "vsave" directive.
677 * doc/c-arm.texi: Correct error in example for "save"
678 directive (fstmdf -> fstmdx). Also document "vsave" directive.
679
8e77b565 6802006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
681 Anatoly Sokolov <aesok@post.ru>
682
a70ae331
AM
683 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
684 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
685 atmega164p/atmega324p.
686 * doc/c-avr.texi: Document new mcu and arch options.
687
8b1ad454
NC
6882006-06-17 Nick Clifton <nickc@redhat.com>
689
690 * config/tc-arm.c (enum parse_operand_result): Move outside of
691 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
692
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L
6932006-06-16 H.J. Lu <hongjiu.lu@intel.com>
694
695 * config/tc-i386.h (processor_type): New.
696 (arch_entry): Add type.
697
698 * config/tc-i386.c (cpu_arch_tune): New.
699 (cpu_arch_tune_flags): Likewise.
700 (cpu_arch_isa_flags): Likewise.
701 (cpu_arch): Updated.
702 (set_cpu_arch): Also update cpu_arch_isa_flags.
703 (md_assemble): Update cpu_arch_isa_flags.
704 (OPTION_MARCH): New.
705 (OPTION_MTUNE): Likewise.
706 (md_longopts): Add -march= and -mtune=.
707 (md_parse_option): Support -march= and -mtune=.
708 (md_show_usage): Add -march=CPU/-mtune=CPU.
709 (i386_target_format): Also update cpu_arch_isa_flags,
710 cpu_arch_tune and cpu_arch_tune_flags.
711
712 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
713
714 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
715
4962c51a
MS
7162006-06-15 Mark Shinwell <shinwell@codesourcery.com>
717
718 * config/tc-arm.c (enum parse_operand_result): New.
719 (struct group_reloc_table_entry): New.
720 (enum group_reloc_type): New.
721 (group_reloc_table): New array.
722 (find_group_reloc_table_entry): New function.
723 (parse_shifter_operand_group_reloc): New function.
724 (parse_address_main): New function, incorporating code
725 from the old parse_address function. To be used via...
726 (parse_address): wrapper for parse_address_main; and
727 (parse_address_group_reloc): new function, likewise.
728 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
729 OP_ADDRGLDRS, OP_ADDRGLDC.
730 (parse_operands): Support for these new operand codes.
731 New macro po_misc_or_fail_no_backtrack.
732 (encode_arm_cp_address): Preserve group relocations.
733 (insns): Modify to use the above operand codes where group
734 relocations are permitted.
735 (md_apply_fix): Handle the group relocations
736 ALU_PC_G0_NC through LDC_SB_G2.
737 (tc_gen_reloc): Likewise.
738 (arm_force_relocation): Leave group relocations for the linker.
739 (arm_fix_adjustable): Likewise.
740
cd2f129f
JB
7412006-06-15 Julian Brown <julian@codesourcery.com>
742
743 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
744 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
745 relocs properly.
746
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7472006-06-12 H.J. Lu <hongjiu.lu@intel.com>
748
749 * config/tc-i386.c (process_suffix): Don't add rex64 for
750 "xchg %rax,%rax".
751
1787fe5b
TS
7522006-06-09 Thiemo Seufer <ths@mips.com>
753
754 * config/tc-mips.c (mips_ip): Maintain argument count.
755
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7562006-06-09 Alan Modra <amodra@bigpond.net.au>
757
758 * config/tc-iq2000.c: Include sb.h.
759
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TS
7602006-06-08 Nigel Stephens <nigel@mips.com>
761
762 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
763 aliases for better compatibility with SGI tools.
764
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7652006-06-08 Alan Modra <amodra@bigpond.net.au>
766
767 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
768 * Makefile.am (GASLIBS): Expand @BFDLIB@.
769 (BFDVER_H): Delete.
770 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
771 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
772 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
773 Run "make dep-am".
774 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
775 * Makefile.in: Regenerate.
776 * doc/Makefile.in: Regenerate.
777 * configure: Regenerate.
778
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JM
7792006-06-07 Joseph S. Myers <joseph@codesourcery.com>
780
781 * po/Make-in (pdf, ps): New dummy targets.
782
037e8744
JB
7832006-06-07 Julian Brown <julian@codesourcery.com>
784
785 * config/tc-arm.c (stdarg.h): include.
786 (arm_it): Add uncond_value field. Add isvec and issingle to operand
787 array.
788 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
789 REG_TYPE_NSDQ (single, double or quad vector reg).
790 (reg_expected_msgs): Update.
791 (BAD_FPU): Add macro for unsupported FPU instruction error.
792 (parse_neon_type): Support 'd' as an alias for .f64.
793 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
794 sets of registers.
795 (parse_vfp_reg_list): Don't update first arg on error.
796 (parse_neon_mov): Support extra syntax for VFP moves.
797 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
798 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
799 (parse_operands): Support isvec, issingle operands fields, new parse
800 codes above.
801 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
802 msr variants.
803 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
804 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
805 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
806 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
807 shapes.
808 (neon_shape): Redefine in terms of above.
809 (neon_shape_class): New enumeration, table of shape classes.
810 (neon_shape_el): New enumeration. One element of a shape.
811 (neon_shape_el_size): Register widths of above, where appropriate.
812 (neon_shape_info): New struct. Info for shape table.
813 (neon_shape_tab): New array.
814 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
815 (neon_check_shape): Rewrite as...
816 (neon_select_shape): New function to classify instruction shapes,
817 driven by new table neon_shape_tab array.
818 (neon_quad): New function. Return 1 if shape should set Q flag in
819 instructions (or equivalent), 0 otherwise.
820 (type_chk_of_el_type): Support F64.
821 (el_type_of_type_chk): Likewise.
822 (neon_check_type): Add support for VFP type checking (VFP data
823 elements fill their containing registers).
824 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
825 in thumb mode for VFP instructions.
826 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
827 and encode the current instruction as if it were that opcode.
828 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
829 arguments, call function in PFN.
830 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
831 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
832 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
833 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
834 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
835 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
836 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
837 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
838 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
839 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
840 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
841 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
842 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
843 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
844 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
845 neon_quad.
846 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
847 between VFP and Neon turns out to belong to Neon. Perform
848 architecture check and fill in condition field if appropriate.
849 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
850 (do_neon_cvt): Add support for VFP variants of instructions.
851 (neon_cvt_flavour): Extend to cover VFP conversions.
852 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
853 vmov variants.
854 (do_neon_ldr_str): Handle single-precision VFP load/store.
855 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
856 NS_NULL not NS_IGNORE.
857 (opcode_tag): Add OT_csuffixF for operands which either take a
858 conditional suffix, or have 0xF in the condition field.
859 (md_assemble): Add support for OT_csuffixF.
860 (NCE): Replace macro with...
861 (NCE_tag, NCE, NCEF): New macros.
862 (nCE): Replace macro with...
863 (nCE_tag, nCE, nCEF): New macros.
864 (insns): Add support for VFP insns or VFP versions of insns msr,
865 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
866 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
867 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
868 VFP/Neon insns together.
869
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8702006-06-07 Alan Modra <amodra@bigpond.net.au>
871 Ladislav Michl <ladis@linux-mips.org>
872
873 * app.c: Don't include headers already included by as.h.
874 * as.c: Likewise.
875 * atof-generic.c: Likewise.
876 * cgen.c: Likewise.
877 * dwarf2dbg.c: Likewise.
878 * expr.c: Likewise.
879 * input-file.c: Likewise.
880 * input-scrub.c: Likewise.
881 * macro.c: Likewise.
882 * output-file.c: Likewise.
883 * read.c: Likewise.
884 * sb.c: Likewise.
885 * config/bfin-lex.l: Likewise.
886 * config/obj-coff.h: Likewise.
887 * config/obj-elf.h: Likewise.
888 * config/obj-som.h: Likewise.
889 * config/tc-arc.c: Likewise.
890 * config/tc-arm.c: Likewise.
891 * config/tc-avr.c: Likewise.
892 * config/tc-bfin.c: Likewise.
893 * config/tc-cris.c: Likewise.
894 * config/tc-d10v.c: Likewise.
895 * config/tc-d30v.c: Likewise.
896 * config/tc-dlx.h: Likewise.
897 * config/tc-fr30.c: Likewise.
898 * config/tc-frv.c: Likewise.
899 * config/tc-h8300.c: Likewise.
900 * config/tc-hppa.c: Likewise.
901 * config/tc-i370.c: Likewise.
902 * config/tc-i860.c: Likewise.
903 * config/tc-i960.c: Likewise.
904 * config/tc-ip2k.c: Likewise.
905 * config/tc-iq2000.c: Likewise.
906 * config/tc-m32c.c: Likewise.
907 * config/tc-m32r.c: Likewise.
908 * config/tc-maxq.c: Likewise.
909 * config/tc-mcore.c: Likewise.
910 * config/tc-mips.c: Likewise.
911 * config/tc-mmix.c: Likewise.
912 * config/tc-mn10200.c: Likewise.
913 * config/tc-mn10300.c: Likewise.
914 * config/tc-msp430.c: Likewise.
915 * config/tc-mt.c: Likewise.
916 * config/tc-ns32k.c: Likewise.
917 * config/tc-openrisc.c: Likewise.
918 * config/tc-ppc.c: Likewise.
919 * config/tc-s390.c: Likewise.
920 * config/tc-sh.c: Likewise.
921 * config/tc-sh64.c: Likewise.
922 * config/tc-sparc.c: Likewise.
923 * config/tc-tic30.c: Likewise.
924 * config/tc-tic4x.c: Likewise.
925 * config/tc-tic54x.c: Likewise.
926 * config/tc-v850.c: Likewise.
927 * config/tc-vax.c: Likewise.
928 * config/tc-xc16x.c: Likewise.
929 * config/tc-xstormy16.c: Likewise.
930 * config/tc-xtensa.c: Likewise.
931 * config/tc-z80.c: Likewise.
932 * config/tc-z8k.c: Likewise.
933 * macro.h: Don't include sb.h or ansidecl.h.
934 * sb.h: Don't include stdio.h or ansidecl.h.
935 * cond.c: Include sb.h.
936 * itbl-lex.l: Include as.h instead of other system headers.
937 * itbl-parse.y: Likewise.
938 * itbl-ops.c: Similarly.
939 * itbl-ops.h: Don't include as.h or ansidecl.h.
940 * config/bfin-defs.h: Don't include bfd.h or as.h.
941 * config/bfin-parse.y: Include as.h instead of other system headers.
942
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9432006-06-06 Ben Elliston <bje@au.ibm.com>
944 Anton Blanchard <anton@samba.org>
945
946 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
947 (md_show_usage): Document it.
948 (ppc_setup_opcodes): Test power6 opcode flag bits.
949 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
950
65263ce3
TS
9512006-06-06 Thiemo Seufer <ths@mips.com>
952 Chao-ying Fu <fu@mips.com>
953
954 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
955 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
956 (macro_build): Update comment.
957 (mips_ip): Allow DSP64 instructions for MIPS64R2.
958 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
959 CPU_HAS_MDMX.
960 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
961 MIPS_CPU_ASE_MDMX flags for sb1.
962
a9e24354
TS
9632006-06-05 Thiemo Seufer <ths@mips.com>
964
965 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
966 appropriate.
967 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
968 (mips_ip): Make overflowed/underflowed constant arguments in DSP
969 and MT instructions a fatal error. Use INSERT_OPERAND where
970 appropriate. Improve warnings for break and wait code overflows.
971 Use symbolic constant of OP_MASK_COPZ.
972 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
973
4cfe2c59
DJ
9742006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
975
976 * po/Make-in (top_builddir): Define.
977
e10fad12
JM
9782006-06-02 Joseph S. Myers <joseph@codesourcery.com>
979
980 * doc/Makefile.am (TEXI2DVI): Define.
981 * doc/Makefile.in: Regenerate.
982 * doc/c-arc.texi: Fix typo.
983
12e64c2c
AM
9842006-06-01 Alan Modra <amodra@bigpond.net.au>
985
986 * config/obj-ieee.c: Delete.
987 * config/obj-ieee.h: Delete.
988 * Makefile.am (OBJ_FORMATS): Remove ieee.
989 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
990 (obj-ieee.o): Remove rule.
991 * Makefile.in: Regenerate.
992 * configure.in (atof): Remove tahoe.
993 (OBJ_MAYBE_IEEE): Don't define.
994 * configure: Regenerate.
995 * config.in: Regenerate.
996 * doc/Makefile.in: Regenerate.
997 * po/POTFILES.in: Regenerate.
998
20e95c23
DJ
9992006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1000
1001 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1002 and LIBINTL_DEP everywhere.
1003 (INTLLIBS): Remove.
1004 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1005 * acinclude.m4: Include new gettext macros.
1006 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1007 Remove local code for po/Makefile.
1008 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1009
eebf07fb
NC
10102006-05-30 Nick Clifton <nickc@redhat.com>
1011
1012 * po/es.po: Updated Spanish translation.
1013
b6aee19e
DC
10142006-05-06 Denis Chertykov <denisc@overta.ru>
1015
1016 * doc/c-avr.texi: New file.
1017 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1018 * doc/all.texi: Set AVR
1019 * doc/as.texinfo: Include c-avr.texi
1020
f8fdc850 10212006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1022
f8fdc850
JZ
1023 * config/bfin-parse.y (check_macfunc): Loose the condition of
1024 calling check_multiply_halfregs ().
1025
a3205465
JZ
10262006-05-25 Jie Zhang <jie.zhang@analog.com>
1027
1028 * config/bfin-parse.y (asm_1): Better check and deal with
1029 vector and scalar Multiply 16-Bit Operands instructions.
1030
9b52905e
NC
10312006-05-24 Nick Clifton <nickc@redhat.com>
1032
1033 * config/tc-hppa.c: Convert to ISO C90 format.
1034 * config/tc-hppa.h: Likewise.
1035
10362006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1037 Randolph Chung <randolph@tausq.org>
a70ae331 1038
9b52905e
NC
1039 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1040 is_tls_ieoff, is_tls_leoff): Define.
1041 (fix_new_hppa): Handle TLS.
1042 (cons_fix_new_hppa): Likewise.
1043 (pa_ip): Likewise.
1044 (md_apply_fix): Handle TLS relocs.
1045 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1046
a70ae331 10472006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1048
1049 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1050
ad3fea08
TS
10512006-05-23 Thiemo Seufer <ths@mips.com>
1052 David Ung <davidu@mips.com>
1053 Nigel Stephens <nigel@mips.com>
1054
1055 [ gas/ChangeLog ]
1056 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1057 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1058 ISA_HAS_MXHC1): New macros.
1059 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1060 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1061 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1062 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1063 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1064 (mips_after_parse_args): Change default handling of float register
1065 size to account for 32bit code with 64bit FP. Better sanity checking
1066 of ISA/ASE/ABI option combinations.
1067 (s_mipsset): Support switching of GPR and FPR sizes via
1068 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1069 options.
1070 (mips_elf_final_processing): We should record the use of 64bit FP
1071 registers in 32bit code but we don't, because ELF header flags are
1072 a scarce ressource.
1073 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1074 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1075 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1076 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1077 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1078 missing -march options. Document .set arch=CPU. Move .set smartmips
1079 to ASE page. Use @code for .set FOO examples.
1080
8b64503a
JZ
10812006-05-23 Jie Zhang <jie.zhang@analog.com>
1082
1083 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1084 if needed.
1085
403022e0
JZ
10862006-05-23 Jie Zhang <jie.zhang@analog.com>
1087
1088 * config/bfin-defs.h (bfin_equals): Remove declaration.
1089 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1090 * config/tc-bfin.c (bfin_name_is_register): Remove.
1091 (bfin_equals): Remove.
1092 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1093 (bfin_name_is_register): Remove declaration.
1094
7455baf8
TS
10952006-05-19 Thiemo Seufer <ths@mips.com>
1096 Nigel Stephens <nigel@mips.com>
1097
1098 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1099 (mips_oddfpreg_ok): New function.
1100 (mips_ip): Use it.
1101
707bfff6
TS
11022006-05-19 Thiemo Seufer <ths@mips.com>
1103 David Ung <davidu@mips.com>
1104
1105 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1106 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1107 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1108 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1109 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1110 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1111 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1112 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1113 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1114 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1115 reg_names_o32, reg_names_n32n64): Define register classes.
1116 (reg_lookup): New function, use register classes.
1117 (md_begin): Reserve register names in the symbol table. Simplify
1118 OBJ_ELF defines.
1119 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1120 Use reg_lookup.
1121 (mips16_ip): Use reg_lookup.
1122 (tc_get_register): Likewise.
1123 (tc_mips_regname_to_dw2regnum): New function.
1124
1df69f4f
TS
11252006-05-19 Thiemo Seufer <ths@mips.com>
1126
1127 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1128 Un-constify string argument.
1129 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1130 Likewise.
1131 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1132 Likewise.
1133 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1134 Likewise.
1135 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1136 Likewise.
1137 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1138 Likewise.
1139 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1140 Likewise.
1141
377260ba
NS
11422006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1143
1144 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1145 cfloat/m68881 to correct architecture before using it.
1146
cce7653b
NC
11472006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1148
a70ae331 1149 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1150 constant values.
1151
b0796911
PB
11522006-05-15 Paul Brook <paul@codesourcery.com>
1153
1154 * config/tc-arm.c (arm_adjust_symtab): Use
1155 bfd_is_arm_special_symbol_name.
1156
64b607e6
BW
11572006-05-15 Bob Wilson <bob.wilson@acm.org>
1158
1159 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1160 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1161 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1162 Handle errors from calls to xtensa_opcode_is_* functions.
1163
9b3f89ee
TS
11642006-05-14 Thiemo Seufer <ths@mips.com>
1165
1166 * config/tc-mips.c (macro_build): Test for currently active
1167 mips16 option.
1168 (mips16_ip): Reject invalid opcodes.
1169
370b66a1
CD
11702006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1171
1172 * doc/as.texinfo: Rename "Index" to "AS Index",
1173 and "ABORT" to "ABORT (COFF)".
1174
b6895b4f
PB
11752006-05-11 Paul Brook <paul@codesourcery.com>
1176
1177 * config/tc-arm.c (parse_half): New function.
1178 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1179 (parse_operands): Ditto.
1180 (do_mov16): Reject invalid relocations.
1181 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1182 (insns): Replace Iffff with HALF.
1183 (md_apply_fix): Add MOVW and MOVT relocs.
1184 (tc_gen_reloc): Ditto.
1185 * doc/c-arm.texi: Document relocation operators
1186
e28387c3
PB
11872006-05-11 Paul Brook <paul@codesourcery.com>
1188
1189 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1190
89ee2ebe
TS
11912006-05-11 Thiemo Seufer <ths@mips.com>
1192
1193 * config/tc-mips.c (append_insn): Don't check the range of j or
1194 jal addresses.
1195
53baae48
NC
11962006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1197
1198 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1199 relocs against external symbols for WinCE targets.
53baae48
NC
1200 (md_apply_fix): Likewise.
1201
4e2a74a8
TS
12022006-05-09 David Ung <davidu@mips.com>
1203
1204 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1205 j or jal address.
1206
337ff0a5
NC
12072006-05-09 Nick Clifton <nickc@redhat.com>
1208
1209 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1210 against symbols which are not going to be placed into the symbol
1211 table.
1212
8c9f705e
BE
12132006-05-09 Ben Elliston <bje@au.ibm.com>
1214
1215 * expr.c (operand): Remove `if (0 && ..)' statement and
1216 subsequently unused target_op label. Collapse `if (1 || ..)'
1217 statement.
1218 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1219 separately above the switch.
1220
2fd0d2ac
NC
12212006-05-08 Nick Clifton <nickc@redhat.com>
1222
1223 PR gas/2623
1224 * config/tc-msp430.c (line_separator_character): Define as |.
1225
e16bfa71
TS
12262006-05-08 Thiemo Seufer <ths@mips.com>
1227 Nigel Stephens <nigel@mips.com>
1228 David Ung <davidu@mips.com>
1229
1230 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1231 (mips_opts): Likewise.
1232 (file_ase_smartmips): New variable.
1233 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1234 (macro_build): Handle SmartMIPS instructions.
1235 (mips_ip): Likewise.
1236 (md_longopts): Add argument handling for smartmips.
1237 (md_parse_options, mips_after_parse_args): Likewise.
1238 (s_mipsset): Add .set smartmips support.
1239 (md_show_usage): Document -msmartmips/-mno-smartmips.
1240 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1241 .set smartmips.
1242 * doc/c-mips.texi: Likewise.
1243
32638454
AM
12442006-05-08 Alan Modra <amodra@bigpond.net.au>
1245
1246 * write.c (relax_segment): Add pass count arg. Don't error on
1247 negative org/space on first two passes.
1248 (relax_seg_info): New struct.
1249 (relax_seg, write_object_file): Adjust.
1250 * write.h (relax_segment): Update prototype.
1251
b7fc2769
JB
12522006-05-05 Julian Brown <julian@codesourcery.com>
1253
1254 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1255 checking.
1256 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1257 architecture version checks.
1258 (insns): Allow overlapping instructions to be used in VFP mode.
1259
7f841127
L
12602006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1261
1262 PR gas/2598
1263 * config/obj-elf.c (obj_elf_change_section): Allow user
1264 specified SHF_ALPHA_GPREL.
1265
73160847
NC
12662006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1267
1268 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1269 for PMEM related expressions.
1270
56487c55
NC
12712006-05-05 Nick Clifton <nickc@redhat.com>
1272
1273 PR gas/2582
1274 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1275 insertion of a directory separator character into a string at a
1276 given offset. Uses heuristics to decide when to use a backslash
1277 character rather than a forward-slash character.
1278 (dwarf2_directive_loc): Use the macro.
1279 (out_debug_info): Likewise.
1280
d43b4baf
TS
12812006-05-05 Thiemo Seufer <ths@mips.com>
1282 David Ung <davidu@mips.com>
1283
1284 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1285 instruction.
1286 (macro): Add new case M_CACHE_AB.
1287
088fa78e
KH
12882006-05-04 Kazu Hirata <kazu@codesourcery.com>
1289
1290 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1291 (opcode_lookup): Issue a warning for opcode with
1292 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1293 identical to OT_cinfix3.
1294 (TxC3w, TC3w, tC3w): New.
1295 (insns): Use tC3w and TC3w for comparison instructions with
1296 's' suffix.
1297
c9049d30
AM
12982006-05-04 Alan Modra <amodra@bigpond.net.au>
1299
1300 * subsegs.h (struct frchain): Delete frch_seg.
1301 (frchain_root): Delete.
1302 (seg_info): Define as macro.
1303 * subsegs.c (frchain_root): Delete.
1304 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1305 (subsegs_begin, subseg_change): Adjust for above.
1306 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1307 rather than to one big list.
1308 (subseg_get): Don't special case abs, und sections.
1309 (subseg_new, subseg_force_new): Don't set frchainP here.
1310 (seg_info): Delete.
1311 (subsegs_print_statistics): Adjust frag chain control list traversal.
1312 * debug.c (dmp_frags): Likewise.
1313 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1314 at frchain_root. Make use of known frchain ordering.
1315 (last_frag_for_seg): Likewise.
1316 (get_frag_fix): Likewise. Add seg param.
1317 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1318 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1319 (SUB_SEGMENT_ALIGN): Likewise.
1320 (subsegs_finish): Adjust frchain list traversal.
1321 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1322 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1323 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1324 (xtensa_fix_b_j_loop_end_frags): Likewise.
1325 (xtensa_fix_close_loop_end_frags): Likewise.
1326 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1327 (retrieve_segment_info): Delete frch_seg initialisation.
1328
f592407e
AM
13292006-05-03 Alan Modra <amodra@bigpond.net.au>
1330
1331 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1332 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1333 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1334 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1335
df7849c5
JM
13362006-05-02 Joseph Myers <joseph@codesourcery.com>
1337
1338 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1339 here.
1340 (md_apply_fix3): Multiply offset by 4 here for
1341 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1342
2d545b82
L
13432006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1344 Jan Beulich <jbeulich@novell.com>
1345
1346 * config/tc-i386.c (output_invalid_buf): Change size for
1347 unsigned char.
1348 * config/tc-tic30.c (output_invalid_buf): Likewise.
1349
1350 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1351 unsigned char.
1352 * config/tc-tic30.c (output_invalid): Likewise.
1353
38fc1cb1
DJ
13542006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1355
1356 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1357 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1358 (asconfig.texi): Don't set top_srcdir.
1359 * doc/as.texinfo: Don't use top_srcdir.
1360 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1361
2d545b82
L
13622006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1363
1364 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1365 * config/tc-tic30.c (output_invalid_buf): Likewise.
1366
1367 * config/tc-i386.c (output_invalid): Use snprintf instead of
1368 sprintf.
1369 * config/tc-ia64.c (declare_register_set): Likewise.
1370 (emit_one_bundle): Likewise.
1371 (check_dependencies): Likewise.
1372 * config/tc-tic30.c (output_invalid): Likewise.
1373
a8bc6c78
PB
13742006-05-02 Paul Brook <paul@codesourcery.com>
1375
1376 * config/tc-arm.c (arm_optimize_expr): New function.
1377 * config/tc-arm.h (md_optimize_expr): Define
1378 (arm_optimize_expr): Add prototype.
1379 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1380
58633d9a
BE
13812006-05-02 Ben Elliston <bje@au.ibm.com>
1382
22772e33
BE
1383 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1384 field unsigned.
1385
58633d9a
BE
1386 * sb.h (sb_list_vector): Move to sb.c.
1387 * sb.c (free_list): Use type of sb_list_vector directly.
1388 (sb_build): Fix off-by-one error in assertion about `size'.
1389
89cdfe57
BE
13902006-05-01 Ben Elliston <bje@au.ibm.com>
1391
1392 * listing.c (listing_listing): Remove useless loop.
1393 * macro.c (macro_expand): Remove is_positional local variable.
1394 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1395 and simplify surrounding expressions, where possible.
1396 (assign_symbol): Likewise.
1397 (s_weakref): Likewise.
1398 * symbols.c (colon): Likewise.
1399
c35da140
AM
14002006-05-01 James Lemke <jwlemke@wasabisystems.com>
1401
1402 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1403
9bcd4f99
TS
14042006-04-30 Thiemo Seufer <ths@mips.com>
1405 David Ung <davidu@mips.com>
1406
1407 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1408 (mips_immed): New table that records various handling of udi
1409 instruction patterns.
1410 (mips_ip): Adds udi handling.
1411
001ae1a4
AM
14122006-04-28 Alan Modra <amodra@bigpond.net.au>
1413
1414 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1415 of list rather than beginning.
1416
136da414
JB
14172006-04-26 Julian Brown <julian@codesourcery.com>
1418
1419 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1420 (is_quarter_float): Rename from above. Simplify slightly.
1421 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1422 number.
1423 (parse_neon_mov): Parse floating-point constants.
1424 (neon_qfloat_bits): Fix encoding.
1425 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1426 preference to integer encoding when using the F32 type.
1427
dcbf9037
JB
14282006-04-26 Julian Brown <julian@codesourcery.com>
1429
1430 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1431 zero-initialising structures containing it will lead to invalid types).
1432 (arm_it): Add vectype to each operand.
1433 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1434 defined field.
1435 (neon_typed_alias): New structure. Extra information for typed
1436 register aliases.
1437 (reg_entry): Add neon type info field.
1438 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1439 Break out alternative syntax for coprocessor registers, etc. into...
1440 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1441 out from arm_reg_parse.
1442 (parse_neon_type): Move. Return SUCCESS/FAIL.
1443 (first_error): New function. Call to ensure first error which occurs is
1444 reported.
1445 (parse_neon_operand_type): Parse exactly one type.
1446 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1447 (parse_typed_reg_or_scalar): New function. Handle core of both
1448 arm_typed_reg_parse and parse_scalar.
1449 (arm_typed_reg_parse): Parse a register with an optional type.
1450 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1451 result.
1452 (parse_scalar): Parse a Neon scalar with optional type.
1453 (parse_reg_list): Use first_error.
1454 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1455 (neon_alias_types_same): New function. Return true if two (alias) types
1456 are the same.
1457 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1458 of elements.
1459 (insert_reg_alias): Return new reg_entry not void.
1460 (insert_neon_reg_alias): New function. Insert type/index information as
1461 well as register for alias.
1462 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1463 make typed register aliases accordingly.
1464 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1465 of line.
1466 (s_unreq): Delete type information if present.
1467 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1468 (s_arm_unwind_save_mmxwcg): Likewise.
1469 (s_arm_unwind_movsp): Likewise.
1470 (s_arm_unwind_setfp): Likewise.
1471 (parse_shift): Likewise.
1472 (parse_shifter_operand): Likewise.
1473 (parse_address): Likewise.
1474 (parse_tb): Likewise.
1475 (tc_arm_regname_to_dw2regnum): Likewise.
1476 (md_pseudo_table): Add dn, qn.
1477 (parse_neon_mov): Handle typed operands.
1478 (parse_operands): Likewise.
1479 (neon_type_mask): Add N_SIZ.
1480 (N_ALLMODS): New macro.
1481 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1482 (el_type_of_type_chk): Add some safeguards.
1483 (modify_types_allowed): Fix logic bug.
1484 (neon_check_type): Handle operands with types.
1485 (neon_three_same): Remove redundant optional arg handling.
1486 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1487 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1488 (do_neon_step): Adjust accordingly.
1489 (neon_cmode_for_logic_imm): Use first_error.
1490 (do_neon_bitfield): Call neon_check_type.
1491 (neon_dyadic): Rename to...
1492 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1493 to allow modification of type of the destination.
1494 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1495 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1496 (do_neon_compare): Make destination be an untyped bitfield.
1497 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1498 (neon_mul_mac): Return early in case of errors.
1499 (neon_move_immediate): Use first_error.
1500 (neon_mac_reg_scalar_long): Fix type to include scalar.
1501 (do_neon_dup): Likewise.
1502 (do_neon_mov): Likewise (in several places).
1503 (do_neon_tbl_tbx): Fix type.
1504 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1505 (do_neon_ld_dup): Exit early in case of errors and/or use
1506 first_error.
1507 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1508 Handle .dn/.qn directives.
1509 (REGDEF): Add zero for reg_entry neon field.
1510
5287ad62
JB
15112006-04-26 Julian Brown <julian@codesourcery.com>
1512
1513 * config/tc-arm.c (limits.h): Include.
1514 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1515 (fpu_vfp_v3_or_neon_ext): Declare constants.
1516 (neon_el_type): New enumeration of types for Neon vector elements.
1517 (neon_type_el): New struct. Define type and size of a vector element.
1518 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1519 instruction.
1520 (neon_type): Define struct. The type of an instruction.
1521 (arm_it): Add 'vectype' for the current instruction.
1522 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1523 (vfp_sp_reg_pos): Rename to...
1524 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1525 tags.
1526 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1527 (Neon D or Q register).
1528 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1529 register.
1530 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1531 (my_get_expression): Allow above constant as argument to accept
1532 64-bit constants with optional prefix.
1533 (arm_reg_parse): Add extra argument to return the specific type of
1534 register in when either a D or Q register (REG_TYPE_NDQ) is
1535 requested. Can be NULL.
1536 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1537 (parse_reg_list): Update for new arm_reg_parse args.
1538 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1539 (parse_neon_el_struct_list): New function. Parse element/structure
1540 register lists for VLD<n>/VST<n> instructions.
1541 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1542 (s_arm_unwind_save_mmxwr): Likewise.
1543 (s_arm_unwind_save_mmxwcg): Likewise.
1544 (s_arm_unwind_movsp): Likewise.
1545 (s_arm_unwind_setfp): Likewise.
1546 (parse_big_immediate): New function. Parse an immediate, which may be
1547 64 bits wide. Put results in inst.operands[i].
1548 (parse_shift): Update for new arm_reg_parse args.
1549 (parse_address): Likewise. Add parsing of alignment specifiers.
1550 (parse_neon_mov): Parse the operands of a VMOV instruction.
1551 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1552 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1553 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1554 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1555 (parse_operands): Handle new codes above.
1556 (encode_arm_vfp_sp_reg): Rename to...
1557 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1558 selected VFP version only supports D0-D15.
1559 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1560 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1561 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1562 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1563 encode_arm_vfp_reg name, and allow 32 D regs.
1564 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1565 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1566 regs.
1567 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1568 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1569 constant-load and conversion insns introduced with VFPv3.
1570 (neon_tab_entry): New struct.
1571 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1572 those which are the targets of pseudo-instructions.
1573 (neon_opc): Enumerate opcodes, use as indices into...
1574 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1575 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1576 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1577 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1578 neon_enc_tab.
1579 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1580 Neon instructions.
1581 (neon_type_mask): New. Compact type representation for type checking.
1582 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1583 permitted type combinations.
1584 (N_IGNORE_TYPE): New macro.
1585 (neon_check_shape): New function. Check an instruction shape for
1586 multiple alternatives. Return the specific shape for the current
1587 instruction.
1588 (neon_modify_type_size): New function. Modify a vector type and size,
1589 depending on the bit mask in argument 1.
1590 (neon_type_promote): New function. Convert a given "key" type (of an
1591 operand) into the correct type for a different operand, based on a bit
1592 mask.
1593 (type_chk_of_el_type): New function. Convert a type and size into the
1594 compact representation used for type checking.
1595 (el_type_of_type_ckh): New function. Reverse of above (only when a
1596 single bit is set in the bit mask).
1597 (modify_types_allowed): New function. Alter a mask of allowed types
1598 based on a bit mask of modifications.
1599 (neon_check_type): New function. Check the type of the current
1600 instruction against the variable argument list. The "key" type of the
1601 instruction is returned.
1602 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1603 a Neon data-processing instruction depending on whether we're in ARM
1604 mode or Thumb-2 mode.
1605 (neon_logbits): New function.
1606 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1607 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1608 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1609 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1610 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1611 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1612 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1613 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1614 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1615 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1616 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1617 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1618 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1619 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1620 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1621 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1622 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1623 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1624 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1625 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1626 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1627 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1628 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1629 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1630 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1631 helpers.
1632 (parse_neon_type): New function. Parse Neon type specifier.
1633 (opcode_lookup): Allow parsing of Neon type specifiers.
1634 (REGNUM2, REGSETH, REGSET2): New macros.
1635 (reg_names): Add new VFPv3 and Neon registers.
1636 (NUF, nUF, NCE, nCE): New macros for opcode table.
1637 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1638 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1639 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1640 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1641 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1642 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1643 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1644 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1645 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1646 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1647 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1648 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1649 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1650 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1651 fto[us][lh][sd].
1652 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1653 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1654 (arm_option_cpu_value): Add vfp3 and neon.
1655 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1656 VFPv1 attribute.
1657
1946c96e
BW
16582006-04-25 Bob Wilson <bob.wilson@acm.org>
1659
1660 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1661 syntax instead of hardcoded opcodes with ".w18" suffixes.
1662 (wide_branch_opcode): New.
1663 (build_transition): Use it to check for wide branch opcodes with
1664 either ".w18" or ".w15" suffixes.
1665
5033a645
BW
16662006-04-25 Bob Wilson <bob.wilson@acm.org>
1667
1668 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1669 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1670 frag's is_literal flag.
1671
395fa56f
BW
16722006-04-25 Bob Wilson <bob.wilson@acm.org>
1673
1674 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1675
708587a4
KH
16762006-04-23 Kazu Hirata <kazu@codesourcery.com>
1677
1678 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1679 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1680 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1681 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1682 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1683
8463be01
PB
16842005-04-20 Paul Brook <paul@codesourcery.com>
1685
1686 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1687 all targets.
1688 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1689
f26a5955
AM
16902006-04-19 Alan Modra <amodra@bigpond.net.au>
1691
1692 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1693 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1694 Make some cpus unsupported on ELF. Run "make dep-am".
1695 * Makefile.in: Regenerate.
1696
241a6c40
AM
16972006-04-19 Alan Modra <amodra@bigpond.net.au>
1698
1699 * configure.in (--enable-targets): Indent help message.
1700 * configure: Regenerate.
1701
bb8f5920
L
17022006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1703
1704 PR gas/2533
1705 * config/tc-i386.c (i386_immediate): Check illegal immediate
1706 register operand.
1707
23d9d9de
AM
17082006-04-18 Alan Modra <amodra@bigpond.net.au>
1709
64e74474
AM
1710 * config/tc-i386.c: Formatting.
1711 (output_disp, output_imm): ISO C90 params.
1712
6cbe03fb
AM
1713 * frags.c (frag_offset_fixed_p): Constify args.
1714 * frags.h (frag_offset_fixed_p): Ditto.
1715
23d9d9de
AM
1716 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1717 (COFF_MAGIC): Delete.
a37d486e
AM
1718
1719 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1720
e7403566
DJ
17212006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1722
1723 * po/POTFILES.in: Regenerated.
1724
58ab4f3d
MM
17252006-04-16 Mark Mitchell <mark@codesourcery.com>
1726
1727 * doc/as.texinfo: Mention that some .type syntaxes are not
1728 supported on all architectures.
1729
482fd9f9
BW
17302006-04-14 Sterling Augustine <sterling@tensilica.com>
1731
1732 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1733 instructions when such transformations have been disabled.
1734
05d58145
BW
17352006-04-10 Sterling Augustine <sterling@tensilica.com>
1736
1737 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1738 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1739 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1740 decoding the loop instructions. Remove current_offset variable.
1741 (xtensa_fix_short_loop_frags): Likewise.
1742 (min_bytes_to_other_loop_end): Remove current_offset argument.
1743
9e75b3fa
AM
17442006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1745
a37d486e 1746 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1747 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1748
d727e8c2
NC
17492006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1750
1751 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1752 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1753 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1754 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1755 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1756 at90can64, at90usb646, at90usb647, at90usb1286 and
1757 at90usb1287.
1758 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1759
d252fdde
PB
17602006-04-07 Paul Brook <paul@codesourcery.com>
1761
1762 * config/tc-arm.c (parse_operands): Set default error message.
1763
ab1eb5fe
PB
17642006-04-07 Paul Brook <paul@codesourcery.com>
1765
1766 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1767
7ae2971b
PB
17682006-04-07 Paul Brook <paul@codesourcery.com>
1769
1770 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1771
53365c0d
PB
17722006-04-07 Paul Brook <paul@codesourcery.com>
1773
1774 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1775 (move_or_literal_pool): Handle Thumb-2 instructions.
1776 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1777
45aa61fe
AM
17782006-04-07 Alan Modra <amodra@bigpond.net.au>
1779
1780 PR 2512.
1781 * config/tc-i386.c (match_template): Move 64-bit operand tests
1782 inside loop.
1783
108a6f8e
CD
17842006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1785
1786 * po/Make-in: Add install-html target.
1787 * Makefile.am: Add install-html and install-html-recursive targets.
1788 * Makefile.in: Regenerate.
1789 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1790 * configure: Regenerate.
1791 * doc/Makefile.am: Add install-html and install-html-am targets.
1792 * doc/Makefile.in: Regenerate.
1793
ec651a3b
AM
17942006-04-06 Alan Modra <amodra@bigpond.net.au>
1795
1796 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1797 second scan.
1798
910600e9
RS
17992006-04-05 Richard Sandiford <richard@codesourcery.com>
1800 Daniel Jacobowitz <dan@codesourcery.com>
1801
1802 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1803 (GOTT_BASE, GOTT_INDEX): New.
1804 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1805 GOTT_INDEX when generating VxWorks PIC.
1806 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1807 use the generic *-*-vxworks* stanza instead.
1808
99630778
AM
18092006-04-04 Alan Modra <amodra@bigpond.net.au>
1810
1811 PR 997
1812 * frags.c (frag_offset_fixed_p): New function.
1813 * frags.h (frag_offset_fixed_p): Declare.
1814 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1815 (resolve_expression): Likewise.
1816
a02728c8
BW
18172006-04-03 Sterling Augustine <sterling@tensilica.com>
1818
1819 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1820 of the same length but different numbers of slots.
1821
9dfde49d
AS
18222006-03-30 Andreas Schwab <schwab@suse.de>
1823
1824 * configure.in: Fix help string for --enable-targets option.
1825 * configure: Regenerate.
1826
2da12c60
NS
18272006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1828
6d89cc8f
NS
1829 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1830 (m68k_ip): ... here. Use for all chips. Protect against buffer
1831 overrun and avoid excessive copying.
1832
2da12c60
NS
1833 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1834 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1835 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1836 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1837 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1838 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1839 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1840 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1841 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1842 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1843 (struct m68k_cpu): Change chip field to control_regs.
1844 (current_chip): Remove.
1845 (control_regs): New.
1846 (m68k_archs, m68k_extensions): Adjust.
1847 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1848 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1849 (find_cf_chip): Reimplement for new organization of cpu table.
1850 (select_control_regs): Remove.
1851 (mri_chip): Adjust.
1852 (struct save_opts): Save control regs, not chip.
1853 (s_save, s_restore): Adjust.
1854 (m68k_lookup_cpu): Give deprecated warning when necessary.
1855 (m68k_init_arch): Adjust.
1856 (md_show_usage): Adjust for new cpu table organization.
1857
1ac4baed
BS
18582006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1859
1860 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1861 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1862 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1863 "elf/bfin.h".
1864 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1865 (any_gotrel): New rule.
1866 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1867 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1868 "elf/bfin.h".
1869 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1870 (bfin_pic_ptr): New function.
1871 (md_pseudo_table): Add it for ".picptr".
1872 (OPTION_FDPIC): New macro.
1873 (md_longopts): Add -mfdpic.
1874 (md_parse_option): Handle it.
1875 (md_begin): Set BFD flags.
1876 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1877 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1878 us for GOT relocs.
1879 * Makefile.am (bfin-parse.o): Update dependencies.
1880 (DEPTC_bfin_elf): Likewise.
1881 * Makefile.in: Regenerate.
1882
a9d34880
RS
18832006-03-25 Richard Sandiford <richard@codesourcery.com>
1884
1885 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1886 mcfemac instead of mcfmac.
1887
9ca26584
AJ
18882006-03-23 Michael Matz <matz@suse.de>
1889
1890 * config/tc-i386.c (type_names): Correct placement of 'static'.
1891 (reloc): Map some more relocs to their 64 bit counterpart when
1892 size is 8.
1893 (output_insn): Work around breakage if DEBUG386 is defined.
1894 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1895 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1896 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1897 different from i386.
1898 (output_imm): Ditto.
1899 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1900 Imm64.
1901 (md_convert_frag): Jumps can now be larger than 2GB away, error
1902 out in that case.
1903 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1904 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1905
0a44bf69
RS
19062006-03-22 Richard Sandiford <richard@codesourcery.com>
1907 Daniel Jacobowitz <dan@codesourcery.com>
1908 Phil Edwards <phil@codesourcery.com>
1909 Zack Weinberg <zack@codesourcery.com>
1910 Mark Mitchell <mark@codesourcery.com>
1911 Nathan Sidwell <nathan@codesourcery.com>
1912
1913 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1914 (md_begin): Complain about -G being used for PIC. Don't change
1915 the text, data and bss alignments on VxWorks.
1916 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1917 generating VxWorks PIC.
1918 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1919 (macro): Likewise, but do not treat la $25 specially for
1920 VxWorks PIC, and do not handle jal.
1921 (OPTION_MVXWORKS_PIC): New macro.
1922 (md_longopts): Add -mvxworks-pic.
1923 (md_parse_option): Don't complain about using PIC and -G together here.
1924 Handle OPTION_MVXWORKS_PIC.
1925 (md_estimate_size_before_relax): Always use the first relaxation
1926 sequence on VxWorks.
1927 * config/tc-mips.h (VXWORKS_PIC): New.
1928
080eb7fe
PB
19292006-03-21 Paul Brook <paul@codesourcery.com>
1930
1931 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1932
03aaa593
BW
19332006-03-21 Sterling Augustine <sterling@tensilica.com>
1934
1935 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1936 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1937 (get_loop_align_size): New.
1938 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1939 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1940 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1941 (get_noop_aligned_address): Use get_loop_align_size.
1942 (get_aligned_diff): Likewise.
1943
3e94bf1a
PB
19442006-03-21 Paul Brook <paul@codesourcery.com>
1945
1946 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1947
dfa9f0d5
PB
19482006-03-20 Paul Brook <paul@codesourcery.com>
1949
1950 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1951 (do_t_branch): Encode branches inside IT blocks as unconditional.
1952 (do_t_cps): New function.
1953 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1954 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1955 (opcode_lookup): Allow conditional suffixes on all instructions in
1956 Thumb mode.
1957 (md_assemble): Advance condexec state before checking for errors.
1958 (insns): Use do_t_cps.
1959
6e1cb1a6
PB
19602006-03-20 Paul Brook <paul@codesourcery.com>
1961
1962 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1963 outputting the insn.
1964
0a966e2d
JBG
19652006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1966
1967 * config/tc-vax.c: Update copyright year.
1968 * config/tc-vax.h: Likewise.
1969
a49fcc17
JBG
19702006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1971
1972 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1973 make it static.
1974 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1975
f5208ef2
PB
19762006-03-17 Paul Brook <paul@codesourcery.com>
1977
1978 * config/tc-arm.c (insns): Add ldm and stm.
1979
cb4c78d6
BE
19802006-03-17 Ben Elliston <bje@au.ibm.com>
1981
1982 PR gas/2446
1983 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1984
c16d2bf0
PB
19852006-03-16 Paul Brook <paul@codesourcery.com>
1986
1987 * config/tc-arm.c (insns): Add "svc".
1988
80ca4e2c
BW
19892006-03-13 Bob Wilson <bob.wilson@acm.org>
1990
1991 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1992 flag and avoid double underscore prefixes.
1993
3a4a14e9
PB
19942006-03-10 Paul Brook <paul@codesourcery.com>
1995
1996 * config/tc-arm.c (md_begin): Handle EABIv5.
1997 (arm_eabis): Add EF_ARM_EABI_VER5.
1998 * doc/c-arm.texi: Document -meabi=5.
1999
518051dc
BE
20002006-03-10 Ben Elliston <bje@au.ibm.com>
2001
2002 * app.c (do_scrub_chars): Simplify string handling.
2003
00a97672
RS
20042006-03-07 Richard Sandiford <richard@codesourcery.com>
2005 Daniel Jacobowitz <dan@codesourcery.com>
2006 Zack Weinberg <zack@codesourcery.com>
2007 Nathan Sidwell <nathan@codesourcery.com>
2008 Paul Brook <paul@codesourcery.com>
2009 Ricardo Anguiano <anguiano@codesourcery.com>
2010 Phil Edwards <phil@codesourcery.com>
2011
2012 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2013 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2014 R_ARM_ABS12 reloc.
2015 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2016 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2017 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2018
b29757dc
BW
20192006-03-06 Bob Wilson <bob.wilson@acm.org>
2020
2021 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2022 even when using the text-section-literals option.
2023
0b2e31dc
NS
20242006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2025
2026 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2027 and cf.
2028 (m68k_ip): <case 'J'> Check we have some control regs.
2029 (md_parse_option): Allow raw arch switch.
2030 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2031 whether 68881 or cfloat was meant by -mfloat.
2032 (md_show_usage): Adjust extension display.
2033 (m68k_elf_final_processing): Adjust.
2034
df406460
NC
20352006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2036
2037 * config/tc-avr.c (avr_mod_hash_value): New function.
2038 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2039 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2040 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2041 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2042 of (int).
2043 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2044 fixups, abort otherwise.
df406460
NC
2045 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2046 tc_fix_adjustable): Define.
a70ae331 2047
53022e4a
JW
20482006-03-02 James E Wilson <wilson@specifix.com>
2049
2050 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2051 change the template, then clear md.slot[curr].end_of_insn_group.
2052
9f6f925e
JB
20532006-02-28 Jan Beulich <jbeulich@novell.com>
2054
2055 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2056
0e31b3e1
JB
20572006-02-28 Jan Beulich <jbeulich@novell.com>
2058
2059 PR/1070
2060 * macro.c (getstring): Don't treat parentheses special anymore.
2061 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2062 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2063 characters.
2064
10cd14b4
AM
20652006-02-28 Mat <mat@csail.mit.edu>
2066
2067 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2068
63752a75
JJ
20692006-02-27 Jakub Jelinek <jakub@redhat.com>
2070
2071 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2072 field.
2073 (CFI_signal_frame): Define.
2074 (cfi_pseudo_table): Add .cfi_signal_frame.
2075 (dot_cfi): Handle CFI_signal_frame.
2076 (output_cie): Handle cie->signal_frame.
2077 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2078 different. Copy signal_frame from FDE to newly created CIE.
2079 * doc/as.texinfo: Document .cfi_signal_frame.
2080
f7d9e5c3
CD
20812006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2082
2083 * doc/Makefile.am: Add html target.
2084 * doc/Makefile.in: Regenerate.
2085 * po/Make-in: Add html target.
2086
331d2d0d
L
20872006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2088
8502d882 2089 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2090 Instructions.
2091
8502d882 2092 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2093 (CpuUnknownFlags): Add CpuMNI.
2094
10156f83
DM
20952006-02-24 David S. Miller <davem@sunset.davemloft.net>
2096
2097 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2098 (hpriv_reg_table): New table for hyperprivileged registers.
2099 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2100 register encoding.
2101
6772dd07
DD
21022006-02-24 DJ Delorie <dj@redhat.com>
2103
2104 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2105 (tc_gen_reloc): Don't define.
2106 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2107 (OPTION_LINKRELAX): New.
2108 (md_longopts): Add it.
2109 (m32c_relax): New.
2110 (md_parse_options): Set it.
2111 (md_assemble): Emit relaxation relocs as needed.
2112 (md_convert_frag): Emit relaxation relocs as needed.
2113 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2114 (m32c_apply_fix): New.
2115 (tc_gen_reloc): New.
2116 (m32c_force_relocation): Force out jump relocs when relaxing.
2117 (m32c_fix_adjustable): Return false if relaxing.
2118
62b3e311
PB
21192006-02-24 Paul Brook <paul@codesourcery.com>
2120
2121 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2122 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2123 (struct asm_barrier_opt): Define.
2124 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2125 (parse_psr): Accept V7M psr names.
2126 (parse_barrier): New function.
2127 (enum operand_parse_code): Add OP_oBARRIER.
2128 (parse_operands): Implement OP_oBARRIER.
2129 (do_barrier): New function.
2130 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2131 (do_t_cpsi): Add V7M restrictions.
2132 (do_t_mrs, do_t_msr): Validate V7M variants.
2133 (md_assemble): Check for NULL variants.
2134 (v7m_psrs, barrier_opt_names): New tables.
2135 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2136 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2137 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2138 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2139 (struct cpu_arch_ver_table): Define.
2140 (cpu_arch_ver): New.
2141 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2142 Tag_CPU_arch_profile.
2143 * doc/c-arm.texi: Document new cpu and arch options.
2144
59cf82fe
L
21452006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2146
2147 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2148
19a7219f
L
21492006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2150
2151 * config/tc-ia64.c: Update copyright years.
2152
7f3dfb9c
L
21532006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2154
2155 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2156 SDM 2.2.
2157
f40d1643
PB
21582005-02-22 Paul Brook <paul@codesourcery.com>
2159
2160 * config/tc-arm.c (do_pld): Remove incorrect write to
2161 inst.instruction.
2162 (encode_thumb32_addr_mode): Use correct operand.
2163
216d22bc
PB
21642006-02-21 Paul Brook <paul@codesourcery.com>
2165
2166 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2167
d70c5fc7
NC
21682006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2169 Anil Paranjape <anilp1@kpitcummins.com>
2170 Shilin Shakti <shilins@kpitcummins.com>
2171
2172 * Makefile.am: Add xc16x related entry.
2173 * Makefile.in: Regenerate.
2174 * configure.in: Added xc16x related entry.
2175 * configure: Regenerate.
2176 * config/tc-xc16x.h: New file
2177 * config/tc-xc16x.c: New file
2178 * doc/c-xc16x.texi: New file for xc16x
2179 * doc/all.texi: Entry for xc16x
a70ae331 2180 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2181 * NEWS: Announce the support for the new target.
2182
aaa2ab3d
NH
21832006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2184
2185 * configure.tgt: set emulation for mips-*-netbsd*
2186
82de001f
JJ
21872006-02-14 Jakub Jelinek <jakub@redhat.com>
2188
2189 * config.in: Rebuilt.
2190
431ad2d0
BW
21912006-02-13 Bob Wilson <bob.wilson@acm.org>
2192
2193 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2194 from 1, not 0, in error messages.
2195 (md_assemble): Simplify special-case check for ENTRY instructions.
2196 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2197 operand in error message.
2198
94089a50
JM
21992006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2200
2201 * configure.tgt (arm-*-linux-gnueabi*): Change to
2202 arm-*-linux-*eabi*.
2203
52de4c06
NC
22042006-02-10 Nick Clifton <nickc@redhat.com>
2205
70e45ad9
NC
2206 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2207 32-bit value is propagated into the upper bits of a 64-bit long.
2208
52de4c06
NC
2209 * config/tc-arc.c (init_opcode_tables): Fix cast.
2210 (arc_extoper, md_operand): Likewise.
2211
21af2bbd
BW
22122006-02-09 David Heine <dlheine@tensilica.com>
2213
2214 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2215 each relaxation step.
2216
75a706fc 22172006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2218
75a706fc
L
2219 * configure.in (CHECK_DECLS): Add vsnprintf.
2220 * configure: Regenerate.
2221 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2222 include/declare here, but...
2223 * as.h: Move code detecting VARARGS idiom to the top.
2224 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2225 (vsnprintf): Declare if not already declared.
2226
0d474464
L
22272006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2228
2229 * as.c (close_output_file): New.
2230 (main): Register close_output_file with xatexit before
2231 dump_statistics. Don't call output_file_close.
2232
266abb8f
NS
22332006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2234
2235 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2236 mcf5329_control_regs): New.
2237 (not_current_architecture, selected_arch, selected_cpu): New.
2238 (m68k_archs, m68k_extensions): New.
2239 (archs): Renamed to ...
2240 (m68k_cpus): ... here. Adjust.
2241 (n_arches): Remove.
2242 (md_pseudo_table): Add arch and cpu directives.
2243 (find_cf_chip, m68k_ip): Adjust table scanning.
2244 (no_68851, no_68881): Remove.
2245 (md_assemble): Lazily initialize.
2246 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2247 (md_init_after_args): Move functionality to m68k_init_arch.
2248 (mri_chip): Adjust table scanning.
2249 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2250 options with saner parsing.
2251 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2252 m68k_init_arch): New.
2253 (s_m68k_cpu, s_m68k_arch): New.
2254 (md_show_usage): Adjust.
2255 (m68k_elf_final_processing): Set CF EF flags.
2256 * config/tc-m68k.h (m68k_init_after_args): Remove.
2257 (tc_init_after_args): Remove.
2258 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2259 (M68k-Directives): Document .arch and .cpu directives.
2260
134dcee5
AM
22612006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2262
a70ae331
AM
2263 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2264 synonyms for equ and defl.
134dcee5
AM
2265 (z80_cons_fix_new): New function.
2266 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2267 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2268 now handled as pseudo-op rather than an instruction.
2269 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2270 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2271 Add entries for def24,def32,d24,d32.
2272 (md_assemble): Improved error handling.
2273 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2274 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2275 (z80_cons_fix_new): Declare.
a70ae331 2276 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2277 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2278
a9931606
PB
22792006-02-02 Paul Brook <paul@codesourcery.com>
2280
2281 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2282
ef8d22e6
PB
22832005-02-02 Paul Brook <paul@codesourcery.com>
2284
2285 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2286 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2287 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2288 T2_OPCODE_RSB): Define.
2289 (thumb32_negate_data_op): New function.
2290 (md_apply_fix): Use it.
2291
e7da6241
BW
22922006-01-31 Bob Wilson <bob.wilson@acm.org>
2293
2294 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2295 fields.
2296 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2297 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2298 subtracted symbols.
2299 (relaxation_requirements): Add pfinish_frag argument and use it to
2300 replace setting tinsn->record_fix fields.
2301 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2302 and vinsn_to_insnbuf. Remove references to record_fix and
2303 slot_sub_symbols fields.
2304 (xtensa_mark_narrow_branches): Delete unused code.
2305 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2306 a symbol.
2307 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2308 record_fix fields.
2309 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2310 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2311 of the record_fix field. Simplify error messages for unexpected
2312 symbolic operands.
2313 (set_expr_symbol_offset_diff): Delete.
2314
79134647
PB
23152006-01-31 Paul Brook <paul@codesourcery.com>
2316
2317 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2318
e74cfd16
PB
23192006-01-31 Paul Brook <paul@codesourcery.com>
2320 Richard Earnshaw <rearnsha@arm.com>
2321
2322 * config/tc-arm.c: Use arm_feature_set.
2323 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2324 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2325 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2326 New variables.
2327 (insns): Use them.
2328 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2329 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2330 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2331 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2332 feature flags.
2333 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2334 (arm_opts): Move old cpu/arch options from here...
2335 (arm_legacy_opts): ... to here.
2336 (md_parse_option): Search arm_legacy_opts.
2337 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2338 (arm_float_abis, arm_eabis): Make const.
2339
d47d412e
BW
23402006-01-25 Bob Wilson <bob.wilson@acm.org>
2341
2342 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2343
b14273fe
JZ
23442006-01-21 Jie Zhang <jie.zhang@analog.com>
2345
2346 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2347 in load immediate intruction.
2348
39cd1c76
JZ
23492006-01-21 Jie Zhang <jie.zhang@analog.com>
2350
2351 * config/bfin-parse.y (value_match): Use correct conversion
2352 specifications in template string for __FILE__ and __LINE__.
2353 (binary): Ditto.
2354 (unary): Ditto.
2355
67a4f2b7
AO
23562006-01-18 Alexandre Oliva <aoliva@redhat.com>
2357
2358 Introduce TLS descriptors for i386 and x86_64.
2359 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2360 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2361 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2362 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2363 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2364 displacement bits.
2365 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2366 (lex_got): Handle @tlsdesc and @tlscall.
2367 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2368
8ad7c533
NC
23692006-01-11 Nick Clifton <nickc@redhat.com>
2370
2371 Fixes for building on 64-bit hosts:
2372 * config/tc-avr.c (mod_index): New union to allow conversion
2373 between pointers and integers.
2374 (md_begin, avr_ldi_expression): Use it.
2375 * config/tc-i370.c (md_assemble): Add cast for argument to print
2376 statement.
2377 * config/tc-tic54x.c (subsym_substitute): Likewise.
2378 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2379 opindex field of fr_cgen structure into a pointer so that it can
2380 be stored in a frag.
2381 * config/tc-mn10300.c (md_assemble): Likewise.
2382 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2383 types.
2384 * config/tc-v850.c: Replace uses of (int) casts with correct
2385 types.
2386
4dcb3903
L
23872006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2388
2389 PR gas/2117
2390 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2391
e0f6ea40
HPN
23922006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2393
2394 PR gas/2101
2395 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2396 a local-label reference.
2397
e88d958a 2398For older changes see ChangeLog-2005
08d56133
NC
2399\f
2400Local Variables:
2401mode: change-log
2402left-margin: 8
2403fill-column: 74
2404version-control: never
2405End:
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