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* input-file.c (input_file_open): Replace as_perror with as_bad
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
f79d9c1d
AM		 12006-09-13 Alan Modra <amodra@bigpond.net.au>
2
3 * input-file.c (input_file_open): Replace as_perror with as_bad
4 so that gas exits with error on file errors. Correct error
5 message.
6 (input_file_get, input_file_give_next_buffer): Likewise.
7
f512f76f
NC		 82006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
9
10 PR gas/3172
11 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
12 registers as a sub-class of wC registers.
13
8d79fd44
AM		 142006-09-11 Alan Modra <amodra@bigpond.net.au>
15
16 PR gas/3165
17 * config/tc-mips.h (enum dwarf2_format): Forward declare.
18 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
19 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
20 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
21
6258339f
NC		 222006-09-08 Nick Clifton <nickc@redhat.com>
23
24 PR gas/3129
25 * doc/as.texinfo (Macro): Improve documentation about separating
26 macro arguments from following text.
27
f91e006c
PB		 282006-09-08 Paul Brook <paul@codesourcery.com>
29
30 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
31
466bbf93
PB		 322006-09-07 Paul Brook <paul@codesourcery.com>
33
34 * config/tc-arm.c (parse_operands): Mark operand as present.
35
428e3f1f
PB		 362006-09-04 Paul Brook <paul@codesourcery.com>
37
38 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
39 (do_neon_dyadic_if_i_d): Avoid setting U bit.
40 (do_neon_mac_maybe_scalar): Ditto.
41 (do_neon_dyadic_narrow): Force operand type to NT_integer.
42 (insns): Remove out of date comments.
43
fb25138b
NC		 442006-08-29 Nick Clifton <nickc@redhat.com>
45
46 * read.c (s_align): Initialize the 'stopc' variable to prevent
47 compiler complaints about it being used without being
48 initialized.
49 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
50 s_float_space, s_struct, cons_worker, equals): Likewise.
51
5091343a
AM		 522006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
53
54 * ecoff.c (ecoff_directive_val): Fix message typo.
55 * config/tc-ns32k.c (convert_iif): Likewise.
56 * config/tc-sh64.c (shmedia_check_limits): Likewise.
57
1f2a7e38
BW		 582006-08-25 Sterling Augustine <sterling@tensilica.com>
59 Bob Wilson <bob.wilson@acm.org>
60
61 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
62 the state of the absolute_literals directive. Remove align frag at
63 the start of the literal pool position.
64
34135039
BW		 652006-08-25 Bob Wilson <bob.wilson@acm.org>
66
67 * doc/c-xtensa.texi: Add @group commands in examples.
68
74869ac7
BW		 692006-08-24 Bob Wilson <bob.wilson@acm.org>
70
71 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
72 (INIT_LITERAL_SECTION_NAME): Delete.
73 (lit_state struct): Remove segment names, init_lit_seg, and
74 fini_lit_seg. Add lit_prefix and current_text_seg.
75 (init_literal_head_h, init_literal_head): Delete.
76 (fini_literal_head_h, fini_literal_head): Delete.
77 (xtensa_begin_directive): Move argument parsing to
78 xtensa_literal_prefix function.
79 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
80 (xtensa_literal_prefix): Parse the directive argument here and
81 record it in the lit_prefix field. Remove code to derive literal
82 section names.
83 (linkonce_len): New.
84 (get_is_linkonce_section): Use linkonce_len. Check for any
85 ".gnu.linkonce.*" section, not just text sections.
86 (md_begin): Remove initialization of deleted lit_state fields.
87 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
88 to init_literal_head and fini_literal_head.
89 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
90 when traversing literal_head list.
91 (match_section_group): New.
92 (cache_literal_section): Rewrite to determine the literal section
93 name on the fly, create the section and return it.
94 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
95 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
96 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
97 Use xtensa_get_property_section from bfd.
98 (retrieve_xtensa_section): Delete.
99 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
100 description to refer to plural literal sections and add xref to
101 the Literal Directive section.
102 (Literal Directive): Describe new rules for deriving literal section
103 names. Add footnote for special case of .init/.fini with
104 --text-section-literals.
105 (Literal Prefix Directive): Replace old naming rules with xref to the
106 Literal Directive section.
107
87a1fd79
JM		 1082006-08-21 Joseph Myers <joseph@codesourcery.com>
109
110 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
111 merging with previous long opcode.
112
7148cc28
NC		 1132006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
114
115 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
116 * Makefile.in: Regenerate.
117 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
118 renamed. Adjust.
119
3e9e4fcf
JB		 1202006-08-16 Julian Brown <julian@codesourcery.com>
121
122 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
123 to use ARM instructions on non-ARM-supporting cores.
124 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
125 mode automatically based on cpu variant.
126 (md_begin): Call above function.
127
267d2029
JB		 1282006-08-16 Julian Brown <julian@codesourcery.com>
129
130 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
131 recognized in non-unified syntax mode.
132
4be041b2
TS		 1332006-08-15 Thiemo Seufer <ths@mips.com>
134 Nigel Stephens <nigel@mips.com>
135 David Ung <davidu@mips.com>
136
137 * configure.tgt: Handle mips*-sde-elf*.
138
3a93f742
TS		 1392006-08-12 Thiemo Seufer <ths@networkno.de>
140
141 * config/tc-mips.c (mips16_ip): Fix argument register handling
142 for restore instruction.
143
1737851b
BW		 1442006-08-08 Bob Wilson <bob.wilson@acm.org>
145
146 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
147 (out_sleb128): New.
148 (out_fixed_inc_line_addr): New.
149 (process_entries): Use out_fixed_inc_line_addr when
150 DWARF2_USE_FIXED_ADVANCE_PC is set.
151 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
152
e14e52f8
DD		 1532006-08-08 DJ Delorie <dj@redhat.com>
154
155 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
156 vs full symbols so that we never have more than one pointer value
157 for any given symbol in our symbol table.
158
802f5d9e
NC		 1592006-08-08 Sterling Augustine <sterling@tensilica.com>
160
161 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
162 and emit DW_AT_ranges when code in compilation unit is not
163 contiguous.
164 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
165 is not contiguous.
166 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
167 (out_debug_ranges): New function to emit .debug_ranges section
168 when code is not contiguous.
169
720abc60
NC		 1702006-08-08 Nick Clifton <nickc@redhat.com>
171
172 * config/tc-arm.c (WARN_DEPRECATED): Enable.
173
f0927246
NC		 1742006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
175
176 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
177 only block.
178 (pe_directive_secrel) [TE_PE]: New function.
179 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
180 loc, loc_mark_labels.
181 [TE_PE]: Handle secrel32.
182 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
183 call.
184 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
185 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
186 (md_section_align): Only round section sizes here for AOUT
187 targets.
188 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
189 (tc_pe_dwarf2_emit_offset): New function.
190 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
191 (cons_fix_new_arm): Handle O_secrel.
192 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
193 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
194 of OBJ_ELF only block.
195 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
196 tc_pe_dwarf2_emit_offset.
197
55e6e397
RS		 1982006-08-04 Richard Sandiford <richard@codesourcery.com>
199
200 * config/tc-sh.c (apply_full_field_fix): New function.
201 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
202 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
203 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
204 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
205
9cd19b17
NC		 2062006-08-03 Nick Clifton <nickc@redhat.com>
207
208 PR gas/2991
209 * config.in: Regenerate.
210
97f87066
JM		 2112006-08-03 Joseph Myers <joseph@codesourcery.com>
212
213 * config/tc-arm.c (parse_operands): Handle invalid register name
214 for OP_RIWR_RIWC.
215
41adaa5c
JM		 2162006-08-03 Joseph Myers <joseph@codesourcery.com>
217
218 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
219 (parse_operands): Handle it.
220 (insns): Use it for tmcr and tmrc.
221
9d7cbccd
NC		 2222006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
223
224 PR binutils/2983
225 * config/tc-i386.c (md_parse_option): Treat any target starting
226 with elf64_x86_64 as a viable target for the -64 switch.
227 (i386_target_format): For 64-bit ELF flavoured output use
228 ELF_TARGET_FORMAT64.
229 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
230
c973bc5c
NC		 2312006-08-02 Nick Clifton <nickc@redhat.com>
232
233 PR gas/2991
234 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
235 bfd/aclocal.m4.
236 * configure.in: Run BFD_BINARY_FOPEN.
237 * configure: Regenerate.
238 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
239 file to include.
240
cfde7f70
L		 2412006-08-01 H.J. Lu <hongjiu.lu@intel.com>
242
243 * config/tc-i386.c (md_assemble): Don't update
244 cpu_arch_isa_flags.
245
b4c71f56
TS		 2462006-08-01 Thiemo Seufer <ths@mips.com>
247
248 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
249
54f4ddb3
TS		 2502006-08-01 Thiemo Seufer <ths@mips.com>
251
252 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
253 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
254 BFD_RELOC_32 and BFD_RELOC_16.
255 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
256 md_convert_frag, md_obj_end): Fix comment formatting.
257
d103cf61
TS		 2582006-07-31 Thiemo Seufer <ths@mips.com>
259
260 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
261 handling for BFD_RELOC_MIPS16_JMP.
262
601e61cd
NC		 2632006-07-24 Andreas Schwab <schwab@suse.de>
264
265 PR/2756
266 * read.c (read_a_source_file): Ignore unknown text after line
267 comment character. Fix misleading comment.
268
b45619c0
NC		 2692006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
270
271 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
272 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
273 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
274 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
275 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
276 doc/c-z80.texi, doc/internals.texi: Fix some typos.
277
784906c5
NC		 2782006-07-21 Nick Clifton <nickc@redhat.com>
279
280 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
281 linker testsuite.
282
d5f010e9
TS		 2832006-07-20 Thiemo Seufer <ths@mips.com>
284 Nigel Stephens <nigel@mips.com>
285
286 * config/tc-mips.c (md_parse_option): Don't infer optimisation
287 options from debug options.
288
35d3d567
TS		 2892006-07-20 Thiemo Seufer <ths@mips.com>
290
291 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
292 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
293
401a54cf
PB		 2942006-07-19 Paul Brook <paul@codesourcery.com>
295
296 * config/tc-arm.c (insns): Fix rbit Arm opcode.
297
16805f35
PB		 2982006-07-18 Paul Brook <paul@codesourcery.com>
299
300 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
301 (md_convert_frag): Use correct reloc for add_pc. Use
302 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
303 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
304 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
305
d9e05e4e
AM		 3062006-07-17 Mat Hostetter <mat@lcs.mit.edu>
307
308 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
309 when file and line unknown.
310
f43abd2b
TS		 3112006-07-17 Thiemo Seufer <ths@mips.com>
312
313 * read.c (s_struct): Use IS_ELF.
314 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
315 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
316 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
317 s_mips_mask): Likewise.
318
a2902af6
TS		 3192006-07-16 Thiemo Seufer <ths@mips.com>
320 David Ung <davidu@mips.com>
321
322 * read.c (s_struct): Handle ELF section changing.
323 * config/tc-mips.c (s_align): Leave enabling auto-align to the
324 generic code.
325 (s_change_sec): Try section changing only if we output ELF.
326
d32cad65
L		 3272006-07-15 H.J. Lu <hongjiu.lu@intel.com>
328
329 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
330 CpuAmdFam10.
331 (smallest_imm_type): Remove Cpu086.
332 (i386_target_format): Likewise.
333
334 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
335 Update CpuXXX.
336
050dfa73
MM		 3372006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
338 Michael Meissner <michael.meissner@amd.com>
339
340 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
341 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
342 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
343 architecture.
344 (i386_align_code): Ditto.
345 (md_assemble_code): Add support for insertq/extrq instructions,
346 swapping as needed for intel syntax.
347 (swap_imm_operands): New function to swap immediate operands.
348 (swap_operands): Deal with 4 operand instructions.
349 (build_modrm_byte): Add support for insertq instruction.
350
6b2de085
L		 3512006-07-13 H.J. Lu <hongjiu.lu@intel.com>
352
353 * config/tc-i386.h (Size64): Fix a typo in comment.
354
01eaea5a
NC		 3552006-07-12 Nick Clifton <nickc@redhat.com>
356
357 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 358 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC		 359 already been checked here.
360
1e85aad8
JW		 3612006-07-07 James E Wilson <wilson@specifix.com>
362
363 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
364
1370e33d
NC		 3652006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
366 Nick Clifton <nickc@redhat.com>
367
368 PR binutils/2877
369 * doc/as.texi: Fix spelling typo: branchs => branches.
370 * doc/c-m68hc11.texi: Likewise.
371 * config/tc-m68hc11.c: Likewise.
372 Support old spelling of command line switch for backwards
373 compatibility.
374
5f0fe04b
TS		 3752006-07-04 Thiemo Seufer <ths@mips.com>
376 David Ung <davidu@mips.com>
377
378 * config/tc-mips.c (s_is_linkonce): New function.
379 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
380 weak, external, and linkonce symbols.
381 (pic_need_relax): Use s_is_linkonce.
382
85234291
L		 3832006-06-24 H.J. Lu <hongjiu.lu@intel.com>
384
385 * doc/as.texinfo (Org): Remove space.
386 (P2align): Add "@var{abs-expr},".
387
ccc9c027
L		 3882006-06-23 H.J. Lu <hongjiu.lu@intel.com>
389
390 * config/tc-i386.c (cpu_arch_tune_set): New.
391 (cpu_arch_isa): Likewise.
392 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
393 nops with short or long nop sequences based on -march=/.arch
394 and -mtune=.
395 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
396 set cpu_arch_tune and cpu_arch_tune_flags.
397 (md_parse_option): For -march=, set cpu_arch_isa and set
398 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
399 0. Set cpu_arch_tune_set to 1 for -mtune=.
400 (i386_target_format): Don't set cpu_arch_tune.
401
d4dc2f22
TS		 4022006-06-23 Nigel Stephens <nigel@mips.com>
403
404 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
405 generated .sbss.* and .gnu.linkonce.sb.*.
406
a8dbcb85
TS		 4072006-06-23 Thiemo Seufer <ths@mips.com>
408 David Ung <davidu@mips.com>
409
410 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
411 label_list.
412 * config/tc-mips.c (label_list): Define per-segment label_list.
413 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
414 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
415 mips_from_file_after_relocs, mips_define_label): Use per-segment
416 label_list.
417
3994f87e
TS		 4182006-06-22 Thiemo Seufer <ths@mips.com>
419
420 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
421 (append_insn): Use it.
422 (md_apply_fix): Whitespace formatting.
423 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
424 mips16_extended_frag): Remove register specifier.
425 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
426 constants.
427
fa073d69
MS		 4282006-06-21 Mark Shinwell <shinwell@codesourcery.com>
429
430 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
431 a directive saving VFP registers for ARMv6 or later.
432 (s_arm_unwind_save): Add parameter arch_v6 and call
433 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
434 appropriate.
435 (md_pseudo_table): Add entry for new "vsave" directive.
436 * doc/c-arm.texi: Correct error in example for "save"
437 directive (fstmdf -> fstmdx). Also document "vsave" directive.
438
8e77b565 4392006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC		 440 Anatoly Sokolov <aesok@post.ru>
441
442 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
443 and atmega644p devices. Rename atmega164/atmega324 devices to
444 atmega164p/atmega324p.
445 * doc/c-avr.texi: Document new mcu and arch options.
446
8b1ad454
NC		 4472006-06-17 Nick Clifton <nickc@redhat.com>
448
449 * config/tc-arm.c (enum parse_operand_result): Move outside of
450 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
451
9103f4f4
L		 4522006-06-16 H.J. Lu <hongjiu.lu@intel.com>
453
454 * config/tc-i386.h (processor_type): New.
455 (arch_entry): Add type.
456
457 * config/tc-i386.c (cpu_arch_tune): New.
458 (cpu_arch_tune_flags): Likewise.
459 (cpu_arch_isa_flags): Likewise.
460 (cpu_arch): Updated.
461 (set_cpu_arch): Also update cpu_arch_isa_flags.
462 (md_assemble): Update cpu_arch_isa_flags.
463 (OPTION_MARCH): New.
464 (OPTION_MTUNE): Likewise.
465 (md_longopts): Add -march= and -mtune=.
466 (md_parse_option): Support -march= and -mtune=.
467 (md_show_usage): Add -march=CPU/-mtune=CPU.
468 (i386_target_format): Also update cpu_arch_isa_flags,
469 cpu_arch_tune and cpu_arch_tune_flags.
470
471 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
472
473 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
474
4962c51a
MS		 4752006-06-15 Mark Shinwell <shinwell@codesourcery.com>
476
477 * config/tc-arm.c (enum parse_operand_result): New.
478 (struct group_reloc_table_entry): New.
479 (enum group_reloc_type): New.
480 (group_reloc_table): New array.
481 (find_group_reloc_table_entry): New function.
482 (parse_shifter_operand_group_reloc): New function.
483 (parse_address_main): New function, incorporating code
484 from the old parse_address function. To be used via...
485 (parse_address): wrapper for parse_address_main; and
486 (parse_address_group_reloc): new function, likewise.
487 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
488 OP_ADDRGLDRS, OP_ADDRGLDC.
489 (parse_operands): Support for these new operand codes.
490 New macro po_misc_or_fail_no_backtrack.
491 (encode_arm_cp_address): Preserve group relocations.
492 (insns): Modify to use the above operand codes where group
493 relocations are permitted.
494 (md_apply_fix): Handle the group relocations
495 ALU_PC_G0_NC through LDC_SB_G2.
496 (tc_gen_reloc): Likewise.
497 (arm_force_relocation): Leave group relocations for the linker.
498 (arm_fix_adjustable): Likewise.
499
cd2f129f
JB		 5002006-06-15 Julian Brown <julian@codesourcery.com>
501
502 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
503 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
504 relocs properly.
505
46e883c5
L		 5062006-06-12 H.J. Lu <hongjiu.lu@intel.com>
507
508 * config/tc-i386.c (process_suffix): Don't add rex64 for
509 "xchg %rax,%rax".
510
1787fe5b
TS		 5112006-06-09 Thiemo Seufer <ths@mips.com>
512
513 * config/tc-mips.c (mips_ip): Maintain argument count.
514
96f989c2
AM		 5152006-06-09 Alan Modra <amodra@bigpond.net.au>
516
517 * config/tc-iq2000.c: Include sb.h.
518
7c752c2a
TS		 5192006-06-08 Nigel Stephens <nigel@mips.com>
520
521 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
522 aliases for better compatibility with SGI tools.
523
03bf704f
AM		 5242006-06-08 Alan Modra <amodra@bigpond.net.au>
525
526 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
527 * Makefile.am (GASLIBS): Expand @BFDLIB@.
528 (BFDVER_H): Delete.
529 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
530 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
531 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
532 Run "make dep-am".
533 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
534 * Makefile.in: Regenerate.
535 * doc/Makefile.in: Regenerate.
536 * configure: Regenerate.
537
6648b7cf
JM		 5382006-06-07 Joseph S. Myers <joseph@codesourcery.com>
539
540 * po/Make-in (pdf, ps): New dummy targets.
541
037e8744
JB		 5422006-06-07 Julian Brown <julian@codesourcery.com>
543
544 * config/tc-arm.c (stdarg.h): include.
545 (arm_it): Add uncond_value field. Add isvec and issingle to operand
546 array.
547 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
548 REG_TYPE_NSDQ (single, double or quad vector reg).
549 (reg_expected_msgs): Update.
550 (BAD_FPU): Add macro for unsupported FPU instruction error.
551 (parse_neon_type): Support 'd' as an alias for .f64.
552 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
553 sets of registers.
554 (parse_vfp_reg_list): Don't update first arg on error.
555 (parse_neon_mov): Support extra syntax for VFP moves.
556 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
557 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
558 (parse_operands): Support isvec, issingle operands fields, new parse
559 codes above.
560 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
561 msr variants.
562 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
563 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
564 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
565 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
566 shapes.
567 (neon_shape): Redefine in terms of above.
568 (neon_shape_class): New enumeration, table of shape classes.
569 (neon_shape_el): New enumeration. One element of a shape.
570 (neon_shape_el_size): Register widths of above, where appropriate.
571 (neon_shape_info): New struct. Info for shape table.
572 (neon_shape_tab): New array.
573 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
574 (neon_check_shape): Rewrite as...
575 (neon_select_shape): New function to classify instruction shapes,
576 driven by new table neon_shape_tab array.
577 (neon_quad): New function. Return 1 if shape should set Q flag in
578 instructions (or equivalent), 0 otherwise.
579 (type_chk_of_el_type): Support F64.
580 (el_type_of_type_chk): Likewise.
581 (neon_check_type): Add support for VFP type checking (VFP data
582 elements fill their containing registers).
583 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
584 in thumb mode for VFP instructions.
585 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
586 and encode the current instruction as if it were that opcode.
587 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
588 arguments, call function in PFN.
589 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
590 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
591 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
592 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
593 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
594 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
595 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
596 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
597 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
598 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
599 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
600 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
601 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
602 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
603 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
604 neon_quad.
605 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
606 between VFP and Neon turns out to belong to Neon. Perform
607 architecture check and fill in condition field if appropriate.
608 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
609 (do_neon_cvt): Add support for VFP variants of instructions.
610 (neon_cvt_flavour): Extend to cover VFP conversions.
611 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
612 vmov variants.
613 (do_neon_ldr_str): Handle single-precision VFP load/store.
614 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
615 NS_NULL not NS_IGNORE.
616 (opcode_tag): Add OT_csuffixF for operands which either take a
617 conditional suffix, or have 0xF in the condition field.
618 (md_assemble): Add support for OT_csuffixF.
619 (NCE): Replace macro with...
620 (NCE_tag, NCE, NCEF): New macros.
621 (nCE): Replace macro with...
622 (nCE_tag, nCE, nCEF): New macros.
623 (insns): Add support for VFP insns or VFP versions of insns msr,
624 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
625 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
626 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
627 VFP/Neon insns together.
628
ebd1c875
AM		 6292006-06-07 Alan Modra <amodra@bigpond.net.au>
630 Ladislav Michl <ladis@linux-mips.org>
631
632 * app.c: Don't include headers already included by as.h.
633 * as.c: Likewise.
634 * atof-generic.c: Likewise.
635 * cgen.c: Likewise.
636 * dwarf2dbg.c: Likewise.
637 * expr.c: Likewise.
638 * input-file.c: Likewise.
639 * input-scrub.c: Likewise.
640 * macro.c: Likewise.
641 * output-file.c: Likewise.
642 * read.c: Likewise.
643 * sb.c: Likewise.
644 * config/bfin-lex.l: Likewise.
645 * config/obj-coff.h: Likewise.
646 * config/obj-elf.h: Likewise.
647 * config/obj-som.h: Likewise.
648 * config/tc-arc.c: Likewise.
649 * config/tc-arm.c: Likewise.
650 * config/tc-avr.c: Likewise.
651 * config/tc-bfin.c: Likewise.
652 * config/tc-cris.c: Likewise.
653 * config/tc-d10v.c: Likewise.
654 * config/tc-d30v.c: Likewise.
655 * config/tc-dlx.h: Likewise.
656 * config/tc-fr30.c: Likewise.
657 * config/tc-frv.c: Likewise.
658 * config/tc-h8300.c: Likewise.
659 * config/tc-hppa.c: Likewise.
660 * config/tc-i370.c: Likewise.
661 * config/tc-i860.c: Likewise.
662 * config/tc-i960.c: Likewise.
663 * config/tc-ip2k.c: Likewise.
664 * config/tc-iq2000.c: Likewise.
665 * config/tc-m32c.c: Likewise.
666 * config/tc-m32r.c: Likewise.
667 * config/tc-maxq.c: Likewise.
668 * config/tc-mcore.c: Likewise.
669 * config/tc-mips.c: Likewise.
670 * config/tc-mmix.c: Likewise.
671 * config/tc-mn10200.c: Likewise.
672 * config/tc-mn10300.c: Likewise.
673 * config/tc-msp430.c: Likewise.
674 * config/tc-mt.c: Likewise.
675 * config/tc-ns32k.c: Likewise.
676 * config/tc-openrisc.c: Likewise.
677 * config/tc-ppc.c: Likewise.
678 * config/tc-s390.c: Likewise.
679 * config/tc-sh.c: Likewise.
680 * config/tc-sh64.c: Likewise.
681 * config/tc-sparc.c: Likewise.
682 * config/tc-tic30.c: Likewise.
683 * config/tc-tic4x.c: Likewise.
684 * config/tc-tic54x.c: Likewise.
685 * config/tc-v850.c: Likewise.
686 * config/tc-vax.c: Likewise.
687 * config/tc-xc16x.c: Likewise.
688 * config/tc-xstormy16.c: Likewise.
689 * config/tc-xtensa.c: Likewise.
690 * config/tc-z80.c: Likewise.
691 * config/tc-z8k.c: Likewise.
692 * macro.h: Don't include sb.h or ansidecl.h.
693 * sb.h: Don't include stdio.h or ansidecl.h.
694 * cond.c: Include sb.h.
695 * itbl-lex.l: Include as.h instead of other system headers.
696 * itbl-parse.y: Likewise.
697 * itbl-ops.c: Similarly.
698 * itbl-ops.h: Don't include as.h or ansidecl.h.
699 * config/bfin-defs.h: Don't include bfd.h or as.h.
700 * config/bfin-parse.y: Include as.h instead of other system headers.
701
9622b051
AM		 7022006-06-06 Ben Elliston <bje@au.ibm.com>
703 Anton Blanchard <anton@samba.org>
704
705 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
706 (md_show_usage): Document it.
707 (ppc_setup_opcodes): Test power6 opcode flag bits.
708 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
709
65263ce3
TS		 7102006-06-06 Thiemo Seufer <ths@mips.com>
711 Chao-ying Fu <fu@mips.com>
712
713 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
714 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
715 (macro_build): Update comment.
716 (mips_ip): Allow DSP64 instructions for MIPS64R2.
717 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
718 CPU_HAS_MDMX.
719 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
720 MIPS_CPU_ASE_MDMX flags for sb1.
721
a9e24354
TS		 7222006-06-05 Thiemo Seufer <ths@mips.com>
723
724 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
725 appropriate.
726 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
727 (mips_ip): Make overflowed/underflowed constant arguments in DSP
728 and MT instructions a fatal error. Use INSERT_OPERAND where
729 appropriate. Improve warnings for break and wait code overflows.
730 Use symbolic constant of OP_MASK_COPZ.
731 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
732
4cfe2c59
DJ		 7332006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
734
735 * po/Make-in (top_builddir): Define.
736
e10fad12
JM		 7372006-06-02 Joseph S. Myers <joseph@codesourcery.com>
738
739 * doc/Makefile.am (TEXI2DVI): Define.
740 * doc/Makefile.in: Regenerate.
741 * doc/c-arc.texi: Fix typo.
742
12e64c2c
AM		 7432006-06-01 Alan Modra <amodra@bigpond.net.au>
744
745 * config/obj-ieee.c: Delete.
746 * config/obj-ieee.h: Delete.
747 * Makefile.am (OBJ_FORMATS): Remove ieee.
748 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
749 (obj-ieee.o): Remove rule.
750 * Makefile.in: Regenerate.
751 * configure.in (atof): Remove tahoe.
752 (OBJ_MAYBE_IEEE): Don't define.
753 * configure: Regenerate.
754 * config.in: Regenerate.
755 * doc/Makefile.in: Regenerate.
756 * po/POTFILES.in: Regenerate.
757
20e95c23
DJ		 7582006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
759
760 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
761 and LIBINTL_DEP everywhere.
762 (INTLLIBS): Remove.
763 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
764 * acinclude.m4: Include new gettext macros.
765 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
766 Remove local code for po/Makefile.
767 * Makefile.in, configure, doc/Makefile.in: Regenerated.
768
eebf07fb
NC		 7692006-05-30 Nick Clifton <nickc@redhat.com>
770
771 * po/es.po: Updated Spanish translation.
772
b6aee19e
DC		 7732006-05-06 Denis Chertykov <denisc@overta.ru>
774
775 * doc/c-avr.texi: New file.
776 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
777 * doc/all.texi: Set AVR
778 * doc/as.texinfo: Include c-avr.texi
779
f8fdc850
JZ		 7802006-05-28 Jie Zhang <jie.zhang@analog.com>
781
782 * config/bfin-parse.y (check_macfunc): Loose the condition of
783 calling check_multiply_halfregs ().
784
a3205465
JZ		 7852006-05-25 Jie Zhang <jie.zhang@analog.com>
786
787 * config/bfin-parse.y (asm_1): Better check and deal with
788 vector and scalar Multiply 16-Bit Operands instructions.
789
9b52905e
NC		 7902006-05-24 Nick Clifton <nickc@redhat.com>
791
792 * config/tc-hppa.c: Convert to ISO C90 format.
793 * config/tc-hppa.h: Likewise.
794
7952006-05-24 Carlos O'Donell <carlos@systemhalted.org>
796 Randolph Chung <randolph@tausq.org>
797
798 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
799 is_tls_ieoff, is_tls_leoff): Define.
800 (fix_new_hppa): Handle TLS.
801 (cons_fix_new_hppa): Likewise.
802 (pa_ip): Likewise.
803 (md_apply_fix): Handle TLS relocs.
804 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
805
28c9d252
NC		 8062006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
807
808 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
809
ad3fea08
TS		 8102006-05-23 Thiemo Seufer <ths@mips.com>
811 David Ung <davidu@mips.com>
812 Nigel Stephens <nigel@mips.com>
813
814 [ gas/ChangeLog ]
815 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
816 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
817 ISA_HAS_MXHC1): New macros.
818 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
819 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
820 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
821 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
822 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
823 (mips_after_parse_args): Change default handling of float register
824 size to account for 32bit code with 64bit FP. Better sanity checking
825 of ISA/ASE/ABI option combinations.
826 (s_mipsset): Support switching of GPR and FPR sizes via
827 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
828 options.
829 (mips_elf_final_processing): We should record the use of 64bit FP
830 registers in 32bit code but we don't, because ELF header flags are
831 a scarce ressource.
832 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
833 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
834 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
835 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
836 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
837 missing -march options. Document .set arch=CPU. Move .set smartmips
838 to ASE page. Use @code for .set FOO examples.
839
8b64503a
JZ		 8402006-05-23 Jie Zhang <jie.zhang@analog.com>
841
842 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
843 if needed.
844
403022e0
JZ		 8452006-05-23 Jie Zhang <jie.zhang@analog.com>
846
847 * config/bfin-defs.h (bfin_equals): Remove declaration.
848 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
849 * config/tc-bfin.c (bfin_name_is_register): Remove.
850 (bfin_equals): Remove.
851 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
852 (bfin_name_is_register): Remove declaration.
853
7455baf8
TS		 8542006-05-19 Thiemo Seufer <ths@mips.com>
855 Nigel Stephens <nigel@mips.com>
856
857 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
858 (mips_oddfpreg_ok): New function.
859 (mips_ip): Use it.
860
707bfff6
TS		 8612006-05-19 Thiemo Seufer <ths@mips.com>
862 David Ung <davidu@mips.com>
863
864 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
865 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
866 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
867 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
868 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
869 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
870 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
871 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
872 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
873 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
874 reg_names_o32, reg_names_n32n64): Define register classes.
875 (reg_lookup): New function, use register classes.
876 (md_begin): Reserve register names in the symbol table. Simplify
877 OBJ_ELF defines.
878 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
879 Use reg_lookup.
880 (mips16_ip): Use reg_lookup.
881 (tc_get_register): Likewise.
882 (tc_mips_regname_to_dw2regnum): New function.
883
1df69f4f
TS		 8842006-05-19 Thiemo Seufer <ths@mips.com>
885
886 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
887 Un-constify string argument.
888 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
889 Likewise.
890 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
891 Likewise.
892 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
893 Likewise.
894 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
895 Likewise.
896 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
897 Likewise.
898 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
899 Likewise.
900
377260ba
NS		 9012006-05-19 Nathan Sidwell <nathan@codesourcery.com>
902
903 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
904 cfloat/m68881 to correct architecture before using it.
905
cce7653b
NC		 9062006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
907
908 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
909 constant values.
910
b0796911
PB		 9112006-05-15 Paul Brook <paul@codesourcery.com>
912
913 * config/tc-arm.c (arm_adjust_symtab): Use
914 bfd_is_arm_special_symbol_name.
915
64b607e6
BW		 9162006-05-15 Bob Wilson <bob.wilson@acm.org>
917
918 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
919 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
920 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
921 Handle errors from calls to xtensa_opcode_is_* functions.
922
9b3f89ee
TS		 9232006-05-14 Thiemo Seufer <ths@mips.com>
924
925 * config/tc-mips.c (macro_build): Test for currently active
926 mips16 option.
927 (mips16_ip): Reject invalid opcodes.
928
370b66a1
CD		 9292006-05-11 Carlos O'Donell <carlos@codesourcery.com>
930
931 * doc/as.texinfo: Rename "Index" to "AS Index",
932 and "ABORT" to "ABORT (COFF)".
933
b6895b4f
PB		 9342006-05-11 Paul Brook <paul@codesourcery.com>
935
936 * config/tc-arm.c (parse_half): New function.
937 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
938 (parse_operands): Ditto.
939 (do_mov16): Reject invalid relocations.
940 (do_t_mov16): Ditto. Use Thumb reloc numbers.
941 (insns): Replace Iffff with HALF.
942 (md_apply_fix): Add MOVW and MOVT relocs.
943 (tc_gen_reloc): Ditto.
944 * doc/c-arm.texi: Document relocation operators
945
e28387c3
PB		 9462006-05-11 Paul Brook <paul@codesourcery.com>
947
948 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
949
89ee2ebe
TS		 9502006-05-11 Thiemo Seufer <ths@mips.com>
951
952 * config/tc-mips.c (append_insn): Don't check the range of j or
953 jal addresses.
954
53baae48
NC		 9552006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
956
957 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
958 relocs against external symbols for WinCE targets.
959 (md_apply_fix): Likewise.
960
4e2a74a8
TS		 9612006-05-09 David Ung <davidu@mips.com>
962
963 * config/tc-mips.c (append_insn): Only warn about an out-of-range
964 j or jal address.
965
337ff0a5
NC		 9662006-05-09 Nick Clifton <nickc@redhat.com>
967
968 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
969 against symbols which are not going to be placed into the symbol
970 table.
971
8c9f705e
BE		 9722006-05-09 Ben Elliston <bje@au.ibm.com>
973
974 * expr.c (operand): Remove `if (0 && ..)' statement and
975 subsequently unused target_op label. Collapse `if (1 || ..)'
976 statement.
977 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
978 separately above the switch.
979
2fd0d2ac
NC		 9802006-05-08 Nick Clifton <nickc@redhat.com>
981
982 PR gas/2623
983 * config/tc-msp430.c (line_separator_character): Define as |.
984
e16bfa71
TS		 9852006-05-08 Thiemo Seufer <ths@mips.com>
986 Nigel Stephens <nigel@mips.com>
987 David Ung <davidu@mips.com>
988
989 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
990 (mips_opts): Likewise.
991 (file_ase_smartmips): New variable.
992 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
993 (macro_build): Handle SmartMIPS instructions.
994 (mips_ip): Likewise.
995 (md_longopts): Add argument handling for smartmips.
996 (md_parse_options, mips_after_parse_args): Likewise.
997 (s_mipsset): Add .set smartmips support.
998 (md_show_usage): Document -msmartmips/-mno-smartmips.
999 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1000 .set smartmips.
1001 * doc/c-mips.texi: Likewise.
1002
32638454
AM		 10032006-05-08 Alan Modra <amodra@bigpond.net.au>
1004
1005 * write.c (relax_segment): Add pass count arg. Don't error on
1006 negative org/space on first two passes.
1007 (relax_seg_info): New struct.
1008 (relax_seg, write_object_file): Adjust.
1009 * write.h (relax_segment): Update prototype.
1010
b7fc2769
JB		 10112006-05-05 Julian Brown <julian@codesourcery.com>
1012
1013 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1014 checking.
1015 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1016 architecture version checks.
1017 (insns): Allow overlapping instructions to be used in VFP mode.
1018
7f841127
L		 10192006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1020
1021 PR gas/2598
1022 * config/obj-elf.c (obj_elf_change_section): Allow user
1023 specified SHF_ALPHA_GPREL.
1024
73160847
NC		 10252006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1026
1027 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1028 for PMEM related expressions.
1029
56487c55
NC		 10302006-05-05 Nick Clifton <nickc@redhat.com>
1031
1032 PR gas/2582
1033 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1034 insertion of a directory separator character into a string at a
1035 given offset. Uses heuristics to decide when to use a backslash
1036 character rather than a forward-slash character.
1037 (dwarf2_directive_loc): Use the macro.
1038 (out_debug_info): Likewise.
1039
d43b4baf
TS		 10402006-05-05 Thiemo Seufer <ths@mips.com>
1041 David Ung <davidu@mips.com>
1042
1043 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1044 instruction.
1045 (macro): Add new case M_CACHE_AB.
1046
088fa78e
KH		 10472006-05-04 Kazu Hirata <kazu@codesourcery.com>
1048
1049 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1050 (opcode_lookup): Issue a warning for opcode with
1051 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1052 identical to OT_cinfix3.
1053 (TxC3w, TC3w, tC3w): New.
1054 (insns): Use tC3w and TC3w for comparison instructions with
1055 's' suffix.
1056
c9049d30
AM		 10572006-05-04 Alan Modra <amodra@bigpond.net.au>
1058
1059 * subsegs.h (struct frchain): Delete frch_seg.
1060 (frchain_root): Delete.
1061 (seg_info): Define as macro.
1062 * subsegs.c (frchain_root): Delete.
1063 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1064 (subsegs_begin, subseg_change): Adjust for above.
1065 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1066 rather than to one big list.
1067 (subseg_get): Don't special case abs, und sections.
1068 (subseg_new, subseg_force_new): Don't set frchainP here.
1069 (seg_info): Delete.
1070 (subsegs_print_statistics): Adjust frag chain control list traversal.
1071 * debug.c (dmp_frags): Likewise.
1072 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1073 at frchain_root. Make use of known frchain ordering.
1074 (last_frag_for_seg): Likewise.
1075 (get_frag_fix): Likewise. Add seg param.
1076 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1077 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1078 (SUB_SEGMENT_ALIGN): Likewise.
1079 (subsegs_finish): Adjust frchain list traversal.
1080 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1081 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1082 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1083 (xtensa_fix_b_j_loop_end_frags): Likewise.
1084 (xtensa_fix_close_loop_end_frags): Likewise.
1085 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1086 (retrieve_segment_info): Delete frch_seg initialisation.
1087
f592407e
AM		 10882006-05-03 Alan Modra <amodra@bigpond.net.au>
1089
1090 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1091 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1092 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1093 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1094
df7849c5
JM		 10952006-05-02 Joseph Myers <joseph@codesourcery.com>
1096
1097 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1098 here.
1099 (md_apply_fix3): Multiply offset by 4 here for
1100 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1101
2d545b82
L		 11022006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1103 Jan Beulich <jbeulich@novell.com>
1104
1105 * config/tc-i386.c (output_invalid_buf): Change size for
1106 unsigned char.
1107 * config/tc-tic30.c (output_invalid_buf): Likewise.
1108
1109 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1110 unsigned char.
1111 * config/tc-tic30.c (output_invalid): Likewise.
1112
38fc1cb1
DJ		 11132006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1114
1115 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1116 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1117 (asconfig.texi): Don't set top_srcdir.
1118 * doc/as.texinfo: Don't use top_srcdir.
1119 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1120
2d545b82
L		 11212006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1122
1123 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1124 * config/tc-tic30.c (output_invalid_buf): Likewise.
1125
1126 * config/tc-i386.c (output_invalid): Use snprintf instead of
1127 sprintf.
1128 * config/tc-ia64.c (declare_register_set): Likewise.
1129 (emit_one_bundle): Likewise.
1130 (check_dependencies): Likewise.
1131 * config/tc-tic30.c (output_invalid): Likewise.
1132
a8bc6c78
PB		 11332006-05-02 Paul Brook <paul@codesourcery.com>
1134
1135 * config/tc-arm.c (arm_optimize_expr): New function.
1136 * config/tc-arm.h (md_optimize_expr): Define
1137 (arm_optimize_expr): Add prototype.
1138 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1139
58633d9a
BE		 11402006-05-02 Ben Elliston <bje@au.ibm.com>
1141
22772e33
BE		 1142 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1143 field unsigned.
1144
58633d9a
BE		 1145 * sb.h (sb_list_vector): Move to sb.c.
1146 * sb.c (free_list): Use type of sb_list_vector directly.
1147 (sb_build): Fix off-by-one error in assertion about `size'.
1148
89cdfe57
BE		 11492006-05-01 Ben Elliston <bje@au.ibm.com>
1150
1151 * listing.c (listing_listing): Remove useless loop.
1152 * macro.c (macro_expand): Remove is_positional local variable.
1153 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1154 and simplify surrounding expressions, where possible.
1155 (assign_symbol): Likewise.
1156 (s_weakref): Likewise.
1157 * symbols.c (colon): Likewise.
1158
c35da140
AM		 11592006-05-01 James Lemke <jwlemke@wasabisystems.com>
1160
1161 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1162
9bcd4f99
TS		 11632006-04-30 Thiemo Seufer <ths@mips.com>
1164 David Ung <davidu@mips.com>
1165
1166 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1167 (mips_immed): New table that records various handling of udi
1168 instruction patterns.
1169 (mips_ip): Adds udi handling.
1170
001ae1a4
AM		 11712006-04-28 Alan Modra <amodra@bigpond.net.au>
1172
1173 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1174 of list rather than beginning.
1175
136da414
JB		 11762006-04-26 Julian Brown <julian@codesourcery.com>
1177
1178 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1179 (is_quarter_float): Rename from above. Simplify slightly.
1180 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1181 number.
1182 (parse_neon_mov): Parse floating-point constants.
1183 (neon_qfloat_bits): Fix encoding.
1184 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1185 preference to integer encoding when using the F32 type.
1186
dcbf9037
JB		 11872006-04-26 Julian Brown <julian@codesourcery.com>
1188
1189 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1190 zero-initialising structures containing it will lead to invalid types).
1191 (arm_it): Add vectype to each operand.
1192 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1193 defined field.
1194 (neon_typed_alias): New structure. Extra information for typed
1195 register aliases.
1196 (reg_entry): Add neon type info field.
1197 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1198 Break out alternative syntax for coprocessor registers, etc. into...
1199 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1200 out from arm_reg_parse.
1201 (parse_neon_type): Move. Return SUCCESS/FAIL.
1202 (first_error): New function. Call to ensure first error which occurs is
1203 reported.
1204 (parse_neon_operand_type): Parse exactly one type.
1205 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1206 (parse_typed_reg_or_scalar): New function. Handle core of both
1207 arm_typed_reg_parse and parse_scalar.
1208 (arm_typed_reg_parse): Parse a register with an optional type.
1209 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1210 result.
1211 (parse_scalar): Parse a Neon scalar with optional type.
1212 (parse_reg_list): Use first_error.
1213 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1214 (neon_alias_types_same): New function. Return true if two (alias) types
1215 are the same.
1216 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1217 of elements.
1218 (insert_reg_alias): Return new reg_entry not void.
1219 (insert_neon_reg_alias): New function. Insert type/index information as
1220 well as register for alias.
1221 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1222 make typed register aliases accordingly.
1223 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1224 of line.
1225 (s_unreq): Delete type information if present.
1226 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1227 (s_arm_unwind_save_mmxwcg): Likewise.
1228 (s_arm_unwind_movsp): Likewise.
1229 (s_arm_unwind_setfp): Likewise.
1230 (parse_shift): Likewise.
1231 (parse_shifter_operand): Likewise.
1232 (parse_address): Likewise.
1233 (parse_tb): Likewise.
1234 (tc_arm_regname_to_dw2regnum): Likewise.
1235 (md_pseudo_table): Add dn, qn.
1236 (parse_neon_mov): Handle typed operands.
1237 (parse_operands): Likewise.
1238 (neon_type_mask): Add N_SIZ.
1239 (N_ALLMODS): New macro.
1240 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1241 (el_type_of_type_chk): Add some safeguards.
1242 (modify_types_allowed): Fix logic bug.
1243 (neon_check_type): Handle operands with types.
1244 (neon_three_same): Remove redundant optional arg handling.
1245 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1246 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1247 (do_neon_step): Adjust accordingly.
1248 (neon_cmode_for_logic_imm): Use first_error.
1249 (do_neon_bitfield): Call neon_check_type.
1250 (neon_dyadic): Rename to...
1251 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1252 to allow modification of type of the destination.
1253 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1254 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1255 (do_neon_compare): Make destination be an untyped bitfield.
1256 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1257 (neon_mul_mac): Return early in case of errors.
1258 (neon_move_immediate): Use first_error.
1259 (neon_mac_reg_scalar_long): Fix type to include scalar.
1260 (do_neon_dup): Likewise.
1261 (do_neon_mov): Likewise (in several places).
1262 (do_neon_tbl_tbx): Fix type.
1263 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1264 (do_neon_ld_dup): Exit early in case of errors and/or use
1265 first_error.
1266 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1267 Handle .dn/.qn directives.
1268 (REGDEF): Add zero for reg_entry neon field.
1269
5287ad62
JB		 12702006-04-26 Julian Brown <julian@codesourcery.com>
1271
1272 * config/tc-arm.c (limits.h): Include.
1273 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1274 (fpu_vfp_v3_or_neon_ext): Declare constants.
1275 (neon_el_type): New enumeration of types for Neon vector elements.
1276 (neon_type_el): New struct. Define type and size of a vector element.
1277 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1278 instruction.
1279 (neon_type): Define struct. The type of an instruction.
1280 (arm_it): Add 'vectype' for the current instruction.
1281 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1282 (vfp_sp_reg_pos): Rename to...
1283 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1284 tags.
1285 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1286 (Neon D or Q register).
1287 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1288 register.
1289 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1290 (my_get_expression): Allow above constant as argument to accept
1291 64-bit constants with optional prefix.
1292 (arm_reg_parse): Add extra argument to return the specific type of
1293 register in when either a D or Q register (REG_TYPE_NDQ) is
1294 requested. Can be NULL.
1295 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1296 (parse_reg_list): Update for new arm_reg_parse args.
1297 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1298 (parse_neon_el_struct_list): New function. Parse element/structure
1299 register lists for VLD<n>/VST<n> instructions.
1300 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1301 (s_arm_unwind_save_mmxwr): Likewise.
1302 (s_arm_unwind_save_mmxwcg): Likewise.
1303 (s_arm_unwind_movsp): Likewise.
1304 (s_arm_unwind_setfp): Likewise.
1305 (parse_big_immediate): New function. Parse an immediate, which may be
1306 64 bits wide. Put results in inst.operands[i].
1307 (parse_shift): Update for new arm_reg_parse args.
1308 (parse_address): Likewise. Add parsing of alignment specifiers.
1309 (parse_neon_mov): Parse the operands of a VMOV instruction.
1310 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1311 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1312 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1313 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1314 (parse_operands): Handle new codes above.
1315 (encode_arm_vfp_sp_reg): Rename to...
1316 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1317 selected VFP version only supports D0-D15.
1318 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1319 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1320 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1321 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1322 encode_arm_vfp_reg name, and allow 32 D regs.
1323 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1324 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1325 regs.
1326 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1327 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1328 constant-load and conversion insns introduced with VFPv3.
1329 (neon_tab_entry): New struct.
1330 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1331 those which are the targets of pseudo-instructions.
1332 (neon_opc): Enumerate opcodes, use as indices into...
1333 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1334 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1335 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1336 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1337 neon_enc_tab.
1338 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1339 Neon instructions.
1340 (neon_type_mask): New. Compact type representation for type checking.
1341 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1342 permitted type combinations.
1343 (N_IGNORE_TYPE): New macro.
1344 (neon_check_shape): New function. Check an instruction shape for
1345 multiple alternatives. Return the specific shape for the current
1346 instruction.
1347 (neon_modify_type_size): New function. Modify a vector type and size,
1348 depending on the bit mask in argument 1.
1349 (neon_type_promote): New function. Convert a given "key" type (of an
1350 operand) into the correct type for a different operand, based on a bit
1351 mask.
1352 (type_chk_of_el_type): New function. Convert a type and size into the
1353 compact representation used for type checking.
1354 (el_type_of_type_ckh): New function. Reverse of above (only when a
1355 single bit is set in the bit mask).
1356 (modify_types_allowed): New function. Alter a mask of allowed types
1357 based on a bit mask of modifications.
1358 (neon_check_type): New function. Check the type of the current
1359 instruction against the variable argument list. The "key" type of the
1360 instruction is returned.
1361 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1362 a Neon data-processing instruction depending on whether we're in ARM
1363 mode or Thumb-2 mode.
1364 (neon_logbits): New function.
1365 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1366 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1367 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1368 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1369 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1370 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1371 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1372 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1373 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1374 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1375 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1376 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1377 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1378 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1379 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1380 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1381 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1382 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1383 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1384 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1385 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1386 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1387 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1388 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1389 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1390 helpers.
1391 (parse_neon_type): New function. Parse Neon type specifier.
1392 (opcode_lookup): Allow parsing of Neon type specifiers.
1393 (REGNUM2, REGSETH, REGSET2): New macros.
1394 (reg_names): Add new VFPv3 and Neon registers.
1395 (NUF, nUF, NCE, nCE): New macros for opcode table.
1396 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1397 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1398 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1399 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1400 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1401 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1402 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1403 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1404 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1405 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1406 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1407 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1408 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1409 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1410 fto[us][lh][sd].
1411 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1412 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1413 (arm_option_cpu_value): Add vfp3 and neon.
1414 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1415 VFPv1 attribute.
1416
1946c96e
BW		 14172006-04-25 Bob Wilson <bob.wilson@acm.org>
1418
1419 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1420 syntax instead of hardcoded opcodes with ".w18" suffixes.
1421 (wide_branch_opcode): New.
1422 (build_transition): Use it to check for wide branch opcodes with
1423 either ".w18" or ".w15" suffixes.
1424
5033a645
BW		 14252006-04-25 Bob Wilson <bob.wilson@acm.org>
1426
1427 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1428 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1429 frag's is_literal flag.
1430
395fa56f
BW		 14312006-04-25 Bob Wilson <bob.wilson@acm.org>
1432
1433 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1434
708587a4
KH		 14352006-04-23 Kazu Hirata <kazu@codesourcery.com>
1436
1437 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1438 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1439 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1440 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1441 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1442
8463be01
PB		 14432005-04-20 Paul Brook <paul@codesourcery.com>
1444
1445 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1446 all targets.
1447 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1448
f26a5955
AM		 14492006-04-19 Alan Modra <amodra@bigpond.net.au>
1450
1451 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1452 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1453 Make some cpus unsupported on ELF. Run "make dep-am".
1454 * Makefile.in: Regenerate.
1455
241a6c40
AM		 14562006-04-19 Alan Modra <amodra@bigpond.net.au>
1457
1458 * configure.in (--enable-targets): Indent help message.
1459 * configure: Regenerate.
1460
bb8f5920
L		 14612006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1462
1463 PR gas/2533
1464 * config/tc-i386.c (i386_immediate): Check illegal immediate
1465 register operand.
1466
23d9d9de
AM		 14672006-04-18 Alan Modra <amodra@bigpond.net.au>
1468
64e74474
AM		 1469 * config/tc-i386.c: Formatting.
1470 (output_disp, output_imm): ISO C90 params.
1471
6cbe03fb
AM		 1472 * frags.c (frag_offset_fixed_p): Constify args.
1473 * frags.h (frag_offset_fixed_p): Ditto.
1474
23d9d9de
AM		 1475 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1476 (COFF_MAGIC): Delete.
a37d486e
AM		 1477
1478 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1479
e7403566
DJ		 14802006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1481
1482 * po/POTFILES.in: Regenerated.
1483
58ab4f3d
MM		 14842006-04-16 Mark Mitchell <mark@codesourcery.com>
1485
1486 * doc/as.texinfo: Mention that some .type syntaxes are not
1487 supported on all architectures.
1488
482fd9f9
BW		 14892006-04-14 Sterling Augustine <sterling@tensilica.com>
1490
1491 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1492 instructions when such transformations have been disabled.
1493
05d58145
BW		 14942006-04-10 Sterling Augustine <sterling@tensilica.com>
1495
1496 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1497 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1498 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1499 decoding the loop instructions. Remove current_offset variable.
1500 (xtensa_fix_short_loop_frags): Likewise.
1501 (min_bytes_to_other_loop_end): Remove current_offset argument.
1502
9e75b3fa
AM		 15032006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1504
a37d486e 1505 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM		 1506 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1507
d727e8c2
NC		 15082006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1509
1510 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1511 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1512 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1513 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1514 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1515 at90can64, at90usb646, at90usb647, at90usb1286 and
1516 at90usb1287.
1517 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1518
d252fdde
PB		 15192006-04-07 Paul Brook <paul@codesourcery.com>
1520
1521 * config/tc-arm.c (parse_operands): Set default error message.
1522
ab1eb5fe
PB		 15232006-04-07 Paul Brook <paul@codesourcery.com>
1524
1525 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1526
7ae2971b
PB		 15272006-04-07 Paul Brook <paul@codesourcery.com>
1528
1529 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1530
53365c0d
PB		 15312006-04-07 Paul Brook <paul@codesourcery.com>
1532
1533 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1534 (move_or_literal_pool): Handle Thumb-2 instructions.
1535 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1536
45aa61fe
AM		 15372006-04-07 Alan Modra <amodra@bigpond.net.au>
1538
1539 PR 2512.
1540 * config/tc-i386.c (match_template): Move 64-bit operand tests
1541 inside loop.
1542
108a6f8e
CD		 15432006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1544
1545 * po/Make-in: Add install-html target.
1546 * Makefile.am: Add install-html and install-html-recursive targets.
1547 * Makefile.in: Regenerate.
1548 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1549 * configure: Regenerate.
1550 * doc/Makefile.am: Add install-html and install-html-am targets.
1551 * doc/Makefile.in: Regenerate.
1552
ec651a3b
AM		 15532006-04-06 Alan Modra <amodra@bigpond.net.au>
1554
1555 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1556 second scan.
1557
910600e9
RS		 15582006-04-05 Richard Sandiford <richard@codesourcery.com>
1559 Daniel Jacobowitz <dan@codesourcery.com>
1560
1561 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1562 (GOTT_BASE, GOTT_INDEX): New.
1563 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1564 GOTT_INDEX when generating VxWorks PIC.
1565 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1566 use the generic *-*-vxworks* stanza instead.
1567
99630778
AM		 15682006-04-04 Alan Modra <amodra@bigpond.net.au>
1569
1570 PR 997
1571 * frags.c (frag_offset_fixed_p): New function.
1572 * frags.h (frag_offset_fixed_p): Declare.
1573 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1574 (resolve_expression): Likewise.
1575
a02728c8
BW		 15762006-04-03 Sterling Augustine <sterling@tensilica.com>
1577
1578 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1579 of the same length but different numbers of slots.
1580
9dfde49d
AS		 15812006-03-30 Andreas Schwab <schwab@suse.de>
1582
1583 * configure.in: Fix help string for --enable-targets option.
1584 * configure: Regenerate.
1585
2da12c60
NS		 15862006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1587
6d89cc8f
NS		 1588 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1589 (m68k_ip): ... here. Use for all chips. Protect against buffer
1590 overrun and avoid excessive copying.
1591
2da12c60
NS		 1592 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1593 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1594 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1595 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1596 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1597 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1598 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1599 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1600 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1601 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1602 (struct m68k_cpu): Change chip field to control_regs.
1603 (current_chip): Remove.
1604 (control_regs): New.
1605 (m68k_archs, m68k_extensions): Adjust.
1606 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1607 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1608 (find_cf_chip): Reimplement for new organization of cpu table.
1609 (select_control_regs): Remove.
1610 (mri_chip): Adjust.
1611 (struct save_opts): Save control regs, not chip.
1612 (s_save, s_restore): Adjust.
1613 (m68k_lookup_cpu): Give deprecated warning when necessary.
1614 (m68k_init_arch): Adjust.
1615 (md_show_usage): Adjust for new cpu table organization.
1616
1ac4baed
BS		 16172006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1618
1619 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1620 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1621 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1622 "elf/bfin.h".
1623 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1624 (any_gotrel): New rule.
1625 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1626 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1627 "elf/bfin.h".
1628 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1629 (bfin_pic_ptr): New function.
1630 (md_pseudo_table): Add it for ".picptr".
1631 (OPTION_FDPIC): New macro.
1632 (md_longopts): Add -mfdpic.
1633 (md_parse_option): Handle it.
1634 (md_begin): Set BFD flags.
1635 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1636 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1637 us for GOT relocs.
1638 * Makefile.am (bfin-parse.o): Update dependencies.
1639 (DEPTC_bfin_elf): Likewise.
1640 * Makefile.in: Regenerate.
1641
a9d34880
RS		 16422006-03-25 Richard Sandiford <richard@codesourcery.com>
1643
1644 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1645 mcfemac instead of mcfmac.
1646
9ca26584
AJ		 16472006-03-23 Michael Matz <matz@suse.de>
1648
1649 * config/tc-i386.c (type_names): Correct placement of 'static'.
1650 (reloc): Map some more relocs to their 64 bit counterpart when
1651 size is 8.
1652 (output_insn): Work around breakage if DEBUG386 is defined.
1653 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1654 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1655 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1656 different from i386.
1657 (output_imm): Ditto.
1658 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1659 Imm64.
1660 (md_convert_frag): Jumps can now be larger than 2GB away, error
1661 out in that case.
1662 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1663 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1664
0a44bf69
RS		 16652006-03-22 Richard Sandiford <richard@codesourcery.com>
1666 Daniel Jacobowitz <dan@codesourcery.com>
1667 Phil Edwards <phil@codesourcery.com>
1668 Zack Weinberg <zack@codesourcery.com>
1669 Mark Mitchell <mark@codesourcery.com>
1670 Nathan Sidwell <nathan@codesourcery.com>
1671
1672 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1673 (md_begin): Complain about -G being used for PIC. Don't change
1674 the text, data and bss alignments on VxWorks.
1675 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1676 generating VxWorks PIC.
1677 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1678 (macro): Likewise, but do not treat la $25 specially for
1679 VxWorks PIC, and do not handle jal.
1680 (OPTION_MVXWORKS_PIC): New macro.
1681 (md_longopts): Add -mvxworks-pic.
1682 (md_parse_option): Don't complain about using PIC and -G together here.
1683 Handle OPTION_MVXWORKS_PIC.
1684 (md_estimate_size_before_relax): Always use the first relaxation
1685 sequence on VxWorks.
1686 * config/tc-mips.h (VXWORKS_PIC): New.
1687
080eb7fe
PB		 16882006-03-21 Paul Brook <paul@codesourcery.com>
1689
1690 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1691
03aaa593
BW		 16922006-03-21 Sterling Augustine <sterling@tensilica.com>
1693
1694 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1695 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1696 (get_loop_align_size): New.
1697 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1698 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1699 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1700 (get_noop_aligned_address): Use get_loop_align_size.
1701 (get_aligned_diff): Likewise.
1702
3e94bf1a
PB		 17032006-03-21 Paul Brook <paul@codesourcery.com>
1704
1705 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1706
dfa9f0d5
PB		 17072006-03-20 Paul Brook <paul@codesourcery.com>
1708
1709 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1710 (do_t_branch): Encode branches inside IT blocks as unconditional.
1711 (do_t_cps): New function.
1712 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1713 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1714 (opcode_lookup): Allow conditional suffixes on all instructions in
1715 Thumb mode.
1716 (md_assemble): Advance condexec state before checking for errors.
1717 (insns): Use do_t_cps.
1718
6e1cb1a6
PB		 17192006-03-20 Paul Brook <paul@codesourcery.com>
1720
1721 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1722 outputting the insn.
1723
0a966e2d
JBG		 17242006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1725
1726 * config/tc-vax.c: Update copyright year.
1727 * config/tc-vax.h: Likewise.
1728
a49fcc17
JBG		 17292006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1730
1731 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1732 make it static.
1733 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1734
f5208ef2
PB		 17352006-03-17 Paul Brook <paul@codesourcery.com>
1736
1737 * config/tc-arm.c (insns): Add ldm and stm.
1738
cb4c78d6
BE		 17392006-03-17 Ben Elliston <bje@au.ibm.com>
1740
1741 PR gas/2446
1742 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1743
c16d2bf0
PB		 17442006-03-16 Paul Brook <paul@codesourcery.com>
1745
1746 * config/tc-arm.c (insns): Add "svc".
1747
80ca4e2c
BW		 17482006-03-13 Bob Wilson <bob.wilson@acm.org>
1749
1750 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1751 flag and avoid double underscore prefixes.
1752
3a4a14e9
PB		 17532006-03-10 Paul Brook <paul@codesourcery.com>
1754
1755 * config/tc-arm.c (md_begin): Handle EABIv5.
1756 (arm_eabis): Add EF_ARM_EABI_VER5.
1757 * doc/c-arm.texi: Document -meabi=5.
1758
518051dc
BE		 17592006-03-10 Ben Elliston <bje@au.ibm.com>
1760
1761 * app.c (do_scrub_chars): Simplify string handling.
1762
00a97672
RS		 17632006-03-07 Richard Sandiford <richard@codesourcery.com>
1764 Daniel Jacobowitz <dan@codesourcery.com>
1765 Zack Weinberg <zack@codesourcery.com>
1766 Nathan Sidwell <nathan@codesourcery.com>
1767 Paul Brook <paul@codesourcery.com>
1768 Ricardo Anguiano <anguiano@codesourcery.com>
1769 Phil Edwards <phil@codesourcery.com>
1770
1771 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1772 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1773 R_ARM_ABS12 reloc.
1774 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1775 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1776 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1777
b29757dc
BW		 17782006-03-06 Bob Wilson <bob.wilson@acm.org>
1779
1780 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1781 even when using the text-section-literals option.
1782
0b2e31dc
NS		 17832006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1784
1785 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1786 and cf.
1787 (m68k_ip): <case 'J'> Check we have some control regs.
1788 (md_parse_option): Allow raw arch switch.
1789 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1790 whether 68881 or cfloat was meant by -mfloat.
1791 (md_show_usage): Adjust extension display.
1792 (m68k_elf_final_processing): Adjust.
1793
df406460
NC		 17942006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1795
1796 * config/tc-avr.c (avr_mod_hash_value): New function.
1797 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1798 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1799 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1800 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1801 of (int).
1802 (tc_gen_reloc): Handle substractions of symbols, if possible do
1803 fixups, abort otherwise.
1804 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1805 tc_fix_adjustable): Define.
1806
53022e4a
JW		 18072006-03-02 James E Wilson <wilson@specifix.com>
1808
1809 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1810 change the template, then clear md.slot[curr].end_of_insn_group.
1811
9f6f925e
JB		 18122006-02-28 Jan Beulich <jbeulich@novell.com>
1813
1814 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1815
0e31b3e1
JB		 18162006-02-28 Jan Beulich <jbeulich@novell.com>
1817
1818 PR/1070
1819 * macro.c (getstring): Don't treat parentheses special anymore.
1820 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1821 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1822 characters.
1823
10cd14b4
AM		 18242006-02-28 Mat <mat@csail.mit.edu>
1825
1826 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1827
63752a75
JJ		 18282006-02-27 Jakub Jelinek <jakub@redhat.com>
1829
1830 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1831 field.
1832 (CFI_signal_frame): Define.
1833 (cfi_pseudo_table): Add .cfi_signal_frame.
1834 (dot_cfi): Handle CFI_signal_frame.
1835 (output_cie): Handle cie->signal_frame.
1836 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1837 different. Copy signal_frame from FDE to newly created CIE.
1838 * doc/as.texinfo: Document .cfi_signal_frame.
1839
f7d9e5c3
CD		 18402006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1841
1842 * doc/Makefile.am: Add html target.
1843 * doc/Makefile.in: Regenerate.
1844 * po/Make-in: Add html target.
1845
331d2d0d
L		 18462006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1847
8502d882 1848 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L		 1849 Instructions.
1850
8502d882 1851 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L		 1852 (CpuUnknownFlags): Add CpuMNI.
1853
10156f83
DM		 18542006-02-24 David S. Miller <davem@sunset.davemloft.net>
1855
1856 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1857 (hpriv_reg_table): New table for hyperprivileged registers.
1858 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1859 register encoding.
1860
6772dd07
DD		 18612006-02-24 DJ Delorie <dj@redhat.com>
1862
1863 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1864 (tc_gen_reloc): Don't define.
1865 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1866 (OPTION_LINKRELAX): New.
1867 (md_longopts): Add it.
1868 (m32c_relax): New.
1869 (md_parse_options): Set it.
1870 (md_assemble): Emit relaxation relocs as needed.
1871 (md_convert_frag): Emit relaxation relocs as needed.
1872 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1873 (m32c_apply_fix): New.
1874 (tc_gen_reloc): New.
1875 (m32c_force_relocation): Force out jump relocs when relaxing.
1876 (m32c_fix_adjustable): Return false if relaxing.
1877
62b3e311
PB		 18782006-02-24 Paul Brook <paul@codesourcery.com>
1879
1880 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1881 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1882 (struct asm_barrier_opt): Define.
1883 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1884 (parse_psr): Accept V7M psr names.
1885 (parse_barrier): New function.
1886 (enum operand_parse_code): Add OP_oBARRIER.
1887 (parse_operands): Implement OP_oBARRIER.
1888 (do_barrier): New function.
1889 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1890 (do_t_cpsi): Add V7M restrictions.
1891 (do_t_mrs, do_t_msr): Validate V7M variants.
1892 (md_assemble): Check for NULL variants.
1893 (v7m_psrs, barrier_opt_names): New tables.
1894 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1895 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1896 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1897 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1898 (struct cpu_arch_ver_table): Define.
1899 (cpu_arch_ver): New.
1900 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1901 Tag_CPU_arch_profile.
1902 * doc/c-arm.texi: Document new cpu and arch options.
1903
59cf82fe
L		 19042006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1905
1906 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1907
19a7219f
L		 19082006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1909
1910 * config/tc-ia64.c: Update copyright years.
1911
7f3dfb9c
L		 19122006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1913
1914 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1915 SDM 2.2.
1916
f40d1643
PB		 19172005-02-22 Paul Brook <paul@codesourcery.com>
1918
1919 * config/tc-arm.c (do_pld): Remove incorrect write to
1920 inst.instruction.
1921 (encode_thumb32_addr_mode): Use correct operand.
1922
216d22bc
PB		 19232006-02-21 Paul Brook <paul@codesourcery.com>
1924
1925 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1926
d70c5fc7
NC		 19272006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1928 Anil Paranjape <anilp1@kpitcummins.com>
1929 Shilin Shakti <shilins@kpitcummins.com>
1930
1931 * Makefile.am: Add xc16x related entry.
1932 * Makefile.in: Regenerate.
1933 * configure.in: Added xc16x related entry.
1934 * configure: Regenerate.
1935 * config/tc-xc16x.h: New file
1936 * config/tc-xc16x.c: New file
1937 * doc/c-xc16x.texi: New file for xc16x
1938 * doc/all.texi: Entry for xc16x
1939 * doc/Makefile.texi: Added c-xc16x.texi
1940 * NEWS: Announce the support for the new target.
1941
aaa2ab3d
NH		 19422006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1943
1944 * configure.tgt: set emulation for mips-*-netbsd*
1945
82de001f
JJ		 19462006-02-14 Jakub Jelinek <jakub@redhat.com>
1947
1948 * config.in: Rebuilt.
1949
431ad2d0
BW		 19502006-02-13 Bob Wilson <bob.wilson@acm.org>
1951
1952 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1953 from 1, not 0, in error messages.
1954 (md_assemble): Simplify special-case check for ENTRY instructions.
1955 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1956 operand in error message.
1957
94089a50
JM		 19582006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1959
1960 * configure.tgt (arm-*-linux-gnueabi*): Change to
1961 arm-*-linux-*eabi*.
1962
52de4c06
NC		 19632006-02-10 Nick Clifton <nickc@redhat.com>
1964
70e45ad9
NC		 1965 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1966 32-bit value is propagated into the upper bits of a 64-bit long.
1967
52de4c06
NC		 1968 * config/tc-arc.c (init_opcode_tables): Fix cast.
1969 (arc_extoper, md_operand): Likewise.
1970
21af2bbd
BW		 19712006-02-09 David Heine <dlheine@tensilica.com>
1972
1973 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1974 each relaxation step.
1975
75a706fc
L		 19762006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1977
1978 * configure.in (CHECK_DECLS): Add vsnprintf.
1979 * configure: Regenerate.
1980 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1981 include/declare here, but...
1982 * as.h: Move code detecting VARARGS idiom to the top.
1983 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1984 (vsnprintf): Declare if not already declared.
1985
0d474464
L		 19862006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1987
1988 * as.c (close_output_file): New.
1989 (main): Register close_output_file with xatexit before
1990 dump_statistics. Don't call output_file_close.
1991
266abb8f
NS		 19922006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1993
1994 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1995 mcf5329_control_regs): New.
1996 (not_current_architecture, selected_arch, selected_cpu): New.
1997 (m68k_archs, m68k_extensions): New.
1998 (archs): Renamed to ...
1999 (m68k_cpus): ... here. Adjust.
2000 (n_arches): Remove.
2001 (md_pseudo_table): Add arch and cpu directives.
2002 (find_cf_chip, m68k_ip): Adjust table scanning.
2003 (no_68851, no_68881): Remove.
2004 (md_assemble): Lazily initialize.
2005 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2006 (md_init_after_args): Move functionality to m68k_init_arch.
2007 (mri_chip): Adjust table scanning.
2008 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2009 options with saner parsing.
2010 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2011 m68k_init_arch): New.
2012 (s_m68k_cpu, s_m68k_arch): New.
2013 (md_show_usage): Adjust.
2014 (m68k_elf_final_processing): Set CF EF flags.
2015 * config/tc-m68k.h (m68k_init_after_args): Remove.
2016 (tc_init_after_args): Remove.
2017 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2018 (M68k-Directives): Document .arch and .cpu directives.
2019
134dcee5
AM		 20202006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2021
2022 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2023 synonyms for equ and defl.
2024 (z80_cons_fix_new): New function.
2025 (emit_byte): Disallow relative jumps to absolute locations.
2026 (emit_data): Only handle defb, prototype changed, because defb is
2027 now handled as pseudo-op rather than an instruction.
2028 (instab): Entries for defb,defw,db,dw moved from here...
2029 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2030 Add entries for def24,def32,d24,d32.
2031 (md_assemble): Improved error handling.
2032 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2033 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2034 (z80_cons_fix_new): Declare.
2035 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2036 (def24,d24,def32,d32): New pseudo-ops.
2037
a9931606
PB		 20382006-02-02 Paul Brook <paul@codesourcery.com>
2039
2040 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2041
ef8d22e6
PB		 20422005-02-02 Paul Brook <paul@codesourcery.com>
2043
2044 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2045 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2046 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2047 T2_OPCODE_RSB): Define.
2048 (thumb32_negate_data_op): New function.
2049 (md_apply_fix): Use it.
2050
e7da6241
BW		 20512006-01-31 Bob Wilson <bob.wilson@acm.org>
2052
2053 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2054 fields.
2055 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2056 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2057 subtracted symbols.
2058 (relaxation_requirements): Add pfinish_frag argument and use it to
2059 replace setting tinsn->record_fix fields.
2060 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2061 and vinsn_to_insnbuf. Remove references to record_fix and
2062 slot_sub_symbols fields.
2063 (xtensa_mark_narrow_branches): Delete unused code.
2064 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2065 a symbol.
2066 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2067 record_fix fields.
2068 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2069 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2070 of the record_fix field. Simplify error messages for unexpected
2071 symbolic operands.
2072 (set_expr_symbol_offset_diff): Delete.
2073
79134647
PB		 20742006-01-31 Paul Brook <paul@codesourcery.com>
2075
2076 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2077
e74cfd16
PB		 20782006-01-31 Paul Brook <paul@codesourcery.com>
2079 Richard Earnshaw <rearnsha@arm.com>
2080
2081 * config/tc-arm.c: Use arm_feature_set.
2082 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2083 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2084 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2085 New variables.
2086 (insns): Use them.
2087 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2088 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2089 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2090 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2091 feature flags.
2092 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2093 (arm_opts): Move old cpu/arch options from here...
2094 (arm_legacy_opts): ... to here.
2095 (md_parse_option): Search arm_legacy_opts.
2096 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2097 (arm_float_abis, arm_eabis): Make const.
2098
d47d412e
BW		 20992006-01-25 Bob Wilson <bob.wilson@acm.org>
2100
2101 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2102
b14273fe
JZ		 21032006-01-21 Jie Zhang <jie.zhang@analog.com>
2104
2105 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2106 in load immediate intruction.
2107
39cd1c76
JZ		 21082006-01-21 Jie Zhang <jie.zhang@analog.com>
2109
2110 * config/bfin-parse.y (value_match): Use correct conversion
2111 specifications in template string for __FILE__ and __LINE__.
2112 (binary): Ditto.
2113 (unary): Ditto.
2114
67a4f2b7
AO		 21152006-01-18 Alexandre Oliva <aoliva@redhat.com>
2116
2117 Introduce TLS descriptors for i386 and x86_64.
2118 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2119 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2120 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2121 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2122 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2123 displacement bits.
2124 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2125 (lex_got): Handle @tlsdesc and @tlscall.
2126 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2127
8ad7c533
NC		 21282006-01-11 Nick Clifton <nickc@redhat.com>
2129
2130 Fixes for building on 64-bit hosts:
2131 * config/tc-avr.c (mod_index): New union to allow conversion
2132 between pointers and integers.
2133 (md_begin, avr_ldi_expression): Use it.
2134 * config/tc-i370.c (md_assemble): Add cast for argument to print
2135 statement.
2136 * config/tc-tic54x.c (subsym_substitute): Likewise.
2137 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2138 opindex field of fr_cgen structure into a pointer so that it can
2139 be stored in a frag.
2140 * config/tc-mn10300.c (md_assemble): Likewise.
2141 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2142 types.
2143 * config/tc-v850.c: Replace uses of (int) casts with correct
2144 types.
2145
4dcb3903
L		 21462006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2147
2148 PR gas/2117
2149 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2150
e0f6ea40
HPN		 21512006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2152
2153 PR gas/2101
2154 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2155 a local-label reference.
2156
e88d958a 2157For older changes see ChangeLog-2005
08d56133
NC		 2158\f
2159Local Variables:
2160mode: change-log
2161left-margin: 8
2162fill-column: 74
2163version-control: never
2164End:
GDB Binutils - Deliverables
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