* cris/cris-sim.h (enum cris_unknown_syscall_action_type)
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
3bb0c887
AM
12006-09-29 Alan Modra <amodra@bigpond.net.au>
2
3 * po/POTFILES.in: Regenerate.
4
ef05d495
L
52006-09-28 H.J. Lu <hongjiu.lu@intel.com>
6
7 * config/tc-i386.h (CpuMNI): Renamed to ...
8 (CpuSSSE3): This.
9 (CpuUnknownFlags): Updated.
10 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
11 and PROCESSOR_MEROM with PROCESSOR_CORE2.
12 * config/tc-i386.c: Updated.
13 * doc/c-i386.texi: Likewise.
14
15 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
16
d8ad03e9
NC
172006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
18
19 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
20
df3ca5a3
NC
212006-09-27 Nick Clifton <nickc@redhat.com>
22
23 * output-file.c (output_file_close): Prevent an infinite loop
24 reporting that stdoutput could not be closed.
25
2d447fca
JM
262006-09-26 Mark Shinwell <shinwell@codesourcery.com>
27 Joseph Myers <joseph@codesourcery.com>
28 Ian Lance Taylor <ian@wasabisystems.com>
29 Ben Elliston <bje@wasabisystems.com>
30
31 * config/tc-arm.c (arm_cext_iwmmxt2): New.
32 (enum operand_parse_code): New code OP_RIWR_I32z.
33 (parse_operands): Handle OP_RIWR_I32z.
34 (do_iwmmxt_wmerge): New function.
35 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
36 a register.
37 (do_iwmmxt_wrwrwr_or_imm5): New function.
38 (insns): Mark instructions as RIWR_I32z as appropriate.
39 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
40 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
41 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
42 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
43 (md_begin): Handle IWMMXT2.
44 (arm_cpus): Add iwmmxt2.
45 (arm_extensions): Likewise.
46 (arm_archs): Likewise.
47
ba83aca1
BW
482006-09-25 Bob Wilson <bob.wilson@acm.org>
49
50 * doc/as.texinfo (Overview): Revise description of --keep-locals.
51 Add xref to "Symbol Names".
52 (L): Refer to "local symbols" instead of "local labels". Move
53 definition to "Symbol Names" section; add xref to that section.
54 (Symbol Names): Use "Local Symbol Names" section to define local
55 symbols. Add "Local Labels" heading for description of temporary
56 forward/backward labels, and refer to those as "local labels".
57
539e75ad
L
582006-09-23 H.J. Lu <hongjiu.lu@intel.com>
59
60 PR binutils/3235
61 * config/tc-i386.c (match_template): Check address size prefix
62 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
63 operand.
64
5e02f92e
AM
652006-09-22 Alan Modra <amodra@bigpond.net.au>
66
67 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
68
885afe7b
AM
692006-09-22 Alan Modra <amodra@bigpond.net.au>
70
71 * as.h (as_perror): Delete declaration.
72 * gdbinit.in (as_perror): Delete breakpoint.
73 * messages.c (as_perror): Delete function.
74 * doc/internals.texi: Remove as_perror description.
75 * listing.c (listing_print: Don't use as_perror.
76 * output-file.c (output_file_create, output_file_close): Likewise.
77 * symbols.c (symbol_create, symbol_clone): Likewise.
78 * write.c (write_contents): Likewise.
79 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
80 * config/tc-tic54x.c (tic54x_mlib): Likewise.
81
3aeeedbb
AM
822006-09-22 Alan Modra <amodra@bigpond.net.au>
83
84 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
85 (ppc_handle_align): New function.
86 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
87 (SUB_SEGMENT_ALIGN): Define as zero.
88
96e9638b
BW
892006-09-20 Bob Wilson <bob.wilson@acm.org>
90
91 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
92 (Overview): Skip cross reference in man page.
93
99ad8390
NC
942006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
95
96 * configure.in: Add new target x86_64-pc-mingw64.
97 * configure: Regenerate.
98 * configure.tgt: Add new target x86_64-pc-mingw64.
99 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
100 * config/tc-i386.c: Add new targets.
101 (md_parse_option): Add targets to OPTION_64.
102 (x86_64_target_format): Add new method for setup proper default target cpu mode.
103 * config/te-pep.h: Add new target definition header.
104 (TE_PEP): New macro: Identifies new target architecture.
105 (COFF_WITH_pex64): Set proper includes in bfd.
106 * NEWS: Mention new target.
107
73332571
BS
1082006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
109
110 * config/bfin-parse.y (binary): Change sub of const to add of negated
111 const.
112
1c0d3aa6
NC
1132006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
114
115 * config/tc-score.c: New file.
116 * config/tc-score.h: Newf file.
117 * configure.tgt: Add Score target.
118 * Makefile.am: Add Score files.
119 * Makefile.in: Regenerate.
120 * NEWS: Mention new target support.
121
4fa3602b
PB
1222006-09-16 Paul Brook <paul@codesourcery.com>
123
124 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
125 * doc/c-arm.texi (movsp): Document offset argument.
126
16dd5e42
PB
1272006-09-16 Paul Brook <paul@codesourcery.com>
128
129 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
130 unsigned int to avoid 64-bit host problems.
131
c4ae04ce
BS
1322006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
133
134 * config/bfin-parse.y (binary): Do some more constant folding for
135 additions.
136
e5d4a5a6
JB
1372006-09-13 Jan Beulich <jbeulich@novell.com>
138
139 * input-file.c (input_file_give_next_buffer): Demote as_bad to
140 as_warn.
141
1a1219cb
AM
1422006-09-13 Alan Modra <amodra@bigpond.net.au>
143
144 PR gas/3165
145 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
146 in parens.
147
f79d9c1d
AM
1482006-09-13 Alan Modra <amodra@bigpond.net.au>
149
150 * input-file.c (input_file_open): Replace as_perror with as_bad
151 so that gas exits with error on file errors. Correct error
152 message.
153 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 154 * input-file.h: Update comment.
f79d9c1d 155
f512f76f
NC
1562006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
157
158 PR gas/3172
159 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
160 registers as a sub-class of wC registers.
161
8d79fd44
AM
1622006-09-11 Alan Modra <amodra@bigpond.net.au>
163
164 PR gas/3165
165 * config/tc-mips.h (enum dwarf2_format): Forward declare.
166 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
167 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
168 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
169
6258339f
NC
1702006-09-08 Nick Clifton <nickc@redhat.com>
171
172 PR gas/3129
173 * doc/as.texinfo (Macro): Improve documentation about separating
174 macro arguments from following text.
175
f91e006c
PB
1762006-09-08 Paul Brook <paul@codesourcery.com>
177
178 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
179
466bbf93
PB
1802006-09-07 Paul Brook <paul@codesourcery.com>
181
182 * config/tc-arm.c (parse_operands): Mark operand as present.
183
428e3f1f
PB
1842006-09-04 Paul Brook <paul@codesourcery.com>
185
186 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
187 (do_neon_dyadic_if_i_d): Avoid setting U bit.
188 (do_neon_mac_maybe_scalar): Ditto.
189 (do_neon_dyadic_narrow): Force operand type to NT_integer.
190 (insns): Remove out of date comments.
191
fb25138b
NC
1922006-08-29 Nick Clifton <nickc@redhat.com>
193
194 * read.c (s_align): Initialize the 'stopc' variable to prevent
195 compiler complaints about it being used without being
196 initialized.
197 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
198 s_float_space, s_struct, cons_worker, equals): Likewise.
199
5091343a
AM
2002006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
201
202 * ecoff.c (ecoff_directive_val): Fix message typo.
203 * config/tc-ns32k.c (convert_iif): Likewise.
204 * config/tc-sh64.c (shmedia_check_limits): Likewise.
205
1f2a7e38
BW
2062006-08-25 Sterling Augustine <sterling@tensilica.com>
207 Bob Wilson <bob.wilson@acm.org>
208
209 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
210 the state of the absolute_literals directive. Remove align frag at
211 the start of the literal pool position.
212
34135039
BW
2132006-08-25 Bob Wilson <bob.wilson@acm.org>
214
215 * doc/c-xtensa.texi: Add @group commands in examples.
216
74869ac7
BW
2172006-08-24 Bob Wilson <bob.wilson@acm.org>
218
219 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
220 (INIT_LITERAL_SECTION_NAME): Delete.
221 (lit_state struct): Remove segment names, init_lit_seg, and
222 fini_lit_seg. Add lit_prefix and current_text_seg.
223 (init_literal_head_h, init_literal_head): Delete.
224 (fini_literal_head_h, fini_literal_head): Delete.
225 (xtensa_begin_directive): Move argument parsing to
226 xtensa_literal_prefix function.
227 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
228 (xtensa_literal_prefix): Parse the directive argument here and
229 record it in the lit_prefix field. Remove code to derive literal
230 section names.
231 (linkonce_len): New.
232 (get_is_linkonce_section): Use linkonce_len. Check for any
233 ".gnu.linkonce.*" section, not just text sections.
234 (md_begin): Remove initialization of deleted lit_state fields.
235 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
236 to init_literal_head and fini_literal_head.
237 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
238 when traversing literal_head list.
239 (match_section_group): New.
240 (cache_literal_section): Rewrite to determine the literal section
241 name on the fly, create the section and return it.
242 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
243 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
244 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
245 Use xtensa_get_property_section from bfd.
246 (retrieve_xtensa_section): Delete.
247 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
248 description to refer to plural literal sections and add xref to
249 the Literal Directive section.
250 (Literal Directive): Describe new rules for deriving literal section
251 names. Add footnote for special case of .init/.fini with
252 --text-section-literals.
253 (Literal Prefix Directive): Replace old naming rules with xref to the
254 Literal Directive section.
255
87a1fd79
JM
2562006-08-21 Joseph Myers <joseph@codesourcery.com>
257
258 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
259 merging with previous long opcode.
260
7148cc28
NC
2612006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
262
263 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
264 * Makefile.in: Regenerate.
265 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
266 renamed. Adjust.
267
3e9e4fcf
JB
2682006-08-16 Julian Brown <julian@codesourcery.com>
269
270 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
271 to use ARM instructions on non-ARM-supporting cores.
272 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
273 mode automatically based on cpu variant.
274 (md_begin): Call above function.
275
267d2029
JB
2762006-08-16 Julian Brown <julian@codesourcery.com>
277
278 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
279 recognized in non-unified syntax mode.
280
4be041b2
TS
2812006-08-15 Thiemo Seufer <ths@mips.com>
282 Nigel Stephens <nigel@mips.com>
283 David Ung <davidu@mips.com>
284
285 * configure.tgt: Handle mips*-sde-elf*.
286
3a93f742
TS
2872006-08-12 Thiemo Seufer <ths@networkno.de>
288
289 * config/tc-mips.c (mips16_ip): Fix argument register handling
290 for restore instruction.
291
1737851b
BW
2922006-08-08 Bob Wilson <bob.wilson@acm.org>
293
294 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
295 (out_sleb128): New.
296 (out_fixed_inc_line_addr): New.
297 (process_entries): Use out_fixed_inc_line_addr when
298 DWARF2_USE_FIXED_ADVANCE_PC is set.
299 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
300
e14e52f8
DD
3012006-08-08 DJ Delorie <dj@redhat.com>
302
303 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
304 vs full symbols so that we never have more than one pointer value
305 for any given symbol in our symbol table.
306
802f5d9e
NC
3072006-08-08 Sterling Augustine <sterling@tensilica.com>
308
309 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
310 and emit DW_AT_ranges when code in compilation unit is not
311 contiguous.
312 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
313 is not contiguous.
314 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
315 (out_debug_ranges): New function to emit .debug_ranges section
316 when code is not contiguous.
317
720abc60
NC
3182006-08-08 Nick Clifton <nickc@redhat.com>
319
320 * config/tc-arm.c (WARN_DEPRECATED): Enable.
321
f0927246
NC
3222006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
323
324 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
325 only block.
326 (pe_directive_secrel) [TE_PE]: New function.
327 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
328 loc, loc_mark_labels.
329 [TE_PE]: Handle secrel32.
330 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
331 call.
332 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
333 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
334 (md_section_align): Only round section sizes here for AOUT
335 targets.
336 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
337 (tc_pe_dwarf2_emit_offset): New function.
338 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
339 (cons_fix_new_arm): Handle O_secrel.
340 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
341 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
342 of OBJ_ELF only block.
343 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
344 tc_pe_dwarf2_emit_offset.
345
55e6e397
RS
3462006-08-04 Richard Sandiford <richard@codesourcery.com>
347
348 * config/tc-sh.c (apply_full_field_fix): New function.
349 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
350 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
351 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
352 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
353
9cd19b17
NC
3542006-08-03 Nick Clifton <nickc@redhat.com>
355
356 PR gas/2991
357 * config.in: Regenerate.
358
97f87066
JM
3592006-08-03 Joseph Myers <joseph@codesourcery.com>
360
361 * config/tc-arm.c (parse_operands): Handle invalid register name
362 for OP_RIWR_RIWC.
363
41adaa5c
JM
3642006-08-03 Joseph Myers <joseph@codesourcery.com>
365
366 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
367 (parse_operands): Handle it.
368 (insns): Use it for tmcr and tmrc.
369
9d7cbccd
NC
3702006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
371
372 PR binutils/2983
373 * config/tc-i386.c (md_parse_option): Treat any target starting
374 with elf64_x86_64 as a viable target for the -64 switch.
375 (i386_target_format): For 64-bit ELF flavoured output use
376 ELF_TARGET_FORMAT64.
377 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
378
c973bc5c
NC
3792006-08-02 Nick Clifton <nickc@redhat.com>
380
381 PR gas/2991
382 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
383 bfd/aclocal.m4.
384 * configure.in: Run BFD_BINARY_FOPEN.
385 * configure: Regenerate.
386 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
387 file to include.
388
cfde7f70
L
3892006-08-01 H.J. Lu <hongjiu.lu@intel.com>
390
391 * config/tc-i386.c (md_assemble): Don't update
392 cpu_arch_isa_flags.
393
b4c71f56
TS
3942006-08-01 Thiemo Seufer <ths@mips.com>
395
396 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
397
54f4ddb3
TS
3982006-08-01 Thiemo Seufer <ths@mips.com>
399
400 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
401 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
402 BFD_RELOC_32 and BFD_RELOC_16.
403 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
404 md_convert_frag, md_obj_end): Fix comment formatting.
405
d103cf61
TS
4062006-07-31 Thiemo Seufer <ths@mips.com>
407
408 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
409 handling for BFD_RELOC_MIPS16_JMP.
410
601e61cd
NC
4112006-07-24 Andreas Schwab <schwab@suse.de>
412
413 PR/2756
414 * read.c (read_a_source_file): Ignore unknown text after line
415 comment character. Fix misleading comment.
416
b45619c0
NC
4172006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
418
419 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
420 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
421 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
422 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
423 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
424 doc/c-z80.texi, doc/internals.texi: Fix some typos.
425
784906c5
NC
4262006-07-21 Nick Clifton <nickc@redhat.com>
427
428 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
429 linker testsuite.
430
d5f010e9
TS
4312006-07-20 Thiemo Seufer <ths@mips.com>
432 Nigel Stephens <nigel@mips.com>
433
434 * config/tc-mips.c (md_parse_option): Don't infer optimisation
435 options from debug options.
436
35d3d567
TS
4372006-07-20 Thiemo Seufer <ths@mips.com>
438
439 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
440 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
441
401a54cf
PB
4422006-07-19 Paul Brook <paul@codesourcery.com>
443
444 * config/tc-arm.c (insns): Fix rbit Arm opcode.
445
16805f35
PB
4462006-07-18 Paul Brook <paul@codesourcery.com>
447
448 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
449 (md_convert_frag): Use correct reloc for add_pc. Use
450 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
451 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
452 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
453
d9e05e4e
AM
4542006-07-17 Mat Hostetter <mat@lcs.mit.edu>
455
456 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
457 when file and line unknown.
458
f43abd2b
TS
4592006-07-17 Thiemo Seufer <ths@mips.com>
460
461 * read.c (s_struct): Use IS_ELF.
462 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
463 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
464 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
465 s_mips_mask): Likewise.
466
a2902af6
TS
4672006-07-16 Thiemo Seufer <ths@mips.com>
468 David Ung <davidu@mips.com>
469
470 * read.c (s_struct): Handle ELF section changing.
471 * config/tc-mips.c (s_align): Leave enabling auto-align to the
472 generic code.
473 (s_change_sec): Try section changing only if we output ELF.
474
d32cad65
L
4752006-07-15 H.J. Lu <hongjiu.lu@intel.com>
476
477 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
478 CpuAmdFam10.
479 (smallest_imm_type): Remove Cpu086.
480 (i386_target_format): Likewise.
481
482 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
483 Update CpuXXX.
484
050dfa73
MM
4852006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
486 Michael Meissner <michael.meissner@amd.com>
487
488 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
489 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
490 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
491 architecture.
492 (i386_align_code): Ditto.
493 (md_assemble_code): Add support for insertq/extrq instructions,
494 swapping as needed for intel syntax.
495 (swap_imm_operands): New function to swap immediate operands.
496 (swap_operands): Deal with 4 operand instructions.
497 (build_modrm_byte): Add support for insertq instruction.
498
6b2de085
L
4992006-07-13 H.J. Lu <hongjiu.lu@intel.com>
500
501 * config/tc-i386.h (Size64): Fix a typo in comment.
502
01eaea5a
NC
5032006-07-12 Nick Clifton <nickc@redhat.com>
504
505 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 506 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
507 already been checked here.
508
1e85aad8
JW
5092006-07-07 James E Wilson <wilson@specifix.com>
510
511 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
512
1370e33d
NC
5132006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
514 Nick Clifton <nickc@redhat.com>
515
516 PR binutils/2877
517 * doc/as.texi: Fix spelling typo: branchs => branches.
518 * doc/c-m68hc11.texi: Likewise.
519 * config/tc-m68hc11.c: Likewise.
520 Support old spelling of command line switch for backwards
521 compatibility.
522
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TS
5232006-07-04 Thiemo Seufer <ths@mips.com>
524 David Ung <davidu@mips.com>
525
526 * config/tc-mips.c (s_is_linkonce): New function.
527 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
528 weak, external, and linkonce symbols.
529 (pic_need_relax): Use s_is_linkonce.
530
85234291
L
5312006-06-24 H.J. Lu <hongjiu.lu@intel.com>
532
533 * doc/as.texinfo (Org): Remove space.
534 (P2align): Add "@var{abs-expr},".
535
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L
5362006-06-23 H.J. Lu <hongjiu.lu@intel.com>
537
538 * config/tc-i386.c (cpu_arch_tune_set): New.
539 (cpu_arch_isa): Likewise.
540 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
541 nops with short or long nop sequences based on -march=/.arch
542 and -mtune=.
543 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
544 set cpu_arch_tune and cpu_arch_tune_flags.
545 (md_parse_option): For -march=, set cpu_arch_isa and set
546 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
547 0. Set cpu_arch_tune_set to 1 for -mtune=.
548 (i386_target_format): Don't set cpu_arch_tune.
549
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TS
5502006-06-23 Nigel Stephens <nigel@mips.com>
551
552 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
553 generated .sbss.* and .gnu.linkonce.sb.*.
554
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TS
5552006-06-23 Thiemo Seufer <ths@mips.com>
556 David Ung <davidu@mips.com>
557
558 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
559 label_list.
560 * config/tc-mips.c (label_list): Define per-segment label_list.
561 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
562 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
563 mips_from_file_after_relocs, mips_define_label): Use per-segment
564 label_list.
565
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TS
5662006-06-22 Thiemo Seufer <ths@mips.com>
567
568 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
569 (append_insn): Use it.
570 (md_apply_fix): Whitespace formatting.
571 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
572 mips16_extended_frag): Remove register specifier.
573 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
574 constants.
575
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MS
5762006-06-21 Mark Shinwell <shinwell@codesourcery.com>
577
578 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
579 a directive saving VFP registers for ARMv6 or later.
580 (s_arm_unwind_save): Add parameter arch_v6 and call
581 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
582 appropriate.
583 (md_pseudo_table): Add entry for new "vsave" directive.
584 * doc/c-arm.texi: Correct error in example for "save"
585 directive (fstmdf -> fstmdx). Also document "vsave" directive.
586
8e77b565 5872006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
588 Anatoly Sokolov <aesok@post.ru>
589
590 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
591 and atmega644p devices. Rename atmega164/atmega324 devices to
592 atmega164p/atmega324p.
593 * doc/c-avr.texi: Document new mcu and arch options.
594
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NC
5952006-06-17 Nick Clifton <nickc@redhat.com>
596
597 * config/tc-arm.c (enum parse_operand_result): Move outside of
598 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
599
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L
6002006-06-16 H.J. Lu <hongjiu.lu@intel.com>
601
602 * config/tc-i386.h (processor_type): New.
603 (arch_entry): Add type.
604
605 * config/tc-i386.c (cpu_arch_tune): New.
606 (cpu_arch_tune_flags): Likewise.
607 (cpu_arch_isa_flags): Likewise.
608 (cpu_arch): Updated.
609 (set_cpu_arch): Also update cpu_arch_isa_flags.
610 (md_assemble): Update cpu_arch_isa_flags.
611 (OPTION_MARCH): New.
612 (OPTION_MTUNE): Likewise.
613 (md_longopts): Add -march= and -mtune=.
614 (md_parse_option): Support -march= and -mtune=.
615 (md_show_usage): Add -march=CPU/-mtune=CPU.
616 (i386_target_format): Also update cpu_arch_isa_flags,
617 cpu_arch_tune and cpu_arch_tune_flags.
618
619 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
620
621 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
622
4962c51a
MS
6232006-06-15 Mark Shinwell <shinwell@codesourcery.com>
624
625 * config/tc-arm.c (enum parse_operand_result): New.
626 (struct group_reloc_table_entry): New.
627 (enum group_reloc_type): New.
628 (group_reloc_table): New array.
629 (find_group_reloc_table_entry): New function.
630 (parse_shifter_operand_group_reloc): New function.
631 (parse_address_main): New function, incorporating code
632 from the old parse_address function. To be used via...
633 (parse_address): wrapper for parse_address_main; and
634 (parse_address_group_reloc): new function, likewise.
635 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
636 OP_ADDRGLDRS, OP_ADDRGLDC.
637 (parse_operands): Support for these new operand codes.
638 New macro po_misc_or_fail_no_backtrack.
639 (encode_arm_cp_address): Preserve group relocations.
640 (insns): Modify to use the above operand codes where group
641 relocations are permitted.
642 (md_apply_fix): Handle the group relocations
643 ALU_PC_G0_NC through LDC_SB_G2.
644 (tc_gen_reloc): Likewise.
645 (arm_force_relocation): Leave group relocations for the linker.
646 (arm_fix_adjustable): Likewise.
647
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JB
6482006-06-15 Julian Brown <julian@codesourcery.com>
649
650 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
651 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
652 relocs properly.
653
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L
6542006-06-12 H.J. Lu <hongjiu.lu@intel.com>
655
656 * config/tc-i386.c (process_suffix): Don't add rex64 for
657 "xchg %rax,%rax".
658
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TS
6592006-06-09 Thiemo Seufer <ths@mips.com>
660
661 * config/tc-mips.c (mips_ip): Maintain argument count.
662
96f989c2
AM
6632006-06-09 Alan Modra <amodra@bigpond.net.au>
664
665 * config/tc-iq2000.c: Include sb.h.
666
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TS
6672006-06-08 Nigel Stephens <nigel@mips.com>
668
669 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
670 aliases for better compatibility with SGI tools.
671
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6722006-06-08 Alan Modra <amodra@bigpond.net.au>
673
674 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
675 * Makefile.am (GASLIBS): Expand @BFDLIB@.
676 (BFDVER_H): Delete.
677 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
678 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
679 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
680 Run "make dep-am".
681 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
682 * Makefile.in: Regenerate.
683 * doc/Makefile.in: Regenerate.
684 * configure: Regenerate.
685
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JM
6862006-06-07 Joseph S. Myers <joseph@codesourcery.com>
687
688 * po/Make-in (pdf, ps): New dummy targets.
689
037e8744
JB
6902006-06-07 Julian Brown <julian@codesourcery.com>
691
692 * config/tc-arm.c (stdarg.h): include.
693 (arm_it): Add uncond_value field. Add isvec and issingle to operand
694 array.
695 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
696 REG_TYPE_NSDQ (single, double or quad vector reg).
697 (reg_expected_msgs): Update.
698 (BAD_FPU): Add macro for unsupported FPU instruction error.
699 (parse_neon_type): Support 'd' as an alias for .f64.
700 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
701 sets of registers.
702 (parse_vfp_reg_list): Don't update first arg on error.
703 (parse_neon_mov): Support extra syntax for VFP moves.
704 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
705 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
706 (parse_operands): Support isvec, issingle operands fields, new parse
707 codes above.
708 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
709 msr variants.
710 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
711 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
712 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
713 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
714 shapes.
715 (neon_shape): Redefine in terms of above.
716 (neon_shape_class): New enumeration, table of shape classes.
717 (neon_shape_el): New enumeration. One element of a shape.
718 (neon_shape_el_size): Register widths of above, where appropriate.
719 (neon_shape_info): New struct. Info for shape table.
720 (neon_shape_tab): New array.
721 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
722 (neon_check_shape): Rewrite as...
723 (neon_select_shape): New function to classify instruction shapes,
724 driven by new table neon_shape_tab array.
725 (neon_quad): New function. Return 1 if shape should set Q flag in
726 instructions (or equivalent), 0 otherwise.
727 (type_chk_of_el_type): Support F64.
728 (el_type_of_type_chk): Likewise.
729 (neon_check_type): Add support for VFP type checking (VFP data
730 elements fill their containing registers).
731 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
732 in thumb mode for VFP instructions.
733 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
734 and encode the current instruction as if it were that opcode.
735 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
736 arguments, call function in PFN.
737 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
738 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
739 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
740 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
741 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
742 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
743 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
744 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
745 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
746 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
747 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
748 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
749 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
750 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
751 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
752 neon_quad.
753 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
754 between VFP and Neon turns out to belong to Neon. Perform
755 architecture check and fill in condition field if appropriate.
756 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
757 (do_neon_cvt): Add support for VFP variants of instructions.
758 (neon_cvt_flavour): Extend to cover VFP conversions.
759 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
760 vmov variants.
761 (do_neon_ldr_str): Handle single-precision VFP load/store.
762 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
763 NS_NULL not NS_IGNORE.
764 (opcode_tag): Add OT_csuffixF for operands which either take a
765 conditional suffix, or have 0xF in the condition field.
766 (md_assemble): Add support for OT_csuffixF.
767 (NCE): Replace macro with...
768 (NCE_tag, NCE, NCEF): New macros.
769 (nCE): Replace macro with...
770 (nCE_tag, nCE, nCEF): New macros.
771 (insns): Add support for VFP insns or VFP versions of insns msr,
772 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
773 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
774 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
775 VFP/Neon insns together.
776
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7772006-06-07 Alan Modra <amodra@bigpond.net.au>
778 Ladislav Michl <ladis@linux-mips.org>
779
780 * app.c: Don't include headers already included by as.h.
781 * as.c: Likewise.
782 * atof-generic.c: Likewise.
783 * cgen.c: Likewise.
784 * dwarf2dbg.c: Likewise.
785 * expr.c: Likewise.
786 * input-file.c: Likewise.
787 * input-scrub.c: Likewise.
788 * macro.c: Likewise.
789 * output-file.c: Likewise.
790 * read.c: Likewise.
791 * sb.c: Likewise.
792 * config/bfin-lex.l: Likewise.
793 * config/obj-coff.h: Likewise.
794 * config/obj-elf.h: Likewise.
795 * config/obj-som.h: Likewise.
796 * config/tc-arc.c: Likewise.
797 * config/tc-arm.c: Likewise.
798 * config/tc-avr.c: Likewise.
799 * config/tc-bfin.c: Likewise.
800 * config/tc-cris.c: Likewise.
801 * config/tc-d10v.c: Likewise.
802 * config/tc-d30v.c: Likewise.
803 * config/tc-dlx.h: Likewise.
804 * config/tc-fr30.c: Likewise.
805 * config/tc-frv.c: Likewise.
806 * config/tc-h8300.c: Likewise.
807 * config/tc-hppa.c: Likewise.
808 * config/tc-i370.c: Likewise.
809 * config/tc-i860.c: Likewise.
810 * config/tc-i960.c: Likewise.
811 * config/tc-ip2k.c: Likewise.
812 * config/tc-iq2000.c: Likewise.
813 * config/tc-m32c.c: Likewise.
814 * config/tc-m32r.c: Likewise.
815 * config/tc-maxq.c: Likewise.
816 * config/tc-mcore.c: Likewise.
817 * config/tc-mips.c: Likewise.
818 * config/tc-mmix.c: Likewise.
819 * config/tc-mn10200.c: Likewise.
820 * config/tc-mn10300.c: Likewise.
821 * config/tc-msp430.c: Likewise.
822 * config/tc-mt.c: Likewise.
823 * config/tc-ns32k.c: Likewise.
824 * config/tc-openrisc.c: Likewise.
825 * config/tc-ppc.c: Likewise.
826 * config/tc-s390.c: Likewise.
827 * config/tc-sh.c: Likewise.
828 * config/tc-sh64.c: Likewise.
829 * config/tc-sparc.c: Likewise.
830 * config/tc-tic30.c: Likewise.
831 * config/tc-tic4x.c: Likewise.
832 * config/tc-tic54x.c: Likewise.
833 * config/tc-v850.c: Likewise.
834 * config/tc-vax.c: Likewise.
835 * config/tc-xc16x.c: Likewise.
836 * config/tc-xstormy16.c: Likewise.
837 * config/tc-xtensa.c: Likewise.
838 * config/tc-z80.c: Likewise.
839 * config/tc-z8k.c: Likewise.
840 * macro.h: Don't include sb.h or ansidecl.h.
841 * sb.h: Don't include stdio.h or ansidecl.h.
842 * cond.c: Include sb.h.
843 * itbl-lex.l: Include as.h instead of other system headers.
844 * itbl-parse.y: Likewise.
845 * itbl-ops.c: Similarly.
846 * itbl-ops.h: Don't include as.h or ansidecl.h.
847 * config/bfin-defs.h: Don't include bfd.h or as.h.
848 * config/bfin-parse.y: Include as.h instead of other system headers.
849
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8502006-06-06 Ben Elliston <bje@au.ibm.com>
851 Anton Blanchard <anton@samba.org>
852
853 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
854 (md_show_usage): Document it.
855 (ppc_setup_opcodes): Test power6 opcode flag bits.
856 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
857
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8582006-06-06 Thiemo Seufer <ths@mips.com>
859 Chao-ying Fu <fu@mips.com>
860
861 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
862 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
863 (macro_build): Update comment.
864 (mips_ip): Allow DSP64 instructions for MIPS64R2.
865 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
866 CPU_HAS_MDMX.
867 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
868 MIPS_CPU_ASE_MDMX flags for sb1.
869
a9e24354
TS
8702006-06-05 Thiemo Seufer <ths@mips.com>
871
872 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
873 appropriate.
874 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
875 (mips_ip): Make overflowed/underflowed constant arguments in DSP
876 and MT instructions a fatal error. Use INSERT_OPERAND where
877 appropriate. Improve warnings for break and wait code overflows.
878 Use symbolic constant of OP_MASK_COPZ.
879 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
880
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8812006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
882
883 * po/Make-in (top_builddir): Define.
884
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JM
8852006-06-02 Joseph S. Myers <joseph@codesourcery.com>
886
887 * doc/Makefile.am (TEXI2DVI): Define.
888 * doc/Makefile.in: Regenerate.
889 * doc/c-arc.texi: Fix typo.
890
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8912006-06-01 Alan Modra <amodra@bigpond.net.au>
892
893 * config/obj-ieee.c: Delete.
894 * config/obj-ieee.h: Delete.
895 * Makefile.am (OBJ_FORMATS): Remove ieee.
896 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
897 (obj-ieee.o): Remove rule.
898 * Makefile.in: Regenerate.
899 * configure.in (atof): Remove tahoe.
900 (OBJ_MAYBE_IEEE): Don't define.
901 * configure: Regenerate.
902 * config.in: Regenerate.
903 * doc/Makefile.in: Regenerate.
904 * po/POTFILES.in: Regenerate.
905
20e95c23
DJ
9062006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
907
908 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
909 and LIBINTL_DEP everywhere.
910 (INTLLIBS): Remove.
911 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
912 * acinclude.m4: Include new gettext macros.
913 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
914 Remove local code for po/Makefile.
915 * Makefile.in, configure, doc/Makefile.in: Regenerated.
916
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NC
9172006-05-30 Nick Clifton <nickc@redhat.com>
918
919 * po/es.po: Updated Spanish translation.
920
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DC
9212006-05-06 Denis Chertykov <denisc@overta.ru>
922
923 * doc/c-avr.texi: New file.
924 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
925 * doc/all.texi: Set AVR
926 * doc/as.texinfo: Include c-avr.texi
927
f8fdc850
JZ
9282006-05-28 Jie Zhang <jie.zhang@analog.com>
929
930 * config/bfin-parse.y (check_macfunc): Loose the condition of
931 calling check_multiply_halfregs ().
932
a3205465
JZ
9332006-05-25 Jie Zhang <jie.zhang@analog.com>
934
935 * config/bfin-parse.y (asm_1): Better check and deal with
936 vector and scalar Multiply 16-Bit Operands instructions.
937
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NC
9382006-05-24 Nick Clifton <nickc@redhat.com>
939
940 * config/tc-hppa.c: Convert to ISO C90 format.
941 * config/tc-hppa.h: Likewise.
942
9432006-05-24 Carlos O'Donell <carlos@systemhalted.org>
944 Randolph Chung <randolph@tausq.org>
945
946 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
947 is_tls_ieoff, is_tls_leoff): Define.
948 (fix_new_hppa): Handle TLS.
949 (cons_fix_new_hppa): Likewise.
950 (pa_ip): Likewise.
951 (md_apply_fix): Handle TLS relocs.
952 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
953
28c9d252
NC
9542006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
955
956 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
957
ad3fea08
TS
9582006-05-23 Thiemo Seufer <ths@mips.com>
959 David Ung <davidu@mips.com>
960 Nigel Stephens <nigel@mips.com>
961
962 [ gas/ChangeLog ]
963 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
964 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
965 ISA_HAS_MXHC1): New macros.
966 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
967 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
968 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
969 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
970 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
971 (mips_after_parse_args): Change default handling of float register
972 size to account for 32bit code with 64bit FP. Better sanity checking
973 of ISA/ASE/ABI option combinations.
974 (s_mipsset): Support switching of GPR and FPR sizes via
975 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
976 options.
977 (mips_elf_final_processing): We should record the use of 64bit FP
978 registers in 32bit code but we don't, because ELF header flags are
979 a scarce ressource.
980 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
981 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
982 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
983 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
984 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
985 missing -march options. Document .set arch=CPU. Move .set smartmips
986 to ASE page. Use @code for .set FOO examples.
987
8b64503a
JZ
9882006-05-23 Jie Zhang <jie.zhang@analog.com>
989
990 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
991 if needed.
992
403022e0
JZ
9932006-05-23 Jie Zhang <jie.zhang@analog.com>
994
995 * config/bfin-defs.h (bfin_equals): Remove declaration.
996 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
997 * config/tc-bfin.c (bfin_name_is_register): Remove.
998 (bfin_equals): Remove.
999 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1000 (bfin_name_is_register): Remove declaration.
1001
7455baf8
TS
10022006-05-19 Thiemo Seufer <ths@mips.com>
1003 Nigel Stephens <nigel@mips.com>
1004
1005 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1006 (mips_oddfpreg_ok): New function.
1007 (mips_ip): Use it.
1008
707bfff6
TS
10092006-05-19 Thiemo Seufer <ths@mips.com>
1010 David Ung <davidu@mips.com>
1011
1012 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1013 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1014 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1015 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1016 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1017 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1018 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1019 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1020 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1021 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1022 reg_names_o32, reg_names_n32n64): Define register classes.
1023 (reg_lookup): New function, use register classes.
1024 (md_begin): Reserve register names in the symbol table. Simplify
1025 OBJ_ELF defines.
1026 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1027 Use reg_lookup.
1028 (mips16_ip): Use reg_lookup.
1029 (tc_get_register): Likewise.
1030 (tc_mips_regname_to_dw2regnum): New function.
1031
1df69f4f
TS
10322006-05-19 Thiemo Seufer <ths@mips.com>
1033
1034 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1035 Un-constify string argument.
1036 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1037 Likewise.
1038 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1039 Likewise.
1040 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1041 Likewise.
1042 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1043 Likewise.
1044 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1045 Likewise.
1046 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1047 Likewise.
1048
377260ba
NS
10492006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1050
1051 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1052 cfloat/m68881 to correct architecture before using it.
1053
cce7653b
NC
10542006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1055
1056 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1057 constant values.
1058
b0796911
PB
10592006-05-15 Paul Brook <paul@codesourcery.com>
1060
1061 * config/tc-arm.c (arm_adjust_symtab): Use
1062 bfd_is_arm_special_symbol_name.
1063
64b607e6
BW
10642006-05-15 Bob Wilson <bob.wilson@acm.org>
1065
1066 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1067 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1068 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1069 Handle errors from calls to xtensa_opcode_is_* functions.
1070
9b3f89ee
TS
10712006-05-14 Thiemo Seufer <ths@mips.com>
1072
1073 * config/tc-mips.c (macro_build): Test for currently active
1074 mips16 option.
1075 (mips16_ip): Reject invalid opcodes.
1076
370b66a1
CD
10772006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1078
1079 * doc/as.texinfo: Rename "Index" to "AS Index",
1080 and "ABORT" to "ABORT (COFF)".
1081
b6895b4f
PB
10822006-05-11 Paul Brook <paul@codesourcery.com>
1083
1084 * config/tc-arm.c (parse_half): New function.
1085 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1086 (parse_operands): Ditto.
1087 (do_mov16): Reject invalid relocations.
1088 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1089 (insns): Replace Iffff with HALF.
1090 (md_apply_fix): Add MOVW and MOVT relocs.
1091 (tc_gen_reloc): Ditto.
1092 * doc/c-arm.texi: Document relocation operators
1093
e28387c3
PB
10942006-05-11 Paul Brook <paul@codesourcery.com>
1095
1096 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1097
89ee2ebe
TS
10982006-05-11 Thiemo Seufer <ths@mips.com>
1099
1100 * config/tc-mips.c (append_insn): Don't check the range of j or
1101 jal addresses.
1102
53baae48
NC
11032006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1104
1105 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1106 relocs against external symbols for WinCE targets.
1107 (md_apply_fix): Likewise.
1108
4e2a74a8
TS
11092006-05-09 David Ung <davidu@mips.com>
1110
1111 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1112 j or jal address.
1113
337ff0a5
NC
11142006-05-09 Nick Clifton <nickc@redhat.com>
1115
1116 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1117 against symbols which are not going to be placed into the symbol
1118 table.
1119
8c9f705e
BE
11202006-05-09 Ben Elliston <bje@au.ibm.com>
1121
1122 * expr.c (operand): Remove `if (0 && ..)' statement and
1123 subsequently unused target_op label. Collapse `if (1 || ..)'
1124 statement.
1125 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1126 separately above the switch.
1127
2fd0d2ac
NC
11282006-05-08 Nick Clifton <nickc@redhat.com>
1129
1130 PR gas/2623
1131 * config/tc-msp430.c (line_separator_character): Define as |.
1132
e16bfa71
TS
11332006-05-08 Thiemo Seufer <ths@mips.com>
1134 Nigel Stephens <nigel@mips.com>
1135 David Ung <davidu@mips.com>
1136
1137 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1138 (mips_opts): Likewise.
1139 (file_ase_smartmips): New variable.
1140 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1141 (macro_build): Handle SmartMIPS instructions.
1142 (mips_ip): Likewise.
1143 (md_longopts): Add argument handling for smartmips.
1144 (md_parse_options, mips_after_parse_args): Likewise.
1145 (s_mipsset): Add .set smartmips support.
1146 (md_show_usage): Document -msmartmips/-mno-smartmips.
1147 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1148 .set smartmips.
1149 * doc/c-mips.texi: Likewise.
1150
32638454
AM
11512006-05-08 Alan Modra <amodra@bigpond.net.au>
1152
1153 * write.c (relax_segment): Add pass count arg. Don't error on
1154 negative org/space on first two passes.
1155 (relax_seg_info): New struct.
1156 (relax_seg, write_object_file): Adjust.
1157 * write.h (relax_segment): Update prototype.
1158
b7fc2769
JB
11592006-05-05 Julian Brown <julian@codesourcery.com>
1160
1161 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1162 checking.
1163 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1164 architecture version checks.
1165 (insns): Allow overlapping instructions to be used in VFP mode.
1166
7f841127
L
11672006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1168
1169 PR gas/2598
1170 * config/obj-elf.c (obj_elf_change_section): Allow user
1171 specified SHF_ALPHA_GPREL.
1172
73160847
NC
11732006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1174
1175 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1176 for PMEM related expressions.
1177
56487c55
NC
11782006-05-05 Nick Clifton <nickc@redhat.com>
1179
1180 PR gas/2582
1181 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1182 insertion of a directory separator character into a string at a
1183 given offset. Uses heuristics to decide when to use a backslash
1184 character rather than a forward-slash character.
1185 (dwarf2_directive_loc): Use the macro.
1186 (out_debug_info): Likewise.
1187
d43b4baf
TS
11882006-05-05 Thiemo Seufer <ths@mips.com>
1189 David Ung <davidu@mips.com>
1190
1191 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1192 instruction.
1193 (macro): Add new case M_CACHE_AB.
1194
088fa78e
KH
11952006-05-04 Kazu Hirata <kazu@codesourcery.com>
1196
1197 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1198 (opcode_lookup): Issue a warning for opcode with
1199 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1200 identical to OT_cinfix3.
1201 (TxC3w, TC3w, tC3w): New.
1202 (insns): Use tC3w and TC3w for comparison instructions with
1203 's' suffix.
1204
c9049d30
AM
12052006-05-04 Alan Modra <amodra@bigpond.net.au>
1206
1207 * subsegs.h (struct frchain): Delete frch_seg.
1208 (frchain_root): Delete.
1209 (seg_info): Define as macro.
1210 * subsegs.c (frchain_root): Delete.
1211 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1212 (subsegs_begin, subseg_change): Adjust for above.
1213 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1214 rather than to one big list.
1215 (subseg_get): Don't special case abs, und sections.
1216 (subseg_new, subseg_force_new): Don't set frchainP here.
1217 (seg_info): Delete.
1218 (subsegs_print_statistics): Adjust frag chain control list traversal.
1219 * debug.c (dmp_frags): Likewise.
1220 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1221 at frchain_root. Make use of known frchain ordering.
1222 (last_frag_for_seg): Likewise.
1223 (get_frag_fix): Likewise. Add seg param.
1224 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1225 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1226 (SUB_SEGMENT_ALIGN): Likewise.
1227 (subsegs_finish): Adjust frchain list traversal.
1228 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1229 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1230 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1231 (xtensa_fix_b_j_loop_end_frags): Likewise.
1232 (xtensa_fix_close_loop_end_frags): Likewise.
1233 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1234 (retrieve_segment_info): Delete frch_seg initialisation.
1235
f592407e
AM
12362006-05-03 Alan Modra <amodra@bigpond.net.au>
1237
1238 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1239 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1240 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1241 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1242
df7849c5
JM
12432006-05-02 Joseph Myers <joseph@codesourcery.com>
1244
1245 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1246 here.
1247 (md_apply_fix3): Multiply offset by 4 here for
1248 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1249
2d545b82
L
12502006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1251 Jan Beulich <jbeulich@novell.com>
1252
1253 * config/tc-i386.c (output_invalid_buf): Change size for
1254 unsigned char.
1255 * config/tc-tic30.c (output_invalid_buf): Likewise.
1256
1257 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1258 unsigned char.
1259 * config/tc-tic30.c (output_invalid): Likewise.
1260
38fc1cb1
DJ
12612006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1262
1263 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1264 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1265 (asconfig.texi): Don't set top_srcdir.
1266 * doc/as.texinfo: Don't use top_srcdir.
1267 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1268
2d545b82
L
12692006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1270
1271 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1272 * config/tc-tic30.c (output_invalid_buf): Likewise.
1273
1274 * config/tc-i386.c (output_invalid): Use snprintf instead of
1275 sprintf.
1276 * config/tc-ia64.c (declare_register_set): Likewise.
1277 (emit_one_bundle): Likewise.
1278 (check_dependencies): Likewise.
1279 * config/tc-tic30.c (output_invalid): Likewise.
1280
a8bc6c78
PB
12812006-05-02 Paul Brook <paul@codesourcery.com>
1282
1283 * config/tc-arm.c (arm_optimize_expr): New function.
1284 * config/tc-arm.h (md_optimize_expr): Define
1285 (arm_optimize_expr): Add prototype.
1286 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1287
58633d9a
BE
12882006-05-02 Ben Elliston <bje@au.ibm.com>
1289
22772e33
BE
1290 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1291 field unsigned.
1292
58633d9a
BE
1293 * sb.h (sb_list_vector): Move to sb.c.
1294 * sb.c (free_list): Use type of sb_list_vector directly.
1295 (sb_build): Fix off-by-one error in assertion about `size'.
1296
89cdfe57
BE
12972006-05-01 Ben Elliston <bje@au.ibm.com>
1298
1299 * listing.c (listing_listing): Remove useless loop.
1300 * macro.c (macro_expand): Remove is_positional local variable.
1301 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1302 and simplify surrounding expressions, where possible.
1303 (assign_symbol): Likewise.
1304 (s_weakref): Likewise.
1305 * symbols.c (colon): Likewise.
1306
c35da140
AM
13072006-05-01 James Lemke <jwlemke@wasabisystems.com>
1308
1309 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1310
9bcd4f99
TS
13112006-04-30 Thiemo Seufer <ths@mips.com>
1312 David Ung <davidu@mips.com>
1313
1314 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1315 (mips_immed): New table that records various handling of udi
1316 instruction patterns.
1317 (mips_ip): Adds udi handling.
1318
001ae1a4
AM
13192006-04-28 Alan Modra <amodra@bigpond.net.au>
1320
1321 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1322 of list rather than beginning.
1323
136da414
JB
13242006-04-26 Julian Brown <julian@codesourcery.com>
1325
1326 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1327 (is_quarter_float): Rename from above. Simplify slightly.
1328 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1329 number.
1330 (parse_neon_mov): Parse floating-point constants.
1331 (neon_qfloat_bits): Fix encoding.
1332 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1333 preference to integer encoding when using the F32 type.
1334
dcbf9037
JB
13352006-04-26 Julian Brown <julian@codesourcery.com>
1336
1337 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1338 zero-initialising structures containing it will lead to invalid types).
1339 (arm_it): Add vectype to each operand.
1340 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1341 defined field.
1342 (neon_typed_alias): New structure. Extra information for typed
1343 register aliases.
1344 (reg_entry): Add neon type info field.
1345 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1346 Break out alternative syntax for coprocessor registers, etc. into...
1347 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1348 out from arm_reg_parse.
1349 (parse_neon_type): Move. Return SUCCESS/FAIL.
1350 (first_error): New function. Call to ensure first error which occurs is
1351 reported.
1352 (parse_neon_operand_type): Parse exactly one type.
1353 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1354 (parse_typed_reg_or_scalar): New function. Handle core of both
1355 arm_typed_reg_parse and parse_scalar.
1356 (arm_typed_reg_parse): Parse a register with an optional type.
1357 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1358 result.
1359 (parse_scalar): Parse a Neon scalar with optional type.
1360 (parse_reg_list): Use first_error.
1361 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1362 (neon_alias_types_same): New function. Return true if two (alias) types
1363 are the same.
1364 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1365 of elements.
1366 (insert_reg_alias): Return new reg_entry not void.
1367 (insert_neon_reg_alias): New function. Insert type/index information as
1368 well as register for alias.
1369 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1370 make typed register aliases accordingly.
1371 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1372 of line.
1373 (s_unreq): Delete type information if present.
1374 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1375 (s_arm_unwind_save_mmxwcg): Likewise.
1376 (s_arm_unwind_movsp): Likewise.
1377 (s_arm_unwind_setfp): Likewise.
1378 (parse_shift): Likewise.
1379 (parse_shifter_operand): Likewise.
1380 (parse_address): Likewise.
1381 (parse_tb): Likewise.
1382 (tc_arm_regname_to_dw2regnum): Likewise.
1383 (md_pseudo_table): Add dn, qn.
1384 (parse_neon_mov): Handle typed operands.
1385 (parse_operands): Likewise.
1386 (neon_type_mask): Add N_SIZ.
1387 (N_ALLMODS): New macro.
1388 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1389 (el_type_of_type_chk): Add some safeguards.
1390 (modify_types_allowed): Fix logic bug.
1391 (neon_check_type): Handle operands with types.
1392 (neon_three_same): Remove redundant optional arg handling.
1393 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1394 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1395 (do_neon_step): Adjust accordingly.
1396 (neon_cmode_for_logic_imm): Use first_error.
1397 (do_neon_bitfield): Call neon_check_type.
1398 (neon_dyadic): Rename to...
1399 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1400 to allow modification of type of the destination.
1401 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1402 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1403 (do_neon_compare): Make destination be an untyped bitfield.
1404 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1405 (neon_mul_mac): Return early in case of errors.
1406 (neon_move_immediate): Use first_error.
1407 (neon_mac_reg_scalar_long): Fix type to include scalar.
1408 (do_neon_dup): Likewise.
1409 (do_neon_mov): Likewise (in several places).
1410 (do_neon_tbl_tbx): Fix type.
1411 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1412 (do_neon_ld_dup): Exit early in case of errors and/or use
1413 first_error.
1414 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1415 Handle .dn/.qn directives.
1416 (REGDEF): Add zero for reg_entry neon field.
1417
5287ad62
JB
14182006-04-26 Julian Brown <julian@codesourcery.com>
1419
1420 * config/tc-arm.c (limits.h): Include.
1421 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1422 (fpu_vfp_v3_or_neon_ext): Declare constants.
1423 (neon_el_type): New enumeration of types for Neon vector elements.
1424 (neon_type_el): New struct. Define type and size of a vector element.
1425 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1426 instruction.
1427 (neon_type): Define struct. The type of an instruction.
1428 (arm_it): Add 'vectype' for the current instruction.
1429 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1430 (vfp_sp_reg_pos): Rename to...
1431 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1432 tags.
1433 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1434 (Neon D or Q register).
1435 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1436 register.
1437 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1438 (my_get_expression): Allow above constant as argument to accept
1439 64-bit constants with optional prefix.
1440 (arm_reg_parse): Add extra argument to return the specific type of
1441 register in when either a D or Q register (REG_TYPE_NDQ) is
1442 requested. Can be NULL.
1443 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1444 (parse_reg_list): Update for new arm_reg_parse args.
1445 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1446 (parse_neon_el_struct_list): New function. Parse element/structure
1447 register lists for VLD<n>/VST<n> instructions.
1448 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1449 (s_arm_unwind_save_mmxwr): Likewise.
1450 (s_arm_unwind_save_mmxwcg): Likewise.
1451 (s_arm_unwind_movsp): Likewise.
1452 (s_arm_unwind_setfp): Likewise.
1453 (parse_big_immediate): New function. Parse an immediate, which may be
1454 64 bits wide. Put results in inst.operands[i].
1455 (parse_shift): Update for new arm_reg_parse args.
1456 (parse_address): Likewise. Add parsing of alignment specifiers.
1457 (parse_neon_mov): Parse the operands of a VMOV instruction.
1458 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1459 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1460 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1461 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1462 (parse_operands): Handle new codes above.
1463 (encode_arm_vfp_sp_reg): Rename to...
1464 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1465 selected VFP version only supports D0-D15.
1466 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1467 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1468 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1469 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1470 encode_arm_vfp_reg name, and allow 32 D regs.
1471 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1472 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1473 regs.
1474 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1475 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1476 constant-load and conversion insns introduced with VFPv3.
1477 (neon_tab_entry): New struct.
1478 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1479 those which are the targets of pseudo-instructions.
1480 (neon_opc): Enumerate opcodes, use as indices into...
1481 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1482 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1483 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1484 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1485 neon_enc_tab.
1486 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1487 Neon instructions.
1488 (neon_type_mask): New. Compact type representation for type checking.
1489 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1490 permitted type combinations.
1491 (N_IGNORE_TYPE): New macro.
1492 (neon_check_shape): New function. Check an instruction shape for
1493 multiple alternatives. Return the specific shape for the current
1494 instruction.
1495 (neon_modify_type_size): New function. Modify a vector type and size,
1496 depending on the bit mask in argument 1.
1497 (neon_type_promote): New function. Convert a given "key" type (of an
1498 operand) into the correct type for a different operand, based on a bit
1499 mask.
1500 (type_chk_of_el_type): New function. Convert a type and size into the
1501 compact representation used for type checking.
1502 (el_type_of_type_ckh): New function. Reverse of above (only when a
1503 single bit is set in the bit mask).
1504 (modify_types_allowed): New function. Alter a mask of allowed types
1505 based on a bit mask of modifications.
1506 (neon_check_type): New function. Check the type of the current
1507 instruction against the variable argument list. The "key" type of the
1508 instruction is returned.
1509 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1510 a Neon data-processing instruction depending on whether we're in ARM
1511 mode or Thumb-2 mode.
1512 (neon_logbits): New function.
1513 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1514 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1515 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1516 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1517 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1518 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1519 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1520 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1521 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1522 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1523 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1524 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1525 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1526 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1527 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1528 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1529 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1530 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1531 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1532 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1533 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1534 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1535 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1536 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1537 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1538 helpers.
1539 (parse_neon_type): New function. Parse Neon type specifier.
1540 (opcode_lookup): Allow parsing of Neon type specifiers.
1541 (REGNUM2, REGSETH, REGSET2): New macros.
1542 (reg_names): Add new VFPv3 and Neon registers.
1543 (NUF, nUF, NCE, nCE): New macros for opcode table.
1544 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1545 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1546 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1547 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1548 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1549 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1550 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1551 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1552 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1553 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1554 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1555 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1556 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1557 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1558 fto[us][lh][sd].
1559 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1560 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1561 (arm_option_cpu_value): Add vfp3 and neon.
1562 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1563 VFPv1 attribute.
1564
1946c96e
BW
15652006-04-25 Bob Wilson <bob.wilson@acm.org>
1566
1567 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1568 syntax instead of hardcoded opcodes with ".w18" suffixes.
1569 (wide_branch_opcode): New.
1570 (build_transition): Use it to check for wide branch opcodes with
1571 either ".w18" or ".w15" suffixes.
1572
5033a645
BW
15732006-04-25 Bob Wilson <bob.wilson@acm.org>
1574
1575 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1576 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1577 frag's is_literal flag.
1578
395fa56f
BW
15792006-04-25 Bob Wilson <bob.wilson@acm.org>
1580
1581 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1582
708587a4
KH
15832006-04-23 Kazu Hirata <kazu@codesourcery.com>
1584
1585 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1586 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1587 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1588 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1589 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1590
8463be01
PB
15912005-04-20 Paul Brook <paul@codesourcery.com>
1592
1593 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1594 all targets.
1595 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1596
f26a5955
AM
15972006-04-19 Alan Modra <amodra@bigpond.net.au>
1598
1599 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1600 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1601 Make some cpus unsupported on ELF. Run "make dep-am".
1602 * Makefile.in: Regenerate.
1603
241a6c40
AM
16042006-04-19 Alan Modra <amodra@bigpond.net.au>
1605
1606 * configure.in (--enable-targets): Indent help message.
1607 * configure: Regenerate.
1608
bb8f5920
L
16092006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1610
1611 PR gas/2533
1612 * config/tc-i386.c (i386_immediate): Check illegal immediate
1613 register operand.
1614
23d9d9de
AM
16152006-04-18 Alan Modra <amodra@bigpond.net.au>
1616
64e74474
AM
1617 * config/tc-i386.c: Formatting.
1618 (output_disp, output_imm): ISO C90 params.
1619
6cbe03fb
AM
1620 * frags.c (frag_offset_fixed_p): Constify args.
1621 * frags.h (frag_offset_fixed_p): Ditto.
1622
23d9d9de
AM
1623 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1624 (COFF_MAGIC): Delete.
a37d486e
AM
1625
1626 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1627
e7403566
DJ
16282006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1629
1630 * po/POTFILES.in: Regenerated.
1631
58ab4f3d
MM
16322006-04-16 Mark Mitchell <mark@codesourcery.com>
1633
1634 * doc/as.texinfo: Mention that some .type syntaxes are not
1635 supported on all architectures.
1636
482fd9f9
BW
16372006-04-14 Sterling Augustine <sterling@tensilica.com>
1638
1639 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1640 instructions when such transformations have been disabled.
1641
05d58145
BW
16422006-04-10 Sterling Augustine <sterling@tensilica.com>
1643
1644 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1645 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1646 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1647 decoding the loop instructions. Remove current_offset variable.
1648 (xtensa_fix_short_loop_frags): Likewise.
1649 (min_bytes_to_other_loop_end): Remove current_offset argument.
1650
9e75b3fa
AM
16512006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1652
a37d486e 1653 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1654 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1655
d727e8c2
NC
16562006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1657
1658 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1659 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1660 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1661 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1662 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1663 at90can64, at90usb646, at90usb647, at90usb1286 and
1664 at90usb1287.
1665 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1666
d252fdde
PB
16672006-04-07 Paul Brook <paul@codesourcery.com>
1668
1669 * config/tc-arm.c (parse_operands): Set default error message.
1670
ab1eb5fe
PB
16712006-04-07 Paul Brook <paul@codesourcery.com>
1672
1673 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1674
7ae2971b
PB
16752006-04-07 Paul Brook <paul@codesourcery.com>
1676
1677 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1678
53365c0d
PB
16792006-04-07 Paul Brook <paul@codesourcery.com>
1680
1681 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1682 (move_or_literal_pool): Handle Thumb-2 instructions.
1683 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1684
45aa61fe
AM
16852006-04-07 Alan Modra <amodra@bigpond.net.au>
1686
1687 PR 2512.
1688 * config/tc-i386.c (match_template): Move 64-bit operand tests
1689 inside loop.
1690
108a6f8e
CD
16912006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1692
1693 * po/Make-in: Add install-html target.
1694 * Makefile.am: Add install-html and install-html-recursive targets.
1695 * Makefile.in: Regenerate.
1696 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1697 * configure: Regenerate.
1698 * doc/Makefile.am: Add install-html and install-html-am targets.
1699 * doc/Makefile.in: Regenerate.
1700
ec651a3b
AM
17012006-04-06 Alan Modra <amodra@bigpond.net.au>
1702
1703 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1704 second scan.
1705
910600e9
RS
17062006-04-05 Richard Sandiford <richard@codesourcery.com>
1707 Daniel Jacobowitz <dan@codesourcery.com>
1708
1709 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1710 (GOTT_BASE, GOTT_INDEX): New.
1711 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1712 GOTT_INDEX when generating VxWorks PIC.
1713 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1714 use the generic *-*-vxworks* stanza instead.
1715
99630778
AM
17162006-04-04 Alan Modra <amodra@bigpond.net.au>
1717
1718 PR 997
1719 * frags.c (frag_offset_fixed_p): New function.
1720 * frags.h (frag_offset_fixed_p): Declare.
1721 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1722 (resolve_expression): Likewise.
1723
a02728c8
BW
17242006-04-03 Sterling Augustine <sterling@tensilica.com>
1725
1726 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1727 of the same length but different numbers of slots.
1728
9dfde49d
AS
17292006-03-30 Andreas Schwab <schwab@suse.de>
1730
1731 * configure.in: Fix help string for --enable-targets option.
1732 * configure: Regenerate.
1733
2da12c60
NS
17342006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1735
6d89cc8f
NS
1736 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1737 (m68k_ip): ... here. Use for all chips. Protect against buffer
1738 overrun and avoid excessive copying.
1739
2da12c60
NS
1740 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1741 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1742 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1743 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1744 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1745 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1746 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1747 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1748 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1749 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1750 (struct m68k_cpu): Change chip field to control_regs.
1751 (current_chip): Remove.
1752 (control_regs): New.
1753 (m68k_archs, m68k_extensions): Adjust.
1754 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1755 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1756 (find_cf_chip): Reimplement for new organization of cpu table.
1757 (select_control_regs): Remove.
1758 (mri_chip): Adjust.
1759 (struct save_opts): Save control regs, not chip.
1760 (s_save, s_restore): Adjust.
1761 (m68k_lookup_cpu): Give deprecated warning when necessary.
1762 (m68k_init_arch): Adjust.
1763 (md_show_usage): Adjust for new cpu table organization.
1764
1ac4baed
BS
17652006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1766
1767 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1768 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1769 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1770 "elf/bfin.h".
1771 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1772 (any_gotrel): New rule.
1773 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1774 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1775 "elf/bfin.h".
1776 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1777 (bfin_pic_ptr): New function.
1778 (md_pseudo_table): Add it for ".picptr".
1779 (OPTION_FDPIC): New macro.
1780 (md_longopts): Add -mfdpic.
1781 (md_parse_option): Handle it.
1782 (md_begin): Set BFD flags.
1783 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1784 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1785 us for GOT relocs.
1786 * Makefile.am (bfin-parse.o): Update dependencies.
1787 (DEPTC_bfin_elf): Likewise.
1788 * Makefile.in: Regenerate.
1789
a9d34880
RS
17902006-03-25 Richard Sandiford <richard@codesourcery.com>
1791
1792 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1793 mcfemac instead of mcfmac.
1794
9ca26584
AJ
17952006-03-23 Michael Matz <matz@suse.de>
1796
1797 * config/tc-i386.c (type_names): Correct placement of 'static'.
1798 (reloc): Map some more relocs to their 64 bit counterpart when
1799 size is 8.
1800 (output_insn): Work around breakage if DEBUG386 is defined.
1801 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1802 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1803 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1804 different from i386.
1805 (output_imm): Ditto.
1806 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1807 Imm64.
1808 (md_convert_frag): Jumps can now be larger than 2GB away, error
1809 out in that case.
1810 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1811 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1812
0a44bf69
RS
18132006-03-22 Richard Sandiford <richard@codesourcery.com>
1814 Daniel Jacobowitz <dan@codesourcery.com>
1815 Phil Edwards <phil@codesourcery.com>
1816 Zack Weinberg <zack@codesourcery.com>
1817 Mark Mitchell <mark@codesourcery.com>
1818 Nathan Sidwell <nathan@codesourcery.com>
1819
1820 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1821 (md_begin): Complain about -G being used for PIC. Don't change
1822 the text, data and bss alignments on VxWorks.
1823 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1824 generating VxWorks PIC.
1825 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1826 (macro): Likewise, but do not treat la $25 specially for
1827 VxWorks PIC, and do not handle jal.
1828 (OPTION_MVXWORKS_PIC): New macro.
1829 (md_longopts): Add -mvxworks-pic.
1830 (md_parse_option): Don't complain about using PIC and -G together here.
1831 Handle OPTION_MVXWORKS_PIC.
1832 (md_estimate_size_before_relax): Always use the first relaxation
1833 sequence on VxWorks.
1834 * config/tc-mips.h (VXWORKS_PIC): New.
1835
080eb7fe
PB
18362006-03-21 Paul Brook <paul@codesourcery.com>
1837
1838 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1839
03aaa593
BW
18402006-03-21 Sterling Augustine <sterling@tensilica.com>
1841
1842 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1843 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1844 (get_loop_align_size): New.
1845 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1846 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1847 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1848 (get_noop_aligned_address): Use get_loop_align_size.
1849 (get_aligned_diff): Likewise.
1850
3e94bf1a
PB
18512006-03-21 Paul Brook <paul@codesourcery.com>
1852
1853 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1854
dfa9f0d5
PB
18552006-03-20 Paul Brook <paul@codesourcery.com>
1856
1857 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1858 (do_t_branch): Encode branches inside IT blocks as unconditional.
1859 (do_t_cps): New function.
1860 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1861 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1862 (opcode_lookup): Allow conditional suffixes on all instructions in
1863 Thumb mode.
1864 (md_assemble): Advance condexec state before checking for errors.
1865 (insns): Use do_t_cps.
1866
6e1cb1a6
PB
18672006-03-20 Paul Brook <paul@codesourcery.com>
1868
1869 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1870 outputting the insn.
1871
0a966e2d
JBG
18722006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1873
1874 * config/tc-vax.c: Update copyright year.
1875 * config/tc-vax.h: Likewise.
1876
a49fcc17
JBG
18772006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1878
1879 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1880 make it static.
1881 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1882
f5208ef2
PB
18832006-03-17 Paul Brook <paul@codesourcery.com>
1884
1885 * config/tc-arm.c (insns): Add ldm and stm.
1886
cb4c78d6
BE
18872006-03-17 Ben Elliston <bje@au.ibm.com>
1888
1889 PR gas/2446
1890 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1891
c16d2bf0
PB
18922006-03-16 Paul Brook <paul@codesourcery.com>
1893
1894 * config/tc-arm.c (insns): Add "svc".
1895
80ca4e2c
BW
18962006-03-13 Bob Wilson <bob.wilson@acm.org>
1897
1898 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1899 flag and avoid double underscore prefixes.
1900
3a4a14e9
PB
19012006-03-10 Paul Brook <paul@codesourcery.com>
1902
1903 * config/tc-arm.c (md_begin): Handle EABIv5.
1904 (arm_eabis): Add EF_ARM_EABI_VER5.
1905 * doc/c-arm.texi: Document -meabi=5.
1906
518051dc
BE
19072006-03-10 Ben Elliston <bje@au.ibm.com>
1908
1909 * app.c (do_scrub_chars): Simplify string handling.
1910
00a97672
RS
19112006-03-07 Richard Sandiford <richard@codesourcery.com>
1912 Daniel Jacobowitz <dan@codesourcery.com>
1913 Zack Weinberg <zack@codesourcery.com>
1914 Nathan Sidwell <nathan@codesourcery.com>
1915 Paul Brook <paul@codesourcery.com>
1916 Ricardo Anguiano <anguiano@codesourcery.com>
1917 Phil Edwards <phil@codesourcery.com>
1918
1919 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1920 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1921 R_ARM_ABS12 reloc.
1922 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1923 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1924 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1925
b29757dc
BW
19262006-03-06 Bob Wilson <bob.wilson@acm.org>
1927
1928 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1929 even when using the text-section-literals option.
1930
0b2e31dc
NS
19312006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1932
1933 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1934 and cf.
1935 (m68k_ip): <case 'J'> Check we have some control regs.
1936 (md_parse_option): Allow raw arch switch.
1937 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1938 whether 68881 or cfloat was meant by -mfloat.
1939 (md_show_usage): Adjust extension display.
1940 (m68k_elf_final_processing): Adjust.
1941
df406460
NC
19422006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1943
1944 * config/tc-avr.c (avr_mod_hash_value): New function.
1945 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1946 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1947 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1948 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1949 of (int).
1950 (tc_gen_reloc): Handle substractions of symbols, if possible do
1951 fixups, abort otherwise.
1952 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1953 tc_fix_adjustable): Define.
1954
53022e4a
JW
19552006-03-02 James E Wilson <wilson@specifix.com>
1956
1957 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1958 change the template, then clear md.slot[curr].end_of_insn_group.
1959
9f6f925e
JB
19602006-02-28 Jan Beulich <jbeulich@novell.com>
1961
1962 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1963
0e31b3e1
JB
19642006-02-28 Jan Beulich <jbeulich@novell.com>
1965
1966 PR/1070
1967 * macro.c (getstring): Don't treat parentheses special anymore.
1968 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1969 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1970 characters.
1971
10cd14b4
AM
19722006-02-28 Mat <mat@csail.mit.edu>
1973
1974 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1975
63752a75
JJ
19762006-02-27 Jakub Jelinek <jakub@redhat.com>
1977
1978 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1979 field.
1980 (CFI_signal_frame): Define.
1981 (cfi_pseudo_table): Add .cfi_signal_frame.
1982 (dot_cfi): Handle CFI_signal_frame.
1983 (output_cie): Handle cie->signal_frame.
1984 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1985 different. Copy signal_frame from FDE to newly created CIE.
1986 * doc/as.texinfo: Document .cfi_signal_frame.
1987
f7d9e5c3
CD
19882006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1989
1990 * doc/Makefile.am: Add html target.
1991 * doc/Makefile.in: Regenerate.
1992 * po/Make-in: Add html target.
1993
331d2d0d
L
19942006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1995
8502d882 1996 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
1997 Instructions.
1998
8502d882 1999 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2000 (CpuUnknownFlags): Add CpuMNI.
2001
10156f83
DM
20022006-02-24 David S. Miller <davem@sunset.davemloft.net>
2003
2004 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2005 (hpriv_reg_table): New table for hyperprivileged registers.
2006 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2007 register encoding.
2008
6772dd07
DD
20092006-02-24 DJ Delorie <dj@redhat.com>
2010
2011 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2012 (tc_gen_reloc): Don't define.
2013 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2014 (OPTION_LINKRELAX): New.
2015 (md_longopts): Add it.
2016 (m32c_relax): New.
2017 (md_parse_options): Set it.
2018 (md_assemble): Emit relaxation relocs as needed.
2019 (md_convert_frag): Emit relaxation relocs as needed.
2020 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2021 (m32c_apply_fix): New.
2022 (tc_gen_reloc): New.
2023 (m32c_force_relocation): Force out jump relocs when relaxing.
2024 (m32c_fix_adjustable): Return false if relaxing.
2025
62b3e311
PB
20262006-02-24 Paul Brook <paul@codesourcery.com>
2027
2028 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2029 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2030 (struct asm_barrier_opt): Define.
2031 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2032 (parse_psr): Accept V7M psr names.
2033 (parse_barrier): New function.
2034 (enum operand_parse_code): Add OP_oBARRIER.
2035 (parse_operands): Implement OP_oBARRIER.
2036 (do_barrier): New function.
2037 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2038 (do_t_cpsi): Add V7M restrictions.
2039 (do_t_mrs, do_t_msr): Validate V7M variants.
2040 (md_assemble): Check for NULL variants.
2041 (v7m_psrs, barrier_opt_names): New tables.
2042 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2043 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2044 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2045 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2046 (struct cpu_arch_ver_table): Define.
2047 (cpu_arch_ver): New.
2048 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2049 Tag_CPU_arch_profile.
2050 * doc/c-arm.texi: Document new cpu and arch options.
2051
59cf82fe
L
20522006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2053
2054 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2055
19a7219f
L
20562006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2057
2058 * config/tc-ia64.c: Update copyright years.
2059
7f3dfb9c
L
20602006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2061
2062 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2063 SDM 2.2.
2064
f40d1643
PB
20652005-02-22 Paul Brook <paul@codesourcery.com>
2066
2067 * config/tc-arm.c (do_pld): Remove incorrect write to
2068 inst.instruction.
2069 (encode_thumb32_addr_mode): Use correct operand.
2070
216d22bc
PB
20712006-02-21 Paul Brook <paul@codesourcery.com>
2072
2073 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2074
d70c5fc7
NC
20752006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2076 Anil Paranjape <anilp1@kpitcummins.com>
2077 Shilin Shakti <shilins@kpitcummins.com>
2078
2079 * Makefile.am: Add xc16x related entry.
2080 * Makefile.in: Regenerate.
2081 * configure.in: Added xc16x related entry.
2082 * configure: Regenerate.
2083 * config/tc-xc16x.h: New file
2084 * config/tc-xc16x.c: New file
2085 * doc/c-xc16x.texi: New file for xc16x
2086 * doc/all.texi: Entry for xc16x
2087 * doc/Makefile.texi: Added c-xc16x.texi
2088 * NEWS: Announce the support for the new target.
2089
aaa2ab3d
NH
20902006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2091
2092 * configure.tgt: set emulation for mips-*-netbsd*
2093
82de001f
JJ
20942006-02-14 Jakub Jelinek <jakub@redhat.com>
2095
2096 * config.in: Rebuilt.
2097
431ad2d0
BW
20982006-02-13 Bob Wilson <bob.wilson@acm.org>
2099
2100 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2101 from 1, not 0, in error messages.
2102 (md_assemble): Simplify special-case check for ENTRY instructions.
2103 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2104 operand in error message.
2105
94089a50
JM
21062006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2107
2108 * configure.tgt (arm-*-linux-gnueabi*): Change to
2109 arm-*-linux-*eabi*.
2110
52de4c06
NC
21112006-02-10 Nick Clifton <nickc@redhat.com>
2112
70e45ad9
NC
2113 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2114 32-bit value is propagated into the upper bits of a 64-bit long.
2115
52de4c06
NC
2116 * config/tc-arc.c (init_opcode_tables): Fix cast.
2117 (arc_extoper, md_operand): Likewise.
2118
21af2bbd
BW
21192006-02-09 David Heine <dlheine@tensilica.com>
2120
2121 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2122 each relaxation step.
2123
75a706fc
L
21242006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2125
2126 * configure.in (CHECK_DECLS): Add vsnprintf.
2127 * configure: Regenerate.
2128 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2129 include/declare here, but...
2130 * as.h: Move code detecting VARARGS idiom to the top.
2131 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2132 (vsnprintf): Declare if not already declared.
2133
0d474464
L
21342006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2135
2136 * as.c (close_output_file): New.
2137 (main): Register close_output_file with xatexit before
2138 dump_statistics. Don't call output_file_close.
2139
266abb8f
NS
21402006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2141
2142 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2143 mcf5329_control_regs): New.
2144 (not_current_architecture, selected_arch, selected_cpu): New.
2145 (m68k_archs, m68k_extensions): New.
2146 (archs): Renamed to ...
2147 (m68k_cpus): ... here. Adjust.
2148 (n_arches): Remove.
2149 (md_pseudo_table): Add arch and cpu directives.
2150 (find_cf_chip, m68k_ip): Adjust table scanning.
2151 (no_68851, no_68881): Remove.
2152 (md_assemble): Lazily initialize.
2153 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2154 (md_init_after_args): Move functionality to m68k_init_arch.
2155 (mri_chip): Adjust table scanning.
2156 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2157 options with saner parsing.
2158 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2159 m68k_init_arch): New.
2160 (s_m68k_cpu, s_m68k_arch): New.
2161 (md_show_usage): Adjust.
2162 (m68k_elf_final_processing): Set CF EF flags.
2163 * config/tc-m68k.h (m68k_init_after_args): Remove.
2164 (tc_init_after_args): Remove.
2165 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2166 (M68k-Directives): Document .arch and .cpu directives.
2167
134dcee5
AM
21682006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2169
2170 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2171 synonyms for equ and defl.
2172 (z80_cons_fix_new): New function.
2173 (emit_byte): Disallow relative jumps to absolute locations.
2174 (emit_data): Only handle defb, prototype changed, because defb is
2175 now handled as pseudo-op rather than an instruction.
2176 (instab): Entries for defb,defw,db,dw moved from here...
2177 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2178 Add entries for def24,def32,d24,d32.
2179 (md_assemble): Improved error handling.
2180 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2181 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2182 (z80_cons_fix_new): Declare.
2183 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2184 (def24,d24,def32,d32): New pseudo-ops.
2185
a9931606
PB
21862006-02-02 Paul Brook <paul@codesourcery.com>
2187
2188 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2189
ef8d22e6
PB
21902005-02-02 Paul Brook <paul@codesourcery.com>
2191
2192 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2193 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2194 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2195 T2_OPCODE_RSB): Define.
2196 (thumb32_negate_data_op): New function.
2197 (md_apply_fix): Use it.
2198
e7da6241
BW
21992006-01-31 Bob Wilson <bob.wilson@acm.org>
2200
2201 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2202 fields.
2203 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2204 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2205 subtracted symbols.
2206 (relaxation_requirements): Add pfinish_frag argument and use it to
2207 replace setting tinsn->record_fix fields.
2208 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2209 and vinsn_to_insnbuf. Remove references to record_fix and
2210 slot_sub_symbols fields.
2211 (xtensa_mark_narrow_branches): Delete unused code.
2212 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2213 a symbol.
2214 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2215 record_fix fields.
2216 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2217 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2218 of the record_fix field. Simplify error messages for unexpected
2219 symbolic operands.
2220 (set_expr_symbol_offset_diff): Delete.
2221
79134647
PB
22222006-01-31 Paul Brook <paul@codesourcery.com>
2223
2224 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2225
e74cfd16
PB
22262006-01-31 Paul Brook <paul@codesourcery.com>
2227 Richard Earnshaw <rearnsha@arm.com>
2228
2229 * config/tc-arm.c: Use arm_feature_set.
2230 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2231 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2232 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2233 New variables.
2234 (insns): Use them.
2235 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2236 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2237 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2238 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2239 feature flags.
2240 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2241 (arm_opts): Move old cpu/arch options from here...
2242 (arm_legacy_opts): ... to here.
2243 (md_parse_option): Search arm_legacy_opts.
2244 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2245 (arm_float_abis, arm_eabis): Make const.
2246
d47d412e
BW
22472006-01-25 Bob Wilson <bob.wilson@acm.org>
2248
2249 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2250
b14273fe
JZ
22512006-01-21 Jie Zhang <jie.zhang@analog.com>
2252
2253 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2254 in load immediate intruction.
2255
39cd1c76
JZ
22562006-01-21 Jie Zhang <jie.zhang@analog.com>
2257
2258 * config/bfin-parse.y (value_match): Use correct conversion
2259 specifications in template string for __FILE__ and __LINE__.
2260 (binary): Ditto.
2261 (unary): Ditto.
2262
67a4f2b7
AO
22632006-01-18 Alexandre Oliva <aoliva@redhat.com>
2264
2265 Introduce TLS descriptors for i386 and x86_64.
2266 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2267 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2268 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2269 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2270 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2271 displacement bits.
2272 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2273 (lex_got): Handle @tlsdesc and @tlscall.
2274 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2275
8ad7c533
NC
22762006-01-11 Nick Clifton <nickc@redhat.com>
2277
2278 Fixes for building on 64-bit hosts:
2279 * config/tc-avr.c (mod_index): New union to allow conversion
2280 between pointers and integers.
2281 (md_begin, avr_ldi_expression): Use it.
2282 * config/tc-i370.c (md_assemble): Add cast for argument to print
2283 statement.
2284 * config/tc-tic54x.c (subsym_substitute): Likewise.
2285 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2286 opindex field of fr_cgen structure into a pointer so that it can
2287 be stored in a frag.
2288 * config/tc-mn10300.c (md_assemble): Likewise.
2289 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2290 types.
2291 * config/tc-v850.c: Replace uses of (int) casts with correct
2292 types.
2293
4dcb3903
L
22942006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2295
2296 PR gas/2117
2297 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2298
e0f6ea40
HPN
22992006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2300
2301 PR gas/2101
2302 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2303 a local-label reference.
2304
e88d958a 2305For older changes see ChangeLog-2005
08d56133
NC
2306\f
2307Local Variables:
2308mode: change-log
2309left-margin: 8
2310fill-column: 74
2311version-control: never
2312End:
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