* config.in, configure: Regenerate.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
2a962e6d
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12006-12-15 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.c: Add a blank line bewteen function bodies.
4
fc225355
L
52006-12-15 H.J. Lu <hongjiu.lu@intel.com>
6
7 * config/tc-i386.c (build_modrm_byte): Reformat to 72 columns.
8
6008641e
DJ
92006-12-14 Daniel Jacobowitz <dan@codesourcery.com>
10
11 * Makefile.am (YFLAGS): Define.
12 * Makefile.in: Regenerated.
13
d1cbb4db
L
142006-12-14 H.J. Lu <hongjiu.lu@intel.com>
15
16 * config/tc-i386.c (match_template): Simplify 3 and 4 operand
17 match.
18
71903a11
L
192006-12-13 H.J. Lu <hongjiu.lu@intel.com>
20
21 * config/tc-i386.c (build_modrm_byte): Set the Operand_PCrel
22 bit only.
23
a5c311ca
L
242006-12-13 H.J. Lu <hongjiu.lu@intel.com>
25
26 * config/tc-i386.c (match_template): Use a for loop to set
27 operand_types array.
28
f48ff2ae
L
292006-12-13 H.J. Lu <hongjiu.lu@intel.com>
30
31 PR gas/3712
32 * config/tc-i386.c (match_template): Use MAX_OPERANDS for the
33 number of operands. Issue an error if MAX_OPERANDS != 4. Add
34 the 4th operand check.
35
c450d570
PB
362006-12-13 Paul Brook <paul@codesourcery.com>
37
38 * config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}.
39 * doc/c-arm.texi: Fix spelling of ARMv7 profile variants.
40
eca5433b
L
412006-12-12 H.J. Lu <hongjiu.lu@intel.com>
42
43 * config/tc-i386.h (WordMem): Document it for 64 bit memory
44 reference.
45
37d037c1
DJ
462006-12-12 Daniel Jacobowitz <dan@codesourcery.com>
47
48 * doc/Makefile.am (as_TEXINFOS): Set.
49 (as.info as.dvi as.html): Delete rule.
50 * doc/Makefile.in: Regenerated.
51
d5fbea21
DJ
522006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
53
54 * configure.in: Define GENINSRC_NEVER.
55 * doc/Makefile.am (as.info): Remove srcdir prefix.
56 (MAINTAINERCLEANFILES): Add info file.
57 (DISTCLEANFILES): Pretend to add info file.
58 * po/Make-in (.po.gmo): Put gmo files in objdir.
59 * configure, Makefile.in, doc/Makefile.in: Regenerated.
60
ffb08c80
L
612006-12-09 H.J. Lu <hongjiu.lu@intel.com>
62
63 * config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
af26ccbe 64 for operand_types array.
ffb08c80 65
41d3b056
CG
662006-12-08 Christian Groessler <chris@groessler.org>
67
68 * config/tc-z8k.c (whatreg): Add comment describing function.
69 Return NULL if symbol name characters follow the register number.
70 (parse_reg): Use NULL instead of 0 for pointer values. Stop
71 processing if whatreg returned NULL.
72
c694fd50
KH
732006-12-07 Kazu Hirata <kazu@codesourcery.com>
74
75 * config/tc-m68k.c: Update uses of EF_M68K_*.
76
9021ec07
L
772006-12-06 H.J. Lu <hjl@gnu.org>
78
79 * config/tc-i386.h: Change the prefix order to SEG_PREFIX,
80 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
81
b3b1f034
JJ
822006-12-02 Jakub Jelinek <jakub@redhat.com>
83
84 PR gas/3607
85 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field.
86
f0291e4c
PB
872006-12-01 Paul Brook <paul@codesourcery.com>
88
89 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
90 function symbols.
91
e1da3f5b
PB
922006-11-29 Paul Brook <paul@codesourcery.com>
93
94 * config/tc-arm.c (arm_is_eabi): New function.
95 * config/tc-arm.h (arm_is_eabi): New prototype.
96 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
97 * doc/c-arm.texi (.thumb_func): Update documentation.
98
00249aaa
PB
992006-11-29 Paul Brook <paul@codesourcery.com>
100
101 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
102 encoding.
103
a7284bf1
BW
1042006-11-27 Sterling Augustine <sterling@tensilica.com>
105
106 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
107 as the first slot_subtype, not the frag subtype.
108
2caa7ca0
BW
1092006-11-27 Bob Wilson <bob.wilson@acm.org>
110
111 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
112 (directive_state): Disable scheduling by default.
113 (xtensa_add_config_info): New.
114 (xtensa_end): Call xtensa_add_config_info.
115
062cf837
EB
1162006-11-27 Eric Botcazou <ebotcazou@adacore.com>
117
118 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
119 their unaligned counterparts in debugging sections.
120
cefdba39
AM
1212006-11-24 Alan Modra <amodra@bigpond.net.au>
122
123 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
124
e821645d
DJ
1252006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
126
127 * config/tc-arm.h (md_cons_align): Define.
128 (mapping_state): New prototype.
129 * config/tc-arm.c (mapping_state): Make global.
130
5ab504f9
AM
1312006-11-22 Alan Modra <amodra@bigpond.net.au>
132
133 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
134
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ML
1352006-11-16 Mei ligang <ligang@sunnorth.com.cn>
136
5ab504f9
AM
137 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
138 branch instruction, handle it specially.
98a16ee1
ML
139 (score_insns): Modify 32 bit branch instruction.
140
0023dd27
AM
1412006-11-16 Alan Modra <amodra@bigpond.net.au>
142
143 * symbols.c (resolve_symbol_value): Formatting.
144
bdf128d6
JB
1452006-11-15 Jan Beulich <jbeulich@novell.com>
146
147 PR/3469
148 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
149 chain by linking it to itself.
150 (resolve_symbol_value): Also check symbol_shadow_p().
151 (symbol_shadow_p): New.
152 * symbols.h (symbol_shadow_p): Declare.
153
25fe350b
MS
1542006-11-12 Mark Shinwell <shinwell@codesourcery.com>
155
156 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
157 (insns): Adjust accordingly.
158 (md_apply_fix): Alter comments to use CBZ instead of CZB.
159
0ffdc86c
NC
1602006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
161
162 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
163 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
164
6afdfa61
NC
1652006-11-10 Nick Clifton <nickc@redhat.com>
166
167 PR gas/3456:
168 * config/obj-elf.c (obj_elf_version): Do not include the name
169 field's padding in the namesz value.
170
d84bcf09
TS
1712006-11-09 Thiemo Seufer <ths@mips.com>
172
173 * config/tc-mips.c: Fix outdated comment.
174
b7d9ef37
L
1752006-11-08 H.J. Lu <hongjiu.lu@intel.com>
176
177 * config/tc-i386.h (CpuPNI): Removed.
178 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
179 * config/tc-i386.c (md_assemble): Likewise.
180
05e7221f
AM
1812006-11-08 Alan Modra <amodra@bigpond.net.au>
182
183 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
184
df1f3cda
DD
1852006-11-06 David Daney <ddaney@avtrex.com>
186
187 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
188
82100185
TS
1892006-11-06 Thiemo Seufer <ths@mips.com>
190
191 * doc/c-mips.texi (-march): Document sb1a.
192
a360e743
TS
1932006-11-06 Thiemo Seufer <ths@mips.com>
194
195 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
196 34k always has DSP ASE.
197
64817874
TS
1982006-11-03 Thiemo Seufer <ths@mips.com>
199
200 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
201 MIPS16 instructions referencing other sections, unless they are
202 external branches.
203
7764b395
TS
2042006-11-03 Thiemo Seufer <ths@mips.com>
205
206 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
207 release 1 CPU.
208
ae424f82
JJ
2092006-11-03 Jakub Jelinek <jakub@redhat.com>
210
9b8ae42e
JJ
211 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
212 personality and lsda.
213 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
214 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
215 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
216 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
217 (output_cie): Output personality including its encoding and LSDA encoding.
218 (output_fde): Output LSDA.
219 (select_cie_for_fde): Don't share CIE if personality, its encoding or
220 LSDA encoding are different. Copy the 3 fields from fde_entry to
221 cie_entry.
222 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
223
ae424f82
JJ
224 * subsegs.h (struct frchain): Add frch_cfi_data field.
225 * dw2gencfi.c: Include subsegs.h.
226 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
227 (struct frch_cfi_data): New type.
228 (unused_cfi_data): New variable.
229 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
230 and cfa_save_stack static vars into a structure pointed from
231 each frchain.
232 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
233 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
234 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
235 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
236 Likewise.
237
d1e50f8a
DJ
2382006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
239
240 * config/tc-h8300.c (build_bytes): Fix const warning.
241
06d2da93
NC
2422006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
243
244 * tc-score.c (do16_rdrs): Handle not! instruction especially.
245
3ba67470
PB
2462006-10-31 Paul Brook <paul@codesourcery.com>
247
248 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
249 for EABIv4.
250
7a1d4c38
PB
2512006-10-31 Paul Brook <paul@codesourcery.com>
252
253 gas/
254 * config/tc-arm.c (object_arch): New variable.
255 (s_arm_object_arch): New function.
256 (md_pseudo_table): Add object_arch.
257 (aeabi_set_public_attributes): Obey object_arch.
258 * doc/c-arm.texi: Document .object_arch.
259
b138abaa
NC
2602006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
261
262 * tc-score.c (data_op2): Check invalid operands.
263 (my_get_expression): Const operand of some instructions can not be
264 symbol in assembly.
265 (get_insn_class_from_type): Handle instruction type Insn_internal.
266 (do_macro_ldst_label): Modify inst.type.
267 (Insn_PIC): Delete.
268 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 269
c79b7c30
RC
2702006-10-29 Randolph Chung <tausq@debian.org>
271
272 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
273 (hppa_regname_to_dw2regnum): New funcions.
274 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
275 (tc_cfi_frame_initial_instructions)
276 (tc_regname_to_dw2regnum): Define.
277 (hppa_cfi_frame_initial_instructions)
278 (hppa_regname_to_dw2regnum): Declare.
279 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
280 (DWARF2_CIE_DATA_ALIGNMENT): Define.
281
e2785c44
NC
2822006-10-29 Nick Clifton <nickc@redhat.com>
283
284 * config/tc-spu.c (md_assemble): Cast printf string size parameter
285 to int in order to avoid a compiler warning.
286
86157c20
AS
2872006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
288
289 * config/tc-sh.c (md_assemble): Define size of branches.
290
ba5f0fda
BE
2912006-10-26 Ben Elliston <bje@au.ibm.com>
292
293 * dw2gencfi.c (cfi_add_CFA_offset):
294 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
295
033cd5fd
BE
296 * write.c (chain_frchains_together_1): Assert that this function
297 never returns a pointer to the auto variable `dummy'.
298
e9f53129
AM
2992006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
300 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
301 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
302 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
303 Alan Modra <amodra@bigpond.net.au>
304
305 * config/tc-spu.c: New file.
306 * config/tc-spu.h: New file.
307 * configure.tgt: Add SPU support.
308 * Makefile.am: Likewise. Run "make dep-am".
309 * Makefile.in: Regenerate.
310 * po/POTFILES.in: Regenerate.
311
7b383517
BE
3122006-10-25 Ben Elliston <bje@au.ibm.com>
313
314 * expr.c (expr): Replace O_add case in switch (op_left) explaining
315 why it can never occur.
5ab504f9 316
ede602d7
AM
3172006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
318
319 * doc/c-ppc.texi (-mcell): Document.
320 * config/tc-ppc.c (parse_cpu): Parse -mcell.
321 (md_show_usage): Document -mcell.
322
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MM
3232006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
324
325 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
326
878bcc43
AM
3272006-10-23 Alan Modra <amodra@bigpond.net.au>
328
329 * config/tc-m68hc11.c (md_assemble): Quiet warning.
330
8620418b
MF
3312006-10-19 Mike Frysinger <vapier@gentoo.org>
332
333 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
334 (x86_64_section_letter): Likewise.
335
b3549761
NC
3362006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
337
338 * config/tc-score.c (build_relax_frag): Compute correct
339 tc_frag_data.fixp.
340
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MF
3412006-10-18 Roy Marples <uberlord@gentoo.org>
342
343 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
344 elf32-sparc as a viable target for the -32 switch and any target
345 starting with elf64-sparc as a viable target for the -64 switch.
346 (sparc_target_format): For 64-bit ELF flavoured output use
347 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
348 ELF_TARGET_FORMAT.
71a75f6f
MF
349 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
350
e1b5fdd4
L
3512006-10-17 H.J. Lu <hongjiu.lu@intel.com>
352
353 * configure: Regenerated.
354
f8ef9cd7
BS
3552006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
356
357 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
358 in addition to testing for '\n'.
359 (TC_EOL_IN_INSN): Provide a default definition if necessary.
360
eb1fe072
NC
3612006-10-13 Sterling Augstine <sterling@tensilica.com>
362
363 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
364 a disjoint DW_AT range.
365
ec6e49f4
NC
3662006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
367
368 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
369
036dc3f7
PB
3702006-10-08 Paul Brook <paul@codesourcery.com>
371
372 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
373 (parse_operands): Use parse_big_immediate for OP_NILO.
374 (neon_cmode_for_logic_imm): Try smaller element sizes.
375 (neon_cmode_for_move_imm): Ditto.
376 (do_neon_logic): Handle .i64 pseudo-op.
377
3bb0c887
AM
3782006-09-29 Alan Modra <amodra@bigpond.net.au>
379
380 * po/POTFILES.in: Regenerate.
381
ef05d495
L
3822006-09-28 H.J. Lu <hongjiu.lu@intel.com>
383
384 * config/tc-i386.h (CpuMNI): Renamed to ...
385 (CpuSSSE3): This.
386 (CpuUnknownFlags): Updated.
387 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
388 and PROCESSOR_MEROM with PROCESSOR_CORE2.
389 * config/tc-i386.c: Updated.
390 * doc/c-i386.texi: Likewise.
a70ae331 391
ef05d495
L
392 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
393
d8ad03e9
NC
3942006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
395
396 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
397
df3ca5a3
NC
3982006-09-27 Nick Clifton <nickc@redhat.com>
399
400 * output-file.c (output_file_close): Prevent an infinite loop
401 reporting that stdoutput could not be closed.
402
2d447fca
JM
4032006-09-26 Mark Shinwell <shinwell@codesourcery.com>
404 Joseph Myers <joseph@codesourcery.com>
405 Ian Lance Taylor <ian@wasabisystems.com>
406 Ben Elliston <bje@wasabisystems.com>
407
408 * config/tc-arm.c (arm_cext_iwmmxt2): New.
409 (enum operand_parse_code): New code OP_RIWR_I32z.
410 (parse_operands): Handle OP_RIWR_I32z.
411 (do_iwmmxt_wmerge): New function.
412 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
413 a register.
414 (do_iwmmxt_wrwrwr_or_imm5): New function.
415 (insns): Mark instructions as RIWR_I32z as appropriate.
416 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
417 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
418 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
419 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
420 (md_begin): Handle IWMMXT2.
421 (arm_cpus): Add iwmmxt2.
422 (arm_extensions): Likewise.
423 (arm_archs): Likewise.
424
ba83aca1
BW
4252006-09-25 Bob Wilson <bob.wilson@acm.org>
426
427 * doc/as.texinfo (Overview): Revise description of --keep-locals.
428 Add xref to "Symbol Names".
429 (L): Refer to "local symbols" instead of "local labels". Move
430 definition to "Symbol Names" section; add xref to that section.
431 (Symbol Names): Use "Local Symbol Names" section to define local
432 symbols. Add "Local Labels" heading for description of temporary
433 forward/backward labels, and refer to those as "local labels".
434
539e75ad
L
4352006-09-23 H.J. Lu <hongjiu.lu@intel.com>
436
437 PR binutils/3235
438 * config/tc-i386.c (match_template): Check address size prefix
439 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
440 operand.
441
5e02f92e
AM
4422006-09-22 Alan Modra <amodra@bigpond.net.au>
443
444 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
445
885afe7b
AM
4462006-09-22 Alan Modra <amodra@bigpond.net.au>
447
448 * as.h (as_perror): Delete declaration.
449 * gdbinit.in (as_perror): Delete breakpoint.
450 * messages.c (as_perror): Delete function.
451 * doc/internals.texi: Remove as_perror description.
452 * listing.c (listing_print: Don't use as_perror.
453 * output-file.c (output_file_create, output_file_close): Likewise.
454 * symbols.c (symbol_create, symbol_clone): Likewise.
455 * write.c (write_contents): Likewise.
456 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
457 * config/tc-tic54x.c (tic54x_mlib): Likewise.
458
3aeeedbb
AM
4592006-09-22 Alan Modra <amodra@bigpond.net.au>
460
461 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
462 (ppc_handle_align): New function.
463 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
464 (SUB_SEGMENT_ALIGN): Define as zero.
465
96e9638b
BW
4662006-09-20 Bob Wilson <bob.wilson@acm.org>
467
468 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
469 (Overview): Skip cross reference in man page.
470
99ad8390
NC
4712006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
472
473 * configure.in: Add new target x86_64-pc-mingw64.
474 * configure: Regenerate.
475 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
476 * config/obj-coff.h: Add handling for TE_PEP target specific code
477 and definitions.
99ad8390
NC
478 * config/tc-i386.c: Add new targets.
479 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
480 (x86_64_target_format): Add new method for setup proper default
481 target cpu mode.
99ad8390
NC
482 * config/te-pep.h: Add new target definition header.
483 (TE_PEP): New macro: Identifies new target architecture.
484 (COFF_WITH_pex64): Set proper includes in bfd.
485 * NEWS: Mention new target.
486
73332571
BS
4872006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
488
489 * config/bfin-parse.y (binary): Change sub of const to add of negated
490 const.
491
1c0d3aa6
NC
4922006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
493
494 * config/tc-score.c: New file.
495 * config/tc-score.h: Newf file.
496 * configure.tgt: Add Score target.
497 * Makefile.am: Add Score files.
498 * Makefile.in: Regenerate.
499 * NEWS: Mention new target support.
500
4fa3602b
PB
5012006-09-16 Paul Brook <paul@codesourcery.com>
502
503 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
504 * doc/c-arm.texi (movsp): Document offset argument.
505
16dd5e42
PB
5062006-09-16 Paul Brook <paul@codesourcery.com>
507
508 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
509 unsigned int to avoid 64-bit host problems.
510
c4ae04ce
BS
5112006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
512
513 * config/bfin-parse.y (binary): Do some more constant folding for
514 additions.
515
e5d4a5a6
JB
5162006-09-13 Jan Beulich <jbeulich@novell.com>
517
518 * input-file.c (input_file_give_next_buffer): Demote as_bad to
519 as_warn.
520
1a1219cb
AM
5212006-09-13 Alan Modra <amodra@bigpond.net.au>
522
523 PR gas/3165
524 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
525 in parens.
526
f79d9c1d
AM
5272006-09-13 Alan Modra <amodra@bigpond.net.au>
528
529 * input-file.c (input_file_open): Replace as_perror with as_bad
530 so that gas exits with error on file errors. Correct error
531 message.
532 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 533 * input-file.h: Update comment.
f79d9c1d 534
f512f76f
NC
5352006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
536
537 PR gas/3172
538 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
539 registers as a sub-class of wC registers.
540
8d79fd44
AM
5412006-09-11 Alan Modra <amodra@bigpond.net.au>
542
543 PR gas/3165
544 * config/tc-mips.h (enum dwarf2_format): Forward declare.
545 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
546 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
547 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
548
6258339f
NC
5492006-09-08 Nick Clifton <nickc@redhat.com>
550
551 PR gas/3129
552 * doc/as.texinfo (Macro): Improve documentation about separating
553 macro arguments from following text.
554
f91e006c
PB
5552006-09-08 Paul Brook <paul@codesourcery.com>
556
557 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
558
466bbf93
PB
5592006-09-07 Paul Brook <paul@codesourcery.com>
560
561 * config/tc-arm.c (parse_operands): Mark operand as present.
562
428e3f1f
PB
5632006-09-04 Paul Brook <paul@codesourcery.com>
564
565 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
566 (do_neon_dyadic_if_i_d): Avoid setting U bit.
567 (do_neon_mac_maybe_scalar): Ditto.
568 (do_neon_dyadic_narrow): Force operand type to NT_integer.
569 (insns): Remove out of date comments.
570
fb25138b
NC
5712006-08-29 Nick Clifton <nickc@redhat.com>
572
573 * read.c (s_align): Initialize the 'stopc' variable to prevent
574 compiler complaints about it being used without being
575 initialized.
576 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
577 s_float_space, s_struct, cons_worker, equals): Likewise.
578
5091343a
AM
5792006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
580
581 * ecoff.c (ecoff_directive_val): Fix message typo.
582 * config/tc-ns32k.c (convert_iif): Likewise.
583 * config/tc-sh64.c (shmedia_check_limits): Likewise.
584
1f2a7e38
BW
5852006-08-25 Sterling Augustine <sterling@tensilica.com>
586 Bob Wilson <bob.wilson@acm.org>
587
588 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
589 the state of the absolute_literals directive. Remove align frag at
590 the start of the literal pool position.
591
34135039
BW
5922006-08-25 Bob Wilson <bob.wilson@acm.org>
593
594 * doc/c-xtensa.texi: Add @group commands in examples.
595
74869ac7
BW
5962006-08-24 Bob Wilson <bob.wilson@acm.org>
597
598 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
599 (INIT_LITERAL_SECTION_NAME): Delete.
600 (lit_state struct): Remove segment names, init_lit_seg, and
601 fini_lit_seg. Add lit_prefix and current_text_seg.
602 (init_literal_head_h, init_literal_head): Delete.
603 (fini_literal_head_h, fini_literal_head): Delete.
604 (xtensa_begin_directive): Move argument parsing to
605 xtensa_literal_prefix function.
606 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
607 (xtensa_literal_prefix): Parse the directive argument here and
608 record it in the lit_prefix field. Remove code to derive literal
609 section names.
610 (linkonce_len): New.
611 (get_is_linkonce_section): Use linkonce_len. Check for any
612 ".gnu.linkonce.*" section, not just text sections.
613 (md_begin): Remove initialization of deleted lit_state fields.
614 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
615 to init_literal_head and fini_literal_head.
616 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
617 when traversing literal_head list.
618 (match_section_group): New.
619 (cache_literal_section): Rewrite to determine the literal section
620 name on the fly, create the section and return it.
621 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
622 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
623 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
624 Use xtensa_get_property_section from bfd.
625 (retrieve_xtensa_section): Delete.
626 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
627 description to refer to plural literal sections and add xref to
628 the Literal Directive section.
629 (Literal Directive): Describe new rules for deriving literal section
630 names. Add footnote for special case of .init/.fini with
631 --text-section-literals.
632 (Literal Prefix Directive): Replace old naming rules with xref to the
633 Literal Directive section.
634
87a1fd79
JM
6352006-08-21 Joseph Myers <joseph@codesourcery.com>
636
637 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
638 merging with previous long opcode.
639
7148cc28
NC
6402006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
641
642 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
643 * Makefile.in: Regenerate.
644 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
645 renamed. Adjust.
646
3e9e4fcf
JB
6472006-08-16 Julian Brown <julian@codesourcery.com>
648
649 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
650 to use ARM instructions on non-ARM-supporting cores.
651 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
652 mode automatically based on cpu variant.
653 (md_begin): Call above function.
654
267d2029
JB
6552006-08-16 Julian Brown <julian@codesourcery.com>
656
657 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
658 recognized in non-unified syntax mode.
659
4be041b2
TS
6602006-08-15 Thiemo Seufer <ths@mips.com>
661 Nigel Stephens <nigel@mips.com>
662 David Ung <davidu@mips.com>
663
664 * configure.tgt: Handle mips*-sde-elf*.
665
3a93f742
TS
6662006-08-12 Thiemo Seufer <ths@networkno.de>
667
668 * config/tc-mips.c (mips16_ip): Fix argument register handling
669 for restore instruction.
670
1737851b
BW
6712006-08-08 Bob Wilson <bob.wilson@acm.org>
672
673 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
674 (out_sleb128): New.
675 (out_fixed_inc_line_addr): New.
676 (process_entries): Use out_fixed_inc_line_addr when
677 DWARF2_USE_FIXED_ADVANCE_PC is set.
678 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
679
e14e52f8
DD
6802006-08-08 DJ Delorie <dj@redhat.com>
681
682 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
683 vs full symbols so that we never have more than one pointer value
684 for any given symbol in our symbol table.
685
802f5d9e
NC
6862006-08-08 Sterling Augustine <sterling@tensilica.com>
687
688 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
689 and emit DW_AT_ranges when code in compilation unit is not
690 contiguous.
691 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
692 is not contiguous.
693 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
694 (out_debug_ranges): New function to emit .debug_ranges section
695 when code is not contiguous.
696
720abc60
NC
6972006-08-08 Nick Clifton <nickc@redhat.com>
698
699 * config/tc-arm.c (WARN_DEPRECATED): Enable.
700
f0927246
NC
7012006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
702
703 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
704 only block.
705 (pe_directive_secrel) [TE_PE]: New function.
706 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
707 loc, loc_mark_labels.
708 [TE_PE]: Handle secrel32.
709 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
710 call.
711 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
712 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
713 (md_section_align): Only round section sizes here for AOUT
714 targets.
715 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
716 (tc_pe_dwarf2_emit_offset): New function.
717 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
718 (cons_fix_new_arm): Handle O_secrel.
719 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
720 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
721 of OBJ_ELF only block.
722 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
723 tc_pe_dwarf2_emit_offset.
724
55e6e397
RS
7252006-08-04 Richard Sandiford <richard@codesourcery.com>
726
727 * config/tc-sh.c (apply_full_field_fix): New function.
728 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
729 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
730 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
731 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
732
9cd19b17
NC
7332006-08-03 Nick Clifton <nickc@redhat.com>
734
735 PR gas/2991
736 * config.in: Regenerate.
737
97f87066
JM
7382006-08-03 Joseph Myers <joseph@codesourcery.com>
739
740 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 741 for OP_RIWR_RIWC.
97f87066 742
41adaa5c
JM
7432006-08-03 Joseph Myers <joseph@codesourcery.com>
744
745 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
746 (parse_operands): Handle it.
747 (insns): Use it for tmcr and tmrc.
748
9d7cbccd
NC
7492006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
750
751 PR binutils/2983
752 * config/tc-i386.c (md_parse_option): Treat any target starting
753 with elf64_x86_64 as a viable target for the -64 switch.
754 (i386_target_format): For 64-bit ELF flavoured output use
755 ELF_TARGET_FORMAT64.
756 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
757
c973bc5c
NC
7582006-08-02 Nick Clifton <nickc@redhat.com>
759
760 PR gas/2991
761 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
762 bfd/aclocal.m4.
763 * configure.in: Run BFD_BINARY_FOPEN.
764 * configure: Regenerate.
765 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
766 file to include.
767
cfde7f70
L
7682006-08-01 H.J. Lu <hongjiu.lu@intel.com>
769
770 * config/tc-i386.c (md_assemble): Don't update
771 cpu_arch_isa_flags.
772
b4c71f56
TS
7732006-08-01 Thiemo Seufer <ths@mips.com>
774
775 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
776
54f4ddb3
TS
7772006-08-01 Thiemo Seufer <ths@mips.com>
778
779 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
780 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
781 BFD_RELOC_32 and BFD_RELOC_16.
782 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
783 md_convert_frag, md_obj_end): Fix comment formatting.
784
d103cf61
TS
7852006-07-31 Thiemo Seufer <ths@mips.com>
786
787 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
788 handling for BFD_RELOC_MIPS16_JMP.
789
601e61cd
NC
7902006-07-24 Andreas Schwab <schwab@suse.de>
791
792 PR/2756
793 * read.c (read_a_source_file): Ignore unknown text after line
794 comment character. Fix misleading comment.
795
b45619c0
NC
7962006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
797
798 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
799 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
800 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
801 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
802 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
803 doc/c-z80.texi, doc/internals.texi: Fix some typos.
804
784906c5
NC
8052006-07-21 Nick Clifton <nickc@redhat.com>
806
807 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
808 linker testsuite.
809
d5f010e9
TS
8102006-07-20 Thiemo Seufer <ths@mips.com>
811 Nigel Stephens <nigel@mips.com>
812
813 * config/tc-mips.c (md_parse_option): Don't infer optimisation
814 options from debug options.
815
35d3d567
TS
8162006-07-20 Thiemo Seufer <ths@mips.com>
817
818 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
819 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
820
401a54cf
PB
8212006-07-19 Paul Brook <paul@codesourcery.com>
822
823 * config/tc-arm.c (insns): Fix rbit Arm opcode.
824
16805f35
PB
8252006-07-18 Paul Brook <paul@codesourcery.com>
826
827 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
828 (md_convert_frag): Use correct reloc for add_pc. Use
829 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
830 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
831 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
832
d9e05e4e
AM
8332006-07-17 Mat Hostetter <mat@lcs.mit.edu>
834
835 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
836 when file and line unknown.
837
f43abd2b
TS
8382006-07-17 Thiemo Seufer <ths@mips.com>
839
840 * read.c (s_struct): Use IS_ELF.
841 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
842 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
843 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
844 s_mips_mask): Likewise.
845
a2902af6
TS
8462006-07-16 Thiemo Seufer <ths@mips.com>
847 David Ung <davidu@mips.com>
848
849 * read.c (s_struct): Handle ELF section changing.
850 * config/tc-mips.c (s_align): Leave enabling auto-align to the
851 generic code.
852 (s_change_sec): Try section changing only if we output ELF.
853
d32cad65
L
8542006-07-15 H.J. Lu <hongjiu.lu@intel.com>
855
856 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
857 CpuAmdFam10.
858 (smallest_imm_type): Remove Cpu086.
859 (i386_target_format): Likewise.
860
861 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
862 Update CpuXXX.
863
050dfa73
MM
8642006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
865 Michael Meissner <michael.meissner@amd.com>
866
867 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
868 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
869 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
870 architecture.
871 (i386_align_code): Ditto.
872 (md_assemble_code): Add support for insertq/extrq instructions,
873 swapping as needed for intel syntax.
874 (swap_imm_operands): New function to swap immediate operands.
875 (swap_operands): Deal with 4 operand instructions.
876 (build_modrm_byte): Add support for insertq instruction.
877
6b2de085
L
8782006-07-13 H.J. Lu <hongjiu.lu@intel.com>
879
880 * config/tc-i386.h (Size64): Fix a typo in comment.
881
01eaea5a
NC
8822006-07-12 Nick Clifton <nickc@redhat.com>
883
884 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 885 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
886 already been checked here.
887
1e85aad8
JW
8882006-07-07 James E Wilson <wilson@specifix.com>
889
890 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
891
1370e33d
NC
8922006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
893 Nick Clifton <nickc@redhat.com>
894
895 PR binutils/2877
896 * doc/as.texi: Fix spelling typo: branchs => branches.
897 * doc/c-m68hc11.texi: Likewise.
898 * config/tc-m68hc11.c: Likewise.
899 Support old spelling of command line switch for backwards
900 compatibility.
901
5f0fe04b
TS
9022006-07-04 Thiemo Seufer <ths@mips.com>
903 David Ung <davidu@mips.com>
904
905 * config/tc-mips.c (s_is_linkonce): New function.
906 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
907 weak, external, and linkonce symbols.
908 (pic_need_relax): Use s_is_linkonce.
909
85234291
L
9102006-06-24 H.J. Lu <hongjiu.lu@intel.com>
911
912 * doc/as.texinfo (Org): Remove space.
913 (P2align): Add "@var{abs-expr},".
914
ccc9c027
L
9152006-06-23 H.J. Lu <hongjiu.lu@intel.com>
916
917 * config/tc-i386.c (cpu_arch_tune_set): New.
918 (cpu_arch_isa): Likewise.
919 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
920 nops with short or long nop sequences based on -march=/.arch
921 and -mtune=.
922 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
923 set cpu_arch_tune and cpu_arch_tune_flags.
924 (md_parse_option): For -march=, set cpu_arch_isa and set
925 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
926 0. Set cpu_arch_tune_set to 1 for -mtune=.
927 (i386_target_format): Don't set cpu_arch_tune.
928
d4dc2f22
TS
9292006-06-23 Nigel Stephens <nigel@mips.com>
930
931 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
932 generated .sbss.* and .gnu.linkonce.sb.*.
933
a8dbcb85
TS
9342006-06-23 Thiemo Seufer <ths@mips.com>
935 David Ung <davidu@mips.com>
936
937 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
938 label_list.
939 * config/tc-mips.c (label_list): Define per-segment label_list.
940 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
941 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
942 mips_from_file_after_relocs, mips_define_label): Use per-segment
943 label_list.
944
3994f87e
TS
9452006-06-22 Thiemo Seufer <ths@mips.com>
946
947 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
948 (append_insn): Use it.
949 (md_apply_fix): Whitespace formatting.
950 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
951 mips16_extended_frag): Remove register specifier.
952 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
953 constants.
954
fa073d69
MS
9552006-06-21 Mark Shinwell <shinwell@codesourcery.com>
956
957 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
958 a directive saving VFP registers for ARMv6 or later.
959 (s_arm_unwind_save): Add parameter arch_v6 and call
960 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
961 appropriate.
962 (md_pseudo_table): Add entry for new "vsave" directive.
963 * doc/c-arm.texi: Correct error in example for "save"
964 directive (fstmdf -> fstmdx). Also document "vsave" directive.
965
8e77b565 9662006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
967 Anatoly Sokolov <aesok@post.ru>
968
a70ae331
AM
969 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
970 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
971 atmega164p/atmega324p.
972 * doc/c-avr.texi: Document new mcu and arch options.
973
8b1ad454
NC
9742006-06-17 Nick Clifton <nickc@redhat.com>
975
976 * config/tc-arm.c (enum parse_operand_result): Move outside of
977 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
978
9103f4f4
L
9792006-06-16 H.J. Lu <hongjiu.lu@intel.com>
980
981 * config/tc-i386.h (processor_type): New.
982 (arch_entry): Add type.
983
984 * config/tc-i386.c (cpu_arch_tune): New.
985 (cpu_arch_tune_flags): Likewise.
986 (cpu_arch_isa_flags): Likewise.
987 (cpu_arch): Updated.
988 (set_cpu_arch): Also update cpu_arch_isa_flags.
989 (md_assemble): Update cpu_arch_isa_flags.
990 (OPTION_MARCH): New.
991 (OPTION_MTUNE): Likewise.
992 (md_longopts): Add -march= and -mtune=.
993 (md_parse_option): Support -march= and -mtune=.
994 (md_show_usage): Add -march=CPU/-mtune=CPU.
995 (i386_target_format): Also update cpu_arch_isa_flags,
996 cpu_arch_tune and cpu_arch_tune_flags.
997
998 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
999
1000 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
1001
4962c51a
MS
10022006-06-15 Mark Shinwell <shinwell@codesourcery.com>
1003
1004 * config/tc-arm.c (enum parse_operand_result): New.
1005 (struct group_reloc_table_entry): New.
1006 (enum group_reloc_type): New.
1007 (group_reloc_table): New array.
1008 (find_group_reloc_table_entry): New function.
1009 (parse_shifter_operand_group_reloc): New function.
1010 (parse_address_main): New function, incorporating code
1011 from the old parse_address function. To be used via...
1012 (parse_address): wrapper for parse_address_main; and
1013 (parse_address_group_reloc): new function, likewise.
1014 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
1015 OP_ADDRGLDRS, OP_ADDRGLDC.
1016 (parse_operands): Support for these new operand codes.
1017 New macro po_misc_or_fail_no_backtrack.
1018 (encode_arm_cp_address): Preserve group relocations.
1019 (insns): Modify to use the above operand codes where group
1020 relocations are permitted.
1021 (md_apply_fix): Handle the group relocations
1022 ALU_PC_G0_NC through LDC_SB_G2.
1023 (tc_gen_reloc): Likewise.
1024 (arm_force_relocation): Leave group relocations for the linker.
1025 (arm_fix_adjustable): Likewise.
1026
cd2f129f
JB
10272006-06-15 Julian Brown <julian@codesourcery.com>
1028
1029 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
1030 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
1031 relocs properly.
1032
46e883c5
L
10332006-06-12 H.J. Lu <hongjiu.lu@intel.com>
1034
1035 * config/tc-i386.c (process_suffix): Don't add rex64 for
1036 "xchg %rax,%rax".
1037
1787fe5b
TS
10382006-06-09 Thiemo Seufer <ths@mips.com>
1039
1040 * config/tc-mips.c (mips_ip): Maintain argument count.
1041
96f989c2
AM
10422006-06-09 Alan Modra <amodra@bigpond.net.au>
1043
1044 * config/tc-iq2000.c: Include sb.h.
1045
7c752c2a
TS
10462006-06-08 Nigel Stephens <nigel@mips.com>
1047
1048 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
1049 aliases for better compatibility with SGI tools.
1050
03bf704f
AM
10512006-06-08 Alan Modra <amodra@bigpond.net.au>
1052
1053 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
1054 * Makefile.am (GASLIBS): Expand @BFDLIB@.
1055 (BFDVER_H): Delete.
1056 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
1057 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
1058 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
1059 Run "make dep-am".
1060 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
1061 * Makefile.in: Regenerate.
1062 * doc/Makefile.in: Regenerate.
1063 * configure: Regenerate.
1064
6648b7cf
JM
10652006-06-07 Joseph S. Myers <joseph@codesourcery.com>
1066
1067 * po/Make-in (pdf, ps): New dummy targets.
1068
037e8744
JB
10692006-06-07 Julian Brown <julian@codesourcery.com>
1070
1071 * config/tc-arm.c (stdarg.h): include.
1072 (arm_it): Add uncond_value field. Add isvec and issingle to operand
1073 array.
1074 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
1075 REG_TYPE_NSDQ (single, double or quad vector reg).
1076 (reg_expected_msgs): Update.
1077 (BAD_FPU): Add macro for unsupported FPU instruction error.
1078 (parse_neon_type): Support 'd' as an alias for .f64.
1079 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
1080 sets of registers.
1081 (parse_vfp_reg_list): Don't update first arg on error.
1082 (parse_neon_mov): Support extra syntax for VFP moves.
1083 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
1084 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
1085 (parse_operands): Support isvec, issingle operands fields, new parse
1086 codes above.
1087 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
1088 msr variants.
1089 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
1090 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1091 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1092 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1093 shapes.
1094 (neon_shape): Redefine in terms of above.
1095 (neon_shape_class): New enumeration, table of shape classes.
1096 (neon_shape_el): New enumeration. One element of a shape.
1097 (neon_shape_el_size): Register widths of above, where appropriate.
1098 (neon_shape_info): New struct. Info for shape table.
1099 (neon_shape_tab): New array.
1100 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1101 (neon_check_shape): Rewrite as...
1102 (neon_select_shape): New function to classify instruction shapes,
1103 driven by new table neon_shape_tab array.
1104 (neon_quad): New function. Return 1 if shape should set Q flag in
1105 instructions (or equivalent), 0 otherwise.
1106 (type_chk_of_el_type): Support F64.
1107 (el_type_of_type_chk): Likewise.
1108 (neon_check_type): Add support for VFP type checking (VFP data
1109 elements fill their containing registers).
1110 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1111 in thumb mode for VFP instructions.
1112 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1113 and encode the current instruction as if it were that opcode.
1114 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1115 arguments, call function in PFN.
1116 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1117 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1118 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1119 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1120 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1121 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1122 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1123 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1124 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1125 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1126 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1127 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1128 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1129 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1130 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1131 neon_quad.
1132 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1133 between VFP and Neon turns out to belong to Neon. Perform
1134 architecture check and fill in condition field if appropriate.
1135 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1136 (do_neon_cvt): Add support for VFP variants of instructions.
1137 (neon_cvt_flavour): Extend to cover VFP conversions.
1138 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1139 vmov variants.
1140 (do_neon_ldr_str): Handle single-precision VFP load/store.
1141 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1142 NS_NULL not NS_IGNORE.
1143 (opcode_tag): Add OT_csuffixF for operands which either take a
1144 conditional suffix, or have 0xF in the condition field.
1145 (md_assemble): Add support for OT_csuffixF.
1146 (NCE): Replace macro with...
1147 (NCE_tag, NCE, NCEF): New macros.
1148 (nCE): Replace macro with...
1149 (nCE_tag, nCE, nCEF): New macros.
1150 (insns): Add support for VFP insns or VFP versions of insns msr,
1151 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1152 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1153 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1154 VFP/Neon insns together.
1155
ebd1c875
AM
11562006-06-07 Alan Modra <amodra@bigpond.net.au>
1157 Ladislav Michl <ladis@linux-mips.org>
1158
1159 * app.c: Don't include headers already included by as.h.
1160 * as.c: Likewise.
1161 * atof-generic.c: Likewise.
1162 * cgen.c: Likewise.
1163 * dwarf2dbg.c: Likewise.
1164 * expr.c: Likewise.
1165 * input-file.c: Likewise.
1166 * input-scrub.c: Likewise.
1167 * macro.c: Likewise.
1168 * output-file.c: Likewise.
1169 * read.c: Likewise.
1170 * sb.c: Likewise.
1171 * config/bfin-lex.l: Likewise.
1172 * config/obj-coff.h: Likewise.
1173 * config/obj-elf.h: Likewise.
1174 * config/obj-som.h: Likewise.
1175 * config/tc-arc.c: Likewise.
1176 * config/tc-arm.c: Likewise.
1177 * config/tc-avr.c: Likewise.
1178 * config/tc-bfin.c: Likewise.
1179 * config/tc-cris.c: Likewise.
1180 * config/tc-d10v.c: Likewise.
1181 * config/tc-d30v.c: Likewise.
1182 * config/tc-dlx.h: Likewise.
1183 * config/tc-fr30.c: Likewise.
1184 * config/tc-frv.c: Likewise.
1185 * config/tc-h8300.c: Likewise.
1186 * config/tc-hppa.c: Likewise.
1187 * config/tc-i370.c: Likewise.
1188 * config/tc-i860.c: Likewise.
1189 * config/tc-i960.c: Likewise.
1190 * config/tc-ip2k.c: Likewise.
1191 * config/tc-iq2000.c: Likewise.
1192 * config/tc-m32c.c: Likewise.
1193 * config/tc-m32r.c: Likewise.
1194 * config/tc-maxq.c: Likewise.
1195 * config/tc-mcore.c: Likewise.
1196 * config/tc-mips.c: Likewise.
1197 * config/tc-mmix.c: Likewise.
1198 * config/tc-mn10200.c: Likewise.
1199 * config/tc-mn10300.c: Likewise.
1200 * config/tc-msp430.c: Likewise.
1201 * config/tc-mt.c: Likewise.
1202 * config/tc-ns32k.c: Likewise.
1203 * config/tc-openrisc.c: Likewise.
1204 * config/tc-ppc.c: Likewise.
1205 * config/tc-s390.c: Likewise.
1206 * config/tc-sh.c: Likewise.
1207 * config/tc-sh64.c: Likewise.
1208 * config/tc-sparc.c: Likewise.
1209 * config/tc-tic30.c: Likewise.
1210 * config/tc-tic4x.c: Likewise.
1211 * config/tc-tic54x.c: Likewise.
1212 * config/tc-v850.c: Likewise.
1213 * config/tc-vax.c: Likewise.
1214 * config/tc-xc16x.c: Likewise.
1215 * config/tc-xstormy16.c: Likewise.
1216 * config/tc-xtensa.c: Likewise.
1217 * config/tc-z80.c: Likewise.
1218 * config/tc-z8k.c: Likewise.
1219 * macro.h: Don't include sb.h or ansidecl.h.
1220 * sb.h: Don't include stdio.h or ansidecl.h.
1221 * cond.c: Include sb.h.
1222 * itbl-lex.l: Include as.h instead of other system headers.
1223 * itbl-parse.y: Likewise.
1224 * itbl-ops.c: Similarly.
1225 * itbl-ops.h: Don't include as.h or ansidecl.h.
1226 * config/bfin-defs.h: Don't include bfd.h or as.h.
1227 * config/bfin-parse.y: Include as.h instead of other system headers.
1228
9622b051
AM
12292006-06-06 Ben Elliston <bje@au.ibm.com>
1230 Anton Blanchard <anton@samba.org>
1231
1232 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1233 (md_show_usage): Document it.
1234 (ppc_setup_opcodes): Test power6 opcode flag bits.
1235 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1236
65263ce3
TS
12372006-06-06 Thiemo Seufer <ths@mips.com>
1238 Chao-ying Fu <fu@mips.com>
1239
1240 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1241 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1242 (macro_build): Update comment.
1243 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1244 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1245 CPU_HAS_MDMX.
1246 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1247 MIPS_CPU_ASE_MDMX flags for sb1.
1248
a9e24354
TS
12492006-06-05 Thiemo Seufer <ths@mips.com>
1250
1251 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1252 appropriate.
1253 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1254 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1255 and MT instructions a fatal error. Use INSERT_OPERAND where
1256 appropriate. Improve warnings for break and wait code overflows.
1257 Use symbolic constant of OP_MASK_COPZ.
1258 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1259
4cfe2c59
DJ
12602006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1261
1262 * po/Make-in (top_builddir): Define.
1263
e10fad12
JM
12642006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1265
1266 * doc/Makefile.am (TEXI2DVI): Define.
1267 * doc/Makefile.in: Regenerate.
1268 * doc/c-arc.texi: Fix typo.
1269
12e64c2c
AM
12702006-06-01 Alan Modra <amodra@bigpond.net.au>
1271
1272 * config/obj-ieee.c: Delete.
1273 * config/obj-ieee.h: Delete.
1274 * Makefile.am (OBJ_FORMATS): Remove ieee.
1275 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1276 (obj-ieee.o): Remove rule.
1277 * Makefile.in: Regenerate.
1278 * configure.in (atof): Remove tahoe.
1279 (OBJ_MAYBE_IEEE): Don't define.
1280 * configure: Regenerate.
1281 * config.in: Regenerate.
1282 * doc/Makefile.in: Regenerate.
1283 * po/POTFILES.in: Regenerate.
1284
20e95c23
DJ
12852006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1286
1287 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1288 and LIBINTL_DEP everywhere.
1289 (INTLLIBS): Remove.
1290 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1291 * acinclude.m4: Include new gettext macros.
1292 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1293 Remove local code for po/Makefile.
1294 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1295
eebf07fb
NC
12962006-05-30 Nick Clifton <nickc@redhat.com>
1297
1298 * po/es.po: Updated Spanish translation.
1299
b6aee19e
DC
13002006-05-06 Denis Chertykov <denisc@overta.ru>
1301
1302 * doc/c-avr.texi: New file.
1303 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1304 * doc/all.texi: Set AVR
1305 * doc/as.texinfo: Include c-avr.texi
1306
f8fdc850 13072006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1308
f8fdc850
JZ
1309 * config/bfin-parse.y (check_macfunc): Loose the condition of
1310 calling check_multiply_halfregs ().
1311
a3205465
JZ
13122006-05-25 Jie Zhang <jie.zhang@analog.com>
1313
1314 * config/bfin-parse.y (asm_1): Better check and deal with
1315 vector and scalar Multiply 16-Bit Operands instructions.
1316
9b52905e
NC
13172006-05-24 Nick Clifton <nickc@redhat.com>
1318
1319 * config/tc-hppa.c: Convert to ISO C90 format.
1320 * config/tc-hppa.h: Likewise.
1321
13222006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1323 Randolph Chung <randolph@tausq.org>
a70ae331 1324
9b52905e
NC
1325 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1326 is_tls_ieoff, is_tls_leoff): Define.
1327 (fix_new_hppa): Handle TLS.
1328 (cons_fix_new_hppa): Likewise.
1329 (pa_ip): Likewise.
1330 (md_apply_fix): Handle TLS relocs.
1331 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1332
a70ae331 13332006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1334
1335 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1336
ad3fea08
TS
13372006-05-23 Thiemo Seufer <ths@mips.com>
1338 David Ung <davidu@mips.com>
1339 Nigel Stephens <nigel@mips.com>
1340
1341 [ gas/ChangeLog ]
1342 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1343 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1344 ISA_HAS_MXHC1): New macros.
1345 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1346 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1347 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1348 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1349 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1350 (mips_after_parse_args): Change default handling of float register
1351 size to account for 32bit code with 64bit FP. Better sanity checking
1352 of ISA/ASE/ABI option combinations.
1353 (s_mipsset): Support switching of GPR and FPR sizes via
1354 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1355 options.
1356 (mips_elf_final_processing): We should record the use of 64bit FP
1357 registers in 32bit code but we don't, because ELF header flags are
1358 a scarce ressource.
1359 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1360 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1361 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1362 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1363 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1364 missing -march options. Document .set arch=CPU. Move .set smartmips
1365 to ASE page. Use @code for .set FOO examples.
1366
8b64503a
JZ
13672006-05-23 Jie Zhang <jie.zhang@analog.com>
1368
1369 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1370 if needed.
1371
403022e0
JZ
13722006-05-23 Jie Zhang <jie.zhang@analog.com>
1373
1374 * config/bfin-defs.h (bfin_equals): Remove declaration.
1375 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1376 * config/tc-bfin.c (bfin_name_is_register): Remove.
1377 (bfin_equals): Remove.
1378 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1379 (bfin_name_is_register): Remove declaration.
1380
7455baf8
TS
13812006-05-19 Thiemo Seufer <ths@mips.com>
1382 Nigel Stephens <nigel@mips.com>
1383
1384 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1385 (mips_oddfpreg_ok): New function.
1386 (mips_ip): Use it.
1387
707bfff6
TS
13882006-05-19 Thiemo Seufer <ths@mips.com>
1389 David Ung <davidu@mips.com>
1390
1391 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1392 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1393 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1394 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1395 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1396 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1397 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1398 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1399 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1400 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1401 reg_names_o32, reg_names_n32n64): Define register classes.
1402 (reg_lookup): New function, use register classes.
1403 (md_begin): Reserve register names in the symbol table. Simplify
1404 OBJ_ELF defines.
1405 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1406 Use reg_lookup.
1407 (mips16_ip): Use reg_lookup.
1408 (tc_get_register): Likewise.
1409 (tc_mips_regname_to_dw2regnum): New function.
1410
1df69f4f
TS
14112006-05-19 Thiemo Seufer <ths@mips.com>
1412
1413 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1414 Un-constify string argument.
1415 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1416 Likewise.
1417 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1418 Likewise.
1419 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1420 Likewise.
1421 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1422 Likewise.
1423 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1424 Likewise.
1425 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1426 Likewise.
1427
377260ba
NS
14282006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1429
1430 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1431 cfloat/m68881 to correct architecture before using it.
1432
cce7653b
NC
14332006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1434
a70ae331 1435 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1436 constant values.
1437
b0796911
PB
14382006-05-15 Paul Brook <paul@codesourcery.com>
1439
1440 * config/tc-arm.c (arm_adjust_symtab): Use
1441 bfd_is_arm_special_symbol_name.
1442
64b607e6
BW
14432006-05-15 Bob Wilson <bob.wilson@acm.org>
1444
1445 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1446 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1447 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1448 Handle errors from calls to xtensa_opcode_is_* functions.
1449
9b3f89ee
TS
14502006-05-14 Thiemo Seufer <ths@mips.com>
1451
1452 * config/tc-mips.c (macro_build): Test for currently active
1453 mips16 option.
1454 (mips16_ip): Reject invalid opcodes.
1455
370b66a1
CD
14562006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1457
1458 * doc/as.texinfo: Rename "Index" to "AS Index",
1459 and "ABORT" to "ABORT (COFF)".
1460
b6895b4f
PB
14612006-05-11 Paul Brook <paul@codesourcery.com>
1462
1463 * config/tc-arm.c (parse_half): New function.
1464 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1465 (parse_operands): Ditto.
1466 (do_mov16): Reject invalid relocations.
1467 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1468 (insns): Replace Iffff with HALF.
1469 (md_apply_fix): Add MOVW and MOVT relocs.
1470 (tc_gen_reloc): Ditto.
1471 * doc/c-arm.texi: Document relocation operators
1472
e28387c3
PB
14732006-05-11 Paul Brook <paul@codesourcery.com>
1474
1475 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1476
89ee2ebe
TS
14772006-05-11 Thiemo Seufer <ths@mips.com>
1478
1479 * config/tc-mips.c (append_insn): Don't check the range of j or
1480 jal addresses.
1481
53baae48
NC
14822006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1483
1484 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1485 relocs against external symbols for WinCE targets.
53baae48
NC
1486 (md_apply_fix): Likewise.
1487
4e2a74a8
TS
14882006-05-09 David Ung <davidu@mips.com>
1489
1490 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1491 j or jal address.
1492
337ff0a5
NC
14932006-05-09 Nick Clifton <nickc@redhat.com>
1494
1495 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1496 against symbols which are not going to be placed into the symbol
1497 table.
1498
8c9f705e
BE
14992006-05-09 Ben Elliston <bje@au.ibm.com>
1500
1501 * expr.c (operand): Remove `if (0 && ..)' statement and
1502 subsequently unused target_op label. Collapse `if (1 || ..)'
1503 statement.
1504 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1505 separately above the switch.
1506
2fd0d2ac
NC
15072006-05-08 Nick Clifton <nickc@redhat.com>
1508
1509 PR gas/2623
1510 * config/tc-msp430.c (line_separator_character): Define as |.
1511
e16bfa71
TS
15122006-05-08 Thiemo Seufer <ths@mips.com>
1513 Nigel Stephens <nigel@mips.com>
1514 David Ung <davidu@mips.com>
1515
1516 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1517 (mips_opts): Likewise.
1518 (file_ase_smartmips): New variable.
1519 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1520 (macro_build): Handle SmartMIPS instructions.
1521 (mips_ip): Likewise.
1522 (md_longopts): Add argument handling for smartmips.
1523 (md_parse_options, mips_after_parse_args): Likewise.
1524 (s_mipsset): Add .set smartmips support.
1525 (md_show_usage): Document -msmartmips/-mno-smartmips.
1526 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1527 .set smartmips.
1528 * doc/c-mips.texi: Likewise.
1529
32638454
AM
15302006-05-08 Alan Modra <amodra@bigpond.net.au>
1531
1532 * write.c (relax_segment): Add pass count arg. Don't error on
1533 negative org/space on first two passes.
1534 (relax_seg_info): New struct.
1535 (relax_seg, write_object_file): Adjust.
1536 * write.h (relax_segment): Update prototype.
1537
b7fc2769
JB
15382006-05-05 Julian Brown <julian@codesourcery.com>
1539
1540 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1541 checking.
1542 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1543 architecture version checks.
1544 (insns): Allow overlapping instructions to be used in VFP mode.
1545
7f841127
L
15462006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1547
1548 PR gas/2598
1549 * config/obj-elf.c (obj_elf_change_section): Allow user
1550 specified SHF_ALPHA_GPREL.
1551
73160847
NC
15522006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1553
1554 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1555 for PMEM related expressions.
1556
56487c55
NC
15572006-05-05 Nick Clifton <nickc@redhat.com>
1558
1559 PR gas/2582
1560 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1561 insertion of a directory separator character into a string at a
1562 given offset. Uses heuristics to decide when to use a backslash
1563 character rather than a forward-slash character.
1564 (dwarf2_directive_loc): Use the macro.
1565 (out_debug_info): Likewise.
1566
d43b4baf
TS
15672006-05-05 Thiemo Seufer <ths@mips.com>
1568 David Ung <davidu@mips.com>
1569
1570 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1571 instruction.
1572 (macro): Add new case M_CACHE_AB.
1573
088fa78e
KH
15742006-05-04 Kazu Hirata <kazu@codesourcery.com>
1575
1576 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1577 (opcode_lookup): Issue a warning for opcode with
1578 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1579 identical to OT_cinfix3.
1580 (TxC3w, TC3w, tC3w): New.
1581 (insns): Use tC3w and TC3w for comparison instructions with
1582 's' suffix.
1583
c9049d30
AM
15842006-05-04 Alan Modra <amodra@bigpond.net.au>
1585
1586 * subsegs.h (struct frchain): Delete frch_seg.
1587 (frchain_root): Delete.
1588 (seg_info): Define as macro.
1589 * subsegs.c (frchain_root): Delete.
1590 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1591 (subsegs_begin, subseg_change): Adjust for above.
1592 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1593 rather than to one big list.
1594 (subseg_get): Don't special case abs, und sections.
1595 (subseg_new, subseg_force_new): Don't set frchainP here.
1596 (seg_info): Delete.
1597 (subsegs_print_statistics): Adjust frag chain control list traversal.
1598 * debug.c (dmp_frags): Likewise.
1599 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1600 at frchain_root. Make use of known frchain ordering.
1601 (last_frag_for_seg): Likewise.
1602 (get_frag_fix): Likewise. Add seg param.
1603 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1604 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1605 (SUB_SEGMENT_ALIGN): Likewise.
1606 (subsegs_finish): Adjust frchain list traversal.
1607 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1608 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1609 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1610 (xtensa_fix_b_j_loop_end_frags): Likewise.
1611 (xtensa_fix_close_loop_end_frags): Likewise.
1612 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1613 (retrieve_segment_info): Delete frch_seg initialisation.
1614
f592407e
AM
16152006-05-03 Alan Modra <amodra@bigpond.net.au>
1616
1617 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1618 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1619 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1620 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1621
df7849c5
JM
16222006-05-02 Joseph Myers <joseph@codesourcery.com>
1623
1624 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1625 here.
1626 (md_apply_fix3): Multiply offset by 4 here for
1627 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1628
2d545b82
L
16292006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1630 Jan Beulich <jbeulich@novell.com>
1631
1632 * config/tc-i386.c (output_invalid_buf): Change size for
1633 unsigned char.
1634 * config/tc-tic30.c (output_invalid_buf): Likewise.
1635
1636 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1637 unsigned char.
1638 * config/tc-tic30.c (output_invalid): Likewise.
1639
38fc1cb1
DJ
16402006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1641
1642 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1643 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1644 (asconfig.texi): Don't set top_srcdir.
1645 * doc/as.texinfo: Don't use top_srcdir.
1646 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1647
2d545b82
L
16482006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1649
1650 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1651 * config/tc-tic30.c (output_invalid_buf): Likewise.
1652
1653 * config/tc-i386.c (output_invalid): Use snprintf instead of
1654 sprintf.
1655 * config/tc-ia64.c (declare_register_set): Likewise.
1656 (emit_one_bundle): Likewise.
1657 (check_dependencies): Likewise.
1658 * config/tc-tic30.c (output_invalid): Likewise.
1659
a8bc6c78
PB
16602006-05-02 Paul Brook <paul@codesourcery.com>
1661
1662 * config/tc-arm.c (arm_optimize_expr): New function.
1663 * config/tc-arm.h (md_optimize_expr): Define
1664 (arm_optimize_expr): Add prototype.
1665 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1666
58633d9a
BE
16672006-05-02 Ben Elliston <bje@au.ibm.com>
1668
22772e33
BE
1669 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1670 field unsigned.
1671
58633d9a
BE
1672 * sb.h (sb_list_vector): Move to sb.c.
1673 * sb.c (free_list): Use type of sb_list_vector directly.
1674 (sb_build): Fix off-by-one error in assertion about `size'.
1675
89cdfe57
BE
16762006-05-01 Ben Elliston <bje@au.ibm.com>
1677
1678 * listing.c (listing_listing): Remove useless loop.
1679 * macro.c (macro_expand): Remove is_positional local variable.
1680 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1681 and simplify surrounding expressions, where possible.
1682 (assign_symbol): Likewise.
1683 (s_weakref): Likewise.
1684 * symbols.c (colon): Likewise.
1685
c35da140
AM
16862006-05-01 James Lemke <jwlemke@wasabisystems.com>
1687
1688 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1689
9bcd4f99
TS
16902006-04-30 Thiemo Seufer <ths@mips.com>
1691 David Ung <davidu@mips.com>
1692
1693 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1694 (mips_immed): New table that records various handling of udi
1695 instruction patterns.
1696 (mips_ip): Adds udi handling.
1697
001ae1a4
AM
16982006-04-28 Alan Modra <amodra@bigpond.net.au>
1699
1700 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1701 of list rather than beginning.
1702
136da414
JB
17032006-04-26 Julian Brown <julian@codesourcery.com>
1704
1705 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1706 (is_quarter_float): Rename from above. Simplify slightly.
1707 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1708 number.
1709 (parse_neon_mov): Parse floating-point constants.
1710 (neon_qfloat_bits): Fix encoding.
1711 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1712 preference to integer encoding when using the F32 type.
1713
dcbf9037
JB
17142006-04-26 Julian Brown <julian@codesourcery.com>
1715
1716 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1717 zero-initialising structures containing it will lead to invalid types).
1718 (arm_it): Add vectype to each operand.
1719 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1720 defined field.
1721 (neon_typed_alias): New structure. Extra information for typed
1722 register aliases.
1723 (reg_entry): Add neon type info field.
1724 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1725 Break out alternative syntax for coprocessor registers, etc. into...
1726 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1727 out from arm_reg_parse.
1728 (parse_neon_type): Move. Return SUCCESS/FAIL.
1729 (first_error): New function. Call to ensure first error which occurs is
1730 reported.
1731 (parse_neon_operand_type): Parse exactly one type.
1732 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1733 (parse_typed_reg_or_scalar): New function. Handle core of both
1734 arm_typed_reg_parse and parse_scalar.
1735 (arm_typed_reg_parse): Parse a register with an optional type.
1736 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1737 result.
1738 (parse_scalar): Parse a Neon scalar with optional type.
1739 (parse_reg_list): Use first_error.
1740 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1741 (neon_alias_types_same): New function. Return true if two (alias) types
1742 are the same.
1743 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1744 of elements.
1745 (insert_reg_alias): Return new reg_entry not void.
1746 (insert_neon_reg_alias): New function. Insert type/index information as
1747 well as register for alias.
1748 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1749 make typed register aliases accordingly.
1750 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1751 of line.
1752 (s_unreq): Delete type information if present.
1753 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1754 (s_arm_unwind_save_mmxwcg): Likewise.
1755 (s_arm_unwind_movsp): Likewise.
1756 (s_arm_unwind_setfp): Likewise.
1757 (parse_shift): Likewise.
1758 (parse_shifter_operand): Likewise.
1759 (parse_address): Likewise.
1760 (parse_tb): Likewise.
1761 (tc_arm_regname_to_dw2regnum): Likewise.
1762 (md_pseudo_table): Add dn, qn.
1763 (parse_neon_mov): Handle typed operands.
1764 (parse_operands): Likewise.
1765 (neon_type_mask): Add N_SIZ.
1766 (N_ALLMODS): New macro.
1767 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1768 (el_type_of_type_chk): Add some safeguards.
1769 (modify_types_allowed): Fix logic bug.
1770 (neon_check_type): Handle operands with types.
1771 (neon_three_same): Remove redundant optional arg handling.
1772 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1773 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1774 (do_neon_step): Adjust accordingly.
1775 (neon_cmode_for_logic_imm): Use first_error.
1776 (do_neon_bitfield): Call neon_check_type.
1777 (neon_dyadic): Rename to...
1778 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1779 to allow modification of type of the destination.
1780 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1781 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1782 (do_neon_compare): Make destination be an untyped bitfield.
1783 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1784 (neon_mul_mac): Return early in case of errors.
1785 (neon_move_immediate): Use first_error.
1786 (neon_mac_reg_scalar_long): Fix type to include scalar.
1787 (do_neon_dup): Likewise.
1788 (do_neon_mov): Likewise (in several places).
1789 (do_neon_tbl_tbx): Fix type.
1790 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1791 (do_neon_ld_dup): Exit early in case of errors and/or use
1792 first_error.
1793 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1794 Handle .dn/.qn directives.
1795 (REGDEF): Add zero for reg_entry neon field.
1796
5287ad62
JB
17972006-04-26 Julian Brown <julian@codesourcery.com>
1798
1799 * config/tc-arm.c (limits.h): Include.
1800 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1801 (fpu_vfp_v3_or_neon_ext): Declare constants.
1802 (neon_el_type): New enumeration of types for Neon vector elements.
1803 (neon_type_el): New struct. Define type and size of a vector element.
1804 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1805 instruction.
1806 (neon_type): Define struct. The type of an instruction.
1807 (arm_it): Add 'vectype' for the current instruction.
1808 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1809 (vfp_sp_reg_pos): Rename to...
1810 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1811 tags.
1812 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1813 (Neon D or Q register).
1814 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1815 register.
1816 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1817 (my_get_expression): Allow above constant as argument to accept
1818 64-bit constants with optional prefix.
1819 (arm_reg_parse): Add extra argument to return the specific type of
1820 register in when either a D or Q register (REG_TYPE_NDQ) is
1821 requested. Can be NULL.
1822 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1823 (parse_reg_list): Update for new arm_reg_parse args.
1824 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1825 (parse_neon_el_struct_list): New function. Parse element/structure
1826 register lists for VLD<n>/VST<n> instructions.
1827 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1828 (s_arm_unwind_save_mmxwr): Likewise.
1829 (s_arm_unwind_save_mmxwcg): Likewise.
1830 (s_arm_unwind_movsp): Likewise.
1831 (s_arm_unwind_setfp): Likewise.
1832 (parse_big_immediate): New function. Parse an immediate, which may be
1833 64 bits wide. Put results in inst.operands[i].
1834 (parse_shift): Update for new arm_reg_parse args.
1835 (parse_address): Likewise. Add parsing of alignment specifiers.
1836 (parse_neon_mov): Parse the operands of a VMOV instruction.
1837 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1838 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1839 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1840 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1841 (parse_operands): Handle new codes above.
1842 (encode_arm_vfp_sp_reg): Rename to...
1843 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1844 selected VFP version only supports D0-D15.
1845 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1846 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1847 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1848 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1849 encode_arm_vfp_reg name, and allow 32 D regs.
1850 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1851 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1852 regs.
1853 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1854 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1855 constant-load and conversion insns introduced with VFPv3.
1856 (neon_tab_entry): New struct.
1857 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1858 those which are the targets of pseudo-instructions.
1859 (neon_opc): Enumerate opcodes, use as indices into...
1860 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1861 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1862 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1863 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1864 neon_enc_tab.
1865 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1866 Neon instructions.
1867 (neon_type_mask): New. Compact type representation for type checking.
1868 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1869 permitted type combinations.
1870 (N_IGNORE_TYPE): New macro.
1871 (neon_check_shape): New function. Check an instruction shape for
1872 multiple alternatives. Return the specific shape for the current
1873 instruction.
1874 (neon_modify_type_size): New function. Modify a vector type and size,
1875 depending on the bit mask in argument 1.
1876 (neon_type_promote): New function. Convert a given "key" type (of an
1877 operand) into the correct type for a different operand, based on a bit
1878 mask.
1879 (type_chk_of_el_type): New function. Convert a type and size into the
1880 compact representation used for type checking.
1881 (el_type_of_type_ckh): New function. Reverse of above (only when a
1882 single bit is set in the bit mask).
1883 (modify_types_allowed): New function. Alter a mask of allowed types
1884 based on a bit mask of modifications.
1885 (neon_check_type): New function. Check the type of the current
1886 instruction against the variable argument list. The "key" type of the
1887 instruction is returned.
1888 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1889 a Neon data-processing instruction depending on whether we're in ARM
1890 mode or Thumb-2 mode.
1891 (neon_logbits): New function.
1892 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1893 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1894 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1895 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1896 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1897 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1898 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1899 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1900 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1901 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1902 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1903 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1904 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1905 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1906 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1907 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1908 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1909 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1910 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1911 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1912 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1913 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1914 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1915 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1916 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1917 helpers.
1918 (parse_neon_type): New function. Parse Neon type specifier.
1919 (opcode_lookup): Allow parsing of Neon type specifiers.
1920 (REGNUM2, REGSETH, REGSET2): New macros.
1921 (reg_names): Add new VFPv3 and Neon registers.
1922 (NUF, nUF, NCE, nCE): New macros for opcode table.
1923 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1924 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1925 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1926 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1927 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1928 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1929 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1930 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1931 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1932 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1933 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1934 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1935 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1936 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1937 fto[us][lh][sd].
1938 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1939 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1940 (arm_option_cpu_value): Add vfp3 and neon.
1941 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1942 VFPv1 attribute.
1943
1946c96e
BW
19442006-04-25 Bob Wilson <bob.wilson@acm.org>
1945
1946 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1947 syntax instead of hardcoded opcodes with ".w18" suffixes.
1948 (wide_branch_opcode): New.
1949 (build_transition): Use it to check for wide branch opcodes with
1950 either ".w18" or ".w15" suffixes.
1951
5033a645
BW
19522006-04-25 Bob Wilson <bob.wilson@acm.org>
1953
1954 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1955 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1956 frag's is_literal flag.
1957
395fa56f
BW
19582006-04-25 Bob Wilson <bob.wilson@acm.org>
1959
1960 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1961
708587a4
KH
19622006-04-23 Kazu Hirata <kazu@codesourcery.com>
1963
1964 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1965 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1966 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1967 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1968 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1969
8463be01
PB
19702005-04-20 Paul Brook <paul@codesourcery.com>
1971
1972 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1973 all targets.
1974 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1975
f26a5955
AM
19762006-04-19 Alan Modra <amodra@bigpond.net.au>
1977
1978 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1979 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1980 Make some cpus unsupported on ELF. Run "make dep-am".
1981 * Makefile.in: Regenerate.
1982
241a6c40
AM
19832006-04-19 Alan Modra <amodra@bigpond.net.au>
1984
1985 * configure.in (--enable-targets): Indent help message.
1986 * configure: Regenerate.
1987
bb8f5920
L
19882006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1989
1990 PR gas/2533
1991 * config/tc-i386.c (i386_immediate): Check illegal immediate
1992 register operand.
1993
23d9d9de
AM
19942006-04-18 Alan Modra <amodra@bigpond.net.au>
1995
64e74474
AM
1996 * config/tc-i386.c: Formatting.
1997 (output_disp, output_imm): ISO C90 params.
1998
6cbe03fb
AM
1999 * frags.c (frag_offset_fixed_p): Constify args.
2000 * frags.h (frag_offset_fixed_p): Ditto.
2001
23d9d9de
AM
2002 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
2003 (COFF_MAGIC): Delete.
a37d486e
AM
2004
2005 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
2006
e7403566
DJ
20072006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
2008
2009 * po/POTFILES.in: Regenerated.
2010
58ab4f3d
MM
20112006-04-16 Mark Mitchell <mark@codesourcery.com>
2012
2013 * doc/as.texinfo: Mention that some .type syntaxes are not
2014 supported on all architectures.
2015
482fd9f9
BW
20162006-04-14 Sterling Augustine <sterling@tensilica.com>
2017
2018 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
2019 instructions when such transformations have been disabled.
2020
05d58145
BW
20212006-04-10 Sterling Augustine <sterling@tensilica.com>
2022
2023 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
2024 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
2025 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
2026 decoding the loop instructions. Remove current_offset variable.
2027 (xtensa_fix_short_loop_frags): Likewise.
2028 (min_bytes_to_other_loop_end): Remove current_offset argument.
2029
9e75b3fa
AM
20302006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
2031
a37d486e 2032 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
2033 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
2034
d727e8c2
NC
20352006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
2036
2037 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
2038 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
2039 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
2040 atmega644, atmega329, atmega3290, atmega649, atmega6490,
2041 atmega406, atmega640, atmega1280, atmega1281, at90can32,
2042 at90can64, at90usb646, at90usb647, at90usb1286 and
2043 at90usb1287.
2044 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2045
d252fdde
PB
20462006-04-07 Paul Brook <paul@codesourcery.com>
2047
2048 * config/tc-arm.c (parse_operands): Set default error message.
2049
ab1eb5fe
PB
20502006-04-07 Paul Brook <paul@codesourcery.com>
2051
2052 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
2053
7ae2971b
PB
20542006-04-07 Paul Brook <paul@codesourcery.com>
2055
2056 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
2057
53365c0d
PB
20582006-04-07 Paul Brook <paul@codesourcery.com>
2059
2060 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
2061 (move_or_literal_pool): Handle Thumb-2 instructions.
2062 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
2063
45aa61fe
AM
20642006-04-07 Alan Modra <amodra@bigpond.net.au>
2065
2066 PR 2512.
2067 * config/tc-i386.c (match_template): Move 64-bit operand tests
2068 inside loop.
2069
108a6f8e
CD
20702006-04-06 Carlos O'Donell <carlos@codesourcery.com>
2071
2072 * po/Make-in: Add install-html target.
2073 * Makefile.am: Add install-html and install-html-recursive targets.
2074 * Makefile.in: Regenerate.
2075 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
2076 * configure: Regenerate.
2077 * doc/Makefile.am: Add install-html and install-html-am targets.
2078 * doc/Makefile.in: Regenerate.
2079
ec651a3b
AM
20802006-04-06 Alan Modra <amodra@bigpond.net.au>
2081
2082 * frags.c (frag_offset_fixed_p): Reinitialise offset before
2083 second scan.
2084
910600e9
RS
20852006-04-05 Richard Sandiford <richard@codesourcery.com>
2086 Daniel Jacobowitz <dan@codesourcery.com>
2087
2088 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
2089 (GOTT_BASE, GOTT_INDEX): New.
2090 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2091 GOTT_INDEX when generating VxWorks PIC.
2092 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2093 use the generic *-*-vxworks* stanza instead.
2094
99630778
AM
20952006-04-04 Alan Modra <amodra@bigpond.net.au>
2096
2097 PR 997
2098 * frags.c (frag_offset_fixed_p): New function.
2099 * frags.h (frag_offset_fixed_p): Declare.
2100 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2101 (resolve_expression): Likewise.
2102
a02728c8
BW
21032006-04-03 Sterling Augustine <sterling@tensilica.com>
2104
2105 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2106 of the same length but different numbers of slots.
2107
9dfde49d
AS
21082006-03-30 Andreas Schwab <schwab@suse.de>
2109
2110 * configure.in: Fix help string for --enable-targets option.
2111 * configure: Regenerate.
2112
2da12c60
NS
21132006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2114
6d89cc8f
NS
2115 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2116 (m68k_ip): ... here. Use for all chips. Protect against buffer
2117 overrun and avoid excessive copying.
2118
2da12c60
NS
2119 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2120 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2121 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2122 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2123 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2124 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2125 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2126 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2127 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2128 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2129 (struct m68k_cpu): Change chip field to control_regs.
2130 (current_chip): Remove.
2131 (control_regs): New.
2132 (m68k_archs, m68k_extensions): Adjust.
2133 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2134 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2135 (find_cf_chip): Reimplement for new organization of cpu table.
2136 (select_control_regs): Remove.
2137 (mri_chip): Adjust.
2138 (struct save_opts): Save control regs, not chip.
2139 (s_save, s_restore): Adjust.
2140 (m68k_lookup_cpu): Give deprecated warning when necessary.
2141 (m68k_init_arch): Adjust.
2142 (md_show_usage): Adjust for new cpu table organization.
2143
1ac4baed
BS
21442006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2145
2146 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2147 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2148 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2149 "elf/bfin.h".
2150 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2151 (any_gotrel): New rule.
2152 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2153 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2154 "elf/bfin.h".
2155 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2156 (bfin_pic_ptr): New function.
2157 (md_pseudo_table): Add it for ".picptr".
2158 (OPTION_FDPIC): New macro.
2159 (md_longopts): Add -mfdpic.
2160 (md_parse_option): Handle it.
2161 (md_begin): Set BFD flags.
2162 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2163 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2164 us for GOT relocs.
2165 * Makefile.am (bfin-parse.o): Update dependencies.
2166 (DEPTC_bfin_elf): Likewise.
2167 * Makefile.in: Regenerate.
2168
a9d34880
RS
21692006-03-25 Richard Sandiford <richard@codesourcery.com>
2170
2171 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2172 mcfemac instead of mcfmac.
2173
9ca26584
AJ
21742006-03-23 Michael Matz <matz@suse.de>
2175
2176 * config/tc-i386.c (type_names): Correct placement of 'static'.
2177 (reloc): Map some more relocs to their 64 bit counterpart when
2178 size is 8.
2179 (output_insn): Work around breakage if DEBUG386 is defined.
2180 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2181 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2182 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2183 different from i386.
2184 (output_imm): Ditto.
2185 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2186 Imm64.
2187 (md_convert_frag): Jumps can now be larger than 2GB away, error
2188 out in that case.
2189 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2190 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2191
0a44bf69
RS
21922006-03-22 Richard Sandiford <richard@codesourcery.com>
2193 Daniel Jacobowitz <dan@codesourcery.com>
2194 Phil Edwards <phil@codesourcery.com>
2195 Zack Weinberg <zack@codesourcery.com>
2196 Mark Mitchell <mark@codesourcery.com>
2197 Nathan Sidwell <nathan@codesourcery.com>
2198
2199 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2200 (md_begin): Complain about -G being used for PIC. Don't change
2201 the text, data and bss alignments on VxWorks.
2202 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2203 generating VxWorks PIC.
2204 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2205 (macro): Likewise, but do not treat la $25 specially for
2206 VxWorks PIC, and do not handle jal.
2207 (OPTION_MVXWORKS_PIC): New macro.
2208 (md_longopts): Add -mvxworks-pic.
2209 (md_parse_option): Don't complain about using PIC and -G together here.
2210 Handle OPTION_MVXWORKS_PIC.
2211 (md_estimate_size_before_relax): Always use the first relaxation
2212 sequence on VxWorks.
2213 * config/tc-mips.h (VXWORKS_PIC): New.
2214
080eb7fe
PB
22152006-03-21 Paul Brook <paul@codesourcery.com>
2216
2217 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2218
03aaa593
BW
22192006-03-21 Sterling Augustine <sterling@tensilica.com>
2220
2221 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2222 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2223 (get_loop_align_size): New.
2224 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2225 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2226 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2227 (get_noop_aligned_address): Use get_loop_align_size.
2228 (get_aligned_diff): Likewise.
2229
3e94bf1a
PB
22302006-03-21 Paul Brook <paul@codesourcery.com>
2231
2232 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2233
dfa9f0d5
PB
22342006-03-20 Paul Brook <paul@codesourcery.com>
2235
2236 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2237 (do_t_branch): Encode branches inside IT blocks as unconditional.
2238 (do_t_cps): New function.
2239 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2240 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2241 (opcode_lookup): Allow conditional suffixes on all instructions in
2242 Thumb mode.
2243 (md_assemble): Advance condexec state before checking for errors.
2244 (insns): Use do_t_cps.
2245
6e1cb1a6
PB
22462006-03-20 Paul Brook <paul@codesourcery.com>
2247
2248 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2249 outputting the insn.
2250
0a966e2d
JBG
22512006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2252
2253 * config/tc-vax.c: Update copyright year.
2254 * config/tc-vax.h: Likewise.
2255
a49fcc17
JBG
22562006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2257
2258 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2259 make it static.
2260 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2261
f5208ef2
PB
22622006-03-17 Paul Brook <paul@codesourcery.com>
2263
2264 * config/tc-arm.c (insns): Add ldm and stm.
2265
cb4c78d6
BE
22662006-03-17 Ben Elliston <bje@au.ibm.com>
2267
2268 PR gas/2446
2269 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2270
c16d2bf0
PB
22712006-03-16 Paul Brook <paul@codesourcery.com>
2272
2273 * config/tc-arm.c (insns): Add "svc".
2274
80ca4e2c
BW
22752006-03-13 Bob Wilson <bob.wilson@acm.org>
2276
2277 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2278 flag and avoid double underscore prefixes.
2279
3a4a14e9
PB
22802006-03-10 Paul Brook <paul@codesourcery.com>
2281
2282 * config/tc-arm.c (md_begin): Handle EABIv5.
2283 (arm_eabis): Add EF_ARM_EABI_VER5.
2284 * doc/c-arm.texi: Document -meabi=5.
2285
518051dc
BE
22862006-03-10 Ben Elliston <bje@au.ibm.com>
2287
2288 * app.c (do_scrub_chars): Simplify string handling.
2289
00a97672
RS
22902006-03-07 Richard Sandiford <richard@codesourcery.com>
2291 Daniel Jacobowitz <dan@codesourcery.com>
2292 Zack Weinberg <zack@codesourcery.com>
2293 Nathan Sidwell <nathan@codesourcery.com>
2294 Paul Brook <paul@codesourcery.com>
2295 Ricardo Anguiano <anguiano@codesourcery.com>
2296 Phil Edwards <phil@codesourcery.com>
2297
2298 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2299 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2300 R_ARM_ABS12 reloc.
2301 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2302 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2303 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2304
b29757dc
BW
23052006-03-06 Bob Wilson <bob.wilson@acm.org>
2306
2307 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2308 even when using the text-section-literals option.
2309
0b2e31dc
NS
23102006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2311
2312 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2313 and cf.
2314 (m68k_ip): <case 'J'> Check we have some control regs.
2315 (md_parse_option): Allow raw arch switch.
2316 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2317 whether 68881 or cfloat was meant by -mfloat.
2318 (md_show_usage): Adjust extension display.
2319 (m68k_elf_final_processing): Adjust.
2320
df406460
NC
23212006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2322
2323 * config/tc-avr.c (avr_mod_hash_value): New function.
2324 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2325 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2326 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2327 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2328 of (int).
2329 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2330 fixups, abort otherwise.
df406460
NC
2331 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2332 tc_fix_adjustable): Define.
a70ae331 2333
53022e4a
JW
23342006-03-02 James E Wilson <wilson@specifix.com>
2335
2336 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2337 change the template, then clear md.slot[curr].end_of_insn_group.
2338
9f6f925e
JB
23392006-02-28 Jan Beulich <jbeulich@novell.com>
2340
2341 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2342
0e31b3e1
JB
23432006-02-28 Jan Beulich <jbeulich@novell.com>
2344
2345 PR/1070
2346 * macro.c (getstring): Don't treat parentheses special anymore.
2347 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2348 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2349 characters.
2350
10cd14b4
AM
23512006-02-28 Mat <mat@csail.mit.edu>
2352
2353 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2354
63752a75
JJ
23552006-02-27 Jakub Jelinek <jakub@redhat.com>
2356
2357 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2358 field.
2359 (CFI_signal_frame): Define.
2360 (cfi_pseudo_table): Add .cfi_signal_frame.
2361 (dot_cfi): Handle CFI_signal_frame.
2362 (output_cie): Handle cie->signal_frame.
2363 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2364 different. Copy signal_frame from FDE to newly created CIE.
2365 * doc/as.texinfo: Document .cfi_signal_frame.
2366
f7d9e5c3
CD
23672006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2368
2369 * doc/Makefile.am: Add html target.
2370 * doc/Makefile.in: Regenerate.
2371 * po/Make-in: Add html target.
2372
331d2d0d
L
23732006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2374
8502d882 2375 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2376 Instructions.
2377
8502d882 2378 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2379 (CpuUnknownFlags): Add CpuMNI.
2380
10156f83
DM
23812006-02-24 David S. Miller <davem@sunset.davemloft.net>
2382
2383 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2384 (hpriv_reg_table): New table for hyperprivileged registers.
2385 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2386 register encoding.
2387
6772dd07
DD
23882006-02-24 DJ Delorie <dj@redhat.com>
2389
2390 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2391 (tc_gen_reloc): Don't define.
2392 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2393 (OPTION_LINKRELAX): New.
2394 (md_longopts): Add it.
2395 (m32c_relax): New.
2396 (md_parse_options): Set it.
2397 (md_assemble): Emit relaxation relocs as needed.
2398 (md_convert_frag): Emit relaxation relocs as needed.
2399 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2400 (m32c_apply_fix): New.
2401 (tc_gen_reloc): New.
2402 (m32c_force_relocation): Force out jump relocs when relaxing.
2403 (m32c_fix_adjustable): Return false if relaxing.
2404
62b3e311
PB
24052006-02-24 Paul Brook <paul@codesourcery.com>
2406
2407 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2408 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2409 (struct asm_barrier_opt): Define.
2410 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2411 (parse_psr): Accept V7M psr names.
2412 (parse_barrier): New function.
2413 (enum operand_parse_code): Add OP_oBARRIER.
2414 (parse_operands): Implement OP_oBARRIER.
2415 (do_barrier): New function.
2416 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2417 (do_t_cpsi): Add V7M restrictions.
2418 (do_t_mrs, do_t_msr): Validate V7M variants.
2419 (md_assemble): Check for NULL variants.
2420 (v7m_psrs, barrier_opt_names): New tables.
2421 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2422 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2423 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2424 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2425 (struct cpu_arch_ver_table): Define.
2426 (cpu_arch_ver): New.
2427 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2428 Tag_CPU_arch_profile.
2429 * doc/c-arm.texi: Document new cpu and arch options.
2430
59cf82fe
L
24312006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2432
2433 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2434
19a7219f
L
24352006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2436
2437 * config/tc-ia64.c: Update copyright years.
2438
7f3dfb9c
L
24392006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2440
2441 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2442 SDM 2.2.
2443
f40d1643
PB
24442005-02-22 Paul Brook <paul@codesourcery.com>
2445
2446 * config/tc-arm.c (do_pld): Remove incorrect write to
2447 inst.instruction.
2448 (encode_thumb32_addr_mode): Use correct operand.
2449
216d22bc
PB
24502006-02-21 Paul Brook <paul@codesourcery.com>
2451
2452 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2453
d70c5fc7
NC
24542006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2455 Anil Paranjape <anilp1@kpitcummins.com>
2456 Shilin Shakti <shilins@kpitcummins.com>
2457
2458 * Makefile.am: Add xc16x related entry.
2459 * Makefile.in: Regenerate.
2460 * configure.in: Added xc16x related entry.
2461 * configure: Regenerate.
2462 * config/tc-xc16x.h: New file
2463 * config/tc-xc16x.c: New file
2464 * doc/c-xc16x.texi: New file for xc16x
2465 * doc/all.texi: Entry for xc16x
a70ae331 2466 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2467 * NEWS: Announce the support for the new target.
2468
aaa2ab3d
NH
24692006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2470
2471 * configure.tgt: set emulation for mips-*-netbsd*
2472
82de001f
JJ
24732006-02-14 Jakub Jelinek <jakub@redhat.com>
2474
2475 * config.in: Rebuilt.
2476
431ad2d0
BW
24772006-02-13 Bob Wilson <bob.wilson@acm.org>
2478
2479 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2480 from 1, not 0, in error messages.
2481 (md_assemble): Simplify special-case check for ENTRY instructions.
2482 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2483 operand in error message.
2484
94089a50
JM
24852006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2486
2487 * configure.tgt (arm-*-linux-gnueabi*): Change to
2488 arm-*-linux-*eabi*.
2489
52de4c06
NC
24902006-02-10 Nick Clifton <nickc@redhat.com>
2491
70e45ad9
NC
2492 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2493 32-bit value is propagated into the upper bits of a 64-bit long.
2494
52de4c06
NC
2495 * config/tc-arc.c (init_opcode_tables): Fix cast.
2496 (arc_extoper, md_operand): Likewise.
2497
21af2bbd
BW
24982006-02-09 David Heine <dlheine@tensilica.com>
2499
2500 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2501 each relaxation step.
2502
75a706fc 25032006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2504
75a706fc
L
2505 * configure.in (CHECK_DECLS): Add vsnprintf.
2506 * configure: Regenerate.
2507 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2508 include/declare here, but...
2509 * as.h: Move code detecting VARARGS idiom to the top.
2510 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2511 (vsnprintf): Declare if not already declared.
2512
0d474464
L
25132006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2514
2515 * as.c (close_output_file): New.
2516 (main): Register close_output_file with xatexit before
2517 dump_statistics. Don't call output_file_close.
2518
266abb8f
NS
25192006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2520
2521 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2522 mcf5329_control_regs): New.
2523 (not_current_architecture, selected_arch, selected_cpu): New.
2524 (m68k_archs, m68k_extensions): New.
2525 (archs): Renamed to ...
2526 (m68k_cpus): ... here. Adjust.
2527 (n_arches): Remove.
2528 (md_pseudo_table): Add arch and cpu directives.
2529 (find_cf_chip, m68k_ip): Adjust table scanning.
2530 (no_68851, no_68881): Remove.
2531 (md_assemble): Lazily initialize.
2532 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2533 (md_init_after_args): Move functionality to m68k_init_arch.
2534 (mri_chip): Adjust table scanning.
2535 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2536 options with saner parsing.
2537 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2538 m68k_init_arch): New.
2539 (s_m68k_cpu, s_m68k_arch): New.
2540 (md_show_usage): Adjust.
2541 (m68k_elf_final_processing): Set CF EF flags.
2542 * config/tc-m68k.h (m68k_init_after_args): Remove.
2543 (tc_init_after_args): Remove.
2544 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2545 (M68k-Directives): Document .arch and .cpu directives.
2546
134dcee5
AM
25472006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2548
a70ae331
AM
2549 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2550 synonyms for equ and defl.
134dcee5
AM
2551 (z80_cons_fix_new): New function.
2552 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2553 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2554 now handled as pseudo-op rather than an instruction.
2555 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2556 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2557 Add entries for def24,def32,d24,d32.
2558 (md_assemble): Improved error handling.
2559 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2560 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2561 (z80_cons_fix_new): Declare.
a70ae331 2562 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2563 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2564
a9931606
PB
25652006-02-02 Paul Brook <paul@codesourcery.com>
2566
2567 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2568
ef8d22e6
PB
25692005-02-02 Paul Brook <paul@codesourcery.com>
2570
2571 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2572 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2573 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2574 T2_OPCODE_RSB): Define.
2575 (thumb32_negate_data_op): New function.
2576 (md_apply_fix): Use it.
2577
e7da6241
BW
25782006-01-31 Bob Wilson <bob.wilson@acm.org>
2579
2580 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2581 fields.
2582 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2583 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2584 subtracted symbols.
2585 (relaxation_requirements): Add pfinish_frag argument and use it to
2586 replace setting tinsn->record_fix fields.
2587 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2588 and vinsn_to_insnbuf. Remove references to record_fix and
2589 slot_sub_symbols fields.
2590 (xtensa_mark_narrow_branches): Delete unused code.
2591 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2592 a symbol.
2593 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2594 record_fix fields.
2595 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2596 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2597 of the record_fix field. Simplify error messages for unexpected
2598 symbolic operands.
2599 (set_expr_symbol_offset_diff): Delete.
2600
79134647
PB
26012006-01-31 Paul Brook <paul@codesourcery.com>
2602
2603 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2604
e74cfd16
PB
26052006-01-31 Paul Brook <paul@codesourcery.com>
2606 Richard Earnshaw <rearnsha@arm.com>
2607
2608 * config/tc-arm.c: Use arm_feature_set.
2609 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2610 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2611 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2612 New variables.
2613 (insns): Use them.
2614 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2615 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2616 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2617 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2618 feature flags.
2619 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2620 (arm_opts): Move old cpu/arch options from here...
2621 (arm_legacy_opts): ... to here.
2622 (md_parse_option): Search arm_legacy_opts.
2623 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2624 (arm_float_abis, arm_eabis): Make const.
2625
d47d412e
BW
26262006-01-25 Bob Wilson <bob.wilson@acm.org>
2627
2628 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2629
b14273fe
JZ
26302006-01-21 Jie Zhang <jie.zhang@analog.com>
2631
2632 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2633 in load immediate intruction.
2634
39cd1c76
JZ
26352006-01-21 Jie Zhang <jie.zhang@analog.com>
2636
2637 * config/bfin-parse.y (value_match): Use correct conversion
2638 specifications in template string for __FILE__ and __LINE__.
2639 (binary): Ditto.
2640 (unary): Ditto.
2641
67a4f2b7
AO
26422006-01-18 Alexandre Oliva <aoliva@redhat.com>
2643
2644 Introduce TLS descriptors for i386 and x86_64.
2645 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2646 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2647 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2648 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2649 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2650 displacement bits.
2651 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2652 (lex_got): Handle @tlsdesc and @tlscall.
2653 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2654
8ad7c533
NC
26552006-01-11 Nick Clifton <nickc@redhat.com>
2656
2657 Fixes for building on 64-bit hosts:
2658 * config/tc-avr.c (mod_index): New union to allow conversion
2659 between pointers and integers.
2660 (md_begin, avr_ldi_expression): Use it.
2661 * config/tc-i370.c (md_assemble): Add cast for argument to print
2662 statement.
2663 * config/tc-tic54x.c (subsym_substitute): Likewise.
2664 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2665 opindex field of fr_cgen structure into a pointer so that it can
2666 be stored in a frag.
2667 * config/tc-mn10300.c (md_assemble): Likewise.
2668 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2669 types.
2670 * config/tc-v850.c: Replace uses of (int) casts with correct
2671 types.
2672
4dcb3903
L
26732006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2674
2675 PR gas/2117
2676 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2677
e0f6ea40
HPN
26782006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2679
2680 PR gas/2101
2681 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2682 a local-label reference.
2683
e88d958a 2684For older changes see ChangeLog-2005
08d56133
NC
2685\f
2686Local Variables:
2687mode: change-log
2688left-margin: 8
2689fill-column: 74
2690version-control: never
2691End:
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