Commit | Line | Data |
---|---|---|
173d3447 CF |
1 | 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
2 | ||
3 | * config/tc-mips.c (match_insn): Set error when $31 is used for | |
4 | bltzal* and bgezal*. | |
5 | ||
ac21e7da TG |
6 | 2013-09-04 Tristan Gingold <gingold@adacore.com> |
7 | ||
8 | * config/tc-ppc.c (md_apply_fix): Handle defined after use toc | |
9 | symbols. | |
10 | ||
74db7efb NC |
11 | 2013-09-04 Roland McGrath <mcgrathr@google.com> |
12 | ||
13 | PR gas/15914 | |
14 | * config/tc-arm.c (T16_32_TAB): Add _udf. | |
15 | (do_t_udf): New function. | |
16 | (insns): Add "udf". | |
17 | ||
664a88c6 DD |
18 | 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com> |
19 | ||
20 | * config/rx-parse.y: Rearrange the components of a bison grammar to issue | |
21 | assembler errors at correct position. | |
22 | ||
9aff4b7a NC |
23 | 2013-08-23 Yuri Chornoivan <yurchor@ukr.net> |
24 | ||
25 | PR binutils/15834 | |
26 | * config/tc-ia64.c: Fix typos. | |
27 | * config/tc-sparc.c: Likewise. | |
28 | * config/tc-z80.c: Likewise. | |
29 | * doc/c-i386.texi: Likewise. | |
30 | * doc/c-m32r.texi: Likewise. | |
31 | ||
4f2374c7 WN |
32 | 2013-08-23 Will Newton <will.newton@linaro.org> |
33 | ||
9aff4b7a | 34 | * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints |
4f2374c7 WN |
35 | for pre-indexed addressing modes. |
36 | ||
b4e6cb80 AM |
37 | 2013-08-21 Alan Modra <amodra@gmail.com> |
38 | ||
39 | * symbols.c (fb_label_instance_inc, fb_label_instance): Properly | |
40 | range check label number for use with fb_low_counter array. | |
41 | ||
1661c76c RS |
42 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
43 | ||
44 | * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup) | |
45 | (mips_parse_argument_token, validate_micromips_insn, md_begin) | |
46 | (check_regno, match_float_constant, check_completed_insn, append_insn) | |
47 | (match_insn, match_mips16_insn, match_insns, macro_start) | |
48 | (macro_build_ldst_constoffset, load_register, macro, mips_ip) | |
49 | (mips16_ip, mips_set_option_string, md_parse_option) | |
50 | (mips_after_parse_args, mips_after_parse_args, md_pcrel_from) | |
51 | (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive) | |
52 | (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag) | |
53 | (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu): | |
54 | Start error messages with a lower-case letter. Do not end error | |
55 | messages with a period. Wrap long messages to 80 character-lines. | |
56 | Use "cannot" instead of "can't" and "can not". | |
57 | ||
b0e6f033 RS |
58 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
59 | ||
60 | * config/tc-mips.c (imm_expr): Expand comment. | |
61 | (set_at, macro, mips16_macro): Expect imm_expr to be O_constant | |
62 | when populated. | |
63 | ||
e423441d RS |
64 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
65 | ||
66 | * config/tc-mips.c (imm2_expr): Delete. | |
67 | (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly. | |
68 | ||
5e0dc5ba RS |
69 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
70 | ||
71 | * config/tc-mips.c (report_bad_range, report_bad_field): Delete. | |
72 | (macro): Remove M_DEXT and M_DINS handling. | |
73 | ||
60f20e8b RS |
74 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
75 | ||
76 | * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and | |
77 | lax_max with lax_match. | |
78 | (match_int_operand): Update accordingly. Don't report an error | |
79 | for !lax_match-only cases. | |
80 | (match_insn): Replace more_alts with lax_match and use it to | |
81 | initialize the mips_arg_info field. Add a complete_p parameter. | |
82 | Handle implicit VU0 suffixes here. | |
83 | (match_invalid_for_isa, match_insns, match_mips16_insns): New | |
84 | functions. | |
85 | (mips_ip, mips16_ip): Use them. | |
86 | ||
d436c1c2 RS |
87 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
88 | ||
89 | * config/tc-mips.c (match_expression): Report uses of registers here. | |
90 | Add a "must be an immediate expression" error. Handle elided offsets | |
91 | here rather than... | |
92 | (match_int_operand): ...here. | |
93 | ||
1a00e612 RS |
94 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
95 | ||
96 | * config/tc-mips.c (mips_arg_info): Remove soft_match. | |
97 | (match_out_of_range, match_not_constant): New functions. | |
98 | (match_const_int): Remove fallback parameter and check for soft_match. | |
99 | Use match_not_constant. | |
100 | (match_mapped_int_operand, match_addiusp_operand) | |
101 | (match_perf_reg_operand, match_save_restore_list_operand) | |
102 | (match_mdmx_imm_reg_operand): Update accordingly. Use | |
103 | match_out_of_range and set_insn_error* instead of as_bad. | |
104 | (match_int_operand): Likewise. Use match_not_constant in the | |
105 | !allows_nonconst case. | |
106 | (match_float_constant): Report invalid float constants. | |
107 | (match_insn, match_mips16_insn): Remove soft_match code. Rely on | |
108 | match_float_constant to check for invalid constants. Fail the | |
109 | match if match_const_int or match_float_constant return false. | |
110 | (mips_ip): Update accordingly. | |
111 | (mips16_ip): Likewise. Undo null termination of instruction name | |
112 | once lookup is complete. | |
113 | ||
e3de51ce RS |
114 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
115 | ||
116 | * config/tc-mips.c (mips_insn_error_format): New enum. | |
117 | (mips_insn_error): New struct. | |
118 | (insn_error): Change to a mips_insn_error. | |
119 | (clear_insn_error, set_insn_error_format, set_insn_error) | |
120 | (set_insn_error_i, set_insn_error_ss, report_insn_error): New | |
121 | functions. | |
122 | (mips_parse_argument_token, md_assemble, match_insn) | |
123 | (match_mips16_insn): Use them instead of manipulating insn_error | |
124 | directly. | |
125 | (mips_ip, mips16_ip): Likewise. Simplify control flow. | |
126 | ||
97d87491 RS |
127 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
128 | ||
129 | * config/tc-mips.c (normalize_constant_expr): Move further up file. | |
130 | (normalize_address_expr): Likewise. | |
131 | (match_insn, match_mips16_insn): New functions, split out from... | |
132 | (mips_ip, mips16_ip): ...here. | |
133 | ||
0f35dbc4 RS |
134 | 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> |
135 | ||
136 | * config/tc-mips.c (operand_reg_mask, match_operand): Handle | |
137 | OP_OPTIONAL_REG. | |
138 | (mips_ip, mips16_ip): Use mips_optional_operand_p to check | |
139 | for optional operands. | |
140 | ||
27285eed AM |
141 | 2013-08-16 Alan Modra <amodra@gmail.com> |
142 | ||
143 | * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc | |
144 | modifiers generally. | |
145 | ||
cbe02d4f AM |
146 | 2013-08-16 Alan Modra <amodra@gmail.com> |
147 | ||
148 | * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1. | |
149 | ||
3c02c47f DE |
150 | 2013-08-14 David Edelsohn <dje.gcc@gmail.com> |
151 | ||
152 | * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm | |
153 | argument as alignment. | |
154 | ||
4046d87a NC |
155 | 2013-08-09 Nick Clifton <nickc@redhat.com> |
156 | ||
157 | * config/tc-rl78.c (elf_flags): New variable. | |
158 | (enum options): Add OPTION_G10. | |
159 | (md_longopts): Add mg10. | |
160 | (md_parse_option): Parse -mg10. | |
161 | (rl78_elf_final_processing): New function. | |
162 | * config/tc-rl78.c (tc_final_processing): Define. | |
163 | * doc/c-rl78.texi: Document -mg10 option. | |
164 | ||
ee5734f0 RS |
165 | 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de> |
166 | ||
167 | * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel | |
168 | suffixes to be elided too. | |
169 | (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here. | |
170 | (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N | |
171 | to be omitted too. | |
172 | ||
13896403 RS |
173 | 2013-08-05 John Tytgat <john@bass-software.com> |
174 | ||
175 | * po/POTFILES.in: Regenerate. | |
176 | ||
d6787ef9 EB |
177 | 2013-08-05 Eric Botcazou <ebotcazou@adacore.com> |
178 | Konrad Eisele <konrad@gaisler.com> | |
179 | ||
180 | * config/tc-sparc.c (sparc_arch_types): Add leon. | |
181 | (sparc_arch): Move sparc4 around and add leon. | |
182 | (sparc_target_format): Document -Aleon. | |
183 | * doc/c-sparc.texi: Likewise. | |
184 | ||
da8bca91 RS |
185 | 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com> |
186 | ||
187 | * config/tc-mips.c (mips_lookup_insn): Make length and opend signed. | |
188 | ||
14daeee3 RS |
189 | 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de> |
190 | Richard Sandiford <rdsandiford@googlemail.com> | |
191 | ||
192 | * config/tc-mips.c (MAX_OPERANDS): Bump to 6. | |
193 | (RWARN): Bump to 0x8000000. | |
194 | (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R) | |
195 | (RTYPE_R5900_ACC): New register types. | |
196 | (RTYPE_MASK): Include them. | |
197 | (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New | |
198 | macros. | |
199 | (reg_names): Include them. | |
200 | (mips_parse_register_1): New function, split out from... | |
201 | (mips_parse_register): ...here. Add a channels_ptr parameter. | |
202 | Look for VU0 channel suffixes when nonnull. | |
203 | (reg_lookup): Update the call to mips_parse_register. | |
204 | (mips_parse_vu0_channels): New function. | |
205 | (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types. | |
206 | (mips_operand_token): Add a "channels" field to the union. | |
207 | Extend the comment above "ch" to OT_DOUBLE_CHAR. | |
208 | (mips_parse_base_start): Match -- and ++. Handle channel suffixes. | |
209 | (mips_parse_argument_token): Handle channel suffixes here too. | |
210 | (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX. | |
211 | Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits. | |
212 | Handle '#' formats. | |
213 | (md_begin): Register $vfN and $vfI registers. | |
214 | (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX. | |
215 | (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I, | |
216 | OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC. | |
217 | (match_vu0_suffix_operand): New function. | |
218 | (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX. | |
219 | (macro): Use "+7" rather than "E" for LDQ2 and STQ2. | |
220 | (mips_lookup_insn): New function. | |
221 | (mips_ip): Use it. Allow "+K" operands to be elided at the end | |
222 | of an instruction. Handle '#' sequences. | |
223 | ||
c0ebe874 RS |
224 | 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com> |
225 | ||
226 | * config/tc-mips.c (macro, mips16_macro): Create an array of operand | |
227 | values and use it instead of sreg, treg, xreg, etc. | |
228 | ||
3ccad066 RS |
229 | 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com> |
230 | ||
231 | * config/tc-mips.c (match_int_operand): Use mips_int_operand_min | |
232 | and mips_int_operand_max. | |
233 | (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED): | |
234 | Delete. | |
235 | (mips16_immed_operand, mips16_immed_in_range_p): New functions. | |
236 | (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand | |
237 | instead of mips16_immed_operand. | |
238 | ||
0acfaea6 RS |
239 | 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com> |
240 | ||
241 | * config/tc-mips.c (mips16_macro): Don't use move_register. | |
242 | (mips16_ip): Allow macros to use 'p'. | |
243 | ||
fc76e730 RS |
244 | 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com> |
245 | ||
246 | * config/tc-mips.c (MAX_OPERANDS): New macro. | |
247 | (mips_operand_array): New structure. | |
248 | (mips_operands, mips16_operands, micromips_operands): New arrays. | |
249 | (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map) | |
250 | (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map) | |
251 | (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map) | |
252 | (micromips_to_32_reg_q_map): Delete. | |
253 | (insn_operands, insn_opno, insn_extract_operand): New functions. | |
254 | (validate_mips_insn): Take a mips_operand_array as argument and | |
255 | use it to build up a list of operands. Extend to handle INSN_MACRO | |
256 | and MIPS16. | |
257 | (validate_mips16_insn): New function. | |
258 | (validate_micromips_insn): Take a mips_operand_array as argument. | |
259 | Handle INSN_MACRO. | |
260 | (md_begin): Initialize mips_operands, mips16_operands and | |
261 | micromips_operands. Call validate_mips_insn and | |
262 | validate_micromips_insn for macro instructions too. | |
263 | Call validate_mips16_insn for MIPS16 instructions. | |
264 | (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask): | |
265 | New functions. | |
266 | (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use | |
267 | them. Handle INSN_UDI. | |
268 | (get_append_method): Use gpr_read_mask. | |
269 | ||
26545944 RS |
270 | 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com> |
271 | ||
272 | * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same | |
273 | flags for MIPS16 and non-MIPS16 instructions. | |
274 | (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block. | |
275 | (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too. | |
276 | (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling. | |
277 | (can_swap_branch_p, get_append_method): Use the same flags for MIPS16 | |
278 | and non-MIPS16 instructions. Fix formatting. | |
279 | ||
85fcb30f RS |
280 | 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com> |
281 | ||
282 | * config/tc-mips.c (reg_needs_delay): Move later in file. | |
283 | Use gpr_write_mask. | |
284 | (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND. | |
285 | ||
43234a1e L |
286 | 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com> |
287 | Alexander Ivchenko <alexander.ivchenko@intel.com> | |
288 | Maxim Kuznetsov <maxim.kuznetsov@intel.com> | |
289 | Sergey Lega <sergey.s.lega@intel.com> | |
290 | Anna Tikhonova <anna.tikhonova@intel.com> | |
291 | Ilya Tocar <ilya.tocar@intel.com> | |
292 | Andrey Turetskiy <andrey.turetskiy@intel.com> | |
293 | Ilya Verbin <ilya.verbin@intel.com> | |
294 | Kirill Yukhin <kirill.yukhin@intel.com> | |
295 | Michael Zolotukhin <michael.v.zolotukhin@intel.com> | |
296 | ||
297 | * config/tc-i386-intel.c (O_zmmword_ptr): New. | |
298 | (i386_types): Add zmmword. | |
299 | (i386_intel_simplify_register): Allow regzmm. | |
300 | (i386_intel_simplify): Handle zmmwords. | |
301 | (i386_intel_operand): Handle RC/SAE, vector operations and | |
302 | zmmwords. | |
303 | * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New. | |
304 | (struct RC_Operation): New. | |
305 | (struct Mask_Operation): New. | |
306 | (struct Broadcast_Operation): New. | |
307 | (vex_prefix): Size of bytes increased to 4 to support EVEX | |
308 | encoding. | |
309 | (enum i386_error): Add new error codes: unsupported_broadcast, | |
310 | broadcast_not_on_src_operand, broadcast_needed, | |
311 | unsupported_masking, mask_not_on_destination, no_default_mask, | |
312 | unsupported_rc_sae, rc_sae_operand_not_last_imm, | |
313 | invalid_register_operand, try_vector_disp8. | |
314 | (struct _i386_insn): Add new fields vrex, need_vrex, mask, | |
315 | rounding, broadcast, memshift. | |
316 | (struct RC_name): New. | |
317 | (RC_NamesTable): New. | |
318 | (evexlig): New. | |
319 | (evexwig): New. | |
320 | (extra_symbol_chars): Add '{'. | |
321 | (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF. | |
322 | (i386_operand_type): Add regzmm, regmask and vec_disp8. | |
323 | (match_mem_size): Handle zmmwords. | |
324 | (operand_type_match): Handle zmm-registers. | |
325 | (mode_from_disp_size): Handle vec_disp8. | |
326 | (fits_in_vec_disp8): New. | |
327 | (md_begin): Handle {} properly. | |
328 | (type_names): Add "rZMM", "Mask reg" and "Vector d8". | |
329 | (build_vex_prefix): Handle vrex. | |
330 | (build_evex_prefix): New. | |
331 | (process_immext): Adjust to properly handle EVEX. | |
332 | (md_assemble): Add EVEX encoding support. | |
333 | (swap_2_operands): Correctly handle operands with masking, | |
334 | broadcasting or RC/SAE. | |
335 | (check_VecOperands): Support EVEX features. | |
336 | (VEX_check_operands): Properly handle 16 upper [xyz]mm registers. | |
337 | (match_template): Support regzmm and handle new error codes. | |
338 | (process_suffix): Handle zmmwords and zmm-registers. | |
339 | (check_byte_reg): Extend to zmm-registers. | |
340 | (process_operands): Extend to zmm-registers. | |
341 | (build_modrm_byte): Handle EVEX. | |
342 | (output_insn): Adjust to properly handle EVEX case. | |
343 | (disp_size): Handle vec_disp8. | |
344 | (output_disp): Support compressed disp8*N evex feature. | |
345 | (output_imm): Handle RC/SAE immediates properly. | |
346 | (check_VecOperations): New. | |
347 | (i386_immediate): Handle EVEX features. | |
348 | (i386_index_check): Handle zmmwords and zmm-registers. | |
349 | (RC_SAE_immediate): New. | |
350 | (i386_att_operand): Handle EVEX features. | |
351 | (parse_real_register): Add a check for ZMM/Mask registers. | |
352 | (OPTION_MEVEXLIG): New. | |
353 | (OPTION_MEVEXWIG): New. | |
354 | (md_longopts): Add mevexlig and mevexwig. | |
355 | (md_parse_option): Handle mevexlig and mevexwig options. | |
356 | (md_show_usage): Add description for mevexlig and mevexwig. | |
357 | * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd, | |
358 | avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig. | |
359 | ||
a0046408 L |
360 | 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com> |
361 | ||
362 | * config/tc-i386.c (cpu_arch): Add .sha. | |
363 | * doc/c-i386.texi: Document sha/.sha. | |
364 | ||
7e8b059b L |
365 | 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com> |
366 | Kirill Yukhin <kirill.yukhin@intel.com> | |
367 | Michael Zolotukhin <michael.v.zolotukhin@intel.com> | |
368 | ||
369 | * config/tc-i386.c (BND_PREFIX): New. | |
370 | (struct _i386_insn): Add new field bnd_prefix. | |
371 | (add_bnd_prefix): New. | |
372 | (cpu_arch): Add MPX. | |
373 | (i386_operand_type): Add regbnd. | |
374 | (md_assemble): Handle BND prefixes. | |
375 | (parse_insn): Likewise. | |
376 | (output_branch): Likewise. | |
377 | (output_jump): Likewise. | |
378 | (build_modrm_byte): Handle regbnd. | |
379 | (OPTION_MADD_BND_PREFIX): New. | |
380 | (md_longopts): Add entry for 'madd-bnd-prefix'. | |
381 | (md_parse_option): Handle madd-bnd-prefix option. | |
382 | (md_show_usage): Add description for madd-bnd-prefix | |
383 | option. | |
384 | * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix. | |
385 | ||
7fa9fcb6 TG |
386 | 2013-07-24 Tristan Gingold <gingold@adacore.com> |
387 | ||
388 | * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on | |
389 | xcoff targets. | |
390 | ||
614eb277 AK |
391 | 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
392 | ||
393 | * config/tc-s390.c (s390_machine): Don't force the .machine | |
394 | argument to lower case. | |
395 | ||
e673710a KT |
396 | 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
397 | ||
398 | * config/tc-arm.c (s_arm_arch_extension): Improve error message | |
399 | for invalid extension. | |
400 | ||
69091a2c YZ |
401 | 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com> |
402 | ||
403 | * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag. | |
404 | (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators. | |
405 | (aarch64_abi): New variable. | |
406 | (ilp32_p): Change to be a macro. | |
407 | (aarch64_opts): Remove the support for option -milp32 and -mlp64. | |
408 | (struct aarch64_option_abi_value_table): New struct. | |
409 | (aarch64_abis): New table. | |
410 | (aarch64_parse_abi): New function. | |
411 | (aarch64_long_opts): Add entry for -mabi=. | |
412 | * doc/as.texinfo (Target AArch64 options): Document -mabi. | |
413 | * doc/c-aarch64.texi: Likewise. | |
414 | ||
faf786e6 NC |
415 | 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu> |
416 | ||
417 | * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs | |
418 | unsigned comparison. | |
419 | ||
f0c00282 NC |
420 | 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com> |
421 | ||
cbe02d4f | 422 | * config/rx-defs.h: Add macros for RX100, RX200, RX600, and |
f0c00282 | 423 | RX610. |
cbe02d4f | 424 | * config/rx-parse.y: (rx_check_float_support): Add function to |
f0c00282 NC |
425 | check floating point operation support for target RX100 and |
426 | RX200. | |
cbe02d4f AM |
427 | * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610. |
428 | * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100, | |
429 | RX200, RX600, and RX610 | |
f0c00282 | 430 | |
8c997c27 NC |
431 | 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
432 | ||
433 | * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text | |
434 | ||
8be59acb NC |
435 | 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com> |
436 | ||
437 | * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4. | |
438 | * doc/c-avr.texi: Likewise. | |
439 | ||
4a06e5a2 RS |
440 | 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com> |
441 | ||
442 | * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat | |
443 | error with older GCCs. | |
444 | (mips16_macro_build): Dereference args. | |
445 | ||
a92713e6 RS |
446 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
447 | ||
448 | * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register): | |
449 | New functions, split out from... | |
450 | (reg_lookup): ...here. Remove itbl support. | |
451 | (reglist_lookup): Delete. | |
452 | (mips_operand_token_type): New enum. | |
453 | (mips_operand_token): New structure. | |
454 | (mips_operand_tokens): New variable. | |
455 | (mips_add_token, mips_parse_base_start, mips_parse_argument_token) | |
456 | (mips_parse_arguments): New functions. | |
457 | (md_begin): Initialize mips_operand_tokens. | |
458 | (mips_arg_info): Add a token field. Remove optional_reg field. | |
459 | (match_char, match_expression): New functions. | |
460 | (match_const_int): Use match_expression. Remove "s" argument | |
461 | and return a boolean result. Remove O_register handling. | |
462 | (match_regno, match_reg, match_reg_range): New functions. | |
463 | (match_int_operand, match_mapped_int_operand, match_msb_operand) | |
464 | (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand) | |
465 | (match_addiusp_operand, match_clo_clz_dest_operand) | |
466 | (match_lwm_swm_list_operand, match_entry_exit_operand) | |
467 | (match_save_restore_list_operand, match_mdmx_imm_reg_operand) | |
468 | (match_tied_reg_operand): Remove "s" argument and return a boolean | |
469 | result. Match tokens rather than text. Update calls to | |
470 | match_const_int. Rely on match_regno to call check_regno. | |
471 | (match_pcrel_operand, match_pc_operand): Replace "s" argument with | |
472 | "arg" argument. Return a boolean result. | |
473 | (parse_float_constant): Replace with... | |
474 | (match_float_constant): ...this new function. | |
475 | (match_operand): Remove "s" argument and return a boolean result. | |
476 | Update calls to subfunctions. | |
477 | (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines | |
478 | rather than string-parsing routines. Update handling of optional | |
479 | registers for token scheme. | |
480 | ||
89565f1b RS |
481 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
482 | ||
483 | * config/tc-mips.c (parse_float_constant): Split out from... | |
484 | (mips_ip): ...here. | |
485 | ||
3c14a432 RS |
486 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
487 | ||
488 | * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND): | |
489 | Delete. | |
490 | ||
364215c8 RS |
491 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
492 | ||
493 | * config/tc-mips.c (mips32_to_16_reg_map): Delete. | |
494 | (match_entry_exit_operand): New function. | |
495 | (match_save_restore_list_operand): Likewise. | |
496 | (match_operand): Use them. | |
497 | (check_absolute_expr): Delete. | |
498 | (mips16_ip): Rewrite main parsing loop to use mips_operands. | |
499 | ||
9e12b7a2 RS |
500 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
501 | ||
502 | * config/tc-mips.c: Enable functions commented out in previous patch. | |
503 | (SKIP_SPACE_TABS): Move further up file. | |
504 | (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map) | |
505 | (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map) | |
506 | (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map) | |
507 | (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map) | |
508 | (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map) | |
509 | (micromips_imm_b_map, micromips_imm_c_map): Delete. | |
510 | (mips_lookup_reg_pair): Delete. | |
511 | (macro): Use report_bad_range and report_bad_field. | |
512 | (mips_immed, expr_const_in_range): Delete. | |
513 | (mips_ip): Rewrite main parsing loop to use new functions. | |
514 | ||
a1d78564 RS |
515 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
516 | ||
517 | * config/tc-mips.c (mips_oddfpreg_ok): Move further up file. | |
518 | Change return type to bfd_boolean. | |
519 | (report_bad_range, report_bad_field): New functions. | |
520 | (mips_arg_info): New structure. | |
521 | (match_const_int, convert_reg_type, check_regno, match_int_operand) | |
522 | (match_mapped_int_operand, match_msb_operand, match_reg_operand) | |
523 | (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand) | |
524 | (match_addiusp_operand, match_clo_clz_dest_operand) | |
525 | (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand) | |
526 | (match_pc_operand, match_tied_reg_operand, match_operand) | |
527 | (check_completed_insn): New functions, commented out for now. | |
528 | ||
e077a1c8 RS |
529 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
530 | ||
531 | * config/tc-mips.c (insn_insert_operand): New function. | |
532 | (macro_build, mips16_macro_build): Put null character check | |
533 | in the for loop and convert continues to breaks. Use operand | |
534 | structures to handle constant operands. | |
535 | ||
ab902481 RS |
536 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
537 | ||
538 | * config/tc-mips.c (validate_mips_insn): Move further up file. | |
539 | Add insn_bits and decode_operand arguments. Use the mips_operand | |
540 | fields to work out which bits an operand occupies. Detect double | |
541 | definitions. | |
542 | (validate_micromips_insn): Move further up file. Call into | |
543 | validate_mips_insn. | |
544 | ||
2f8b73cc RS |
545 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
546 | ||
547 | * config/tc-mips.c (mips16_macro_build): Remove 'Y' case. | |
548 | ||
c8276761 RS |
549 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
550 | ||
551 | * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\" | |
552 | and "~". | |
553 | (macro): Update accordingly. | |
554 | ||
77bd4346 RS |
555 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
556 | ||
557 | * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary. | |
558 | (imm_reloc): Delete. | |
559 | (md_assemble): Remove imm_reloc handling. | |
560 | (mips_ip): Update commentary. Use offset_expr and offset_reloc | |
561 | rather than imm_expr and imm_reloc for 'i', 'j' and 'u'. | |
562 | Use a temporary array rather than imm_reloc when parsing | |
563 | constant expressions. Remove imm_reloc initialization. | |
564 | (mips16_ip): Update commentary. Use offset_expr and offset_reloc | |
565 | for the relaxable field. Use a relax_char variable to track the | |
566 | type of this field. Remove imm_reloc initialization. | |
567 | ||
cc537e56 RS |
568 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
569 | ||
570 | * config/tc-mips.c (mips16_ip): Handle "I". | |
571 | ||
ba92f887 MR |
572 | 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com> |
573 | ||
574 | * config/tc-mips.c (mips_flag_nan2008): New variable. | |
575 | (options): Add OPTION_NAN enum value. | |
576 | (md_longopts): Handle it. | |
577 | (md_parse_option): Likewise. | |
578 | (s_nan): New function. | |
579 | (mips_elf_final_processing): Handle EF_MIPS_NAN2008. | |
580 | (md_show_usage): Add -mnan. | |
581 | ||
582 | * doc/as.texinfo (Overview): Add -mnan. | |
583 | * doc/c-mips.texi (MIPS Opts): Document -mnan. | |
584 | (MIPS NaN Encodings): New node. Document .nan directive. | |
585 | (MIPS-Dependent): List the new node. | |
586 | ||
c1094734 TG |
587 | 2013-07-09 Tristan Gingold <gingold@adacore.com> |
588 | ||
589 | * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H | |
590 | ||
0cbbe1b8 RS |
591 | 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com> |
592 | ||
593 | * config/tc-mips.c (mips_ip): Unconditionally parse an expression | |
594 | for 'A' and assume that the constant has been elided if the result | |
595 | is an O_register. | |
596 | ||
f2ae14a1 RS |
597 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
598 | ||
599 | * config/tc-mips.c (gprel16_reloc_p): New function. | |
600 | (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are | |
601 | BFD_RELOC_UNUSED. | |
602 | (offset_high_part, small_offset_p): New functions. | |
603 | (nacro): Use them. Remove *_OB and *_DOB cases. For single- | |
604 | register load and store macros, handle the 16-bit offset case first. | |
605 | If a 16-bit offset is not suitable for the instruction we're | |
606 | generating, load it into the temporary register using | |
607 | ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the | |
608 | M_L_DAB code once the address has been constructed. For double load | |
609 | and store macros, again handle the 16-bit offset case first. | |
610 | If the second register cannot be accessed from the same high | |
611 | part as the first, load it into AT using ADDRESS_ADDI_INSN. | |
612 | Fix the handling of LD in cases where the first register is the | |
613 | same as the base. Also handle the case where the offset is | |
614 | not 16 bits and the second register cannot be accessed from the | |
615 | same high part as the first. For unaligned loads and stores, | |
616 | fuse the offbits == 12 and old "ab" handling. Apply this handling | |
617 | whenever the second offset needs a different high part from the first. | |
618 | Construct the offset using ADDRESS_ADDI_INSN where possible, | |
619 | for offbits == 16 as well as offbits == 12. Use offset_reloc | |
620 | when constructing the individual loads and stores. | |
621 | (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc | |
622 | and offset_reloc before matching against a particular opcode. | |
623 | Handle elided 'A' constants. Allow 'A' constants to use | |
624 | relocation operators. | |
625 | ||
5c324c16 RS |
626 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
627 | ||
628 | * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling. | |
629 | (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions. | |
630 | Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions. | |
631 | ||
23e69e47 RS |
632 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
633 | ||
634 | * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p". | |
635 | Require the msb to be <= 31 for "+s". Check that the size is <= 31 | |
636 | for both "+s" and "+S". | |
637 | ||
27c5c572 RS |
638 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
639 | ||
640 | * config/tc-mips.c (validate_mips_insn, validate_micromips_insn): | |
641 | (mips_ip, mips16_ip): Handle "+i". | |
642 | ||
e76ff5ab RS |
643 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
644 | ||
645 | * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete. | |
646 | (micromips_to_32_reg_h_map): Rename to... | |
647 | (micromips_to_32_reg_h_map1): ...this. | |
648 | (micromips_to_32_reg_i_map): Rename to... | |
649 | (micromips_to_32_reg_h_map2): ...this. | |
650 | (mips_lookup_reg_pair): New function. | |
651 | (gpr_write_mask, macro): Adjust after above renaming. | |
652 | (validate_micromips_insn): Remove "mi" handling. | |
653 | (mips_ip): Likewise. Parse both registers in a pair for "mh". | |
654 | ||
fa7616a4 RS |
655 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
656 | ||
657 | * config/tc-mips.c (validate_mips_insn, validate_micromips_insn) | |
658 | (mips_ip): Remove "+D" and "+T" handling. | |
659 | ||
fb798c50 AK |
660 | 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
661 | ||
662 | * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new | |
663 | relocs. | |
664 | ||
2c0a3565 MS |
665 | 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com> |
666 | ||
4aa2c5e2 MS |
667 | * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got. |
668 | ||
669 | 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com> | |
670 | ||
2c0a3565 MS |
671 | * config/tc-aarch64.c (md_apply_fix): Reorder case values. |
672 | (aarch64_force_relocation): Likewise. | |
673 | ||
f40da81b AM |
674 | 2013-07-02 Alan Modra <amodra@gmail.com> |
675 | ||
676 | * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak. | |
677 | ||
81566a9b MR |
678 | 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com> |
679 | ||
680 | * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names. | |
681 | * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names. | |
682 | Replace @sc{mips16} with literal `MIPS16'. | |
683 | (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'. | |
684 | ||
a6bb11b2 YZ |
685 | 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com> |
686 | ||
687 | * config/tc-aarch64.c (reloc_table): Replace | |
688 | BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with | |
689 | BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to | |
690 | BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and | |
691 | BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. | |
692 | (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, | |
693 | BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, | |
694 | BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, | |
695 | BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, | |
696 | BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and | |
697 | BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. | |
698 | (aarch64_force_relocation): Likewise. | |
699 | ||
cec5225b YZ |
700 | 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com> |
701 | ||
702 | * config/tc-aarch64.c (ilp32_p): New static variable. | |
703 | (elf64_aarch64_target_format): Return the target according to the | |
704 | value of 'ilp32_p'. | |
705 | (md_begin): Determine 'mach' according to the value of 'ilp32_p'. | |
706 | (aarch64_opts): Add support for options '-milp32' and '-mlp64'. | |
707 | (aarch64_dwarf2_addr_size): New function. | |
708 | * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. | |
709 | (DWARF2_ADDR_SIZE): New define. | |
710 | ||
e335d9cb RS |
711 | 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com> |
712 | ||
713 | * doc/c-mips.texi: Use ISA instead of @sc{isa}. | |
714 | ||
18870af7 RS |
715 | 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com> |
716 | ||
717 | * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT. | |
718 | ||
833794fc MR |
719 | 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com> |
720 | ||
721 | * config/tc-mips.c (mips_set_options): Add insn32 member. | |
722 | (mips_opts): Initialize it. | |
723 | (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode. | |
724 | (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values. | |
725 | (md_longopts): Add "minsn32" and "mno-insn32" options. | |
726 | (is_size_valid): Handle insn32 mode. | |
727 | (md_assemble): Pass instruction string down to macro. | |
728 | (brk_fmt): Add second dimension and insn32 mode initializers. | |
729 | (mfhl_fmt): Likewise. | |
730 | (BRK_FMT, MFHL_FMT): Handle insn32 mode. | |
731 | (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding. | |
732 | (macro_build_jalr, move_register): Handle insn32 mode. | |
733 | (macro_build_branch_rs): Likewise. | |
734 | (macro): Handle insn32 mode. | |
735 | <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases. | |
736 | (mips_ip): Handle insn32 mode. | |
737 | (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32. | |
738 | (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops. | |
739 | (mips_handle_align): Handle insn32 mode. | |
740 | (md_show_usage): Add -minsn32 and -mno-insn32. | |
741 | ||
742 | * doc/as.texinfo (Target MIPS options): Add -minsn32 and | |
743 | -mno-insn32 options. | |
744 | (-minsn32, -mno-insn32): New options. | |
745 | * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32 | |
746 | options. | |
747 | (MIPS assembly options): New node. Document .set insn32 and | |
748 | .set noinsn32. | |
749 | (MIPS-Dependent): List the new node. | |
750 | ||
d1706f38 NC |
751 | 2013-06-25 Nick Clifton <nickc@redhat.com> |
752 | ||
753 | * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of | |
754 | the PC in indirect addressing on 430xv2 parts. | |
755 | (msp430_operands): Add version test to hardware bug encoding | |
756 | restrictions. | |
757 | ||
477330fc RM |
758 | 2013-06-24 Roland McGrath <mcgrathr@google.com> |
759 | ||
d996d970 RM |
760 | * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}', |
761 | so it skips whitespace before it. | |
762 | (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise. | |
763 | ||
477330fc RM |
764 | * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'. |
765 | (arm_reg_parse_multi): Skip whitespace first. | |
766 | (parse_reg_list): Likewise. | |
767 | (parse_vfp_reg_list): Likewise. | |
768 | (s_arm_unwind_save_mmxwcg): Likewise. | |
769 | ||
24382199 NC |
770 | 2013-06-24 Nick Clifton <nickc@redhat.com> |
771 | ||
772 | PR gas/15623 | |
773 | * config/tc-arm.c (do_t_smc): Mark as ending an IT block. | |
774 | ||
c3678916 RS |
775 | 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> |
776 | ||
777 | * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments. | |
778 | ||
42429eac RS |
779 | 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> |
780 | ||
781 | * config/tc-mips.c: Assert that offsetT and valueT are at least | |
782 | 8 bytes in size. | |
783 | (GPR_SMIN, GPR_SMAX): New macros. | |
784 | (macro, mips_ip): Remove code for 4-byte valueT and offsetT. | |
785 | ||
f3ded42a RS |
786 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
787 | ||
788 | * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF | |
789 | conditions. Remove any code deselected by them. | |
790 | (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first. | |
791 | ||
e8044f35 RS |
792 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
793 | ||
794 | * NEWS: Note removal of ECOFF support. | |
795 | * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF. | |
796 | * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h. | |
797 | (MULTI_CFILES): Remove config/e-mipsecoff.c. | |
798 | * Makefile.in: Regenerate. | |
799 | * configure.in: Remove MIPS ECOFF references. | |
800 | (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff): | |
801 | Delete cases. | |
802 | (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*) | |
803 | (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into... | |
804 | (mips-*-*): ...this single case. | |
805 | (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect | |
806 | MIPS emulations to be e-mipself*. | |
807 | * configure: Regenerate. | |
808 | * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*) | |
809 | (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*) | |
810 | (mips-*-sysv*): Remove coff and ecoff cases. | |
811 | * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove. | |
812 | * ecoff.c: Remove reference to MIPS ECOFF. | |
813 | * config/e-mipsecoff.c, config/te-lnews.h: Delete files. | |
814 | * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete. | |
815 | (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases. | |
816 | (mips_hi_fixup): Tweak comment. | |
817 | (append_insn): Require a howto. | |
818 | (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code. | |
819 | ||
98508b2a RS |
820 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
821 | ||
822 | * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout. | |
823 | Use "CPU" instead of "cpu". | |
824 | * doc/c-mips.texi: Likewise. | |
825 | (MIPS Opts): Rename to MIPS Options. | |
826 | (MIPS option stack): Rename to MIPS Option Stack. | |
827 | (MIPS ASE instruction generation overrides): Rename to | |
828 | MIPS ASE Instruction Generation Overrides (for now). | |
829 | (MIPS floating-point): Rename to MIPS Floating-Point. | |
830 | ||
fc16f8cc RS |
831 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
832 | ||
833 | * doc/c-mips.texi (MIPS Macros): New section. | |
834 | (MIPS Object): Replace with... | |
835 | (MIPS Small Data): ...this new section. | |
836 | ||
5a7560b5 RS |
837 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
838 | ||
839 | * doc/c-mips.texi (MIPS symbol sizes): Move section further up file. | |
840 | Capitalize name. Use @kindex instead of @cindex for .set entries. | |
841 | ||
a1b86ab7 RS |
842 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
843 | ||
844 | * doc/c-mips.texi (MIPS Stabs): Remove section. | |
845 | ||
c6278170 RS |
846 | 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com> |
847 | ||
848 | * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE) | |
849 | (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE) | |
850 | (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE) | |
851 | (ISA_SUPPORTS_VIRT64_ASE): Delete. | |
852 | (mips_ase): New structure. | |
853 | (mips_ases): New table. | |
854 | (FP64_ASES): New macro. | |
855 | (mips_ase_groups): New array. | |
856 | (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase) | |
857 | (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New | |
858 | functions. | |
859 | (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags. | |
860 | (md_parse_option): Use mips_ases and mips_set_ase instead of | |
861 | separate case statements for each ASE option. | |
862 | (mips_after_parse_args): Use FP64_ASES. Use | |
863 | mips_check_isa_supports_ases to check the ASEs against | |
864 | other options. | |
865 | (s_mipsset): Use mips_ases and mips_set_ase instead of | |
866 | separate if statements for each ASE option. Use | |
867 | mips_check_isa_supports_ases, even when a non-ASE option | |
868 | is specified. | |
869 | ||
63a4bc21 KT |
870 | 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com> |
871 | ||
872 | * config/tc-arm.c (arm_cpus): Add support for Cortex-A12. | |
873 | ||
c31f3936 RS |
874 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
875 | ||
876 | * config/tc-mips.c (md_shortopts, options, md_longopts) | |
877 | (md_longopts_size): Move earlier in file. | |
878 | ||
846ef2d0 RS |
879 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
880 | ||
881 | * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields | |
882 | with a single "ase" bitmask. | |
883 | (mips_opts): Update accordingly. | |
884 | (file_ase, file_ase_explicit): New variables. | |
885 | (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp) | |
886 | (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete. | |
887 | (ISA_HAS_ROR): Adjust for mips_set_options change. | |
888 | (is_opcode_valid): Take the base ase mask directly from mips_opts. | |
889 | (mips_ip): Adjust for mips_set_options change. | |
890 | (md_parse_option): Likewise. Update file_ase_explicit. | |
891 | (mips_after_parse_args): Adjust for mips_set_options change. | |
892 | Use bitmask operations to select the default ASEs. Set file_ase | |
893 | rather than individual per-ASE variables. | |
894 | (s_mipsset): Adjust for mips_set_options change. | |
895 | (mips_elf_final_processing): Test file_ase rather than | |
896 | file_ase_mdmx. Remove commented-out code. | |
897 | ||
d16afab6 RS |
898 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
899 | ||
900 | * config/tc-mips.c (mips_cpu_info): Add an "ase" field. | |
901 | (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT) | |
902 | (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2) | |
903 | (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete. | |
904 | (mips_after_parse_args): Use the new "ase" field to choose | |
905 | the default ASEs. | |
906 | (mips_cpu_info_table): Move ASEs from the "flags" field to the | |
907 | "ase" field. | |
908 | ||
e83a675f RE |
909 | 2013-06-18 Richard Earnshaw <rearnsha@arm.com> |
910 | ||
911 | * config/tc-arm.c (symbol_preemptible): New function. | |
912 | (relax_branch): Use it. | |
913 | ||
7f3c4072 CM |
914 | 2013-06-17 Catherine Moore <clm@codesourcery.com> |
915 | Maciej W. Rozycki <macro@codesourcery.com> | |
916 | Chao-Ying Fu <fu@mips.com> | |
917 | ||
918 | * config/tc-mips.c (mips_set_options): Add ase_eva. | |
919 | (mips_set_options mips_opts): Add ase_eva. | |
920 | (file_ase_eva): Declare. | |
921 | (ISA_SUPPORTS_EVA_ASE): Define. | |
922 | (IS_SEXT_9BIT_NUM): Define. | |
923 | (MIPS_CPU_ASE_EVA): Define. | |
924 | (is_opcode_valid): Add support for ase_eva. | |
925 | (macro_build): Likewise. | |
926 | (macro): Likewise. | |
927 | (validate_mips_insn): Likewise. | |
928 | (validate_micromips_insn): Likewise. | |
929 | (mips_ip): Likewise. | |
930 | (options): Add OPTION_EVA and OPTION_NO_EVA. | |
931 | (md_longopts): Add -meva and -mno-eva. | |
932 | (md_parse_option): Process new options. | |
933 | (mips_after_parse_args): Check for valid EVA combinations. | |
934 | (s_mipsset): Likewise. | |
935 | ||
e410add4 RS |
936 | 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
937 | ||
938 | * dwarf2dbg.h (dwarf2_move_insn): Declare. | |
939 | * dwarf2dbg.c (line_subseg): Add pmove_tail. | |
940 | (get_line_subseg): Add create_p argument. Initialize pmove_tail. | |
941 | (dwarf2_gen_line_info_1): Update call accordingly. | |
942 | (dwarf2_move_insn): New function. | |
943 | * config/tc-mips.c (append_insn): Use dwarf2_move_insn. | |
944 | ||
6a50d470 RS |
945 | 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
946 | ||
947 | Revert: | |
948 | ||
949 | 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com> | |
950 | ||
951 | PR gas/13024 | |
952 | * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables. | |
953 | (dwarf2_gen_line_info_1): Delete. | |
954 | (dwarf2_push_line, dwarf2_flush_pending_lines): New functions. | |
955 | (dwarf2_gen_line_info, dwarf2_emit_label): Use them. | |
956 | (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines. | |
957 | (dwarf2_directive_loc): Push previous .locs instead of generating | |
958 | them immediately. | |
959 | ||
f122319e CF |
960 | 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
961 | ||
962 | * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips. | |
963 | (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips. | |
964 | ||
909c7f9c NC |
965 | 2013-06-13 Nick Clifton <nickc@redhat.com> |
966 | ||
967 | PR gas/15602 | |
968 | * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define. | |
969 | * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New | |
970 | function. Generates an error if the adjusted offset is out of a | |
971 | 16-bit range. | |
972 | ||
5d5755a7 SL |
973 | 2013-06-12 Sandra Loosemore <sandra@codesourcery.com> |
974 | ||
975 | * config/tc-nios2.c (md_apply_fix): Mask constant | |
976 | BFD_RELOC_NIOS2_HIADJ16 value to 16 bits. | |
977 | ||
3bf0dbfb MR |
978 | 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com> |
979 | ||
980 | * config/tc-mips.c (append_insn): Don't do branch relaxation for | |
981 | MIPS-3D instructions either. | |
982 | (md_convert_frag): Update the COPx branch mask accordingly. | |
983 | ||
984 | * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch | |
985 | option. | |
986 | * doc/as.texinfo (Overview): Add --relax-branch and | |
987 | --no-relax-branch. | |
988 | * doc/c-mips.texi (MIPS Opts): Document --relax-branch and | |
989 | --no-relax-branch. | |
990 | ||
9daf7bab SL |
991 | 2013-06-09 Sandra Loosemore <sandra@codesourcery.com> |
992 | ||
993 | * config/tc-nios2.c (nios2_parse_args): Allow trap argument to | |
994 | omitted. | |
995 | ||
d301a56b RS |
996 | 2013-06-08 Catherine Moore <clm@codesourcery.com> |
997 | ||
998 | * config/tc-mips.c (is_opcode_valid): Build ASE mask. | |
999 | (is_opcode_valid_16): Pass ase value to opcode_is_member. | |
1000 | (append_insn): Change INSN_xxxx to ASE_xxxx. | |
1001 | ||
7bab7634 DC |
1002 | 2013-06-01 George Thomas <george.thomas@atmel.com> |
1003 | ||
cbe02d4f | 1004 | * gas/config/tc-avr.c: Change ISA for devices with USB support to |
7bab7634 DC |
1005 | AVR_ISA_XMEGAU |
1006 | ||
f60cf82f L |
1007 | 2013-05-31 H.J. Lu <hongjiu.lu@intel.com> |
1008 | ||
1009 | * config/tc-i386.c (md_begin): Don't align text/data/bss sections | |
1010 | for ELF. | |
1011 | ||
a3f278e2 CM |
1012 | 2013-05-31 Paul Brook <paul@codesourcery.com> |
1013 | ||
a3f278e2 CM |
1014 | * config/tc-mips.c (s_ehword): New. |
1015 | ||
067ec077 CM |
1016 | 2013-05-30 Paul Brook <paul@codesourcery.com> |
1017 | ||
1018 | * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH. | |
1019 | ||
d6101ac2 MR |
1020 | 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com> |
1021 | ||
1022 | * write.c (resolve_reloc_expr_symbols): On REL targets don't | |
1023 | convert relocs who have no relocatable field either. Rephrase | |
1024 | the conditional so that the PC-relative check is only applied | |
1025 | for REL targets. | |
1026 | ||
f19ccbda MR |
1027 | 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
1028 | ||
1029 | * config/tc-mips.c (macro) <ld>: Don't use $zero for address | |
1030 | calculation. | |
1031 | ||
418009c2 YZ |
1032 | 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com> |
1033 | ||
1034 | * config/tc-aarch64.c (reloc_table): Update to use | |
477330fc | 1035 | BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of |
418009c2 YZ |
1036 | BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE. |
1037 | (md_apply_fix): Likewise. | |
1038 | (aarch64_force_relocation): Likewise. | |
1039 | ||
0a8897c7 KT |
1040 | 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
1041 | ||
1042 | * config/tc-arm.c (it_fsm_post_encode): Improve | |
1043 | warning messages about deprecated IT block formats. | |
1044 | ||
89d2a2a3 MS |
1045 | 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com> |
1046 | ||
1047 | * config/tc-aarch64.c (md_apply_fix): Move value range checking | |
1048 | inside fx_done condition. | |
1049 | ||
c77c0862 RS |
1050 | 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> |
1051 | ||
1052 | * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB. | |
1053 | ||
c0637f3a PB |
1054 | 2013-05-20 Peter Bergner <bergner@vnet.ibm.com> |
1055 | ||
1056 | * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error | |
1057 | and clean up warning when using PRINT_OPCODE_TABLE. | |
1058 | ||
5656a981 AM |
1059 | 2013-05-20 Alan Modra <amodra@gmail.com> |
1060 | ||
1061 | * config/tc-ppc.c (md_apply_fix): Hoist code common to insn | |
1062 | and data fixups performing shift/high adjust/sign extension on | |
1063 | fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size | |
1064 | when writing data fixups rather than recalculating size. | |
1065 | ||
997b26e8 JBG |
1066 | 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de> |
1067 | ||
1068 | * doc/c-msp430.texi: Fix typo. | |
1069 | ||
9f6e76f4 TG |
1070 | 2013-05-16 Tristan Gingold <gingold@adacore.com> |
1071 | ||
1072 | * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC | |
1073 | are also TOC symbols. | |
1074 | ||
638d3803 NC |
1075 | 2013-05-16 Nick Clifton <nickc@redhat.com> |
1076 | ||
1077 | * config/tc-msp430.c: Make -mmcu recognise more part numbers. | |
1078 | Add -mcpu command to specify core type. | |
997b26e8 | 1079 | * doc/c-msp430.texi: Update documentation. |
638d3803 | 1080 | |
b015e599 AP |
1081 | 2013-05-09 Andrew Pinski <apinski@cavium.com> |
1082 | ||
1083 | * config/tc-mips.c (struct mips_set_options): New ase_virt field. | |
1084 | (mips_opts): Update for the new field. | |
1085 | (file_ase_virt): New variable. | |
1086 | (ISA_SUPPORTS_VIRT_ASE): New macro. | |
1087 | (ISA_SUPPORTS_VIRT64_ASE): New macro. | |
1088 | (MIPS_CPU_ASE_VIRT): New define. | |
1089 | (is_opcode_valid): Handle ase_virt. | |
1090 | (macro_build): Handle "+J". | |
1091 | (validate_mips_insn): Likewise. | |
1092 | (mips_ip): Likewise. | |
1093 | (enum options): Add OPTION_VIRT and OPTION_NO_VIRT. | |
1094 | (md_longopts): Add mvirt and mnovirt | |
1095 | (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT. | |
1096 | (mips_after_parse_args): Handle ase_virt field. | |
1097 | (s_mipsset): Handle "virt" and "novirt". | |
1098 | (mips_elf_final_processing): Add a comment about virt ASE might need | |
1099 | a new flag. | |
1100 | (md_show_usage): Print out the usage of -mvirt and mno-virt options. | |
1101 | * doc/c-mips.texi: Document -mvirt and -mno-virt. | |
1102 | Document ".set virt" and ".set novirt". | |
1103 | ||
da8094d7 AM |
1104 | 2013-05-09 Alan Modra <amodra@gmail.com> |
1105 | ||
1106 | * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under | |
1107 | control of operand flag bits. | |
1108 | ||
c5f8c205 AM |
1109 | 2013-05-07 Alan Modra <amodra@gmail.com> |
1110 | ||
1111 | * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro. | |
1112 | (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise. | |
1113 | (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise. | |
1114 | (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise. | |
1115 | (md_apply_fix): Set fx_no_overflow for assorted relocations. | |
1116 | Shift and sign-extend fieldval for use by some VLE reloc | |
1117 | operand->insert functions. | |
1118 | ||
b47468a6 CM |
1119 | 2013-05-06 Paul Brook <paul@codesourcery.com> |
1120 | Catherine Moore <clm@codesourcery.com> | |
1121 | ||
c5f8c205 AM |
1122 | * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL. |
1123 | (limited_pcrel_reloc_p): Likewise. | |
b47468a6 CM |
1124 | (md_apply_fix): Likewise. |
1125 | (tc_gen_reloc): Likewise. | |
1126 | ||
2de39019 CM |
1127 | 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com> |
1128 | ||
1129 | * config/tc-mips.c (limited_pcrel_reloc_p): New function. | |
1130 | (mips_fix_adjustable): Adjust pc-relative check to use | |
1131 | limited_pc_reloc_p. | |
1132 | ||
754e2bb9 RS |
1133 | 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com> |
1134 | ||
1135 | * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries. | |
1136 | (s_mips_stab): Do not restrict to stabn only. | |
1137 | ||
13761a11 NC |
1138 | 2013-05-02 Nick Clifton <nickc@redhat.com> |
1139 | ||
1140 | * config/tc-msp430.c: Add support for the MSP430X architecture. | |
1141 | Add code to insert a NOP instruction after any instruction that | |
1142 | might change the interrupt state. | |
1143 | Add support for the LARGE memory model. | |
1144 | Add code to initialise the .MSP430.attributes section. | |
1145 | * config/tc-msp430.h: Add support for the MSP430X architecture. | |
1146 | * doc/c-msp430.texi: Document the new -mL and -mN command line | |
1147 | options. | |
1148 | * NEWS: Mention support for the MSP430X architecture. | |
1149 | ||
df26367c MR |
1150 | 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com> |
1151 | ||
1152 | * configure.tgt: Replace alpha*-*-linuxecoff* pattern with | |
1153 | alpha*-*-linux*ecoff*. | |
1154 | ||
f02d8318 CF |
1155 | 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
1156 | ||
1157 | * config/tc-mips.c (mips_ip): Add sizelo. | |
1158 | For "+C", "+G", and "+H", set sizelo and compare against it. | |
1159 | ||
b40bf0a2 NC |
1160 | 2013-04-29 Nick Clifton <nickc@redhat.com> |
1161 | ||
1162 | * as.c (Options): Add -gdwarf-sections. | |
1163 | (parse_args): Likewise. | |
1164 | * as.h (flag_dwarf_sections): Declare. | |
1165 | * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes. | |
1166 | (process_entries): When -gdwarf-sections is enabled generate | |
1167 | fragmentary .debug_line sections. | |
1168 | (out_debug_line): Set the section for the .debug_line section end | |
1169 | symbol. | |
1170 | * doc/as.texinfo: Document -gdwarf-sections. | |
1171 | * NEWS: Mention -gdwarf-sections. | |
1172 | ||
8eeccb77 | 1173 | 2013-04-26 Christian Groessler <chris@groessler.org> |
00a3147e CG |
1174 | |
1175 | * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline | |
1176 | according to the target parameter. Don't call s_segm since s_segm | |
1177 | calls bfd_set_arch_mach using stdoutput, but stdoutput isn't | |
1178 | initialized yet. | |
1179 | (md_begin): Call s_segm according to target parameter from command | |
1180 | line. | |
1181 | ||
49926cd0 AM |
1182 | 2013-04-25 Alan Modra <amodra@gmail.com> |
1183 | ||
1184 | * configure.in: Allow little-endian linux. | |
1185 | * configure: Regenerate. | |
1186 | ||
e3031850 SL |
1187 | 2013-04-24 Sandra Loosemore <sandra@codesourcery.com> |
1188 | ||
1189 | * config/tc-nios2.c (nios2_control_register_arg_p): Rename | |
1190 | "fstatus" control register to "eccinj". | |
1191 | ||
cb948fc0 KT |
1192 | 2013-04-19 Kai Tietz <ktietz@redhat.com> |
1193 | ||
1194 | * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin. | |
1195 | ||
4455e9ad JB |
1196 | 2013-04-15 Julian Brown <julian@codesourcery.com> |
1197 | ||
1198 | * expr.c (add_to_result, subtract_from_result): Make global. | |
1199 | * expr.h (add_to_result, subtract_from_result): Add prototypes. | |
1200 | * config/tc-sh.c (sh_optimize_expr): Use add_to_result, | |
1201 | subtract_from_result to handle extra bit of precision for .sleb128 | |
1202 | directive operands. | |
1203 | ||
956a6ba3 JB |
1204 | 2013-04-10 Julian Brown <julian@codesourcery.com> |
1205 | ||
1206 | * read.c (convert_to_bignum): Add sign parameter. Use it | |
1207 | instead of X_unsigned to determine sign of resulting bignum. | |
1208 | (emit_expr): Pass extra argument to convert_to_bignum. | |
1209 | (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass | |
1210 | X_extrabit to convert_to_bignum. | |
1211 | (parse_bitfield_cons): Set X_extrabit. | |
1212 | * expr.c (make_expr_symbol, expr_build_uconstant, operand): | |
1213 | Initialise X_extrabit field as appropriate. | |
1214 | (add_to_result): New. | |
1215 | (subtract_from_result): New. | |
1216 | (expr): Use above. | |
1217 | * expr.h (expressionS): Add X_extrabit field. | |
1218 | ||
eb9f3f00 JB |
1219 | 2013-04-10 Jan Beulich <jbeulich@suse.com> |
1220 | ||
1221 | * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base | |
1222 | register being PC when is_t or writeback, and use distinct | |
1223 | diagnostic for the latter case. | |
1224 | ||
ccb84d65 JB |
1225 | 2013-04-10 Jan Beulich <jbeulich@suse.com> |
1226 | ||
1227 | * gas/config/tc-arm.c (parse_operands): Re-write | |
1228 | po_barrier_or_imm(). | |
1229 | (do_barrier): Remove bogus constraint(). | |
1230 | (do_t_barrier): Remove. | |
1231 | ||
4d13caa0 NC |
1232 | 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com> |
1233 | ||
1234 | * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2, | |
1235 | ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2, | |
1236 | ATmega2564RFR2 | |
1237 | * gas/doc/c-avr.texi (-mmcu documentation): Likewise. | |
1238 | ||
16d02dc9 JB |
1239 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
1240 | ||
1241 | * gas/config/tc-arm.c (do_vmrs): Accept all control registers. | |
1242 | Use local variable Rt in more places. | |
1243 | (do_vmsr): Accept all control registers. | |
1244 | ||
05ac0ffb JB |
1245 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
1246 | ||
1247 | * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix | |
1248 | if there was none specified for moves between scalar and core | |
1249 | register. | |
1250 | ||
2d51fb74 JB |
1251 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
1252 | ||
1253 | * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the | |
1254 | NEON_ALL_LANES case. | |
1255 | ||
94dcf8bf JB |
1256 | 2013-04-08 Jan Beulich <jbeulich@suse.com> |
1257 | ||
1258 | * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for | |
1259 | PC-relative VSTR. | |
1260 | ||
1472d06f JB |
1261 | 2013-04-08 Jan Beulich <jbeulich@suse.com> |
1262 | ||
1263 | * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq | |
1264 | entry to sp_fiq. | |
1265 | ||
0c76cae8 AM |
1266 | 2013-04-03 Alan Modra <amodra@gmail.com> |
1267 | ||
1268 | * doc/as.texinfo: Add support to generate man options for h8300. | |
1269 | * doc/c-h8300.texi: Likewise. | |
1270 | ||
92eb40d9 RR |
1271 | 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> |
1272 | ||
1273 | * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and | |
1274 | Cortex-A57. | |
1275 | ||
51dcdd4d NC |
1276 | 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com> |
1277 | ||
1278 | PR binutils/15068 | |
1279 | * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array. | |
1280 | ||
c5d685bf NC |
1281 | 2013-03-26 Nick Clifton <nickc@redhat.com> |
1282 | ||
9b978282 NC |
1283 | PR gas/15295 |
1284 | * listing.c (rebuffer_line): Rewrite to avoid seeking back to the | |
1285 | start of the file each time. | |
1286 | ||
c5d685bf NC |
1287 | PR gas/15178 |
1288 | * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for | |
1289 | FreeBSD targets. | |
1290 | ||
9699c833 TG |
1291 | 2013-03-26 Douglas B Rupp <rupp@gnat.com> |
1292 | ||
1293 | * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment | |
1294 | after fixup. | |
1295 | ||
4755303e WN |
1296 | 2013-03-21 Will Newton <will.newton@linaro.org> |
1297 | ||
1298 | * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all | |
1299 | pc-relative str instructions in Thumb mode. | |
1300 | ||
81f5558e NC |
1301 | 2013-03-21 Michael Schewe <michael.schewe@gmx.net> |
1302 | ||
1303 | * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov | |
1304 | @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc | |
1305 | R_H8_DISP32A16. | |
1306 | * config/tc-h8300.h: Remove duplicated defines. | |
1307 | ||
71863e73 NC |
1308 | 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
1309 | ||
1310 | PR gas/15282 | |
1311 | * tc-avr.c (mcu_has_3_byte_pc): New function. | |
1312 | (tc_cfi_frame_initial_instructions): Call it to find return | |
1313 | address size. | |
1314 | ||
795b8e6b NC |
1315 | 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com> |
1316 | ||
1317 | PR gas/15095 | |
1318 | * config/tc-tic6x.c (tic6x_try_encode): Handle | |
1319 | tic6x_coding_dreg_(msb|lsb) field coding types and use it to | |
1320 | encode register pair numbers when required. | |
1321 | ||
ba86b375 WN |
1322 | 2013-03-15 Will Newton <will.newton@linaro.org> |
1323 | ||
1324 | * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register | |
1325 | in vstr in Thumb mode for pre-ARMv7 cores. | |
1326 | ||
9e6f3811 AS |
1327 | 2013-03-14 Andreas Schwab <schwab@suse.de> |
1328 | ||
1329 | * doc/c-arc.texi (ARC Directives): Revert last change and use | |
1330 | @itemize instead of @table. | |
1331 | * doc/c-arm.texi (ARM-Instruction-Set): Likewise. | |
1332 | ||
b10bf8c5 NC |
1333 | 2013-03-14 Nick Clifton <nickc@redhat.com> |
1334 | ||
1335 | PR gas/15273 | |
1336 | * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a | |
1337 | NULL message, instead just check ARM_CPU_IS_ANY directly. | |
1338 | ||
ba724cfc NC |
1339 | 2013-03-14 Nick Clifton <nickc@redhat.com> |
1340 | ||
1341 | PR gas/15212 | |
9e6f3811 | 1342 | * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet |
ba724cfc NC |
1343 | for table format. |
1344 | * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text | |
1345 | to the @item directives. | |
1346 | (ARM-Neon-Alignment): Move to correct place in the document. | |
1347 | * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table | |
1348 | formatting. | |
1349 | * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of | |
1350 | @smallexample. | |
1351 | ||
531a94fd SL |
1352 | 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de> |
1353 | ||
1354 | * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o' | |
1355 | case. Add default BAD_CASE to switch. | |
1356 | ||
dad60f8e SL |
1357 | 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de> |
1358 | ||
1359 | * config/tc-nios2.c (nios2_assemble_args_ds): New function. | |
1360 | (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries. | |
1361 | ||
dd5181d5 KT |
1362 | 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
1363 | ||
1364 | * config/tc-arm.c (crc_ext_armv8): New feature set. | |
1365 | (UNPRED_REG): New macro. | |
1366 | (do_crc32_1): New function. | |
1367 | (do_crc32b, do_crc32h, do_crc32w, do_crc32cb, | |
1368 | do_crc32ch, do_crc32cw): Likewise. | |
1369 | (TUEc): New macro. | |
1370 | (insns): Add entries for crc32 mnemonics. | |
1371 | (arm_extensions): Add entry for crc. | |
1372 | ||
8e723a10 CLT |
1373 | 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com> |
1374 | ||
1375 | * write.h (struct fix): Add fx_dot_frag field. | |
1376 | (dot_frag): Declare. | |
1377 | * write.c (dot_frag): New variable. | |
1378 | (fix_new_internal): Set fx_dot_frag field with dot_frag. | |
1379 | (fixup_segment): Base calculation of fx_offset with fx_dot_frag. | |
1380 | * expr.c (expr): Save value of frag_now in dot_frag when setting | |
1381 | dot_value. | |
1382 | * read.c (emit_expr): Likewise. Delete comments. | |
1383 | ||
be05d201 L |
1384 | 2013-03-07 H.J. Lu <hongjiu.lu@intel.com> |
1385 | ||
1386 | * config/tc-i386.c (flag_code_names): Removed. | |
1387 | (i386_index_check): Rewrote. | |
1388 | ||
62b0d0d5 YZ |
1389 | 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com> |
1390 | ||
1391 | * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern'; | |
1392 | add comment. | |
1393 | (aarch64_double_precision_fmovable): New function. | |
1394 | (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new | |
1395 | function; handle hexadecimal representation of IEEE754 encoding. | |
1396 | (parse_operands): Update the call to parse_aarch64_imm_float. | |
1397 | ||
165de32a L |
1398 | 2013-02-28 H.J. Lu <hongjiu.lu@intel.com> |
1399 | ||
1400 | * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix. | |
1401 | (check_hle): Updated. | |
1402 | (md_assemble): Likewise. | |
1403 | (parse_insn): Likewise. | |
1404 | ||
d5de92cf L |
1405 | 2013-02-28 H.J. Lu <hongjiu.lu@intel.com> |
1406 | ||
1407 | * config/tc-i386.c (_i386_insn): Add rep_prefix. | |
9e6f3811 | 1408 | (md_assemble): Check if REP prefix is OK. |
d5de92cf L |
1409 | (parse_insn): Remove expecting_string_instruction. Set |
1410 | i.rep_prefix. | |
1411 | ||
e60bb1dd YZ |
1412 | 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com> |
1413 | ||
1414 | * config/tc-aarch64.c (aarch64_features): Add the 'crc' option. | |
1415 | ||
aeebdd9b YZ |
1416 | 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com> |
1417 | ||
1418 | * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn | |
1419 | for system registers. | |
1420 | ||
4107ae22 DD |
1421 | 2013-02-27 DJ Delorie <dj@redhat.com> |
1422 | ||
1423 | * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE. | |
1424 | (rl78_op): Handle %code(). | |
1425 | (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands. | |
1426 | (tc_gen_reloc): Likwise; convert to a computed reloc. | |
1427 | (md_apply_fix): Likewise. | |
1428 | ||
151fa98f NC |
1429 | 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com> |
1430 | ||
1431 | * config/rl78-parse.y: Fix encoding of DIVWU insn. | |
1432 | ||
70a8bc5b | 1433 | 2013-02-25 Terry Guo <terry.guo@arm.com> |
1434 | ||
1435 | * config/tc-arm.c (arm_cpus): Add cortex-r7 entry. | |
1436 | * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to | |
1437 | list of accepted CPUs. | |
1438 | ||
5c111e37 L |
1439 | 2013-02-19 H.J. Lu <hongjiu.lu@intel.com> |
1440 | ||
1441 | PR gas/15159 | |
1442 | * config/tc-i386.c (cpu_arch): Add ".smap". | |
1443 | ||
1444 | * doc/c-i386.texi: Document smap. | |
1445 | ||
8a75745d MR |
1446 | 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com> |
1447 | ||
1448 | * config/tc-mips.c (s_cpload): Call mips_mark_labels and set | |
1449 | mips_assembling_insn appropriately. | |
1450 | (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise. | |
1451 | ||
79850f26 MR |
1452 | 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com> |
1453 | ||
cf29fc61 | 1454 | * config/tc-mips.c (append_insn): Correct indentation, remove |
79850f26 MR |
1455 | extraneous braces. |
1456 | ||
4c261dff NC |
1457 | 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
1458 | ||
5c111e37 | 1459 | * config/tc-arm.c (do_neon_mov): Break on NS_NULL. |
4c261dff | 1460 | |
ea33f281 NC |
1461 | 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de> |
1462 | ||
1463 | * configure.tgt: Add nios2-*-rtems*. | |
1464 | ||
a1ccaec9 YZ |
1465 | 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com> |
1466 | ||
1467 | * config/tc-aarch64.c (md_begin): Change to check if 'name' is | |
1468 | NULL. | |
1469 | ||
0aa27725 RS |
1470 | 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de> |
1471 | ||
1472 | * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro. | |
1473 | (macro): Use it. Assert that trunc.w.s is not used for r5900. | |
1474 | ||
da4339ed NC |
1475 | 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com> |
1476 | ||
1477 | * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4 | |
1478 | core. | |
1479 | ||
36591ba1 | 1480 | 2013-02-06 Sandra Loosemore <sandra@codesourcery.com> |
5c111e37 | 1481 | Andrew Jenner <andrew@codesourcery.com> |
36591ba1 SL |
1482 | |
1483 | Based on patches from Altera Corporation. | |
1484 | ||
1485 | * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. | |
1486 | (TARGET_CPU_HFILES): Add config/tc-nios2.h. | |
1487 | * Makefile.in: Regenerated. | |
1488 | * configure.tgt: Add case for nios2*-linux*. | |
1489 | * config/obj-elf.c: Conditionally include elf/nios2.h. | |
1490 | * config/tc-nios2.c: New file. | |
1491 | * config/tc-nios2.h: New file. | |
1492 | * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. | |
1493 | * doc/Makefile.in: Regenerated. | |
1494 | * doc/all.texi: Set NIOSII. | |
1495 | * doc/as.texinfo (Overview): Add Nios II options. | |
1496 | (Machine Dependencies): Include c-nios2.texi. | |
1497 | * doc/c-nios2.texi: New file. | |
1498 | * NEWS: Note Altera Nios II support. | |
1499 | ||
94d4433a AM |
1500 | 2013-02-06 Alan Modra <amodra@gmail.com> |
1501 | ||
1502 | PR gas/14255 | |
1503 | * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc. | |
1504 | Don't skip fixups with fx_subsy non-NULL. | |
1505 | * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups | |
1506 | with fx_subsy non-NULL. | |
1507 | ||
ace9af6f L |
1508 | 2013-02-04 H.J. Lu <hongjiu.lu@intel.com> |
1509 | ||
1510 | * doc/c-metag.texi: Add "@c man" markers. | |
1511 | ||
89d67ed9 AM |
1512 | 2013-02-04 Alan Modra <amodra@gmail.com> |
1513 | ||
1514 | * write.c (fixup_segment): Return void. Delete seg_reloc_count | |
1515 | related code. | |
1516 | (TC_ADJUST_RELOC_COUNT): Delete. | |
1517 | * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete. | |
1518 | ||
89072bd6 AM |
1519 | 2013-02-04 Alan Modra <amodra@gmail.com> |
1520 | ||
1521 | * po/POTFILES.in: Regenerate. | |
1522 | ||
f9b2d544 NC |
1523 | 2013-01-30 Markos Chandras <markos.chandras@imgtec.com> |
1524 | ||
1525 | * config/tc-metag.c: Make SWAP instruction less permissive with | |
1526 | its operands. | |
1527 | ||
392ca752 DD |
1528 | 2013-01-29 DJ Delorie <dj@redhat.com> |
1529 | ||
1530 | * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified | |
1531 | relocs in .word/.etc statements. | |
1532 | ||
427d0db6 RM |
1533 | 2013-01-29 Roland McGrath <mcgrathr@google.com> |
1534 | ||
1535 | * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad | |
1536 | immediate value for 8-bit offset" error so it shows line info. | |
1537 | ||
4faf939a JM |
1538 | 2013-01-24 Joseph Myers <joseph@codesourcery.com> |
1539 | ||
1540 | * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections | |
1541 | for 64-bit output. | |
1542 | ||
78c8d46c NC |
1543 | 2013-01-24 Nick Clifton <nickc@redhat.com> |
1544 | ||
1545 | * config/tc-v850.c: Add support for e3v5 architecture. | |
1546 | * doc/c-v850.texi: Mention new support. | |
1547 | ||
fb5b7503 NC |
1548 | 2013-01-23 Nick Clifton <nickc@redhat.com> |
1549 | ||
1550 | PR gas/15039 | |
1551 | * config/tc-avr.c: Include dwarf2dbg.h. | |
1552 | ||
8ce3d284 L |
1553 | 2013-01-18 H.J. Lu <hongjiu.lu@intel.com> |
1554 | ||
1555 | * config/tc-i386.c (reloc): Support size relocation only for ELF. | |
1556 | (tc_i386_fix_adjustable): Likewise. | |
1557 | (lex_got): Likewise. | |
1558 | (tc_gen_reloc): Likewise. | |
1559 | ||
f5555712 YZ |
1560 | 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> |
1561 | ||
1562 | * config/tc-aarch64.c (output_operand_error_record): Change to output | |
1563 | the out-of-range error message as value-expected message if there is | |
1564 | only one single value in the expected range. | |
1565 | (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with | |
1566 | LSL #0 as a programmer-friendly feature. | |
1567 | ||
8fd4256d L |
1568 | 2013-01-16 H.J. Lu <hongjiu.lu@intel.com> |
1569 | ||
1570 | * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32. | |
1571 | (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and | |
1572 | BFD_RELOC_64_SIZE relocations. | |
1573 | (lex_got): Support "symbol@SIZE" and don't create GOT symbol | |
1574 | for it. | |
1575 | (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64 | |
1576 | relocations against local symbols. | |
1577 | ||
a5840dce AM |
1578 | 2013-01-16 Alan Modra <amodra@gmail.com> |
1579 | ||
1580 | * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after | |
1581 | finding some sort of toc syntax error, and break to avoid | |
1582 | compiler uninit warning. | |
1583 | ||
af89796a L |
1584 | 2013-01-15 H.J. Lu <hongjiu.lu@intel.com> |
1585 | ||
1586 | PR gas/15019 | |
1587 | * config/tc-i386.c (lex_got): Increment length by 1 if the | |
1588 | relocation token is removed. | |
1589 | ||
dd42f060 NC |
1590 | 2013-01-15 Nick Clifton <nickc@redhat.com> |
1591 | ||
1592 | * config/tc-v850.c (md_assemble): Allow signed values for | |
1593 | V850E_IMMEDIATE. | |
1594 | ||
464e3686 SK |
1595 | 2013-01-11 Sean Keys <skeys@ipdatasys.com> |
1596 | ||
1597 | * config/tc-xgate.c (md_begin): Fix mistake made when going from | |
af89796a | 1598 | git to cvs. |
464e3686 | 1599 | |
5817ffd1 PB |
1600 | 2013-01-10 Peter Bergner <bergner@vnet.ibm.com> |
1601 | ||
1602 | * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm. | |
1603 | * doc/c-ppc.texi (PowerPC-Opts): Likewise. | |
1604 | * config/tc-ppc.c (md_show_usage): Likewise. | |
1605 | (ppc_handle_align): Handle power8's group ending nop. | |
1606 | ||
f4b1f6a9 SK |
1607 | 2013-01-10 Sean Keys <skeys@ipdatasys.com> |
1608 | ||
1609 | * config/tc-xgate.c (md_begin): Fix the printing of opcodes so | |
af89796a | 1610 | that the assember exits after the opcodes have been printed. |
f4b1f6a9 | 1611 | |
34bca508 L |
1612 | 2013-01-10 H.J. Lu <hongjiu.lu@intel.com> |
1613 | ||
1614 | * app.c: Remove trailing white spaces. | |
1615 | * as.c: Likewise. | |
1616 | * as.h: Likewise. | |
1617 | * cond.c: Likewise. | |
1618 | * dw2gencfi.c: Likewise. | |
1619 | * dwarf2dbg.h: Likewise. | |
1620 | * ecoff.c: Likewise. | |
1621 | * input-file.c: Likewise. | |
1622 | * itbl-lex.h: Likewise. | |
1623 | * output-file.c: Likewise. | |
1624 | * read.c: Likewise. | |
1625 | * sb.c: Likewise. | |
1626 | * subsegs.c: Likewise. | |
1627 | * symbols.c: Likewise. | |
1628 | * write.c: Likewise. | |
1629 | * config/tc-i386.c: Likewise. | |
1630 | * doc/Makefile.am: Likewise. | |
1631 | * doc/Makefile.in: Likewise. | |
1632 | * doc/c-aarch64.texi: Likewise. | |
1633 | * doc/c-alpha.texi: Likewise. | |
1634 | * doc/c-arc.texi: Likewise. | |
1635 | * doc/c-arm.texi: Likewise. | |
1636 | * doc/c-avr.texi: Likewise. | |
1637 | * doc/c-bfin.texi: Likewise. | |
1638 | * doc/c-cr16.texi: Likewise. | |
1639 | * doc/c-d10v.texi: Likewise. | |
1640 | * doc/c-d30v.texi: Likewise. | |
1641 | * doc/c-h8300.texi: Likewise. | |
1642 | * doc/c-hppa.texi: Likewise. | |
1643 | * doc/c-i370.texi: Likewise. | |
1644 | * doc/c-i386.texi: Likewise. | |
1645 | * doc/c-i860.texi: Likewise. | |
1646 | * doc/c-m32c.texi: Likewise. | |
1647 | * doc/c-m32r.texi: Likewise. | |
1648 | * doc/c-m68hc11.texi: Likewise. | |
1649 | * doc/c-m68k.texi: Likewise. | |
1650 | * doc/c-microblaze.texi: Likewise. | |
1651 | * doc/c-mips.texi: Likewise. | |
1652 | * doc/c-msp430.texi: Likewise. | |
1653 | * doc/c-mt.texi: Likewise. | |
1654 | * doc/c-s390.texi: Likewise. | |
1655 | * doc/c-score.texi: Likewise. | |
1656 | * doc/c-sh.texi: Likewise. | |
1657 | * doc/c-sh64.texi: Likewise. | |
1658 | * doc/c-tic54x.texi: Likewise. | |
1659 | * doc/c-tic6x.texi: Likewise. | |
1660 | * doc/c-v850.texi: Likewise. | |
1661 | * doc/c-xc16x.texi: Likewise. | |
1662 | * doc/c-xgate.texi: Likewise. | |
1663 | * doc/c-xtensa.texi: Likewise. | |
1664 | * doc/c-z80.texi: Likewise. | |
1665 | * doc/internals.texi: Likewise. | |
1666 | ||
4c665b71 RM |
1667 | 2013-01-10 Roland McGrath <mcgrathr@google.com> |
1668 | ||
1669 | * hash.c (hash_new_sized): Make it global. | |
1670 | * hash.h: Declare it. | |
1671 | * macro.c (define_macro): Use hash_new_sized instead of hash_new, | |
1672 | pass a small size. | |
1673 | ||
a3c62988 NC |
1674 | 2013-01-10 Will Newton <will.newton@imgtec.com> |
1675 | ||
1676 | * Makefile.am: Add Meta. | |
1677 | * Makefile.in: Regenerate. | |
1678 | * config/tc-metag.c: New file. | |
1679 | * config/tc-metag.h: New file. | |
1680 | * configure.tgt: Add Meta. | |
1681 | * doc/Makefile.am: Add Meta. | |
1682 | * doc/Makefile.in: Regenerate. | |
1683 | * doc/all.texi: Add Meta. | |
1684 | * doc/as.texiinfo: Document Meta options. | |
1685 | * doc/c-metag.texi: New file. | |
1686 | ||
b37df7c4 SE |
1687 | 2013-01-09 Steve Ellcey <sellcey@mips.com> |
1688 | ||
1689 | * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal | |
1690 | calls. | |
1691 | * config/tc-mips.c (internalError): Remove, replace with abort. | |
1692 | ||
a3251895 YZ |
1693 | 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> |
1694 | ||
1695 | * config/tc-aarch64.c (parse_operands): Change to compare the result | |
1696 | of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'. | |
1697 | ||
8ab8155f NC |
1698 | 2013-01-07 Nick Clifton <nickc@redhat.com> |
1699 | ||
1700 | PR gas/14887 | |
1701 | * config/tc-arm.c (skip_past_char): Skip whitespace before the | |
1702 | anticipated character. | |
1703 | * config/tc-arm.c (parse_address_main): Delete skip of whitespace | |
1704 | here as it is no longer needed. | |
1705 | ||
a4ac1c42 AS |
1706 | 2013-01-06 Andreas Schwab <schwab@linux-m68k.org> |
1707 | ||
1708 | * doc/c-mips.texi (MIPS Opts): Fix use of @itemx. | |
1709 | * doc/c-score.texi (SCORE-Opts): Likewise. | |
1710 | * doc/c-tic54x.texi (TIC54X-Directives): Likewise. | |
1711 | ||
e407c74b NC |
1712 | 2013-01-04 Juergen Urban <JuergenUrban@gmx.de> |
1713 | ||
1714 | * config/tc-mips.c: Add support for MIPS r5900. | |
1715 | Add M_LQ_AB and M_SQ_AB to support large values for instructions | |
1716 | lq and sq. | |
1717 | (can_swap_branch_p, get_append_method): Detect some conditional | |
1718 | short loops to fix a bug on the r5900 by NOP in the branch delay | |
1719 | slot. | |
1720 | (M_MUL): Support 3 operands in multu on r5900. | |
1721 | (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. | |
1722 | (s_mipsset): Force 32 bit floating point on r5900. | |
1723 | (mips_ip): Check parameter range of instructions mfps and mtps on | |
1724 | r5900. | |
1725 | * configure.in: Detect CPU type when target string contains r5900 | |
1726 | (e.g. mips64r5900el-linux-gnu). | |
1727 | ||
62658407 L |
1728 | 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> |
1729 | ||
1730 | * as.c (parse_args): Update copyright year to 2013. | |
1731 | ||
95830fd1 YZ |
1732 | 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com> |
1733 | ||
1734 | * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53" | |
1735 | and "cortex57". | |
1736 | ||
517bb291 | 1737 | 2013-01-02 Nick Clifton <nickc@redhat.com> |
d709e4e6 | 1738 | |
517bb291 NC |
1739 | PR gas/14987 |
1740 | * config/tc-arm.c (parse_address_main): Skip whitespace before a | |
1741 | closing bracket. | |
d709e4e6 | 1742 | |
517bb291 | 1743 | For older changes see ChangeLog-2012 |
08d56133 | 1744 | \f |
517bb291 | 1745 | Copyright (C) 2013 Free Software Foundation, Inc. |
752937aa NC |
1746 | |
1747 | Copying and distribution of this file, with or without modification, | |
1748 | are permitted in any medium without royalty provided the copyright | |
1749 | notice and this notice are preserved. | |
1750 | ||
08d56133 NC |
1751 | Local Variables: |
1752 | mode: change-log | |
1753 | left-margin: 8 | |
1754 | fill-column: 74 | |
1755 | version-control: never | |
1756 | End: |