* breakpoint.c (insert_bp_location): Add newline to note.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
fc225355
L
12006-12-15 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.c (build_modrm_byte): Reformat to 72 columns.
4
6008641e
DJ
52006-12-14 Daniel Jacobowitz <dan@codesourcery.com>
6
7 * Makefile.am (YFLAGS): Define.
8 * Makefile.in: Regenerated.
9
d1cbb4db
L
102006-12-14 H.J. Lu <hongjiu.lu@intel.com>
11
12 * config/tc-i386.c (match_template): Simplify 3 and 4 operand
13 match.
14
71903a11
L
152006-12-13 H.J. Lu <hongjiu.lu@intel.com>
16
17 * config/tc-i386.c (build_modrm_byte): Set the Operand_PCrel
18 bit only.
19
a5c311ca
L
202006-12-13 H.J. Lu <hongjiu.lu@intel.com>
21
22 * config/tc-i386.c (match_template): Use a for loop to set
23 operand_types array.
24
f48ff2ae
L
252006-12-13 H.J. Lu <hongjiu.lu@intel.com>
26
27 PR gas/3712
28 * config/tc-i386.c (match_template): Use MAX_OPERANDS for the
29 number of operands. Issue an error if MAX_OPERANDS != 4. Add
30 the 4th operand check.
31
c450d570
PB
322006-12-13 Paul Brook <paul@codesourcery.com>
33
34 * config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}.
35 * doc/c-arm.texi: Fix spelling of ARMv7 profile variants.
36
eca5433b
L
372006-12-12 H.J. Lu <hongjiu.lu@intel.com>
38
39 * config/tc-i386.h (WordMem): Document it for 64 bit memory
40 reference.
41
37d037c1
DJ
422006-12-12 Daniel Jacobowitz <dan@codesourcery.com>
43
44 * doc/Makefile.am (as_TEXINFOS): Set.
45 (as.info as.dvi as.html): Delete rule.
46 * doc/Makefile.in: Regenerated.
47
d5fbea21
DJ
482006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
49
50 * configure.in: Define GENINSRC_NEVER.
51 * doc/Makefile.am (as.info): Remove srcdir prefix.
52 (MAINTAINERCLEANFILES): Add info file.
53 (DISTCLEANFILES): Pretend to add info file.
54 * po/Make-in (.po.gmo): Put gmo files in objdir.
55 * configure, Makefile.in, doc/Makefile.in: Regenerated.
56
ffb08c80
L
572006-12-09 H.J. Lu <hongjiu.lu@intel.com>
58
59 * config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
af26ccbe 60 for operand_types array.
ffb08c80 61
41d3b056
CG
622006-12-08 Christian Groessler <chris@groessler.org>
63
64 * config/tc-z8k.c (whatreg): Add comment describing function.
65 Return NULL if symbol name characters follow the register number.
66 (parse_reg): Use NULL instead of 0 for pointer values. Stop
67 processing if whatreg returned NULL.
68
c694fd50
KH
692006-12-07 Kazu Hirata <kazu@codesourcery.com>
70
71 * config/tc-m68k.c: Update uses of EF_M68K_*.
72
9021ec07
L
732006-12-06 H.J. Lu <hjl@gnu.org>
74
75 * config/tc-i386.h: Change the prefix order to SEG_PREFIX,
76 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
77
b3b1f034
JJ
782006-12-02 Jakub Jelinek <jakub@redhat.com>
79
80 PR gas/3607
81 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field.
82
f0291e4c
PB
832006-12-01 Paul Brook <paul@codesourcery.com>
84
85 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
86 function symbols.
87
e1da3f5b
PB
882006-11-29 Paul Brook <paul@codesourcery.com>
89
90 * config/tc-arm.c (arm_is_eabi): New function.
91 * config/tc-arm.h (arm_is_eabi): New prototype.
92 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
93 * doc/c-arm.texi (.thumb_func): Update documentation.
94
00249aaa
PB
952006-11-29 Paul Brook <paul@codesourcery.com>
96
97 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
98 encoding.
99
a7284bf1
BW
1002006-11-27 Sterling Augustine <sterling@tensilica.com>
101
102 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
103 as the first slot_subtype, not the frag subtype.
104
2caa7ca0
BW
1052006-11-27 Bob Wilson <bob.wilson@acm.org>
106
107 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
108 (directive_state): Disable scheduling by default.
109 (xtensa_add_config_info): New.
110 (xtensa_end): Call xtensa_add_config_info.
111
062cf837
EB
1122006-11-27 Eric Botcazou <ebotcazou@adacore.com>
113
114 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
115 their unaligned counterparts in debugging sections.
116
cefdba39
AM
1172006-11-24 Alan Modra <amodra@bigpond.net.au>
118
119 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
120
e821645d
DJ
1212006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
122
123 * config/tc-arm.h (md_cons_align): Define.
124 (mapping_state): New prototype.
125 * config/tc-arm.c (mapping_state): Make global.
126
5ab504f9
AM
1272006-11-22 Alan Modra <amodra@bigpond.net.au>
128
129 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
130
98a16ee1
ML
1312006-11-16 Mei ligang <ligang@sunnorth.com.cn>
132
5ab504f9
AM
133 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
134 branch instruction, handle it specially.
98a16ee1
ML
135 (score_insns): Modify 32 bit branch instruction.
136
0023dd27
AM
1372006-11-16 Alan Modra <amodra@bigpond.net.au>
138
139 * symbols.c (resolve_symbol_value): Formatting.
140
bdf128d6
JB
1412006-11-15 Jan Beulich <jbeulich@novell.com>
142
143 PR/3469
144 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
145 chain by linking it to itself.
146 (resolve_symbol_value): Also check symbol_shadow_p().
147 (symbol_shadow_p): New.
148 * symbols.h (symbol_shadow_p): Declare.
149
25fe350b
MS
1502006-11-12 Mark Shinwell <shinwell@codesourcery.com>
151
152 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
153 (insns): Adjust accordingly.
154 (md_apply_fix): Alter comments to use CBZ instead of CZB.
155
0ffdc86c
NC
1562006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
157
158 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
159 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
160
6afdfa61
NC
1612006-11-10 Nick Clifton <nickc@redhat.com>
162
163 PR gas/3456:
164 * config/obj-elf.c (obj_elf_version): Do not include the name
165 field's padding in the namesz value.
166
d84bcf09
TS
1672006-11-09 Thiemo Seufer <ths@mips.com>
168
169 * config/tc-mips.c: Fix outdated comment.
170
b7d9ef37
L
1712006-11-08 H.J. Lu <hongjiu.lu@intel.com>
172
173 * config/tc-i386.h (CpuPNI): Removed.
174 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
175 * config/tc-i386.c (md_assemble): Likewise.
176
05e7221f
AM
1772006-11-08 Alan Modra <amodra@bigpond.net.au>
178
179 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
180
df1f3cda
DD
1812006-11-06 David Daney <ddaney@avtrex.com>
182
183 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
184
82100185
TS
1852006-11-06 Thiemo Seufer <ths@mips.com>
186
187 * doc/c-mips.texi (-march): Document sb1a.
188
a360e743
TS
1892006-11-06 Thiemo Seufer <ths@mips.com>
190
191 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
192 34k always has DSP ASE.
193
64817874
TS
1942006-11-03 Thiemo Seufer <ths@mips.com>
195
196 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
197 MIPS16 instructions referencing other sections, unless they are
198 external branches.
199
7764b395
TS
2002006-11-03 Thiemo Seufer <ths@mips.com>
201
202 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
203 release 1 CPU.
204
ae424f82
JJ
2052006-11-03 Jakub Jelinek <jakub@redhat.com>
206
9b8ae42e
JJ
207 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
208 personality and lsda.
209 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
210 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
211 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
212 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
213 (output_cie): Output personality including its encoding and LSDA encoding.
214 (output_fde): Output LSDA.
215 (select_cie_for_fde): Don't share CIE if personality, its encoding or
216 LSDA encoding are different. Copy the 3 fields from fde_entry to
217 cie_entry.
218 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
219
ae424f82
JJ
220 * subsegs.h (struct frchain): Add frch_cfi_data field.
221 * dw2gencfi.c: Include subsegs.h.
222 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
223 (struct frch_cfi_data): New type.
224 (unused_cfi_data): New variable.
225 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
226 and cfa_save_stack static vars into a structure pointed from
227 each frchain.
228 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
229 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
230 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
231 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
232 Likewise.
233
d1e50f8a
DJ
2342006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
235
236 * config/tc-h8300.c (build_bytes): Fix const warning.
237
06d2da93
NC
2382006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
239
240 * tc-score.c (do16_rdrs): Handle not! instruction especially.
241
3ba67470
PB
2422006-10-31 Paul Brook <paul@codesourcery.com>
243
244 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
245 for EABIv4.
246
7a1d4c38
PB
2472006-10-31 Paul Brook <paul@codesourcery.com>
248
249 gas/
250 * config/tc-arm.c (object_arch): New variable.
251 (s_arm_object_arch): New function.
252 (md_pseudo_table): Add object_arch.
253 (aeabi_set_public_attributes): Obey object_arch.
254 * doc/c-arm.texi: Document .object_arch.
255
b138abaa
NC
2562006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
257
258 * tc-score.c (data_op2): Check invalid operands.
259 (my_get_expression): Const operand of some instructions can not be
260 symbol in assembly.
261 (get_insn_class_from_type): Handle instruction type Insn_internal.
262 (do_macro_ldst_label): Modify inst.type.
263 (Insn_PIC): Delete.
264 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 265
c79b7c30
RC
2662006-10-29 Randolph Chung <tausq@debian.org>
267
268 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
269 (hppa_regname_to_dw2regnum): New funcions.
270 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
271 (tc_cfi_frame_initial_instructions)
272 (tc_regname_to_dw2regnum): Define.
273 (hppa_cfi_frame_initial_instructions)
274 (hppa_regname_to_dw2regnum): Declare.
275 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
276 (DWARF2_CIE_DATA_ALIGNMENT): Define.
277
e2785c44
NC
2782006-10-29 Nick Clifton <nickc@redhat.com>
279
280 * config/tc-spu.c (md_assemble): Cast printf string size parameter
281 to int in order to avoid a compiler warning.
282
86157c20
AS
2832006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
284
285 * config/tc-sh.c (md_assemble): Define size of branches.
286
ba5f0fda
BE
2872006-10-26 Ben Elliston <bje@au.ibm.com>
288
289 * dw2gencfi.c (cfi_add_CFA_offset):
290 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
291
033cd5fd
BE
292 * write.c (chain_frchains_together_1): Assert that this function
293 never returns a pointer to the auto variable `dummy'.
294
e9f53129
AM
2952006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
296 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
297 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
298 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
299 Alan Modra <amodra@bigpond.net.au>
300
301 * config/tc-spu.c: New file.
302 * config/tc-spu.h: New file.
303 * configure.tgt: Add SPU support.
304 * Makefile.am: Likewise. Run "make dep-am".
305 * Makefile.in: Regenerate.
306 * po/POTFILES.in: Regenerate.
307
7b383517
BE
3082006-10-25 Ben Elliston <bje@au.ibm.com>
309
310 * expr.c (expr): Replace O_add case in switch (op_left) explaining
311 why it can never occur.
5ab504f9 312
ede602d7
AM
3132006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
314
315 * doc/c-ppc.texi (-mcell): Document.
316 * config/tc-ppc.c (parse_cpu): Parse -mcell.
317 (md_show_usage): Document -mcell.
318
7918206c
MM
3192006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
320
321 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
322
878bcc43
AM
3232006-10-23 Alan Modra <amodra@bigpond.net.au>
324
325 * config/tc-m68hc11.c (md_assemble): Quiet warning.
326
8620418b
MF
3272006-10-19 Mike Frysinger <vapier@gentoo.org>
328
329 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
330 (x86_64_section_letter): Likewise.
331
b3549761
NC
3322006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
333
334 * config/tc-score.c (build_relax_frag): Compute correct
335 tc_frag_data.fixp.
336
71a75f6f
MF
3372006-10-18 Roy Marples <uberlord@gentoo.org>
338
339 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
340 elf32-sparc as a viable target for the -32 switch and any target
341 starting with elf64-sparc as a viable target for the -64 switch.
342 (sparc_target_format): For 64-bit ELF flavoured output use
343 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
344 ELF_TARGET_FORMAT.
71a75f6f
MF
345 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
346
e1b5fdd4
L
3472006-10-17 H.J. Lu <hongjiu.lu@intel.com>
348
349 * configure: Regenerated.
350
f8ef9cd7
BS
3512006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
352
353 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
354 in addition to testing for '\n'.
355 (TC_EOL_IN_INSN): Provide a default definition if necessary.
356
eb1fe072
NC
3572006-10-13 Sterling Augstine <sterling@tensilica.com>
358
359 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
360 a disjoint DW_AT range.
361
ec6e49f4
NC
3622006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
363
364 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
365
036dc3f7
PB
3662006-10-08 Paul Brook <paul@codesourcery.com>
367
368 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
369 (parse_operands): Use parse_big_immediate for OP_NILO.
370 (neon_cmode_for_logic_imm): Try smaller element sizes.
371 (neon_cmode_for_move_imm): Ditto.
372 (do_neon_logic): Handle .i64 pseudo-op.
373
3bb0c887
AM
3742006-09-29 Alan Modra <amodra@bigpond.net.au>
375
376 * po/POTFILES.in: Regenerate.
377
ef05d495
L
3782006-09-28 H.J. Lu <hongjiu.lu@intel.com>
379
380 * config/tc-i386.h (CpuMNI): Renamed to ...
381 (CpuSSSE3): This.
382 (CpuUnknownFlags): Updated.
383 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
384 and PROCESSOR_MEROM with PROCESSOR_CORE2.
385 * config/tc-i386.c: Updated.
386 * doc/c-i386.texi: Likewise.
a70ae331 387
ef05d495
L
388 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
389
d8ad03e9
NC
3902006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
391
392 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
393
df3ca5a3
NC
3942006-09-27 Nick Clifton <nickc@redhat.com>
395
396 * output-file.c (output_file_close): Prevent an infinite loop
397 reporting that stdoutput could not be closed.
398
2d447fca
JM
3992006-09-26 Mark Shinwell <shinwell@codesourcery.com>
400 Joseph Myers <joseph@codesourcery.com>
401 Ian Lance Taylor <ian@wasabisystems.com>
402 Ben Elliston <bje@wasabisystems.com>
403
404 * config/tc-arm.c (arm_cext_iwmmxt2): New.
405 (enum operand_parse_code): New code OP_RIWR_I32z.
406 (parse_operands): Handle OP_RIWR_I32z.
407 (do_iwmmxt_wmerge): New function.
408 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
409 a register.
410 (do_iwmmxt_wrwrwr_or_imm5): New function.
411 (insns): Mark instructions as RIWR_I32z as appropriate.
412 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
413 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
414 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
415 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
416 (md_begin): Handle IWMMXT2.
417 (arm_cpus): Add iwmmxt2.
418 (arm_extensions): Likewise.
419 (arm_archs): Likewise.
420
ba83aca1
BW
4212006-09-25 Bob Wilson <bob.wilson@acm.org>
422
423 * doc/as.texinfo (Overview): Revise description of --keep-locals.
424 Add xref to "Symbol Names".
425 (L): Refer to "local symbols" instead of "local labels". Move
426 definition to "Symbol Names" section; add xref to that section.
427 (Symbol Names): Use "Local Symbol Names" section to define local
428 symbols. Add "Local Labels" heading for description of temporary
429 forward/backward labels, and refer to those as "local labels".
430
539e75ad
L
4312006-09-23 H.J. Lu <hongjiu.lu@intel.com>
432
433 PR binutils/3235
434 * config/tc-i386.c (match_template): Check address size prefix
435 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
436 operand.
437
5e02f92e
AM
4382006-09-22 Alan Modra <amodra@bigpond.net.au>
439
440 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
441
885afe7b
AM
4422006-09-22 Alan Modra <amodra@bigpond.net.au>
443
444 * as.h (as_perror): Delete declaration.
445 * gdbinit.in (as_perror): Delete breakpoint.
446 * messages.c (as_perror): Delete function.
447 * doc/internals.texi: Remove as_perror description.
448 * listing.c (listing_print: Don't use as_perror.
449 * output-file.c (output_file_create, output_file_close): Likewise.
450 * symbols.c (symbol_create, symbol_clone): Likewise.
451 * write.c (write_contents): Likewise.
452 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
453 * config/tc-tic54x.c (tic54x_mlib): Likewise.
454
3aeeedbb
AM
4552006-09-22 Alan Modra <amodra@bigpond.net.au>
456
457 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
458 (ppc_handle_align): New function.
459 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
460 (SUB_SEGMENT_ALIGN): Define as zero.
461
96e9638b
BW
4622006-09-20 Bob Wilson <bob.wilson@acm.org>
463
464 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
465 (Overview): Skip cross reference in man page.
466
99ad8390
NC
4672006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
468
469 * configure.in: Add new target x86_64-pc-mingw64.
470 * configure: Regenerate.
471 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
472 * config/obj-coff.h: Add handling for TE_PEP target specific code
473 and definitions.
99ad8390
NC
474 * config/tc-i386.c: Add new targets.
475 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
476 (x86_64_target_format): Add new method for setup proper default
477 target cpu mode.
99ad8390
NC
478 * config/te-pep.h: Add new target definition header.
479 (TE_PEP): New macro: Identifies new target architecture.
480 (COFF_WITH_pex64): Set proper includes in bfd.
481 * NEWS: Mention new target.
482
73332571
BS
4832006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
484
485 * config/bfin-parse.y (binary): Change sub of const to add of negated
486 const.
487
1c0d3aa6
NC
4882006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
489
490 * config/tc-score.c: New file.
491 * config/tc-score.h: Newf file.
492 * configure.tgt: Add Score target.
493 * Makefile.am: Add Score files.
494 * Makefile.in: Regenerate.
495 * NEWS: Mention new target support.
496
4fa3602b
PB
4972006-09-16 Paul Brook <paul@codesourcery.com>
498
499 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
500 * doc/c-arm.texi (movsp): Document offset argument.
501
16dd5e42
PB
5022006-09-16 Paul Brook <paul@codesourcery.com>
503
504 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
505 unsigned int to avoid 64-bit host problems.
506
c4ae04ce
BS
5072006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
508
509 * config/bfin-parse.y (binary): Do some more constant folding for
510 additions.
511
e5d4a5a6
JB
5122006-09-13 Jan Beulich <jbeulich@novell.com>
513
514 * input-file.c (input_file_give_next_buffer): Demote as_bad to
515 as_warn.
516
1a1219cb
AM
5172006-09-13 Alan Modra <amodra@bigpond.net.au>
518
519 PR gas/3165
520 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
521 in parens.
522
f79d9c1d
AM
5232006-09-13 Alan Modra <amodra@bigpond.net.au>
524
525 * input-file.c (input_file_open): Replace as_perror with as_bad
526 so that gas exits with error on file errors. Correct error
527 message.
528 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 529 * input-file.h: Update comment.
f79d9c1d 530
f512f76f
NC
5312006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
532
533 PR gas/3172
534 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
535 registers as a sub-class of wC registers.
536
8d79fd44
AM
5372006-09-11 Alan Modra <amodra@bigpond.net.au>
538
539 PR gas/3165
540 * config/tc-mips.h (enum dwarf2_format): Forward declare.
541 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
542 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
543 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
544
6258339f
NC
5452006-09-08 Nick Clifton <nickc@redhat.com>
546
547 PR gas/3129
548 * doc/as.texinfo (Macro): Improve documentation about separating
549 macro arguments from following text.
550
f91e006c
PB
5512006-09-08 Paul Brook <paul@codesourcery.com>
552
553 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
554
466bbf93
PB
5552006-09-07 Paul Brook <paul@codesourcery.com>
556
557 * config/tc-arm.c (parse_operands): Mark operand as present.
558
428e3f1f
PB
5592006-09-04 Paul Brook <paul@codesourcery.com>
560
561 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
562 (do_neon_dyadic_if_i_d): Avoid setting U bit.
563 (do_neon_mac_maybe_scalar): Ditto.
564 (do_neon_dyadic_narrow): Force operand type to NT_integer.
565 (insns): Remove out of date comments.
566
fb25138b
NC
5672006-08-29 Nick Clifton <nickc@redhat.com>
568
569 * read.c (s_align): Initialize the 'stopc' variable to prevent
570 compiler complaints about it being used without being
571 initialized.
572 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
573 s_float_space, s_struct, cons_worker, equals): Likewise.
574
5091343a
AM
5752006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
576
577 * ecoff.c (ecoff_directive_val): Fix message typo.
578 * config/tc-ns32k.c (convert_iif): Likewise.
579 * config/tc-sh64.c (shmedia_check_limits): Likewise.
580
1f2a7e38
BW
5812006-08-25 Sterling Augustine <sterling@tensilica.com>
582 Bob Wilson <bob.wilson@acm.org>
583
584 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
585 the state of the absolute_literals directive. Remove align frag at
586 the start of the literal pool position.
587
34135039
BW
5882006-08-25 Bob Wilson <bob.wilson@acm.org>
589
590 * doc/c-xtensa.texi: Add @group commands in examples.
591
74869ac7
BW
5922006-08-24 Bob Wilson <bob.wilson@acm.org>
593
594 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
595 (INIT_LITERAL_SECTION_NAME): Delete.
596 (lit_state struct): Remove segment names, init_lit_seg, and
597 fini_lit_seg. Add lit_prefix and current_text_seg.
598 (init_literal_head_h, init_literal_head): Delete.
599 (fini_literal_head_h, fini_literal_head): Delete.
600 (xtensa_begin_directive): Move argument parsing to
601 xtensa_literal_prefix function.
602 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
603 (xtensa_literal_prefix): Parse the directive argument here and
604 record it in the lit_prefix field. Remove code to derive literal
605 section names.
606 (linkonce_len): New.
607 (get_is_linkonce_section): Use linkonce_len. Check for any
608 ".gnu.linkonce.*" section, not just text sections.
609 (md_begin): Remove initialization of deleted lit_state fields.
610 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
611 to init_literal_head and fini_literal_head.
612 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
613 when traversing literal_head list.
614 (match_section_group): New.
615 (cache_literal_section): Rewrite to determine the literal section
616 name on the fly, create the section and return it.
617 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
618 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
619 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
620 Use xtensa_get_property_section from bfd.
621 (retrieve_xtensa_section): Delete.
622 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
623 description to refer to plural literal sections and add xref to
624 the Literal Directive section.
625 (Literal Directive): Describe new rules for deriving literal section
626 names. Add footnote for special case of .init/.fini with
627 --text-section-literals.
628 (Literal Prefix Directive): Replace old naming rules with xref to the
629 Literal Directive section.
630
87a1fd79
JM
6312006-08-21 Joseph Myers <joseph@codesourcery.com>
632
633 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
634 merging with previous long opcode.
635
7148cc28
NC
6362006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
637
638 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
639 * Makefile.in: Regenerate.
640 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
641 renamed. Adjust.
642
3e9e4fcf
JB
6432006-08-16 Julian Brown <julian@codesourcery.com>
644
645 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
646 to use ARM instructions on non-ARM-supporting cores.
647 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
648 mode automatically based on cpu variant.
649 (md_begin): Call above function.
650
267d2029
JB
6512006-08-16 Julian Brown <julian@codesourcery.com>
652
653 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
654 recognized in non-unified syntax mode.
655
4be041b2
TS
6562006-08-15 Thiemo Seufer <ths@mips.com>
657 Nigel Stephens <nigel@mips.com>
658 David Ung <davidu@mips.com>
659
660 * configure.tgt: Handle mips*-sde-elf*.
661
3a93f742
TS
6622006-08-12 Thiemo Seufer <ths@networkno.de>
663
664 * config/tc-mips.c (mips16_ip): Fix argument register handling
665 for restore instruction.
666
1737851b
BW
6672006-08-08 Bob Wilson <bob.wilson@acm.org>
668
669 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
670 (out_sleb128): New.
671 (out_fixed_inc_line_addr): New.
672 (process_entries): Use out_fixed_inc_line_addr when
673 DWARF2_USE_FIXED_ADVANCE_PC is set.
674 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
675
e14e52f8
DD
6762006-08-08 DJ Delorie <dj@redhat.com>
677
678 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
679 vs full symbols so that we never have more than one pointer value
680 for any given symbol in our symbol table.
681
802f5d9e
NC
6822006-08-08 Sterling Augustine <sterling@tensilica.com>
683
684 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
685 and emit DW_AT_ranges when code in compilation unit is not
686 contiguous.
687 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
688 is not contiguous.
689 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
690 (out_debug_ranges): New function to emit .debug_ranges section
691 when code is not contiguous.
692
720abc60
NC
6932006-08-08 Nick Clifton <nickc@redhat.com>
694
695 * config/tc-arm.c (WARN_DEPRECATED): Enable.
696
f0927246
NC
6972006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
698
699 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
700 only block.
701 (pe_directive_secrel) [TE_PE]: New function.
702 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
703 loc, loc_mark_labels.
704 [TE_PE]: Handle secrel32.
705 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
706 call.
707 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
708 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
709 (md_section_align): Only round section sizes here for AOUT
710 targets.
711 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
712 (tc_pe_dwarf2_emit_offset): New function.
713 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
714 (cons_fix_new_arm): Handle O_secrel.
715 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
716 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
717 of OBJ_ELF only block.
718 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
719 tc_pe_dwarf2_emit_offset.
720
55e6e397
RS
7212006-08-04 Richard Sandiford <richard@codesourcery.com>
722
723 * config/tc-sh.c (apply_full_field_fix): New function.
724 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
725 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
726 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
727 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
728
9cd19b17
NC
7292006-08-03 Nick Clifton <nickc@redhat.com>
730
731 PR gas/2991
732 * config.in: Regenerate.
733
97f87066
JM
7342006-08-03 Joseph Myers <joseph@codesourcery.com>
735
736 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 737 for OP_RIWR_RIWC.
97f87066 738
41adaa5c
JM
7392006-08-03 Joseph Myers <joseph@codesourcery.com>
740
741 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
742 (parse_operands): Handle it.
743 (insns): Use it for tmcr and tmrc.
744
9d7cbccd
NC
7452006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
746
747 PR binutils/2983
748 * config/tc-i386.c (md_parse_option): Treat any target starting
749 with elf64_x86_64 as a viable target for the -64 switch.
750 (i386_target_format): For 64-bit ELF flavoured output use
751 ELF_TARGET_FORMAT64.
752 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
753
c973bc5c
NC
7542006-08-02 Nick Clifton <nickc@redhat.com>
755
756 PR gas/2991
757 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
758 bfd/aclocal.m4.
759 * configure.in: Run BFD_BINARY_FOPEN.
760 * configure: Regenerate.
761 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
762 file to include.
763
cfde7f70
L
7642006-08-01 H.J. Lu <hongjiu.lu@intel.com>
765
766 * config/tc-i386.c (md_assemble): Don't update
767 cpu_arch_isa_flags.
768
b4c71f56
TS
7692006-08-01 Thiemo Seufer <ths@mips.com>
770
771 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
772
54f4ddb3
TS
7732006-08-01 Thiemo Seufer <ths@mips.com>
774
775 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
776 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
777 BFD_RELOC_32 and BFD_RELOC_16.
778 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
779 md_convert_frag, md_obj_end): Fix comment formatting.
780
d103cf61
TS
7812006-07-31 Thiemo Seufer <ths@mips.com>
782
783 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
784 handling for BFD_RELOC_MIPS16_JMP.
785
601e61cd
NC
7862006-07-24 Andreas Schwab <schwab@suse.de>
787
788 PR/2756
789 * read.c (read_a_source_file): Ignore unknown text after line
790 comment character. Fix misleading comment.
791
b45619c0
NC
7922006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
793
794 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
795 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
796 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
797 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
798 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
799 doc/c-z80.texi, doc/internals.texi: Fix some typos.
800
784906c5
NC
8012006-07-21 Nick Clifton <nickc@redhat.com>
802
803 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
804 linker testsuite.
805
d5f010e9
TS
8062006-07-20 Thiemo Seufer <ths@mips.com>
807 Nigel Stephens <nigel@mips.com>
808
809 * config/tc-mips.c (md_parse_option): Don't infer optimisation
810 options from debug options.
811
35d3d567
TS
8122006-07-20 Thiemo Seufer <ths@mips.com>
813
814 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
815 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
816
401a54cf
PB
8172006-07-19 Paul Brook <paul@codesourcery.com>
818
819 * config/tc-arm.c (insns): Fix rbit Arm opcode.
820
16805f35
PB
8212006-07-18 Paul Brook <paul@codesourcery.com>
822
823 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
824 (md_convert_frag): Use correct reloc for add_pc. Use
825 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
826 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
827 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
828
d9e05e4e
AM
8292006-07-17 Mat Hostetter <mat@lcs.mit.edu>
830
831 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
832 when file and line unknown.
833
f43abd2b
TS
8342006-07-17 Thiemo Seufer <ths@mips.com>
835
836 * read.c (s_struct): Use IS_ELF.
837 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
838 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
839 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
840 s_mips_mask): Likewise.
841
a2902af6
TS
8422006-07-16 Thiemo Seufer <ths@mips.com>
843 David Ung <davidu@mips.com>
844
845 * read.c (s_struct): Handle ELF section changing.
846 * config/tc-mips.c (s_align): Leave enabling auto-align to the
847 generic code.
848 (s_change_sec): Try section changing only if we output ELF.
849
d32cad65
L
8502006-07-15 H.J. Lu <hongjiu.lu@intel.com>
851
852 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
853 CpuAmdFam10.
854 (smallest_imm_type): Remove Cpu086.
855 (i386_target_format): Likewise.
856
857 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
858 Update CpuXXX.
859
050dfa73
MM
8602006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
861 Michael Meissner <michael.meissner@amd.com>
862
863 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
864 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
865 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
866 architecture.
867 (i386_align_code): Ditto.
868 (md_assemble_code): Add support for insertq/extrq instructions,
869 swapping as needed for intel syntax.
870 (swap_imm_operands): New function to swap immediate operands.
871 (swap_operands): Deal with 4 operand instructions.
872 (build_modrm_byte): Add support for insertq instruction.
873
6b2de085
L
8742006-07-13 H.J. Lu <hongjiu.lu@intel.com>
875
876 * config/tc-i386.h (Size64): Fix a typo in comment.
877
01eaea5a
NC
8782006-07-12 Nick Clifton <nickc@redhat.com>
879
880 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 881 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
882 already been checked here.
883
1e85aad8
JW
8842006-07-07 James E Wilson <wilson@specifix.com>
885
886 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
887
1370e33d
NC
8882006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
889 Nick Clifton <nickc@redhat.com>
890
891 PR binutils/2877
892 * doc/as.texi: Fix spelling typo: branchs => branches.
893 * doc/c-m68hc11.texi: Likewise.
894 * config/tc-m68hc11.c: Likewise.
895 Support old spelling of command line switch for backwards
896 compatibility.
897
5f0fe04b
TS
8982006-07-04 Thiemo Seufer <ths@mips.com>
899 David Ung <davidu@mips.com>
900
901 * config/tc-mips.c (s_is_linkonce): New function.
902 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
903 weak, external, and linkonce symbols.
904 (pic_need_relax): Use s_is_linkonce.
905
85234291
L
9062006-06-24 H.J. Lu <hongjiu.lu@intel.com>
907
908 * doc/as.texinfo (Org): Remove space.
909 (P2align): Add "@var{abs-expr},".
910
ccc9c027
L
9112006-06-23 H.J. Lu <hongjiu.lu@intel.com>
912
913 * config/tc-i386.c (cpu_arch_tune_set): New.
914 (cpu_arch_isa): Likewise.
915 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
916 nops with short or long nop sequences based on -march=/.arch
917 and -mtune=.
918 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
919 set cpu_arch_tune and cpu_arch_tune_flags.
920 (md_parse_option): For -march=, set cpu_arch_isa and set
921 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
922 0. Set cpu_arch_tune_set to 1 for -mtune=.
923 (i386_target_format): Don't set cpu_arch_tune.
924
d4dc2f22
TS
9252006-06-23 Nigel Stephens <nigel@mips.com>
926
927 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
928 generated .sbss.* and .gnu.linkonce.sb.*.
929
a8dbcb85
TS
9302006-06-23 Thiemo Seufer <ths@mips.com>
931 David Ung <davidu@mips.com>
932
933 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
934 label_list.
935 * config/tc-mips.c (label_list): Define per-segment label_list.
936 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
937 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
938 mips_from_file_after_relocs, mips_define_label): Use per-segment
939 label_list.
940
3994f87e
TS
9412006-06-22 Thiemo Seufer <ths@mips.com>
942
943 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
944 (append_insn): Use it.
945 (md_apply_fix): Whitespace formatting.
946 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
947 mips16_extended_frag): Remove register specifier.
948 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
949 constants.
950
fa073d69
MS
9512006-06-21 Mark Shinwell <shinwell@codesourcery.com>
952
953 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
954 a directive saving VFP registers for ARMv6 or later.
955 (s_arm_unwind_save): Add parameter arch_v6 and call
956 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
957 appropriate.
958 (md_pseudo_table): Add entry for new "vsave" directive.
959 * doc/c-arm.texi: Correct error in example for "save"
960 directive (fstmdf -> fstmdx). Also document "vsave" directive.
961
8e77b565 9622006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
963 Anatoly Sokolov <aesok@post.ru>
964
a70ae331
AM
965 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
966 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
967 atmega164p/atmega324p.
968 * doc/c-avr.texi: Document new mcu and arch options.
969
8b1ad454
NC
9702006-06-17 Nick Clifton <nickc@redhat.com>
971
972 * config/tc-arm.c (enum parse_operand_result): Move outside of
973 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
974
9103f4f4
L
9752006-06-16 H.J. Lu <hongjiu.lu@intel.com>
976
977 * config/tc-i386.h (processor_type): New.
978 (arch_entry): Add type.
979
980 * config/tc-i386.c (cpu_arch_tune): New.
981 (cpu_arch_tune_flags): Likewise.
982 (cpu_arch_isa_flags): Likewise.
983 (cpu_arch): Updated.
984 (set_cpu_arch): Also update cpu_arch_isa_flags.
985 (md_assemble): Update cpu_arch_isa_flags.
986 (OPTION_MARCH): New.
987 (OPTION_MTUNE): Likewise.
988 (md_longopts): Add -march= and -mtune=.
989 (md_parse_option): Support -march= and -mtune=.
990 (md_show_usage): Add -march=CPU/-mtune=CPU.
991 (i386_target_format): Also update cpu_arch_isa_flags,
992 cpu_arch_tune and cpu_arch_tune_flags.
993
994 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
995
996 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
997
4962c51a
MS
9982006-06-15 Mark Shinwell <shinwell@codesourcery.com>
999
1000 * config/tc-arm.c (enum parse_operand_result): New.
1001 (struct group_reloc_table_entry): New.
1002 (enum group_reloc_type): New.
1003 (group_reloc_table): New array.
1004 (find_group_reloc_table_entry): New function.
1005 (parse_shifter_operand_group_reloc): New function.
1006 (parse_address_main): New function, incorporating code
1007 from the old parse_address function. To be used via...
1008 (parse_address): wrapper for parse_address_main; and
1009 (parse_address_group_reloc): new function, likewise.
1010 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
1011 OP_ADDRGLDRS, OP_ADDRGLDC.
1012 (parse_operands): Support for these new operand codes.
1013 New macro po_misc_or_fail_no_backtrack.
1014 (encode_arm_cp_address): Preserve group relocations.
1015 (insns): Modify to use the above operand codes where group
1016 relocations are permitted.
1017 (md_apply_fix): Handle the group relocations
1018 ALU_PC_G0_NC through LDC_SB_G2.
1019 (tc_gen_reloc): Likewise.
1020 (arm_force_relocation): Leave group relocations for the linker.
1021 (arm_fix_adjustable): Likewise.
1022
cd2f129f
JB
10232006-06-15 Julian Brown <julian@codesourcery.com>
1024
1025 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
1026 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
1027 relocs properly.
1028
46e883c5
L
10292006-06-12 H.J. Lu <hongjiu.lu@intel.com>
1030
1031 * config/tc-i386.c (process_suffix): Don't add rex64 for
1032 "xchg %rax,%rax".
1033
1787fe5b
TS
10342006-06-09 Thiemo Seufer <ths@mips.com>
1035
1036 * config/tc-mips.c (mips_ip): Maintain argument count.
1037
96f989c2
AM
10382006-06-09 Alan Modra <amodra@bigpond.net.au>
1039
1040 * config/tc-iq2000.c: Include sb.h.
1041
7c752c2a
TS
10422006-06-08 Nigel Stephens <nigel@mips.com>
1043
1044 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
1045 aliases for better compatibility with SGI tools.
1046
03bf704f
AM
10472006-06-08 Alan Modra <amodra@bigpond.net.au>
1048
1049 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
1050 * Makefile.am (GASLIBS): Expand @BFDLIB@.
1051 (BFDVER_H): Delete.
1052 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
1053 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
1054 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
1055 Run "make dep-am".
1056 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
1057 * Makefile.in: Regenerate.
1058 * doc/Makefile.in: Regenerate.
1059 * configure: Regenerate.
1060
6648b7cf
JM
10612006-06-07 Joseph S. Myers <joseph@codesourcery.com>
1062
1063 * po/Make-in (pdf, ps): New dummy targets.
1064
037e8744
JB
10652006-06-07 Julian Brown <julian@codesourcery.com>
1066
1067 * config/tc-arm.c (stdarg.h): include.
1068 (arm_it): Add uncond_value field. Add isvec and issingle to operand
1069 array.
1070 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
1071 REG_TYPE_NSDQ (single, double or quad vector reg).
1072 (reg_expected_msgs): Update.
1073 (BAD_FPU): Add macro for unsupported FPU instruction error.
1074 (parse_neon_type): Support 'd' as an alias for .f64.
1075 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
1076 sets of registers.
1077 (parse_vfp_reg_list): Don't update first arg on error.
1078 (parse_neon_mov): Support extra syntax for VFP moves.
1079 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
1080 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
1081 (parse_operands): Support isvec, issingle operands fields, new parse
1082 codes above.
1083 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
1084 msr variants.
1085 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
1086 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1087 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1088 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1089 shapes.
1090 (neon_shape): Redefine in terms of above.
1091 (neon_shape_class): New enumeration, table of shape classes.
1092 (neon_shape_el): New enumeration. One element of a shape.
1093 (neon_shape_el_size): Register widths of above, where appropriate.
1094 (neon_shape_info): New struct. Info for shape table.
1095 (neon_shape_tab): New array.
1096 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1097 (neon_check_shape): Rewrite as...
1098 (neon_select_shape): New function to classify instruction shapes,
1099 driven by new table neon_shape_tab array.
1100 (neon_quad): New function. Return 1 if shape should set Q flag in
1101 instructions (or equivalent), 0 otherwise.
1102 (type_chk_of_el_type): Support F64.
1103 (el_type_of_type_chk): Likewise.
1104 (neon_check_type): Add support for VFP type checking (VFP data
1105 elements fill their containing registers).
1106 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1107 in thumb mode for VFP instructions.
1108 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1109 and encode the current instruction as if it were that opcode.
1110 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1111 arguments, call function in PFN.
1112 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1113 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1114 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1115 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1116 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1117 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1118 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1119 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1120 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1121 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1122 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1123 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1124 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1125 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1126 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1127 neon_quad.
1128 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1129 between VFP and Neon turns out to belong to Neon. Perform
1130 architecture check and fill in condition field if appropriate.
1131 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1132 (do_neon_cvt): Add support for VFP variants of instructions.
1133 (neon_cvt_flavour): Extend to cover VFP conversions.
1134 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1135 vmov variants.
1136 (do_neon_ldr_str): Handle single-precision VFP load/store.
1137 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1138 NS_NULL not NS_IGNORE.
1139 (opcode_tag): Add OT_csuffixF for operands which either take a
1140 conditional suffix, or have 0xF in the condition field.
1141 (md_assemble): Add support for OT_csuffixF.
1142 (NCE): Replace macro with...
1143 (NCE_tag, NCE, NCEF): New macros.
1144 (nCE): Replace macro with...
1145 (nCE_tag, nCE, nCEF): New macros.
1146 (insns): Add support for VFP insns or VFP versions of insns msr,
1147 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1148 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1149 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1150 VFP/Neon insns together.
1151
ebd1c875
AM
11522006-06-07 Alan Modra <amodra@bigpond.net.au>
1153 Ladislav Michl <ladis@linux-mips.org>
1154
1155 * app.c: Don't include headers already included by as.h.
1156 * as.c: Likewise.
1157 * atof-generic.c: Likewise.
1158 * cgen.c: Likewise.
1159 * dwarf2dbg.c: Likewise.
1160 * expr.c: Likewise.
1161 * input-file.c: Likewise.
1162 * input-scrub.c: Likewise.
1163 * macro.c: Likewise.
1164 * output-file.c: Likewise.
1165 * read.c: Likewise.
1166 * sb.c: Likewise.
1167 * config/bfin-lex.l: Likewise.
1168 * config/obj-coff.h: Likewise.
1169 * config/obj-elf.h: Likewise.
1170 * config/obj-som.h: Likewise.
1171 * config/tc-arc.c: Likewise.
1172 * config/tc-arm.c: Likewise.
1173 * config/tc-avr.c: Likewise.
1174 * config/tc-bfin.c: Likewise.
1175 * config/tc-cris.c: Likewise.
1176 * config/tc-d10v.c: Likewise.
1177 * config/tc-d30v.c: Likewise.
1178 * config/tc-dlx.h: Likewise.
1179 * config/tc-fr30.c: Likewise.
1180 * config/tc-frv.c: Likewise.
1181 * config/tc-h8300.c: Likewise.
1182 * config/tc-hppa.c: Likewise.
1183 * config/tc-i370.c: Likewise.
1184 * config/tc-i860.c: Likewise.
1185 * config/tc-i960.c: Likewise.
1186 * config/tc-ip2k.c: Likewise.
1187 * config/tc-iq2000.c: Likewise.
1188 * config/tc-m32c.c: Likewise.
1189 * config/tc-m32r.c: Likewise.
1190 * config/tc-maxq.c: Likewise.
1191 * config/tc-mcore.c: Likewise.
1192 * config/tc-mips.c: Likewise.
1193 * config/tc-mmix.c: Likewise.
1194 * config/tc-mn10200.c: Likewise.
1195 * config/tc-mn10300.c: Likewise.
1196 * config/tc-msp430.c: Likewise.
1197 * config/tc-mt.c: Likewise.
1198 * config/tc-ns32k.c: Likewise.
1199 * config/tc-openrisc.c: Likewise.
1200 * config/tc-ppc.c: Likewise.
1201 * config/tc-s390.c: Likewise.
1202 * config/tc-sh.c: Likewise.
1203 * config/tc-sh64.c: Likewise.
1204 * config/tc-sparc.c: Likewise.
1205 * config/tc-tic30.c: Likewise.
1206 * config/tc-tic4x.c: Likewise.
1207 * config/tc-tic54x.c: Likewise.
1208 * config/tc-v850.c: Likewise.
1209 * config/tc-vax.c: Likewise.
1210 * config/tc-xc16x.c: Likewise.
1211 * config/tc-xstormy16.c: Likewise.
1212 * config/tc-xtensa.c: Likewise.
1213 * config/tc-z80.c: Likewise.
1214 * config/tc-z8k.c: Likewise.
1215 * macro.h: Don't include sb.h or ansidecl.h.
1216 * sb.h: Don't include stdio.h or ansidecl.h.
1217 * cond.c: Include sb.h.
1218 * itbl-lex.l: Include as.h instead of other system headers.
1219 * itbl-parse.y: Likewise.
1220 * itbl-ops.c: Similarly.
1221 * itbl-ops.h: Don't include as.h or ansidecl.h.
1222 * config/bfin-defs.h: Don't include bfd.h or as.h.
1223 * config/bfin-parse.y: Include as.h instead of other system headers.
1224
9622b051
AM
12252006-06-06 Ben Elliston <bje@au.ibm.com>
1226 Anton Blanchard <anton@samba.org>
1227
1228 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1229 (md_show_usage): Document it.
1230 (ppc_setup_opcodes): Test power6 opcode flag bits.
1231 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1232
65263ce3
TS
12332006-06-06 Thiemo Seufer <ths@mips.com>
1234 Chao-ying Fu <fu@mips.com>
1235
1236 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1237 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1238 (macro_build): Update comment.
1239 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1240 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1241 CPU_HAS_MDMX.
1242 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1243 MIPS_CPU_ASE_MDMX flags for sb1.
1244
a9e24354
TS
12452006-06-05 Thiemo Seufer <ths@mips.com>
1246
1247 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1248 appropriate.
1249 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1250 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1251 and MT instructions a fatal error. Use INSERT_OPERAND where
1252 appropriate. Improve warnings for break and wait code overflows.
1253 Use symbolic constant of OP_MASK_COPZ.
1254 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1255
4cfe2c59
DJ
12562006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1257
1258 * po/Make-in (top_builddir): Define.
1259
e10fad12
JM
12602006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1261
1262 * doc/Makefile.am (TEXI2DVI): Define.
1263 * doc/Makefile.in: Regenerate.
1264 * doc/c-arc.texi: Fix typo.
1265
12e64c2c
AM
12662006-06-01 Alan Modra <amodra@bigpond.net.au>
1267
1268 * config/obj-ieee.c: Delete.
1269 * config/obj-ieee.h: Delete.
1270 * Makefile.am (OBJ_FORMATS): Remove ieee.
1271 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1272 (obj-ieee.o): Remove rule.
1273 * Makefile.in: Regenerate.
1274 * configure.in (atof): Remove tahoe.
1275 (OBJ_MAYBE_IEEE): Don't define.
1276 * configure: Regenerate.
1277 * config.in: Regenerate.
1278 * doc/Makefile.in: Regenerate.
1279 * po/POTFILES.in: Regenerate.
1280
20e95c23
DJ
12812006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1282
1283 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1284 and LIBINTL_DEP everywhere.
1285 (INTLLIBS): Remove.
1286 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1287 * acinclude.m4: Include new gettext macros.
1288 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1289 Remove local code for po/Makefile.
1290 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1291
eebf07fb
NC
12922006-05-30 Nick Clifton <nickc@redhat.com>
1293
1294 * po/es.po: Updated Spanish translation.
1295
b6aee19e
DC
12962006-05-06 Denis Chertykov <denisc@overta.ru>
1297
1298 * doc/c-avr.texi: New file.
1299 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1300 * doc/all.texi: Set AVR
1301 * doc/as.texinfo: Include c-avr.texi
1302
f8fdc850 13032006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1304
f8fdc850
JZ
1305 * config/bfin-parse.y (check_macfunc): Loose the condition of
1306 calling check_multiply_halfregs ().
1307
a3205465
JZ
13082006-05-25 Jie Zhang <jie.zhang@analog.com>
1309
1310 * config/bfin-parse.y (asm_1): Better check and deal with
1311 vector and scalar Multiply 16-Bit Operands instructions.
1312
9b52905e
NC
13132006-05-24 Nick Clifton <nickc@redhat.com>
1314
1315 * config/tc-hppa.c: Convert to ISO C90 format.
1316 * config/tc-hppa.h: Likewise.
1317
13182006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1319 Randolph Chung <randolph@tausq.org>
a70ae331 1320
9b52905e
NC
1321 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1322 is_tls_ieoff, is_tls_leoff): Define.
1323 (fix_new_hppa): Handle TLS.
1324 (cons_fix_new_hppa): Likewise.
1325 (pa_ip): Likewise.
1326 (md_apply_fix): Handle TLS relocs.
1327 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1328
a70ae331 13292006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1330
1331 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1332
ad3fea08
TS
13332006-05-23 Thiemo Seufer <ths@mips.com>
1334 David Ung <davidu@mips.com>
1335 Nigel Stephens <nigel@mips.com>
1336
1337 [ gas/ChangeLog ]
1338 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1339 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1340 ISA_HAS_MXHC1): New macros.
1341 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1342 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1343 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1344 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1345 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1346 (mips_after_parse_args): Change default handling of float register
1347 size to account for 32bit code with 64bit FP. Better sanity checking
1348 of ISA/ASE/ABI option combinations.
1349 (s_mipsset): Support switching of GPR and FPR sizes via
1350 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1351 options.
1352 (mips_elf_final_processing): We should record the use of 64bit FP
1353 registers in 32bit code but we don't, because ELF header flags are
1354 a scarce ressource.
1355 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1356 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1357 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1358 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1359 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1360 missing -march options. Document .set arch=CPU. Move .set smartmips
1361 to ASE page. Use @code for .set FOO examples.
1362
8b64503a
JZ
13632006-05-23 Jie Zhang <jie.zhang@analog.com>
1364
1365 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1366 if needed.
1367
403022e0
JZ
13682006-05-23 Jie Zhang <jie.zhang@analog.com>
1369
1370 * config/bfin-defs.h (bfin_equals): Remove declaration.
1371 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1372 * config/tc-bfin.c (bfin_name_is_register): Remove.
1373 (bfin_equals): Remove.
1374 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1375 (bfin_name_is_register): Remove declaration.
1376
7455baf8
TS
13772006-05-19 Thiemo Seufer <ths@mips.com>
1378 Nigel Stephens <nigel@mips.com>
1379
1380 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1381 (mips_oddfpreg_ok): New function.
1382 (mips_ip): Use it.
1383
707bfff6
TS
13842006-05-19 Thiemo Seufer <ths@mips.com>
1385 David Ung <davidu@mips.com>
1386
1387 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1388 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1389 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1390 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1391 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1392 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1393 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1394 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1395 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1396 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1397 reg_names_o32, reg_names_n32n64): Define register classes.
1398 (reg_lookup): New function, use register classes.
1399 (md_begin): Reserve register names in the symbol table. Simplify
1400 OBJ_ELF defines.
1401 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1402 Use reg_lookup.
1403 (mips16_ip): Use reg_lookup.
1404 (tc_get_register): Likewise.
1405 (tc_mips_regname_to_dw2regnum): New function.
1406
1df69f4f
TS
14072006-05-19 Thiemo Seufer <ths@mips.com>
1408
1409 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1410 Un-constify string argument.
1411 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1412 Likewise.
1413 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1414 Likewise.
1415 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1416 Likewise.
1417 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1418 Likewise.
1419 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1420 Likewise.
1421 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1422 Likewise.
1423
377260ba
NS
14242006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1425
1426 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1427 cfloat/m68881 to correct architecture before using it.
1428
cce7653b
NC
14292006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1430
a70ae331 1431 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1432 constant values.
1433
b0796911
PB
14342006-05-15 Paul Brook <paul@codesourcery.com>
1435
1436 * config/tc-arm.c (arm_adjust_symtab): Use
1437 bfd_is_arm_special_symbol_name.
1438
64b607e6
BW
14392006-05-15 Bob Wilson <bob.wilson@acm.org>
1440
1441 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1442 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1443 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1444 Handle errors from calls to xtensa_opcode_is_* functions.
1445
9b3f89ee
TS
14462006-05-14 Thiemo Seufer <ths@mips.com>
1447
1448 * config/tc-mips.c (macro_build): Test for currently active
1449 mips16 option.
1450 (mips16_ip): Reject invalid opcodes.
1451
370b66a1
CD
14522006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1453
1454 * doc/as.texinfo: Rename "Index" to "AS Index",
1455 and "ABORT" to "ABORT (COFF)".
1456
b6895b4f
PB
14572006-05-11 Paul Brook <paul@codesourcery.com>
1458
1459 * config/tc-arm.c (parse_half): New function.
1460 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1461 (parse_operands): Ditto.
1462 (do_mov16): Reject invalid relocations.
1463 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1464 (insns): Replace Iffff with HALF.
1465 (md_apply_fix): Add MOVW and MOVT relocs.
1466 (tc_gen_reloc): Ditto.
1467 * doc/c-arm.texi: Document relocation operators
1468
e28387c3
PB
14692006-05-11 Paul Brook <paul@codesourcery.com>
1470
1471 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1472
89ee2ebe
TS
14732006-05-11 Thiemo Seufer <ths@mips.com>
1474
1475 * config/tc-mips.c (append_insn): Don't check the range of j or
1476 jal addresses.
1477
53baae48
NC
14782006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1479
1480 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1481 relocs against external symbols for WinCE targets.
53baae48
NC
1482 (md_apply_fix): Likewise.
1483
4e2a74a8
TS
14842006-05-09 David Ung <davidu@mips.com>
1485
1486 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1487 j or jal address.
1488
337ff0a5
NC
14892006-05-09 Nick Clifton <nickc@redhat.com>
1490
1491 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1492 against symbols which are not going to be placed into the symbol
1493 table.
1494
8c9f705e
BE
14952006-05-09 Ben Elliston <bje@au.ibm.com>
1496
1497 * expr.c (operand): Remove `if (0 && ..)' statement and
1498 subsequently unused target_op label. Collapse `if (1 || ..)'
1499 statement.
1500 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1501 separately above the switch.
1502
2fd0d2ac
NC
15032006-05-08 Nick Clifton <nickc@redhat.com>
1504
1505 PR gas/2623
1506 * config/tc-msp430.c (line_separator_character): Define as |.
1507
e16bfa71
TS
15082006-05-08 Thiemo Seufer <ths@mips.com>
1509 Nigel Stephens <nigel@mips.com>
1510 David Ung <davidu@mips.com>
1511
1512 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1513 (mips_opts): Likewise.
1514 (file_ase_smartmips): New variable.
1515 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1516 (macro_build): Handle SmartMIPS instructions.
1517 (mips_ip): Likewise.
1518 (md_longopts): Add argument handling for smartmips.
1519 (md_parse_options, mips_after_parse_args): Likewise.
1520 (s_mipsset): Add .set smartmips support.
1521 (md_show_usage): Document -msmartmips/-mno-smartmips.
1522 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1523 .set smartmips.
1524 * doc/c-mips.texi: Likewise.
1525
32638454
AM
15262006-05-08 Alan Modra <amodra@bigpond.net.au>
1527
1528 * write.c (relax_segment): Add pass count arg. Don't error on
1529 negative org/space on first two passes.
1530 (relax_seg_info): New struct.
1531 (relax_seg, write_object_file): Adjust.
1532 * write.h (relax_segment): Update prototype.
1533
b7fc2769
JB
15342006-05-05 Julian Brown <julian@codesourcery.com>
1535
1536 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1537 checking.
1538 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1539 architecture version checks.
1540 (insns): Allow overlapping instructions to be used in VFP mode.
1541
7f841127
L
15422006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1543
1544 PR gas/2598
1545 * config/obj-elf.c (obj_elf_change_section): Allow user
1546 specified SHF_ALPHA_GPREL.
1547
73160847
NC
15482006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1549
1550 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1551 for PMEM related expressions.
1552
56487c55
NC
15532006-05-05 Nick Clifton <nickc@redhat.com>
1554
1555 PR gas/2582
1556 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1557 insertion of a directory separator character into a string at a
1558 given offset. Uses heuristics to decide when to use a backslash
1559 character rather than a forward-slash character.
1560 (dwarf2_directive_loc): Use the macro.
1561 (out_debug_info): Likewise.
1562
d43b4baf
TS
15632006-05-05 Thiemo Seufer <ths@mips.com>
1564 David Ung <davidu@mips.com>
1565
1566 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1567 instruction.
1568 (macro): Add new case M_CACHE_AB.
1569
088fa78e
KH
15702006-05-04 Kazu Hirata <kazu@codesourcery.com>
1571
1572 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1573 (opcode_lookup): Issue a warning for opcode with
1574 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1575 identical to OT_cinfix3.
1576 (TxC3w, TC3w, tC3w): New.
1577 (insns): Use tC3w and TC3w for comparison instructions with
1578 's' suffix.
1579
c9049d30
AM
15802006-05-04 Alan Modra <amodra@bigpond.net.au>
1581
1582 * subsegs.h (struct frchain): Delete frch_seg.
1583 (frchain_root): Delete.
1584 (seg_info): Define as macro.
1585 * subsegs.c (frchain_root): Delete.
1586 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1587 (subsegs_begin, subseg_change): Adjust for above.
1588 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1589 rather than to one big list.
1590 (subseg_get): Don't special case abs, und sections.
1591 (subseg_new, subseg_force_new): Don't set frchainP here.
1592 (seg_info): Delete.
1593 (subsegs_print_statistics): Adjust frag chain control list traversal.
1594 * debug.c (dmp_frags): Likewise.
1595 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1596 at frchain_root. Make use of known frchain ordering.
1597 (last_frag_for_seg): Likewise.
1598 (get_frag_fix): Likewise. Add seg param.
1599 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1600 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1601 (SUB_SEGMENT_ALIGN): Likewise.
1602 (subsegs_finish): Adjust frchain list traversal.
1603 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1604 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1605 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1606 (xtensa_fix_b_j_loop_end_frags): Likewise.
1607 (xtensa_fix_close_loop_end_frags): Likewise.
1608 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1609 (retrieve_segment_info): Delete frch_seg initialisation.
1610
f592407e
AM
16112006-05-03 Alan Modra <amodra@bigpond.net.au>
1612
1613 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1614 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1615 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1616 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1617
df7849c5
JM
16182006-05-02 Joseph Myers <joseph@codesourcery.com>
1619
1620 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1621 here.
1622 (md_apply_fix3): Multiply offset by 4 here for
1623 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1624
2d545b82
L
16252006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1626 Jan Beulich <jbeulich@novell.com>
1627
1628 * config/tc-i386.c (output_invalid_buf): Change size for
1629 unsigned char.
1630 * config/tc-tic30.c (output_invalid_buf): Likewise.
1631
1632 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1633 unsigned char.
1634 * config/tc-tic30.c (output_invalid): Likewise.
1635
38fc1cb1
DJ
16362006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1637
1638 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1639 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1640 (asconfig.texi): Don't set top_srcdir.
1641 * doc/as.texinfo: Don't use top_srcdir.
1642 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1643
2d545b82
L
16442006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1645
1646 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1647 * config/tc-tic30.c (output_invalid_buf): Likewise.
1648
1649 * config/tc-i386.c (output_invalid): Use snprintf instead of
1650 sprintf.
1651 * config/tc-ia64.c (declare_register_set): Likewise.
1652 (emit_one_bundle): Likewise.
1653 (check_dependencies): Likewise.
1654 * config/tc-tic30.c (output_invalid): Likewise.
1655
a8bc6c78
PB
16562006-05-02 Paul Brook <paul@codesourcery.com>
1657
1658 * config/tc-arm.c (arm_optimize_expr): New function.
1659 * config/tc-arm.h (md_optimize_expr): Define
1660 (arm_optimize_expr): Add prototype.
1661 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1662
58633d9a
BE
16632006-05-02 Ben Elliston <bje@au.ibm.com>
1664
22772e33
BE
1665 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1666 field unsigned.
1667
58633d9a
BE
1668 * sb.h (sb_list_vector): Move to sb.c.
1669 * sb.c (free_list): Use type of sb_list_vector directly.
1670 (sb_build): Fix off-by-one error in assertion about `size'.
1671
89cdfe57
BE
16722006-05-01 Ben Elliston <bje@au.ibm.com>
1673
1674 * listing.c (listing_listing): Remove useless loop.
1675 * macro.c (macro_expand): Remove is_positional local variable.
1676 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1677 and simplify surrounding expressions, where possible.
1678 (assign_symbol): Likewise.
1679 (s_weakref): Likewise.
1680 * symbols.c (colon): Likewise.
1681
c35da140
AM
16822006-05-01 James Lemke <jwlemke@wasabisystems.com>
1683
1684 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1685
9bcd4f99
TS
16862006-04-30 Thiemo Seufer <ths@mips.com>
1687 David Ung <davidu@mips.com>
1688
1689 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1690 (mips_immed): New table that records various handling of udi
1691 instruction patterns.
1692 (mips_ip): Adds udi handling.
1693
001ae1a4
AM
16942006-04-28 Alan Modra <amodra@bigpond.net.au>
1695
1696 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1697 of list rather than beginning.
1698
136da414
JB
16992006-04-26 Julian Brown <julian@codesourcery.com>
1700
1701 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1702 (is_quarter_float): Rename from above. Simplify slightly.
1703 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1704 number.
1705 (parse_neon_mov): Parse floating-point constants.
1706 (neon_qfloat_bits): Fix encoding.
1707 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1708 preference to integer encoding when using the F32 type.
1709
dcbf9037
JB
17102006-04-26 Julian Brown <julian@codesourcery.com>
1711
1712 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1713 zero-initialising structures containing it will lead to invalid types).
1714 (arm_it): Add vectype to each operand.
1715 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1716 defined field.
1717 (neon_typed_alias): New structure. Extra information for typed
1718 register aliases.
1719 (reg_entry): Add neon type info field.
1720 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1721 Break out alternative syntax for coprocessor registers, etc. into...
1722 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1723 out from arm_reg_parse.
1724 (parse_neon_type): Move. Return SUCCESS/FAIL.
1725 (first_error): New function. Call to ensure first error which occurs is
1726 reported.
1727 (parse_neon_operand_type): Parse exactly one type.
1728 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1729 (parse_typed_reg_or_scalar): New function. Handle core of both
1730 arm_typed_reg_parse and parse_scalar.
1731 (arm_typed_reg_parse): Parse a register with an optional type.
1732 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1733 result.
1734 (parse_scalar): Parse a Neon scalar with optional type.
1735 (parse_reg_list): Use first_error.
1736 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1737 (neon_alias_types_same): New function. Return true if two (alias) types
1738 are the same.
1739 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1740 of elements.
1741 (insert_reg_alias): Return new reg_entry not void.
1742 (insert_neon_reg_alias): New function. Insert type/index information as
1743 well as register for alias.
1744 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1745 make typed register aliases accordingly.
1746 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1747 of line.
1748 (s_unreq): Delete type information if present.
1749 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1750 (s_arm_unwind_save_mmxwcg): Likewise.
1751 (s_arm_unwind_movsp): Likewise.
1752 (s_arm_unwind_setfp): Likewise.
1753 (parse_shift): Likewise.
1754 (parse_shifter_operand): Likewise.
1755 (parse_address): Likewise.
1756 (parse_tb): Likewise.
1757 (tc_arm_regname_to_dw2regnum): Likewise.
1758 (md_pseudo_table): Add dn, qn.
1759 (parse_neon_mov): Handle typed operands.
1760 (parse_operands): Likewise.
1761 (neon_type_mask): Add N_SIZ.
1762 (N_ALLMODS): New macro.
1763 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1764 (el_type_of_type_chk): Add some safeguards.
1765 (modify_types_allowed): Fix logic bug.
1766 (neon_check_type): Handle operands with types.
1767 (neon_three_same): Remove redundant optional arg handling.
1768 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1769 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1770 (do_neon_step): Adjust accordingly.
1771 (neon_cmode_for_logic_imm): Use first_error.
1772 (do_neon_bitfield): Call neon_check_type.
1773 (neon_dyadic): Rename to...
1774 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1775 to allow modification of type of the destination.
1776 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1777 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1778 (do_neon_compare): Make destination be an untyped bitfield.
1779 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1780 (neon_mul_mac): Return early in case of errors.
1781 (neon_move_immediate): Use first_error.
1782 (neon_mac_reg_scalar_long): Fix type to include scalar.
1783 (do_neon_dup): Likewise.
1784 (do_neon_mov): Likewise (in several places).
1785 (do_neon_tbl_tbx): Fix type.
1786 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1787 (do_neon_ld_dup): Exit early in case of errors and/or use
1788 first_error.
1789 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1790 Handle .dn/.qn directives.
1791 (REGDEF): Add zero for reg_entry neon field.
1792
5287ad62
JB
17932006-04-26 Julian Brown <julian@codesourcery.com>
1794
1795 * config/tc-arm.c (limits.h): Include.
1796 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1797 (fpu_vfp_v3_or_neon_ext): Declare constants.
1798 (neon_el_type): New enumeration of types for Neon vector elements.
1799 (neon_type_el): New struct. Define type and size of a vector element.
1800 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1801 instruction.
1802 (neon_type): Define struct. The type of an instruction.
1803 (arm_it): Add 'vectype' for the current instruction.
1804 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1805 (vfp_sp_reg_pos): Rename to...
1806 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1807 tags.
1808 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1809 (Neon D or Q register).
1810 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1811 register.
1812 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1813 (my_get_expression): Allow above constant as argument to accept
1814 64-bit constants with optional prefix.
1815 (arm_reg_parse): Add extra argument to return the specific type of
1816 register in when either a D or Q register (REG_TYPE_NDQ) is
1817 requested. Can be NULL.
1818 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1819 (parse_reg_list): Update for new arm_reg_parse args.
1820 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1821 (parse_neon_el_struct_list): New function. Parse element/structure
1822 register lists for VLD<n>/VST<n> instructions.
1823 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1824 (s_arm_unwind_save_mmxwr): Likewise.
1825 (s_arm_unwind_save_mmxwcg): Likewise.
1826 (s_arm_unwind_movsp): Likewise.
1827 (s_arm_unwind_setfp): Likewise.
1828 (parse_big_immediate): New function. Parse an immediate, which may be
1829 64 bits wide. Put results in inst.operands[i].
1830 (parse_shift): Update for new arm_reg_parse args.
1831 (parse_address): Likewise. Add parsing of alignment specifiers.
1832 (parse_neon_mov): Parse the operands of a VMOV instruction.
1833 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1834 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1835 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1836 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1837 (parse_operands): Handle new codes above.
1838 (encode_arm_vfp_sp_reg): Rename to...
1839 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1840 selected VFP version only supports D0-D15.
1841 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1842 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1843 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1844 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1845 encode_arm_vfp_reg name, and allow 32 D regs.
1846 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1847 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1848 regs.
1849 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1850 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1851 constant-load and conversion insns introduced with VFPv3.
1852 (neon_tab_entry): New struct.
1853 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1854 those which are the targets of pseudo-instructions.
1855 (neon_opc): Enumerate opcodes, use as indices into...
1856 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1857 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1858 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1859 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1860 neon_enc_tab.
1861 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1862 Neon instructions.
1863 (neon_type_mask): New. Compact type representation for type checking.
1864 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1865 permitted type combinations.
1866 (N_IGNORE_TYPE): New macro.
1867 (neon_check_shape): New function. Check an instruction shape for
1868 multiple alternatives. Return the specific shape for the current
1869 instruction.
1870 (neon_modify_type_size): New function. Modify a vector type and size,
1871 depending on the bit mask in argument 1.
1872 (neon_type_promote): New function. Convert a given "key" type (of an
1873 operand) into the correct type for a different operand, based on a bit
1874 mask.
1875 (type_chk_of_el_type): New function. Convert a type and size into the
1876 compact representation used for type checking.
1877 (el_type_of_type_ckh): New function. Reverse of above (only when a
1878 single bit is set in the bit mask).
1879 (modify_types_allowed): New function. Alter a mask of allowed types
1880 based on a bit mask of modifications.
1881 (neon_check_type): New function. Check the type of the current
1882 instruction against the variable argument list. The "key" type of the
1883 instruction is returned.
1884 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1885 a Neon data-processing instruction depending on whether we're in ARM
1886 mode or Thumb-2 mode.
1887 (neon_logbits): New function.
1888 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1889 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1890 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1891 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1892 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1893 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1894 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1895 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1896 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1897 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1898 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1899 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1900 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1901 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1902 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1903 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1904 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1905 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1906 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1907 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1908 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1909 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1910 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1911 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1912 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1913 helpers.
1914 (parse_neon_type): New function. Parse Neon type specifier.
1915 (opcode_lookup): Allow parsing of Neon type specifiers.
1916 (REGNUM2, REGSETH, REGSET2): New macros.
1917 (reg_names): Add new VFPv3 and Neon registers.
1918 (NUF, nUF, NCE, nCE): New macros for opcode table.
1919 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1920 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1921 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1922 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1923 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1924 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1925 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1926 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1927 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1928 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1929 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1930 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1931 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1932 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1933 fto[us][lh][sd].
1934 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1935 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1936 (arm_option_cpu_value): Add vfp3 and neon.
1937 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1938 VFPv1 attribute.
1939
1946c96e
BW
19402006-04-25 Bob Wilson <bob.wilson@acm.org>
1941
1942 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1943 syntax instead of hardcoded opcodes with ".w18" suffixes.
1944 (wide_branch_opcode): New.
1945 (build_transition): Use it to check for wide branch opcodes with
1946 either ".w18" or ".w15" suffixes.
1947
5033a645
BW
19482006-04-25 Bob Wilson <bob.wilson@acm.org>
1949
1950 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1951 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1952 frag's is_literal flag.
1953
395fa56f
BW
19542006-04-25 Bob Wilson <bob.wilson@acm.org>
1955
1956 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1957
708587a4
KH
19582006-04-23 Kazu Hirata <kazu@codesourcery.com>
1959
1960 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1961 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1962 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1963 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1964 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1965
8463be01
PB
19662005-04-20 Paul Brook <paul@codesourcery.com>
1967
1968 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1969 all targets.
1970 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1971
f26a5955
AM
19722006-04-19 Alan Modra <amodra@bigpond.net.au>
1973
1974 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1975 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1976 Make some cpus unsupported on ELF. Run "make dep-am".
1977 * Makefile.in: Regenerate.
1978
241a6c40
AM
19792006-04-19 Alan Modra <amodra@bigpond.net.au>
1980
1981 * configure.in (--enable-targets): Indent help message.
1982 * configure: Regenerate.
1983
bb8f5920
L
19842006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1985
1986 PR gas/2533
1987 * config/tc-i386.c (i386_immediate): Check illegal immediate
1988 register operand.
1989
23d9d9de
AM
19902006-04-18 Alan Modra <amodra@bigpond.net.au>
1991
64e74474
AM
1992 * config/tc-i386.c: Formatting.
1993 (output_disp, output_imm): ISO C90 params.
1994
6cbe03fb
AM
1995 * frags.c (frag_offset_fixed_p): Constify args.
1996 * frags.h (frag_offset_fixed_p): Ditto.
1997
23d9d9de
AM
1998 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1999 (COFF_MAGIC): Delete.
a37d486e
AM
2000
2001 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
2002
e7403566
DJ
20032006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
2004
2005 * po/POTFILES.in: Regenerated.
2006
58ab4f3d
MM
20072006-04-16 Mark Mitchell <mark@codesourcery.com>
2008
2009 * doc/as.texinfo: Mention that some .type syntaxes are not
2010 supported on all architectures.
2011
482fd9f9
BW
20122006-04-14 Sterling Augustine <sterling@tensilica.com>
2013
2014 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
2015 instructions when such transformations have been disabled.
2016
05d58145
BW
20172006-04-10 Sterling Augustine <sterling@tensilica.com>
2018
2019 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
2020 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
2021 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
2022 decoding the loop instructions. Remove current_offset variable.
2023 (xtensa_fix_short_loop_frags): Likewise.
2024 (min_bytes_to_other_loop_end): Remove current_offset argument.
2025
9e75b3fa
AM
20262006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
2027
a37d486e 2028 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
2029 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
2030
d727e8c2
NC
20312006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
2032
2033 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
2034 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
2035 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
2036 atmega644, atmega329, atmega3290, atmega649, atmega6490,
2037 atmega406, atmega640, atmega1280, atmega1281, at90can32,
2038 at90can64, at90usb646, at90usb647, at90usb1286 and
2039 at90usb1287.
2040 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2041
d252fdde
PB
20422006-04-07 Paul Brook <paul@codesourcery.com>
2043
2044 * config/tc-arm.c (parse_operands): Set default error message.
2045
ab1eb5fe
PB
20462006-04-07 Paul Brook <paul@codesourcery.com>
2047
2048 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
2049
7ae2971b
PB
20502006-04-07 Paul Brook <paul@codesourcery.com>
2051
2052 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
2053
53365c0d
PB
20542006-04-07 Paul Brook <paul@codesourcery.com>
2055
2056 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
2057 (move_or_literal_pool): Handle Thumb-2 instructions.
2058 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
2059
45aa61fe
AM
20602006-04-07 Alan Modra <amodra@bigpond.net.au>
2061
2062 PR 2512.
2063 * config/tc-i386.c (match_template): Move 64-bit operand tests
2064 inside loop.
2065
108a6f8e
CD
20662006-04-06 Carlos O'Donell <carlos@codesourcery.com>
2067
2068 * po/Make-in: Add install-html target.
2069 * Makefile.am: Add install-html and install-html-recursive targets.
2070 * Makefile.in: Regenerate.
2071 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
2072 * configure: Regenerate.
2073 * doc/Makefile.am: Add install-html and install-html-am targets.
2074 * doc/Makefile.in: Regenerate.
2075
ec651a3b
AM
20762006-04-06 Alan Modra <amodra@bigpond.net.au>
2077
2078 * frags.c (frag_offset_fixed_p): Reinitialise offset before
2079 second scan.
2080
910600e9
RS
20812006-04-05 Richard Sandiford <richard@codesourcery.com>
2082 Daniel Jacobowitz <dan@codesourcery.com>
2083
2084 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
2085 (GOTT_BASE, GOTT_INDEX): New.
2086 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2087 GOTT_INDEX when generating VxWorks PIC.
2088 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2089 use the generic *-*-vxworks* stanza instead.
2090
99630778
AM
20912006-04-04 Alan Modra <amodra@bigpond.net.au>
2092
2093 PR 997
2094 * frags.c (frag_offset_fixed_p): New function.
2095 * frags.h (frag_offset_fixed_p): Declare.
2096 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2097 (resolve_expression): Likewise.
2098
a02728c8
BW
20992006-04-03 Sterling Augustine <sterling@tensilica.com>
2100
2101 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2102 of the same length but different numbers of slots.
2103
9dfde49d
AS
21042006-03-30 Andreas Schwab <schwab@suse.de>
2105
2106 * configure.in: Fix help string for --enable-targets option.
2107 * configure: Regenerate.
2108
2da12c60
NS
21092006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2110
6d89cc8f
NS
2111 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2112 (m68k_ip): ... here. Use for all chips. Protect against buffer
2113 overrun and avoid excessive copying.
2114
2da12c60
NS
2115 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2116 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2117 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2118 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2119 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2120 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2121 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2122 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2123 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2124 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2125 (struct m68k_cpu): Change chip field to control_regs.
2126 (current_chip): Remove.
2127 (control_regs): New.
2128 (m68k_archs, m68k_extensions): Adjust.
2129 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2130 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2131 (find_cf_chip): Reimplement for new organization of cpu table.
2132 (select_control_regs): Remove.
2133 (mri_chip): Adjust.
2134 (struct save_opts): Save control regs, not chip.
2135 (s_save, s_restore): Adjust.
2136 (m68k_lookup_cpu): Give deprecated warning when necessary.
2137 (m68k_init_arch): Adjust.
2138 (md_show_usage): Adjust for new cpu table organization.
2139
1ac4baed
BS
21402006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2141
2142 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2143 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2144 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2145 "elf/bfin.h".
2146 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2147 (any_gotrel): New rule.
2148 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2149 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2150 "elf/bfin.h".
2151 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2152 (bfin_pic_ptr): New function.
2153 (md_pseudo_table): Add it for ".picptr".
2154 (OPTION_FDPIC): New macro.
2155 (md_longopts): Add -mfdpic.
2156 (md_parse_option): Handle it.
2157 (md_begin): Set BFD flags.
2158 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2159 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2160 us for GOT relocs.
2161 * Makefile.am (bfin-parse.o): Update dependencies.
2162 (DEPTC_bfin_elf): Likewise.
2163 * Makefile.in: Regenerate.
2164
a9d34880
RS
21652006-03-25 Richard Sandiford <richard@codesourcery.com>
2166
2167 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2168 mcfemac instead of mcfmac.
2169
9ca26584
AJ
21702006-03-23 Michael Matz <matz@suse.de>
2171
2172 * config/tc-i386.c (type_names): Correct placement of 'static'.
2173 (reloc): Map some more relocs to their 64 bit counterpart when
2174 size is 8.
2175 (output_insn): Work around breakage if DEBUG386 is defined.
2176 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2177 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2178 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2179 different from i386.
2180 (output_imm): Ditto.
2181 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2182 Imm64.
2183 (md_convert_frag): Jumps can now be larger than 2GB away, error
2184 out in that case.
2185 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2186 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2187
0a44bf69
RS
21882006-03-22 Richard Sandiford <richard@codesourcery.com>
2189 Daniel Jacobowitz <dan@codesourcery.com>
2190 Phil Edwards <phil@codesourcery.com>
2191 Zack Weinberg <zack@codesourcery.com>
2192 Mark Mitchell <mark@codesourcery.com>
2193 Nathan Sidwell <nathan@codesourcery.com>
2194
2195 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2196 (md_begin): Complain about -G being used for PIC. Don't change
2197 the text, data and bss alignments on VxWorks.
2198 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2199 generating VxWorks PIC.
2200 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2201 (macro): Likewise, but do not treat la $25 specially for
2202 VxWorks PIC, and do not handle jal.
2203 (OPTION_MVXWORKS_PIC): New macro.
2204 (md_longopts): Add -mvxworks-pic.
2205 (md_parse_option): Don't complain about using PIC and -G together here.
2206 Handle OPTION_MVXWORKS_PIC.
2207 (md_estimate_size_before_relax): Always use the first relaxation
2208 sequence on VxWorks.
2209 * config/tc-mips.h (VXWORKS_PIC): New.
2210
080eb7fe
PB
22112006-03-21 Paul Brook <paul@codesourcery.com>
2212
2213 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2214
03aaa593
BW
22152006-03-21 Sterling Augustine <sterling@tensilica.com>
2216
2217 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2218 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2219 (get_loop_align_size): New.
2220 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2221 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2222 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2223 (get_noop_aligned_address): Use get_loop_align_size.
2224 (get_aligned_diff): Likewise.
2225
3e94bf1a
PB
22262006-03-21 Paul Brook <paul@codesourcery.com>
2227
2228 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2229
dfa9f0d5
PB
22302006-03-20 Paul Brook <paul@codesourcery.com>
2231
2232 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2233 (do_t_branch): Encode branches inside IT blocks as unconditional.
2234 (do_t_cps): New function.
2235 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2236 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2237 (opcode_lookup): Allow conditional suffixes on all instructions in
2238 Thumb mode.
2239 (md_assemble): Advance condexec state before checking for errors.
2240 (insns): Use do_t_cps.
2241
6e1cb1a6
PB
22422006-03-20 Paul Brook <paul@codesourcery.com>
2243
2244 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2245 outputting the insn.
2246
0a966e2d
JBG
22472006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2248
2249 * config/tc-vax.c: Update copyright year.
2250 * config/tc-vax.h: Likewise.
2251
a49fcc17
JBG
22522006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2253
2254 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2255 make it static.
2256 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2257
f5208ef2
PB
22582006-03-17 Paul Brook <paul@codesourcery.com>
2259
2260 * config/tc-arm.c (insns): Add ldm and stm.
2261
cb4c78d6
BE
22622006-03-17 Ben Elliston <bje@au.ibm.com>
2263
2264 PR gas/2446
2265 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2266
c16d2bf0
PB
22672006-03-16 Paul Brook <paul@codesourcery.com>
2268
2269 * config/tc-arm.c (insns): Add "svc".
2270
80ca4e2c
BW
22712006-03-13 Bob Wilson <bob.wilson@acm.org>
2272
2273 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2274 flag and avoid double underscore prefixes.
2275
3a4a14e9
PB
22762006-03-10 Paul Brook <paul@codesourcery.com>
2277
2278 * config/tc-arm.c (md_begin): Handle EABIv5.
2279 (arm_eabis): Add EF_ARM_EABI_VER5.
2280 * doc/c-arm.texi: Document -meabi=5.
2281
518051dc
BE
22822006-03-10 Ben Elliston <bje@au.ibm.com>
2283
2284 * app.c (do_scrub_chars): Simplify string handling.
2285
00a97672
RS
22862006-03-07 Richard Sandiford <richard@codesourcery.com>
2287 Daniel Jacobowitz <dan@codesourcery.com>
2288 Zack Weinberg <zack@codesourcery.com>
2289 Nathan Sidwell <nathan@codesourcery.com>
2290 Paul Brook <paul@codesourcery.com>
2291 Ricardo Anguiano <anguiano@codesourcery.com>
2292 Phil Edwards <phil@codesourcery.com>
2293
2294 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2295 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2296 R_ARM_ABS12 reloc.
2297 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2298 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2299 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2300
b29757dc
BW
23012006-03-06 Bob Wilson <bob.wilson@acm.org>
2302
2303 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2304 even when using the text-section-literals option.
2305
0b2e31dc
NS
23062006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2307
2308 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2309 and cf.
2310 (m68k_ip): <case 'J'> Check we have some control regs.
2311 (md_parse_option): Allow raw arch switch.
2312 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2313 whether 68881 or cfloat was meant by -mfloat.
2314 (md_show_usage): Adjust extension display.
2315 (m68k_elf_final_processing): Adjust.
2316
df406460
NC
23172006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2318
2319 * config/tc-avr.c (avr_mod_hash_value): New function.
2320 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2321 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2322 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2323 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2324 of (int).
2325 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2326 fixups, abort otherwise.
df406460
NC
2327 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2328 tc_fix_adjustable): Define.
a70ae331 2329
53022e4a
JW
23302006-03-02 James E Wilson <wilson@specifix.com>
2331
2332 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2333 change the template, then clear md.slot[curr].end_of_insn_group.
2334
9f6f925e
JB
23352006-02-28 Jan Beulich <jbeulich@novell.com>
2336
2337 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2338
0e31b3e1
JB
23392006-02-28 Jan Beulich <jbeulich@novell.com>
2340
2341 PR/1070
2342 * macro.c (getstring): Don't treat parentheses special anymore.
2343 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2344 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2345 characters.
2346
10cd14b4
AM
23472006-02-28 Mat <mat@csail.mit.edu>
2348
2349 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2350
63752a75
JJ
23512006-02-27 Jakub Jelinek <jakub@redhat.com>
2352
2353 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2354 field.
2355 (CFI_signal_frame): Define.
2356 (cfi_pseudo_table): Add .cfi_signal_frame.
2357 (dot_cfi): Handle CFI_signal_frame.
2358 (output_cie): Handle cie->signal_frame.
2359 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2360 different. Copy signal_frame from FDE to newly created CIE.
2361 * doc/as.texinfo: Document .cfi_signal_frame.
2362
f7d9e5c3
CD
23632006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2364
2365 * doc/Makefile.am: Add html target.
2366 * doc/Makefile.in: Regenerate.
2367 * po/Make-in: Add html target.
2368
331d2d0d
L
23692006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2370
8502d882 2371 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2372 Instructions.
2373
8502d882 2374 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2375 (CpuUnknownFlags): Add CpuMNI.
2376
10156f83
DM
23772006-02-24 David S. Miller <davem@sunset.davemloft.net>
2378
2379 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2380 (hpriv_reg_table): New table for hyperprivileged registers.
2381 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2382 register encoding.
2383
6772dd07
DD
23842006-02-24 DJ Delorie <dj@redhat.com>
2385
2386 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2387 (tc_gen_reloc): Don't define.
2388 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2389 (OPTION_LINKRELAX): New.
2390 (md_longopts): Add it.
2391 (m32c_relax): New.
2392 (md_parse_options): Set it.
2393 (md_assemble): Emit relaxation relocs as needed.
2394 (md_convert_frag): Emit relaxation relocs as needed.
2395 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2396 (m32c_apply_fix): New.
2397 (tc_gen_reloc): New.
2398 (m32c_force_relocation): Force out jump relocs when relaxing.
2399 (m32c_fix_adjustable): Return false if relaxing.
2400
62b3e311
PB
24012006-02-24 Paul Brook <paul@codesourcery.com>
2402
2403 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2404 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2405 (struct asm_barrier_opt): Define.
2406 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2407 (parse_psr): Accept V7M psr names.
2408 (parse_barrier): New function.
2409 (enum operand_parse_code): Add OP_oBARRIER.
2410 (parse_operands): Implement OP_oBARRIER.
2411 (do_barrier): New function.
2412 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2413 (do_t_cpsi): Add V7M restrictions.
2414 (do_t_mrs, do_t_msr): Validate V7M variants.
2415 (md_assemble): Check for NULL variants.
2416 (v7m_psrs, barrier_opt_names): New tables.
2417 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2418 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2419 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2420 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2421 (struct cpu_arch_ver_table): Define.
2422 (cpu_arch_ver): New.
2423 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2424 Tag_CPU_arch_profile.
2425 * doc/c-arm.texi: Document new cpu and arch options.
2426
59cf82fe
L
24272006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2428
2429 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2430
19a7219f
L
24312006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2432
2433 * config/tc-ia64.c: Update copyright years.
2434
7f3dfb9c
L
24352006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2436
2437 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2438 SDM 2.2.
2439
f40d1643
PB
24402005-02-22 Paul Brook <paul@codesourcery.com>
2441
2442 * config/tc-arm.c (do_pld): Remove incorrect write to
2443 inst.instruction.
2444 (encode_thumb32_addr_mode): Use correct operand.
2445
216d22bc
PB
24462006-02-21 Paul Brook <paul@codesourcery.com>
2447
2448 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2449
d70c5fc7
NC
24502006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2451 Anil Paranjape <anilp1@kpitcummins.com>
2452 Shilin Shakti <shilins@kpitcummins.com>
2453
2454 * Makefile.am: Add xc16x related entry.
2455 * Makefile.in: Regenerate.
2456 * configure.in: Added xc16x related entry.
2457 * configure: Regenerate.
2458 * config/tc-xc16x.h: New file
2459 * config/tc-xc16x.c: New file
2460 * doc/c-xc16x.texi: New file for xc16x
2461 * doc/all.texi: Entry for xc16x
a70ae331 2462 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2463 * NEWS: Announce the support for the new target.
2464
aaa2ab3d
NH
24652006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2466
2467 * configure.tgt: set emulation for mips-*-netbsd*
2468
82de001f
JJ
24692006-02-14 Jakub Jelinek <jakub@redhat.com>
2470
2471 * config.in: Rebuilt.
2472
431ad2d0
BW
24732006-02-13 Bob Wilson <bob.wilson@acm.org>
2474
2475 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2476 from 1, not 0, in error messages.
2477 (md_assemble): Simplify special-case check for ENTRY instructions.
2478 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2479 operand in error message.
2480
94089a50
JM
24812006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2482
2483 * configure.tgt (arm-*-linux-gnueabi*): Change to
2484 arm-*-linux-*eabi*.
2485
52de4c06
NC
24862006-02-10 Nick Clifton <nickc@redhat.com>
2487
70e45ad9
NC
2488 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2489 32-bit value is propagated into the upper bits of a 64-bit long.
2490
52de4c06
NC
2491 * config/tc-arc.c (init_opcode_tables): Fix cast.
2492 (arc_extoper, md_operand): Likewise.
2493
21af2bbd
BW
24942006-02-09 David Heine <dlheine@tensilica.com>
2495
2496 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2497 each relaxation step.
2498
75a706fc 24992006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2500
75a706fc
L
2501 * configure.in (CHECK_DECLS): Add vsnprintf.
2502 * configure: Regenerate.
2503 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2504 include/declare here, but...
2505 * as.h: Move code detecting VARARGS idiom to the top.
2506 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2507 (vsnprintf): Declare if not already declared.
2508
0d474464
L
25092006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2510
2511 * as.c (close_output_file): New.
2512 (main): Register close_output_file with xatexit before
2513 dump_statistics. Don't call output_file_close.
2514
266abb8f
NS
25152006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2516
2517 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2518 mcf5329_control_regs): New.
2519 (not_current_architecture, selected_arch, selected_cpu): New.
2520 (m68k_archs, m68k_extensions): New.
2521 (archs): Renamed to ...
2522 (m68k_cpus): ... here. Adjust.
2523 (n_arches): Remove.
2524 (md_pseudo_table): Add arch and cpu directives.
2525 (find_cf_chip, m68k_ip): Adjust table scanning.
2526 (no_68851, no_68881): Remove.
2527 (md_assemble): Lazily initialize.
2528 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2529 (md_init_after_args): Move functionality to m68k_init_arch.
2530 (mri_chip): Adjust table scanning.
2531 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2532 options with saner parsing.
2533 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2534 m68k_init_arch): New.
2535 (s_m68k_cpu, s_m68k_arch): New.
2536 (md_show_usage): Adjust.
2537 (m68k_elf_final_processing): Set CF EF flags.
2538 * config/tc-m68k.h (m68k_init_after_args): Remove.
2539 (tc_init_after_args): Remove.
2540 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2541 (M68k-Directives): Document .arch and .cpu directives.
2542
134dcee5
AM
25432006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2544
a70ae331
AM
2545 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2546 synonyms for equ and defl.
134dcee5
AM
2547 (z80_cons_fix_new): New function.
2548 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2549 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2550 now handled as pseudo-op rather than an instruction.
2551 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2552 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2553 Add entries for def24,def32,d24,d32.
2554 (md_assemble): Improved error handling.
2555 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2556 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2557 (z80_cons_fix_new): Declare.
a70ae331 2558 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2559 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2560
a9931606
PB
25612006-02-02 Paul Brook <paul@codesourcery.com>
2562
2563 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2564
ef8d22e6
PB
25652005-02-02 Paul Brook <paul@codesourcery.com>
2566
2567 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2568 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2569 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2570 T2_OPCODE_RSB): Define.
2571 (thumb32_negate_data_op): New function.
2572 (md_apply_fix): Use it.
2573
e7da6241
BW
25742006-01-31 Bob Wilson <bob.wilson@acm.org>
2575
2576 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2577 fields.
2578 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2579 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2580 subtracted symbols.
2581 (relaxation_requirements): Add pfinish_frag argument and use it to
2582 replace setting tinsn->record_fix fields.
2583 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2584 and vinsn_to_insnbuf. Remove references to record_fix and
2585 slot_sub_symbols fields.
2586 (xtensa_mark_narrow_branches): Delete unused code.
2587 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2588 a symbol.
2589 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2590 record_fix fields.
2591 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2592 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2593 of the record_fix field. Simplify error messages for unexpected
2594 symbolic operands.
2595 (set_expr_symbol_offset_diff): Delete.
2596
79134647
PB
25972006-01-31 Paul Brook <paul@codesourcery.com>
2598
2599 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2600
e74cfd16
PB
26012006-01-31 Paul Brook <paul@codesourcery.com>
2602 Richard Earnshaw <rearnsha@arm.com>
2603
2604 * config/tc-arm.c: Use arm_feature_set.
2605 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2606 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2607 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2608 New variables.
2609 (insns): Use them.
2610 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2611 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2612 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2613 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2614 feature flags.
2615 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2616 (arm_opts): Move old cpu/arch options from here...
2617 (arm_legacy_opts): ... to here.
2618 (md_parse_option): Search arm_legacy_opts.
2619 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2620 (arm_float_abis, arm_eabis): Make const.
2621
d47d412e
BW
26222006-01-25 Bob Wilson <bob.wilson@acm.org>
2623
2624 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2625
b14273fe
JZ
26262006-01-21 Jie Zhang <jie.zhang@analog.com>
2627
2628 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2629 in load immediate intruction.
2630
39cd1c76
JZ
26312006-01-21 Jie Zhang <jie.zhang@analog.com>
2632
2633 * config/bfin-parse.y (value_match): Use correct conversion
2634 specifications in template string for __FILE__ and __LINE__.
2635 (binary): Ditto.
2636 (unary): Ditto.
2637
67a4f2b7
AO
26382006-01-18 Alexandre Oliva <aoliva@redhat.com>
2639
2640 Introduce TLS descriptors for i386 and x86_64.
2641 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2642 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2643 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2644 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2645 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2646 displacement bits.
2647 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2648 (lex_got): Handle @tlsdesc and @tlscall.
2649 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2650
8ad7c533
NC
26512006-01-11 Nick Clifton <nickc@redhat.com>
2652
2653 Fixes for building on 64-bit hosts:
2654 * config/tc-avr.c (mod_index): New union to allow conversion
2655 between pointers and integers.
2656 (md_begin, avr_ldi_expression): Use it.
2657 * config/tc-i370.c (md_assemble): Add cast for argument to print
2658 statement.
2659 * config/tc-tic54x.c (subsym_substitute): Likewise.
2660 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2661 opindex field of fr_cgen structure into a pointer so that it can
2662 be stored in a frag.
2663 * config/tc-mn10300.c (md_assemble): Likewise.
2664 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2665 types.
2666 * config/tc-v850.c: Replace uses of (int) casts with correct
2667 types.
2668
4dcb3903
L
26692006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2670
2671 PR gas/2117
2672 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2673
e0f6ea40
HPN
26742006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2675
2676 PR gas/2101
2677 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2678 a local-label reference.
2679
e88d958a 2680For older changes see ChangeLog-2005
08d56133
NC
2681\f
2682Local Variables:
2683mode: change-log
2684left-margin: 8
2685fill-column: 74
2686version-control: never
2687End:
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